KR100664000B1 - Simox 기판의 제조 방법 및 simox 기판 - Google Patents
Simox 기판의 제조 방법 및 simox 기판 Download PDFInfo
- Publication number
- KR100664000B1 KR100664000B1 KR1020037012632A KR20037012632A KR100664000B1 KR 100664000 B1 KR100664000 B1 KR 100664000B1 KR 1020037012632 A KR1020037012632 A KR 1020037012632A KR 20037012632 A KR20037012632 A KR 20037012632A KR 100664000 B1 KR100664000 B1 KR 100664000B1
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- South Korea
- Prior art keywords
- substrate
- ion implantation
- oxygen ion
- layer
- heat treatment
- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76243—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
Abstract
Description
Claims (13)
- 실리콘 단결정 기판에 산소 이온을 주입한 후 고온 열처리를 실시하여 매립 산화물층 및 표면 단결정 실리콘층을 형성하는 SIM0X 기판의 제조 방법에 있어서,최초의 산소 이온 주입 후에 최초의 고온 열 처리를 실시하여, 표면 단결정 실리콘층 및 그 하부에 매립 산화물층을 형성한 후, 상기 표면 단결정 실리콘의 일부를 제거한 다음, 제 2 회 이후의 산소 이온 주입을, 주입 산소 분포의 최대 위치까지 형성되어 있는 매립 산화물층과 그 하부의 기판과의 계면 보다 아래 쪽에 배치되도록 하여 실시한 후 고온 열처리를 실시하는 것을 반복하는 것을 특징으로 하는 SIMOX 기판의 제조 방법.
- 제 1 항에 있어서,상기 표면 단결정 실리콘층 표면의 제거는 반응성 물질을 사용하여 식각하는 것인 것을 특징으로 하는 SIMOX 기판의 제조 방법.
- 제 1 항에 있어서,상기 표면 단결정 실리콘층 표면의 제거는 기판 표면에 산화막을 형성한 다음 그 산화막을 제거하는 것인 것을 특징으로 하는 SIMOX 기판의 제조 방법.
- 제 1 항에 있어서,상기 표면 단결정 실리콘층 표면의 제거는 표면 연마에 의한 것인 것을 특징으로 하는 SIMOX 기판의 제조 방법.
- 제 1 항에 있어서,상기 제 2 회 이후의 산소 이온 주입량은 그 때까지 이루어진 산소 이온 주입량의 합계를 넘지 않는 것을 특징으로 하는 SIMOX 기판의 제조 방법.
- 제 1 항에 있어서,상기 최초의 산소 이온 주입에 사용하는 가속 에너지와 상기 제 2 회 이후의 산소 이온 주입에 사용하는 가속 에너지는 다른 것을 특징으로 하는 SIMOX 기판의 제조 방법.
- 제 1 항에 있어서,상기 산소 이온 주입과 고온 열처리의 반복 회수는 2회인 것을 특징으로 하는 SIMOX 기판의 제조 방법.
- 제 1 항에 있어서,상기 최초의 산소 이온 주입 전에 실리콘 단결정 기판 표면에 미리 산화막을 형성하여 두고, 그 산화막을 상기 최초의 산소 이온 주입 후 또는 상기 최초의 고온 열처리 후에 제거하는 것을 특징으로 하는 SIMOX 기판의 제조 방법.
- 제 1 항에 있어서,상기 최초의 산소 이온 주입은 가속 에너지 150keV 이상 250keV 이하, 주입량 2 X 1017cm-2 이상 6 X 1017cm-2 이하의 조건에서 수행되고, 상기 2회째 이후의 산소 이온 주입은 가속 에너지 150keV 이상 250keV 이하, 주입량 0.1 X 1017cm-2 이상 6 X 1017cm-2 이하 및 실리콘 단결정 표면의 제거 깊이의 합계 20nm 이상 300nm 이하의 조건에서 수행되는 것을 특징으로 하는 SIMOX 기판의 제조 방법.
- 제 1 항 내지 제 9 항 중의 어느 한 항에 따른 방법에 의해 제조되는 SIMOX 기판으로서,상기 SIMOX 기판은 표면 단결정 실리콘층 및 매립 산화물층을 구비하며,상기 SIMOX 기판의 상기 표면 단결정 실리콘층의 두께는 10nm 이상 400nm 이하이고, 상기 매립 산화물층의 두께는 60nm 이상 250nm 이하인 것을 특징으로 하는 SIMOX 기판.
- 삭제
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Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001093227A JP2002289552A (ja) | 2001-03-28 | 2001-03-28 | Simox基板の製造方法およびsimox基板 |
| JPJP-P-2001-00093227 | 2001-03-28 | ||
| PCT/JP2002/003127 WO2002080276A1 (en) | 2001-03-28 | 2002-03-28 | Production method for simox substrate and simox substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20030089706A KR20030089706A (ko) | 2003-11-22 |
| KR100664000B1 true KR100664000B1 (ko) | 2007-01-03 |
Family
ID=18947588
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020037012632A Expired - Fee Related KR100664000B1 (ko) | 2001-03-28 | 2002-03-28 | Simox 기판의 제조 방법 및 simox 기판 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7067402B2 (ko) |
| EP (1) | EP1376699B1 (ko) |
| JP (1) | JP2002289552A (ko) |
| KR (1) | KR100664000B1 (ko) |
| TW (1) | TW540105B (ko) |
| WO (1) | WO2002080276A1 (ko) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004119943A (ja) * | 2002-09-30 | 2004-04-15 | Renesas Technology Corp | 半導体ウェハおよびその製造方法 |
| WO2004083496A1 (ja) * | 2003-02-25 | 2004-09-30 | Sumitomo Mitsubishi Silicon Corporation | シリコンウェーハ及びその製造方法、並びにシリコン単結晶育成方法 |
| JP4790211B2 (ja) * | 2003-06-13 | 2011-10-12 | シルトロニック・ジャパン株式会社 | Soi基板と半導体基板及びその製造方法 |
| US8450806B2 (en) * | 2004-03-31 | 2013-05-28 | International Business Machines Corporation | Method for fabricating strained silicon-on-insulator structures and strained silicon-on insulator structures formed thereby |
| US20060105559A1 (en) * | 2004-11-15 | 2006-05-18 | International Business Machines Corporation | Ultrathin buried insulators in Si or Si-containing material |
| JP2007005563A (ja) * | 2005-06-23 | 2007-01-11 | Sumco Corp | Simoxウェーハの製造方法 |
| US7880204B2 (en) * | 2006-10-02 | 2011-02-01 | Massachusetts Institute Of Technology | System and method for providing a high frequency response silicon photodetector |
| US8110890B2 (en) | 2007-06-05 | 2012-02-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating semiconductor device isolation structure |
| US8022487B2 (en) * | 2008-04-29 | 2011-09-20 | Intel Corporation | Increasing body dopant uniformity in multi-gate transistor devices |
| JP2010027959A (ja) * | 2008-07-23 | 2010-02-04 | Sumco Corp | 高抵抗simoxウェーハの製造方法 |
| JP2010118382A (ja) * | 2008-11-11 | 2010-05-27 | Sumco Corp | Simoxウェーハの結晶欠陥の低減方法 |
| JP2010062503A (ja) * | 2008-09-08 | 2010-03-18 | Sumco Corp | Simoxウェーハの結晶欠陥の低減方法及びsimoxウェーハ |
| US8030183B2 (en) * | 2008-09-08 | 2011-10-04 | Sumco Corporation | Method for reducing crystal defect of SIMOX wafer and SIMOX wafer |
| JP2010135538A (ja) * | 2008-12-04 | 2010-06-17 | Sumco Corp | 貼り合わせウェーハの製造方法 |
| US20100193879A1 (en) * | 2009-02-05 | 2010-08-05 | Ming-Han Liao | Isolation Region Implant and Structure |
| US8168507B2 (en) * | 2009-08-21 | 2012-05-01 | International Business Machines Corporation | Structure and method of forming enhanced array device isolation for implanted plate EDRAM |
| WO2011118205A1 (ja) * | 2010-03-26 | 2011-09-29 | 株式会社Sumco | Soiウェーハの製造方法 |
| CN102244029A (zh) * | 2011-06-28 | 2011-11-16 | 上海宏力半导体制造有限公司 | 绝缘体上的硅衬底制作工艺及绝缘体上的硅器件制作工艺 |
| CN102244080A (zh) * | 2011-06-28 | 2011-11-16 | 上海宏力半导体制造有限公司 | 绝缘体上的硅衬底结构及器件 |
| CN102522362B (zh) * | 2011-12-14 | 2015-06-24 | 中国科学院微电子研究所 | 一种改进soi结构抗辐照性能的方法 |
| CN106783725B (zh) * | 2016-12-27 | 2019-09-17 | 上海新傲科技股份有限公司 | 带有绝缘埋层的衬底的制备方法 |
| US11721554B2 (en) * | 2019-03-18 | 2023-08-08 | Intel Corporation | Stress compensation for wafer to wafer bonding |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5395771A (en) * | 1992-03-31 | 1995-03-07 | Sharp Kabushiki Kaisha | Graded implantation of oxygen and/or nitrogen constituents to define buried isolation region in semiconductor devices |
| JPH07335847A (ja) * | 1994-06-14 | 1995-12-22 | Nippon Steel Corp | 埋め込み酸化膜を有するシリコン基板の製造方法 |
| KR100199125B1 (ko) * | 1993-12-28 | 1999-06-15 | 다나카 미노루 | 반도체 기판의 제조방법 및 그 제조장치 |
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| US4786608A (en) * | 1986-12-30 | 1988-11-22 | Harris Corp. | Technique for forming electric field shielding layer in oxygen-implanted silicon substrate |
| FR2616590B1 (fr) * | 1987-06-15 | 1990-03-02 | Commissariat Energie Atomique | Procede de fabrication d'une couche d'isolant enterree dans un substrat semi-conducteur par implantation ionique et structure semi-conductrice comportant cette couche |
| JPH01117444A (ja) | 1987-10-29 | 1989-05-10 | Nec Corp | 監視制御方式 |
| JP2838444B2 (ja) * | 1991-02-05 | 1998-12-16 | 三菱電機株式会社 | シリコン基板中に埋込絶縁膜を形成する方法 |
| JPH05291543A (ja) | 1992-04-15 | 1993-11-05 | Fujitsu Ltd | 半導体装置の製造方法 |
| JP3036619B2 (ja) | 1994-03-23 | 2000-04-24 | コマツ電子金属株式会社 | Soi基板の製造方法およびsoi基板 |
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| JP2000082679A (ja) * | 1998-07-08 | 2000-03-21 | Canon Inc | 半導体基板とその作製方法 |
| JP3211233B2 (ja) | 1998-08-31 | 2001-09-25 | 日本電気株式会社 | Soi基板及びその製造方法 |
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| US6461933B2 (en) * | 2000-12-30 | 2002-10-08 | Texas Instruments Incorporated | SPIMOX/SIMOX combination with ITOX option |
| JP2002231651A (ja) * | 2001-02-02 | 2002-08-16 | Nippon Steel Corp | Simox基板およびその製造方法 |
| US6541356B2 (en) * | 2001-05-21 | 2003-04-01 | International Business Machines Corporation | Ultimate SIMOX |
| US6737332B1 (en) * | 2002-03-28 | 2004-05-18 | Advanced Micro Devices, Inc. | Semiconductor device formed over a multiple thickness buried oxide layer, and methods of making same |
-
2001
- 2001-03-28 JP JP2001093227A patent/JP2002289552A/ja active Pending
-
2002
- 2002-03-28 US US10/473,692 patent/US7067402B2/en not_active Expired - Lifetime
- 2002-03-28 TW TW091106213A patent/TW540105B/zh not_active IP Right Cessation
- 2002-03-28 KR KR1020037012632A patent/KR100664000B1/ko not_active Expired - Fee Related
- 2002-03-28 EP EP02707233A patent/EP1376699B1/en not_active Expired - Lifetime
- 2002-03-28 WO PCT/JP2002/003127 patent/WO2002080276A1/ja active Application Filing
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5395771A (en) * | 1992-03-31 | 1995-03-07 | Sharp Kabushiki Kaisha | Graded implantation of oxygen and/or nitrogen constituents to define buried isolation region in semiconductor devices |
| KR100199125B1 (ko) * | 1993-12-28 | 1999-06-15 | 다나카 미노루 | 반도체 기판의 제조방법 및 그 제조장치 |
| JPH07335847A (ja) * | 1994-06-14 | 1995-12-22 | Nippon Steel Corp | 埋め込み酸化膜を有するシリコン基板の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2002080276A1 (en) | 2002-10-10 |
| US20040171228A1 (en) | 2004-09-02 |
| TW540105B (en) | 2003-07-01 |
| JP2002289552A (ja) | 2002-10-04 |
| EP1376699B1 (en) | 2012-03-21 |
| EP1376699A1 (en) | 2004-01-02 |
| US7067402B2 (en) | 2006-06-27 |
| KR20030089706A (ko) | 2003-11-22 |
| EP1376699A4 (en) | 2009-04-08 |
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