KR100674230B1 - Non-contact static electricity prevention method - Google Patents
Non-contact static electricity prevention method Download PDFInfo
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- KR100674230B1 KR100674230B1 KR1020000070702A KR20000070702A KR100674230B1 KR 100674230 B1 KR100674230 B1 KR 100674230B1 KR 1020000070702 A KR1020000070702 A KR 1020000070702A KR 20000070702 A KR20000070702 A KR 20000070702A KR 100674230 B1 KR100674230 B1 KR 100674230B1
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- 238000000034 method Methods 0.000 title claims abstract description 41
- 230000003068 static effect Effects 0.000 title claims abstract description 22
- 230000005611 electricity Effects 0.000 title claims abstract description 19
- 230000002265 prevention Effects 0.000 title claims description 8
- 238000004519 manufacturing process Methods 0.000 claims abstract description 13
- 230000007547 defect Effects 0.000 claims abstract description 5
- 230000000694 effects Effects 0.000 claims abstract description 5
- 239000002184 metal Substances 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 230000006866 deterioration Effects 0.000 abstract description 3
- 238000005530 etching Methods 0.000 description 6
- 239000000758 substrate Substances 0.000 description 6
- 210000004027 cell Anatomy 0.000 description 5
- 239000004973 liquid crystal related substance Substances 0.000 description 5
- 210000002858 crystal cell Anatomy 0.000 description 3
- 239000010410 layer Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/32—Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
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Abstract
본 발명은 비접촉방식의 정전기 방지 방법을 개시하며, 개시된 본 발명에 따른 비접촉방식의 정전기 방지 방법은, LCD의 제조시 정전기 불량을 방지하기 위해서 배선 전체를 연결하도록 형성하는 아우터 쇼트링 라인(Outer short ring line)을 스크라이빙 라인(Scribing line)의 안쪽에 형성하여 ESD(Electro static discharge)의 영향을 감소시키며, 셀공정이 진행되고 스크라이빙 후에도 상기 아우터 쇼트링 라인(Outer short ring line)을 남겨두어 정전기를 방지하도록 하고, 최종작업인 그라인딩 공정에서 상기 아우트 쇼트를 제거함으로써 각각의 라인이 독립될 수 있도록 한 것을 특징으로 한다. 본 발명을 적용하면, 셀 제조공정의 진행중에 발생되는 정전기(ESD)에 의한 특성저하를 방지하기 위하여 스크라이빙시에 잘려나가는 아우트 쇼트링을 스크라이빙 라인의 안쪽에 형성시킴으로써 정전기 방지의 효과를 증가시켜 특성 저하를 방지할 수 있게 된다. The present invention discloses a non-contact type antistatic method, and the non-contact type antistatic method according to the present invention, an outer short ring line (Outer short) is formed so as to connect the entire wiring to prevent electrostatic defects during the manufacture of the LCD A ring line is formed inside the scribing line to reduce the influence of electro static discharge (ESD), and the outer short ring line is removed even after scribing. It can be left to prevent static electricity, and each line can be independent by removing the outer short in the grinding process as a final operation. According to the present invention, the effect of preventing static electricity by forming an outer short ring cut out during scribing inside the scribing line in order to prevent the deterioration of the characteristics caused by the electrostatic discharge (ESD) generated during the cell manufacturing process. The increase can be prevented.
Description
도 1a와 1b는 종래의 실시예에 따른 접촉식과 비접촉식 어레이 테스트 방식을 나타내는 도면,1A and 1B illustrate a contact and contactless array test scheme according to a conventional embodiment;
도 2는 본 발명에 따른 비접촉방식의 정전기 방지를 나타내기 위한 도면,2 is a view for showing a non-contact static electricity prevention according to the present invention,
도 3a∼3e는 본 발명에 따른 액정셀의 제조공정중 비접촉방식의 정전기 방지 방법을 설명하기 위한 도면이다.3A to 3E are views for explaining a non-contact antistatic method during the manufacturing process of a liquid crystal cell according to the present invention.
*도면의 주요부분에 대한 부호의 설명** Explanation of symbols for main parts of drawings *
2:스크라이빙 라인, 4:그라인딩 라인, 2: scribe line, 4: grinding line,
6:테스트패드, 8:아우트 쇼트링,6: test pad, 8: out short ring,
10:비아홀, 12:ITO.10: Via Hole, 12: ITO.
본 발명은 비접촉방식의 정전기 방지 방법에 관한 것으로, 보다 상세하게 ESD에 의해 패널내부의 특성저하를 방지하기 위하여 비접촉식의 어레이를 설계한 비접촉방식의 정전기 방지 방법에 관한 것이다.The present invention relates to a non-contact type antistatic method, and more particularly, to a non-contact type antistatic method in which a non-contact array is designed to prevent deterioration of characteristics inside a panel by ESD.
주지된 바와 같이, 저전압에 의해 구동이 가능하면서 우수한 표시특성 및 양산의 가능성을 갖는 박막트랜지스터-액정표시장치(TFT-LCD)가 노트북 컴퓨터라든지 LCD텔레비전을 포함하는 다양한 형태의 전자제품에 디스플레이수단으로서 채용되고 있다.As is well known, thin film transistor-liquid crystal displays (TFT-LCDs), which can be driven by low voltage and have excellent display characteristics and possibility of mass production, are used as display means in various types of electronic products including notebook computers or LCD televisions. It is adopted.
그러한 TFT-LCD 패널은 픽셀(Pixel)단위의 신호를 인가하는 스위칭소자들을 형성하는 TFT어레이공정과, 색상을 구현하기 위한 컬러R/G/B어레이를 형성하는 컬러필터고정 및, TFT기판과 컬러필터기판 사이에서 액정셀을 형성하는 액정공정을 통해 제조된다.Such a TFT-LCD panel has a TFT array process for forming switching elements for applying a pixel unit signal, fixing a color filter for forming a color R / G / B array for realizing color, and a TFT substrate and color. It is manufactured through a liquid crystal process of forming a liquid crystal cell between filter substrates.
여기서, LCD의 제조공정에서 예컨대 스위칭소자들을 형성하기 위한 TFT기판으로서의 글래스기판에 대해 예컨대 반송이라든지 러빙(Rubbing) 등의 처리를 행하는 경우에 글래스기판에는 정전기가 축적되기 쉽고, 글래스기판에 축전된 정전기에 의해 악영향을 받게 된다.Here, in the LCD manufacturing process, for example, when a glass substrate serving as a TFT substrate for forming switching elements is subjected to a process such as conveying or rubbing, for example, static electricity is likely to accumulate in the glass substrate, Are adversely affected by
따라서, 통상적으로 LCD의 제조를 위한 생산라인은 예컨대 도전성 척이라든지 정전기방지 카세트를 포함하는 정전기 방지가 가능한 설계를 갖게 되고, 설령 LCD에 정전기가 충전되는 경우를 대비하여 정전기가 발생되어도 TFT소자나 배선의 특성이 변하지 않고 방전이 이루어지도록 화소를 설계해주게 된다.Therefore, the production line for manufacturing the LCD typically has a design capable of antistatic, including a conductive chuck or an antistatic cassette, for example, even if the static electricity is generated in case of charging the static electricity in the LCD TFT element or wiring The pixel is designed to be discharged without changing the characteristic of.
LCD에서 정전기 불량을 방지하기 위해서는 배선 전체를 저항으로 연결하여 전하를 분산시켜 방전이 서서히 일어나도록 유도하는 방법과, 절단선(scribe lin)의 외측 배선에서 방전이 이루어지도록 하는 방법이 적용되는 바, 후자의 방법은 주로 수동 매트릭스(Passive matrix)LCD에 적용되고, 전자는 주로 TFT-LCD에 적용 된다.In order to prevent electrostatic defects in LCD, a method of distributing charges by distributing electric charges by connecting the entire wiring with a resistor and inducing discharge in the wirings outside the scribe lin is applied. The latter method is mainly applied to passive matrix LCDs, while the former is mainly applied to TFT-LCDs.
즉, TFT-LCD패널에서는 기판에 쇼팅 바(Shorting bar; 또는 Shorting ring)을 형성하여 정전기에 의한 불량을 방지하게 된다.That is, in a TFT-LCD panel, a shorting bar (or shorting ring) is formed on a substrate to prevent defects caused by static electricity.
도 1a와 1b는 종래의 실시예에 따른 접촉식과 비접촉식 어레이 테스트 방식을 나타내는 도면이다. 1A and 1B illustrate a contact and contactless array test scheme according to a conventional embodiment.
이를 참조하면, 접촉식(Contact) 방식은 아우터 쇼트링(Outer short ring)이 셀 공정중 스크라이빙(Scribing) 공정후에도 남아 있게 되므로 이후에 발생되는 ESD(electro Static Discharge)에 대해서 영향을 받지 않게 된다. In this regard, the contact method is that the outer short ring remains after the scribing process during the cell process so that it is not affected by the electrostatic discharge generated afterwards. do.
반면에, 비 접촉식(Non contact) 방식은 아우터 쇼트링(Outer short ring)이 스크라이빙(Scribing) 공정에서 잘려져 상기 ESD에 더 영향을 받을 수 있게 된다. 상기 비 접촉식 방식에서는 상기 아우터 쇼트링(Outer short ring)을 테스트 신호 전압의 강하를 방지하기 위해 넓게 유지하기 때문에 스크라이빙 라인(Scribing Line: 2) 안쪽에 형성시키지 않는다.
도 1a 및 도 1b에서, 도면부호 6은 테스트패드를 나타낸다. On the other hand, in the non contact method, the outer short ring is cut in the scribing process so that the ESD can be further affected. In the non-contact method, the outer short ring is kept wide to prevent the test signal voltage from dropping, so that the outer short ring is not formed inside the
1A and 1B,
그러나, 상기한 방식들도 현재 셀 제조공정중 발생되는 정전기를 효과적으로 방지하지 못하고 있다는 문제점이 있다.However, the above schemes also do not effectively prevent static electricity generated during the current cell manufacturing process.
본 발명은 상기한 종래 기술의 사정을 감안하여 이루어진 것으로, 비접촉식 방식의 스크라이빙 라인 안쪽에 남아있는 쇼트링을 그라인딩에서 제거하여 라인간의 단락을 방지하도록 한 비접촉방식의 정전기 방지 방법을 제공함에 그 목적이 있다.SUMMARY OF THE INVENTION The present invention has been made in view of the above-described prior art, and provides a non-contact antistatic method for preventing short circuits between lines by removing the short ring remaining inside the non-contact scribing line from grinding. There is a purpose.
상기한 목적을 달성하기 위해, 본 발명의 바람직한 실시예에 따르면, LCD의 제조시 정전기 불량을 방지하기 위해서 배선 전체를 연결하도록 형성하는 아우터 쇼트링 라인(Outer short ring line)을 스크라이빙 라인(Scribing line)의 안쪽에 형성하여 ESD(Electro static discharge)의 영향을 감소시킨 것을 특징으로 하는 비접촉방식의 정전기 방지 방법이 제공된다. In order to achieve the above object, according to a preferred embodiment of the present invention, the outer short ring line (Outer short ring line) formed to connect the entire wiring in order to prevent electrostatic defects during the manufacturing of the LCD scribing line ( It is provided on the inside of the scribing line to provide a non-contact antistatic method characterized in that the effect of electrostatic discharge (ESD) is reduced.
바람직하게, 셀공정이 진행되고 스크라이빙 후에도 상기 아우터 쇼트링 라인(Outer short ring line)을 남겨두어 정전기를 방지하도록 하며, 최종작업인 그라인딩 공정에서 상기 아우트 쇼트를 제거함으로써 각각의 라인이 독립될 수 있도록 한 것을 특징으로 하는 비접촉방식의 정전기 방지 방법이 제공된다. Preferably, the outer short ring line is left after the cell process and scribing to prevent static electricity, and each line may be separated by removing the outer short in the final grinding process. There is provided a non-contact static electricity prevention method characterized in that.
더욱 바람직하게, 상기 아우터 쇼트링 라인은 입력 전압강하를 방지하기 위하여 복층의 메탈구조로 이루어진 것을 특징으로 하는 비접촉방식의 정전기 방지 방법이 제공된다. More preferably, the outer shorting line is provided with a non-contact static electricity prevention method, characterized in that made of a multi-layered metal structure to prevent the input voltage drop.
이하, 본 발명에 대해 도면을 참조하여 상세하게 설명한다.EMBODIMENT OF THE INVENTION Hereinafter, this invention is demonstrated in detail with reference to drawings.
도 2는 본 발명에 따른 비접촉방식의 정전기 방지를 나타내기 위한 도면이다. 2 is a view for showing a non-contact static electricity prevention in accordance with the present invention.
이를 참조하면, 본 발명에 따른 비접촉방식의 정전기 방지 방법은 아우터 쇼트링 라인(Outer short ring line; 8)을 스크라이빙 라인(Scribing line; 2)의 안쪽에 형성하도록 하여 ESD(Electro static discharge)의 영향을 최대한 감소시키도록 한 것이다. Referring to this, the non-contact static electricity prevention method according to the present invention is to form an outer short ring line (Outer short ring line 8) to the inside of the scribing line (Scribing line) 2 ESD (Electro static discharge) To minimize the impact.
또한, 상기 스크라이빙 라인(Scribing line; 2)의 안쪽에 남아있는 쇼트링 라인(Short ring line; 8)은 그라인딩 라인(Grinding line; 4)에서 제거하여 라인간에 발생될 수 있는 단락을 방지하도록 한다. In addition, the
도 3a∼3e는 본 발명에 따른 액정셀의 제조공정중 비접촉방식의 정전기 방지 방법을 설명하기 위한 도면이다.3A to 3E are views for explaining a non-contact antistatic method during the manufacturing process of a liquid crystal cell according to the present invention.
먼저, 도 3a∼3e에서 도시된 제조공정에서 패턴의 크기 및 화질, 개구율과 같은 것은 종래와 같은 상태라고 가정하고 기술한다. First, in the manufacturing process shown in Figs. 3A to 3E, it is assumed that the size, image quality, and aperture ratio of the pattern are the same as before.
도 3a에는 게이트 전극의 에칭공정이 이루어지는 바, 다양한 금속전극(Al, Mo 등)으로 이루어진 게이트 전극을 에칭(etching)하게 되며, 그 일측부에는 스크라이빙 라인(Scribing Line; 2)이 형성된다. In FIG. 3A, the etching process of the gate electrode is performed to etch a gate electrode made of various metal electrodes (Al, Mo, etc.), and a
그런 다음, 도 3b에는 박막 트랜지스터(TFT:Thin Flat Transistor)의 액티브 영역을 에칭하는 공정이 도시되며, 도 3c는 소스/드레인(S/D)을 에칭하는 공정이다. Next, FIG. 3B shows a process of etching an active region of a thin flat transistor (TFT), and FIG. 3C shows a process of etching a source / drain (S / D).
소스/드레인(S/D)의 에칭이 완료된 후에는 비아 홀(Via Hole: 10)을 형성하게 되며(도 3d 참조), 비아 홀이 형성된 후에는 화소 전극(ITO: 12)를 에칭하게 되는 바, 이때, 상기 아우터 쇼트 링 라인(Outer short ring line; 8)이 상기 스크라이빙 라인(2)의 안쪽에 형성되게 하여 층간 정전기에 의한 단락을 방지하도록 한다. After the etching of the source / drain S / D is completed, a
이때, 상기 아우터 쇼트 링 라인(Outer short ring line; 8)은 입력 전압강하를 방지하기 위하여 복층(2층)의 메탈구조로 형성되는 것이 충분히 가능하다. In this case, the outer
상기한 구성의 본 발명의 일실시예에 따른 비접촉방식의 정전기 방지 방법을 첨부된 도면을 참조하여 상세하게 설명한다. With reference to the accompanying drawings, a non-contact type antistatic method according to an embodiment of the present invention having the above configuration will be described in detail.
각 에칭단계에서 발생되거나, 에칭이 완료된 각 층간에서 정전기(ESD)가 발생될 가능성이 매우 농후하므로, 상기 아우터 쇼트링 라인(Outer short ring line; 8)을 스크라이빙 라인(Scribing line; 2)의 안쪽에 형성하도록 하여 ESD(Electro static discharge)의 영향을 최대한 감소시키도록 한 것이다. Since the possibility of generating electrostatic discharge (ESD) between each layer that is generated in each etching step or etching is very high, the outer
또한, 상기 스크라이빙 라인(Scribing line; 2)의 안쪽에 남아있는 쇼트링 라인(Short ring line; 8)은 그라인딩 라인(Grinding line; 4)에서 제거하여 라인간에 발생될 수 있는 단락을 방지하도록 한다. 이는 도 3a∼3e의 셀공정이 진행되고 스크라이빙 후에도 상기 아우터 쇼트링 라인(Outer short ring line; 8)을 남겨두어 정전기를 방지하도록 하며, 최종작업인 그라인딩 공정에서 상기 아우트 쇼트를 제거함으로써 각각의 라인이 독립될 수 있도록 한다.In addition, the
한편, 본 발명의 실시예에 따른 비접촉방식의 정전기 방지 방법은 단지 상기한 실시예에 한정되는 것이 아니라 그 기술적 요지를 이탈하지 않는 범위내에서 다양한 변경이 가능하다. On the other hand, the non-contact static electricity prevention method according to an embodiment of the present invention is not limited only to the above-described embodiment is possible various modifications within the scope not departing from the technical gist.
상기한 바와 같이, 본 발명에 따른 비접촉방식의 정전기 방지 방법은 셀 제조공정의 진행중에 발생되는 정전기(ESD)에 의한 특성저하를 방지하기 위하여 스크라이빙시에 잘려나가는 아우트 쇼트링을 스크라이빙 라인의 안쪽에 형성시킴으로써 정전기 방지의 효과를 증가시켜 특성 저하를 방지할 수 있게 된다. As described above, the non-contact type antistatic method according to the present invention is a scribing line cut out the outer short ring cut during scribing to prevent deterioration of the characteristics caused by electrostatic discharge (ESD) generated during the cell manufacturing process By forming the inside of the increase of the antistatic effect can be prevented from deteriorating properties.
Claims (3)
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