KR100739573B1 - Manufacturing Method Of Plasma Display Panel - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a plasma display panel, wherein the method for manufacturing a plasma display panel divides a discharge cell in a space between a first substrate and a second substrate disposed to face each other, and a space between the first substrate and the second substrate. Barrier ribs, a phosphor layer formed in the discharge cell, address electrodes formed along one direction on the first substrate, and a direction intersecting with the address electrodes on the second substrate, and formed at least in each of the discharge cells. Fabrication of a plasma display panel comprising a pair of display electrodes corresponding to each other, a display layer covering the display electrodes on the second substrate, a dielectric layer including a dielectric layer, and a passivation layer covering the dielectric layer on the second substrate. As a method, a dielectric composition comprising Bi ₂ O ₃ , B ₂ O ₃ and ZnO is applied to the display electrode, The dielectric layer is formed by baking the display electrode coated with the dielectric composition to form a dielectric layer, and patterning the dielectric layer by a chemical etching method to form grooves between display electrodes in which at least one pair corresponding to each discharge cell is formed. Forming process.

The manufacturing method of the plasma display panel of the present invention uses a Bi series dielectric that does not contain Pb, and has a high visible light transmittance and uniformly obtains a desired pattern by a chemical etching method without causing environmental pollution problems. The interface of can also be formed uniformly.

PDP, Home, Dielectric Floor, Lead Free

Description

Manufacturing method of plasma display panel {METHOD OF PRODUCING PLASMA DISPLAY PANEL}

1 is a partially exploded perspective view showing a plasma display panel according to an embodiment of the present invention.

2 is a partial plan view showing a plasma display panel according to an embodiment of the present invention;

3 is a partial cross-sectional view taken along the line I-I of FIG.

4 is a partial plan view showing a plasma display panel according to another embodiment of the present invention;

5 is a partial plan view of a plasma display panel according to another embodiment of the present invention;

6A and 6B are photographs showing a dielectric pattern formed using a conventional sand blast and photosensitive dielectric.

7A and 7B are surface and cross-sectional photographs showing a pattern formed before forming a protective film formed according to Example 1 of the present invention.

8A and 8B are surface and cross-sectional photographs showing a pattern formed before forming a protective film according to Comparative Example 1. FIG.

9 is a cross-sectional photograph showing a dielectric pattern formed in accordance with Example 1 of the present invention.

10 is a cross-sectional photograph showing a dielectric pattern formed according to Comparative Example 1. FIG.

11 is a cross-sectional photograph showing a dielectric pattern formed according to Comparative Example 2.

12 is a graph showing the visible light transmittance of the dielectric layers formed according to Example 1, Comparative Example 1 and Reference Examples 1 to 2 of the present invention.

13 is a surface photograph showing a pattern formed before forming a protective film formed in Reference Example 3. FIG.

14 is a surface photograph showing a pattern formed before forming a protective film formed in Reference Example 4. FIG.

[Industrial use]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a plasma display panel, and more particularly, to a method for manufacturing a plasma display panel that can produce a display panel exhibiting excellent discharge efficiency in a simple process.

[Prior art]

In general, a plasma display panel (PDP) is a display device that realizes an image by using visible light generated by vacuum ultraviolet (VUV) radiation emitted from a plasma formed by gas discharge to excite a phosphor layer. The plasma display panel has a high resolution and large screen configuration, and has been spotlighted as a next generation thin display device.

The general structure of the plasma display panel is a three-electrode surface discharge type structure. The three-electrode surface discharge structure includes a front substrate on which a display electrode composed of two electrodes is formed, and a back substrate on which an address electrode is formed at a predetermined distance from the substrate, wherein the display electrode is covered with a dielectric layer. . The space between the front substrate and the rear substrate is partitioned into a plurality of discharge cells by partition walls, discharge gas is injected into the discharge cells, and a phosphor layer is formed on the rear substrate side.

More than millions of unit discharge cells are arranged in a matrix form outside the plasma display panel. In order to simultaneously drive the discharge cells of the AC plasma display panel arranged in a matrix form, driving using the memory characteristic is performed.

However, the plasma display panel goes through several steps from the input power to the final visible light, and in each of these processes, the energy conversion efficiency is not good, and the discharge path between the display electrodes is long due to the dielectric layer covering the display electrodes. There is a problem of high power consumption.

It is an object of the present invention to provide a method of manufacturing a plasma display panel having improved light emission luminance.

In order to achieve the above object, the present invention is the first substrate and the second substrate disposed opposite to each other, partition walls for partitioning the discharge cell in the space between the first substrate and the second substrate and formed in the discharge cell A phosphor layer, address electrodes formed along one direction on the first substrate, display electrodes formed along a direction crossing the address electrodes on the second substrate, and at least one pair corresponding to each of the discharge cells; A method of manufacturing a plasma display panel including a dielectric layer covering a display electrode on a second substrate, a dielectric layer including a dielectric, and a passivation layer covering the dielectric layer on the second substrate, the method comprising: Bi ₂ O ₃ , B ₂ O A dielectric composition comprising ₃ and ZnO is applied to the display electrode, and the display electrode coated with the dielectric composition is fired to form a dielectric layer. And forming a dielectric layer by patterning the dielectric layer by a chemical etching method to form grooves between display electrodes in which at least one pair corresponding to each of the discharge cells is formed, thereby forming a dielectric layer. do.

The dielectric layer comprises a Bi series dielectric, preferably Bi ₂ O ₃ , B ₂ O ₃ and ZnO. The groove may be an opening exposing a portion of the second substrate between display electrodes formed by corresponding at least one pair corresponding to each of the discharge cells, and exposing a portion of the second substrate between the display electrodes. However, the thickness of the dielectric layer between the display electrodes includes a structure in which the thickness of the dielectric layer is thinner than other portions, that is, a step is formed.

Hereinafter, the present invention will be described in more detail.

In general, when a segmented electrode is used to improve efficiency in a plasma display panel, an electric field is concentrated at an edge of a gap between two opposing bus electrodes (scan electrode and sustain electrode). This becomes strong. As a result, ions and the like concentrate in this edge region, which may cause etching of the protective layer and the like, resulting in poor lifetime characteristics.

To solve this problem, a groove is formed in the dielectric layers between the display electrodes to shorten the discharge path, thereby driving the plasma display panel at a low voltage, and by thickening the dielectric layer on the edge side of the display electrodes, the electric field concentration phenomenon is prevented and the lifetime is maintained. Research is underway to improve the characteristics.

The present invention relates to a method of forming the groove by a chemical etching method. In order to form the dielectric dielectric pattern by the chemical etching method, a pattern having a desired size is formed, and in order to appropriately adjust the inclined surface of the pattern, the type of etchant, the concentration of the etchant, the etching time, the etching solution injection pressure, and the like are appropriate. The dielectric etch rate must be adjusted to form a pattern having a desired size. In the present invention, the optimum pattern can be manufactured by adjusting the conditions of the chemical etching method.

In addition, when using Pb, which is mainly used as a conventional dielectric, there is a problem of environmental pollution. Recently, research is being conducted to use a lead-free dielectric that does not include Pb. In the present invention, Bi is used as such a lead-free dielectric. A series dielectric was used.

That is, the present invention relates to a method of forming a dielectric layer in a method of manufacturing a plasma display panel.

In the dielectric layer forming method of the present invention, first, a Bi-based dielectric, preferably a dielectric composition including Bi ₂ O ₃ , B ₂ O _3, and ZnO, is applied to a second substrate on which the display electrode is formed.

Preferred dielectric compositions in the present invention are 25 to 45% by weight of Bi ₂ O ₃ , 15 to 35% by weight of B ₂ O ₃ , 10 to 30% by weight of ZnO, Bi ₂ O containing ₃ to 30 to 40% by weight, and comprises a B ₂ O ₃ from 20 to 30 wt%, and most preferably containing ZnO by 15 to 25% by weight. The remaining components in the dielectric composition may be a vehicle.

In the dielectric composition, the content of ZnO is most important. When the content of ZnO exceeds 30% by weight, the etching property is deteriorated, and the reaction is caused by an alkali liquid such as NaOH used during film resist (DFR) peeling. It is desirable to include less than 30% by weight as this may cause dielectric surface staining and surface roughness.

In addition, SiO ₂ , TiO ₂ or Al ₂ O ₃ may be additionally included in a small amount. However, since the solubility of the oxide is lowered by acid, it is preferable to include 3 parts by weight or less based on 100 parts by weight of the total.

The Bi-based dielectric can control the dielectric constant, thermal expansion coefficient and thermal characteristics (glass transition temperature, softening temperature, etc.) required for the dielectric layer, yellowing phenomenon due to reaction with the bus electrode, and secure the patternability by etching. It is preferable because it can be done.

In addition, since the Bi-based dielectric material does not include Pb, the Bi-based dielectric material does not cause environmental pollution due to Pb, and the visible light transmittance is superior to that of the conventional Pb-based dielectric material.

The dielectric composition includes a vehicle for applying and attaching the dielectric composition. Ethyl cellulose, methyl cellulose or hydroxypropyl cellulose may be used as a binder when preparing the vehicle, and as the solvent, one or two or more of terpineol, butyl carbitol or butyl carbitol acetate may be used. Can be. In particular, the Bi-based dielectric vehicle of the present invention preferably contains ethylcellulose, terpineol, and butyl carbitol acetate in a weight ratio of 5 to 10:15 to 25:45 to 55.

The mixing ratio of the Bi-based dielectric and the vehicle is preferably 60 to 80: 40 to 20% by weight. If it is out of this mixing ratio, it is not preferable because the viscosity is greatly increased or the viscosity stability is poor and the printing characteristics are greatly reduced.

The second substrate coated with the dielectric composition is fired to form a dielectric layer. This firing process is preferably carried out for 20 to 40 minutes at 550 to 600 ℃. Deviation from such firing conditions is not preferable because of the problem that the withstand voltage is lowered due to a decrease in transmittance and generation of internal bubbles.

 Subsequently, the dielectric layer is patterned by a chemical etching method to form grooves between the display electrodes to form the dielectric layer of the present invention. The chemical etching method generally uses an acid such as nitric acid, hydrochloric acid, or sulfuric acid that can dissolve Bi-based dielectrics well, that is, has excellent etching ability, and especially chemical etching solution in consideration of equipment corrosion problems and chemical handling risks. It is preferable to use nitric acid.

The etching method is preferably performed for about 8 to 12 minutes using an acid etching solution of 0.15 to 0.30% by weight. When the etching method uses an etching solution that is out of the above concentration or is carried out outside of the above time, a desired pattern is difficult to obtain, which is not preferable.

In the present invention, the groove may be an opening exposing a part of the second substrate between display electrodes formed by corresponding at least one pair corresponding to each of the discharge cells, and the second opening between the display electrodes. A part of the substrate is not exposed, but the display electrodes include all of the structures in which the thickness of the dielectric layer is thinner than other parts, that is, a step is formed.

Since the chemical etching method forms a desired pattern after coating and firing the composition, there is no pattern deformation by firing, and when sand blast or a photosensitive dielectric is used, the pattern is formed and then fired. After the firing, the inclined plane is severe due to the collapse of the pattern, and the uniformity of the pattern cannot be secured (see FIGS. 6A and 6B).

However, in the case of PbO-B ₂ O ₃ -SiO ₂ , which is generally used as a Pb-based dielectric, the SiO ₂ component should be included at an appropriate level or higher in order to control the dielectric constant, thermal expansion coefficient, and reactivity with the bus electrode. Although it is difficult to form a desired pattern by chemical etching with a chemical etching solution such as this, it was not applicable to an actual dielectric layer application, but in the present invention, a chemical etching method may be performed by using a Bi-based dielectric.

In addition, as the chemical etching is easy, an interface between a dielectric layer formed of a Bi-based dielectric and a protective film such as MgO formed to protect the same may be uniformly formed. As a result, since the secondary electron emission effect of MgO can be secured uniformly for each position, it is advantageous to secure the discharge uniformity and stability.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a partially exploded perspective view illustrating a plasma display panel according to a first embodiment of the present invention.

Referring to FIG. 1, the plasma display panel according to the present embodiment includes a first substrate 10 (hereinafter referred to as a “back substrate”) and a second substrate 20 (hereinafter referred to as a “front substrate”) having an arbitrary size. ) Are disposed substantially parallel to each other at predetermined intervals, and a plurality of discharge cells 18 are partitioned by the partition wall 16 in the space between the rear substrate 10 and the front substrate 20.

A plurality of address electrodes 12 are formed along one direction (y-axis direction of the drawing) on the opposite surface of the rear substrate 10 of the rear substrate 10, and cover the address electrodes 12 to cover the rear substrate 10. The dielectric layer 14 is formed on the front side. The address electrodes 12 are located side by side with a predetermined distance from neighboring ones.

A partition wall 16 is formed on the dielectric layer 14 to partition the plurality of discharge cells 18. The partition wall 16 has a first partition wall member 16a formed along a direction parallel to the address electrode 12 (y-axis direction in the drawing) and a direction intersecting with the first partition wall member 16a (x-axis direction in the drawing). It includes a second partition member (16b) formed along the). Such a barrier rib structure is not limited to the above-described structure, and various barrier rib structures such as a stripe-type barrier rib structure including only barrier rib members in parallel with the address electrode can be applied to the present invention, which is also within the scope of the present invention.

In the discharge cell 18, a fluorescent layer 19 is formed on the rear substrate 20 side, and a discharge gas (for example, a mixed gas of Xe and Ne) is injected to generate a predetermined discharge and light emission. At this time, the fluorescent layer 19 may be made of a reflective phosphor so that visible light generated by the discharge may travel toward the front substrate 20.

On the opposite side of the back substrate 10 of the front substrate 20, the display electrode 21 including the scan electrode 21 and the sustain electrode 22 along a direction crossing the address electrode 12 (the x-axis direction in the drawing). , 22) are formed. The display electrodes 21 and 22 extend from the bus electrodes 21b and 22b extending along the direction crossing the address electrode 12 (the x-axis direction in the drawing) and the discharge cells 18 from the bus electrodes 21b and 22b. It includes transparent electrodes (21a, 22a) extending toward the center of.

For example, a pair of bus electrodes 21b and 22b may correspond to each of the discharge cells 18. In this case, a pair of transparent electrodes 21a and 22a may be formed to face each other in each of the discharge cells 18.

The transparent electrodes 21a and 22a play a role of causing plasma discharge in the discharge cell 18, and may be made of indium tin oxide (ITO) or the like, which is a transparent material to secure the aperture ratio. 21b and 22b may be made of an opaque metal material to compensate for the high resistance of the transparent electrodes 21a and 22a to ensure electrical conductivity.

The sustain electrode 22 receives a predetermined voltage in the address section together with the address electrode 12 to participate in the address discharge, and the scan electrode 21 receives the predetermined voltage in the sustain section together with the sustain electrode 22. Engage in maintenance discharge. However, each electrode may have a different role depending on the signal voltage applied thereto, and thus the present invention is not limited thereto.

The dielectric layer 24 is formed on the front substrate 20 while covering the display electrodes 21 and 22 as a whole. The dielectric layer 24 is formed with an opening 24a exposing a part of the front substrate 20 on the surface opposite to the rear substrate 10, and the thickness at the opposite display electrode edge is formed in the center of the discharge space. It is preferred to be thicker than the thickness at.

The grooves 24a of the dielectric layer 28 may be formed while extending along the length direction (the X-axis direction of the drawing) between the display electrodes 21 and 22, or the scan electrode 21 and the sustain electrode. It is also possible to form each discharge cell 18 separately between the electrodes 22.

The sustain discharge occurring between the scan electrode 21 and the sustain electrode 22 is substantially induced to the opposite discharge D near the groove 24a of the dielectric layer 24 to initiate the discharge, and the discharge of the groove 24a is performed. The portion of the dielectric layer 24 from the outside to the edge of the discharge cell 18 is guided to the surface discharge (S) while the discharge is diffused.

The groove 24a of the dielectric layer in the present invention shortens the path D of discharge formed between the display electrodes 21 and 22. That is, since the discharge path between the display electrodes 21 and 22 may be formed through the groove 24a of the dielectric layer between the display electrodes 21 and 22, the discharge path D is straightened to shorten the path. . In this embodiment, the discharge voltage generated between the display electrodes 21 and 22 can be reduced by shortening the discharge path D. FIG.

In addition, in the dielectric layer according to the present invention, the thickness at the opposite electrode edge is thicker than the thickness at the center of the discharge space, thereby preventing the electric field from concentrating on the edge of the gap at which the display electrodes face each other. It can be improved.

The plasma display panel of the present invention also covers the dielectric layer 24 and a protective film 26 is formed on the front substrate 20. In the protective layer 26, the grooves 26a are formed at positions corresponding to the grooves 24a of the dielectric layer 24. The protective layer 26 protects the dielectric layer 24 from collision of ionized ions during plasma discharge, and has a high secondary electron emission coefficient to increase discharge efficiency.

The protective film generally contains MgO constituting the protective film.

FIG. 2 is a partial plan view of a plasma display panel according to a first embodiment of the present invention, and FIG. 3 is a partial cross-sectional view taken along the line II of FIG. 1.

As shown in FIGS. 2 and 3, the groove 24a of the dielectric layer may be formed to correspond to the central portion of each discharge cell 18 between the transparent electrodes 21a and 22a facing each other. .

The groove 24a of the dielectric layer 24 shortens the path D of the discharge formed between the display electrodes 21 and 22. That is, since the discharge path between the display electrodes 21 and 22 may be formed through the groove 24a of the dielectric layer 24 between the display electrodes 21 and 22, the discharge path D may be straightened to form a path. It is formed short. In this embodiment, the discharge voltage generated between the display electrodes 21 and 22 can be reduced by shortening the discharge path D, and since Bi-based dielectrics containing no Pb are used, no environmental pollution problems are caused. It is excellent in visible light transmittance and can form a desired pattern uniformly by chemical etching.

Hereinafter, a plasma display panel according to a second exemplary embodiment of the present invention will be described in detail. The second embodiment has the same basic configuration as that of the first embodiment, and the display electrode has a structure different from that of the first embodiment. The same reference numerals are used for the same components as those in the first embodiment.

4 is a partial plan view showing a plasma display panel according to a second embodiment of the present invention.

Referring to FIG. 4, the display electrodes 31 and 32 include bus electrodes 31b and 32b extending in a direction crossing the address electrode 12 (the x-axis direction in the drawing) and the bus electrodes 31b and 32b. Transparent electrodes 31a and 32a extending therefrom. The transparent electrodes 31a and 32a play a role of causing plasma discharge in the discharge cell 18. The transparent electrodes 31a and 32a are made of indium tin oxide (ITO), which is a transparent material, to secure the aperture ratio, and the bus electrode 31b. , 32b) is to compensate for the high resistance of the transparent electrodes 31a and 32a to ensure electrical conductivity, and may be made of an opaque metal material. In this case, a pair of bus electrodes 31b and 32b may be formed to correspond to each discharge cell 18, and a pair of transparent electrodes 31a and 32a may be formed to face each other in each discharge cell 18.

In the present embodiment, the transparent electrodes 31a and 32a are formed from the first and second portions 31a1 and 32a1 extending from the bus electrodes 31b and 32b in the direction crossing the bus electrodes 31b and 32b (y-axis direction in the drawing). And second parts 31a2 and 32a2 connected to the first parts 31a1 and 32a1 and formed to face each other at the center of each discharge cell 18. In this embodiment, the current flowing through the transparent electrodes 31a and 32a can be reduced by reducing the areas of the transparent electrodes 31a and 32a having a small contribution to the discharge.

In addition, a groove may be formed in the dielectric layer between the second portions 31a2 and 32a2 of the opposing transparent electrode.

FIG. 5 is a partial plan view of a plasma display panel according to a third exemplary embodiment of the present invention, in which a step is provided at the center of each of the radiation cells 18 between the transparent electrodes 21a and 22a facing each other. That is formed structure. In other words, the dielectric layer 24 of the display center portion where the thickness of the dielectric layer between the transparent electrodes 21a and 22a is thinner than the thickness of the dielectric layer in the other portion is formed in the stepped portion toward the front substrate 20, or the front substrate 20 This shows a plasma display panel having a structure that is not completely exposed.

Since the other structure is the same as the first embodiment, detailed description thereof will be omitted.

In the plasma display panel of the present invention, when the dielectric layers between the display electrodes are etched, the dielectric layers on the opposite electrode edges are thickened to prevent the electric field concentration shape, thereby improving the life characteristics. In addition, the dielectric layer may be formed of a Bi-based dielectric material that does not include Pb, and a desired pattern may be uniformly formed by a chemical etching method without causing environmental pollution problems.

Hereinafter, preferred examples and comparative examples of the present invention are described. However, the following examples are only one preferred embodiment of the present invention and the present invention is not limited to the following examples.

(Example 1)

A display electrode including a scan electrode and a sustain electrode was formed in a stripe shape on a front substrate made of soda lime glass by using an indium tin oxide conductor material. Subsequently, a dielectric paste comprising 35 wt% Bi ₂ O ₃ , 25 wt% B ₂ O ₃ , 20 wt% ZnO and the remaining amount of the vehicle was deposited over the entire surface of the upper substrate on which the display electrode was formed. The coated layer was calcined at 570 ° C. for 20 minutes to form a dielectric layer.

The vehicle was used to include ethyl cellulose, terpineol and butyl carbitol acetate in a 10: 20: 50 weight ratio.

  Subsequently, a groove was formed by etching (patterning) for 10 minutes using a 0.25% weight concentration of nitric acid etching solution so as to expose the front substrate of the portion corresponding to the scan electrode and the sustain electrode. Thereafter, an MgO protective film was formed on the dielectric layer.

(Comparative Example 1)

The same process as in Example 1 was used except that a dielectric paste containing 70 wt% PbO, 5 wt% B ₂ O _3, and 25 wt% SiO ₂ was used.

(Comparative Example 2)

It carried out similarly to Example 1 except having patterned by the sand blasting method instead of nitric acid etching liquid.

The surface and cross section of the pattern shape patterned according to Example 1 before forming the protective film are shown in FIGS. 7A and 7B, respectively. The surface and cross section of the pattern shape patterned according to Comparative Example 1 are shown in FIGS. 8A and 8B. Indicated. As shown in FIGS. 7A and 7B, the pattern formed in accordance with Example 1 has a clean strip of dielectric and a clean pattern formed up to the bottom of the front substrate. It can be seen that the decrease. On the contrary, it can be seen that the pattern formed according to Comparative Example 1 shown in FIG. 8A has a large difference between the upper pattern and the lower pattern, which is more clearly seen in FIG. 8B showing a cross section of the pattern of Comparative Example 1. FIG.

In addition, the cross section of the pattern formed according to Example 1 after the protective film is formed in FIGS. 9A and 9B, and the cross section of the pattern formed according to Comparative Example 1 is a pattern formed in FIGS. 10A and 10B and also according to Comparative Example 2 The cross section of is shown in FIG. 11A and FIG. 11B, respectively. 9A-9B, 10A-10B, and 11A-11B also show that the interface between the dielectric pattern and the protective film of Example 1 is uniform, but in Comparative Examples 1 and 2, the interface is uneven. (FIGS. 10A and 10B) It can even be seen that they are mixed and mixed with each other (FIGS. 11A and 11B).

In addition, the visible light transmittance of the dielectric layers formed according to Example 1 and Comparative Example 1 was measured and shown in FIG. 12. Also, the same dielectric material used in Example 1 and Comparative Example 1 was used, and the pattern was not formed. The visible light transmittance measurement results were set together with 1 and 2 together in FIG. 12.

As can be seen in Figure 12, the visible light transmittance of the Bi-based dielectric of Example 1 with or without a pattern is superior to the Pb-based dielectric of Comparative Example 1, in particular, when the pattern is not formed (17% difference) In this case, it can be seen that the visible light transmittance is improved by 25%.

(Reference Example 3)

It carried out similarly to Example 1 except having performed the etching method for 7 minutes.

(Reference Example 4)

It carried out similarly to Example 1 except having etched for 10 minutes using the nitric acid etching liquid of 0.10 weight% concentration.

13 and 14 show the surfaces of patterns formed according to Reference Examples 3 and 4 before forming the protective film, respectively. As shown in Figs. 13 and 14, when the concentration and time of the etching solution are not appropriate, there is a problem that the upper and lower pattern steps are severe (black band formation, Fig. 13) or the etching cannot be performed to the bottom surface (Fig. 14). . In contrast, as shown in FIG. 7A, it can be seen that the surface of the pattern formed according to Example 1 is cleanly removed from the dielectric and thus the pattern is formed to the bottom of the front substrate.

The plasma display panel of the present invention uses a Bi-based dielectric material that does not contain Pb, has high visible light transmittance, uniformly obtains a desired pattern by a chemical etching method, and does not cause environmental pollution problems, and also has an interface with a protective film. It can form uniformly.

Claims (11)

A first substrate and a second substrate disposed to face each other, partition walls defining a discharge cell in a space between the first substrate and the second substrate, a phosphor layer formed in the discharge cell, and a first direction in the first substrate. Address electrodes formed along the display substrate, display electrodes formed along a direction crossing the address electrode on the second substrate, and at least one pair corresponding to each of the discharge cells, and covering the display electrodes on the second substrate. And a dielectric layer including a dielectric and a passivation layer formed on the second substrate to cover the dielectric layer. The dielectric layer is coated on the display electrode with a dielectric composition comprising Bi ₂ O ₃ , B ₂ O ₃ and ZnO; Baking the display electrode coated with the dielectric composition to form a dielectric layer; And patterning the dielectric layer by a chemical etching method to form grooves between display electrodes in which at least one pair corresponding to each of the discharge cells is formed. The method of claim 1, Wherein said dielectric composition comprises 25 to 45 weight percent Bi ₂ O ₃ , 15 to 35 weight percent B ₂ O ₃ , 10 to 30 weight percent ZnO, and a residual vehicle. The method of claim 2, Wherein said dielectric composition comprises 30 to 40 weight percent Bi ₂ O ₃ , 20 to 30 weight percent B ₂ O ₃ , 15 to 25 weight percent ZnO, and a residual vehicle. delete The method according to claim 2 or 3, The vehicle is a manufacturing method of a plasma display panel comprising ethyl cellulose, terpineol and butyl carbitol acetate in a weight ratio of 5 to 15: 15 to 25: 45 to 55. The method according to claim 2 or 3, The dielectric composition comprises a dielectric material and a vehicle in a weight ratio of 60:40 to 80:20. The method of claim 1, The firing step is a plasma display panel manufacturing method that is carried out at 550 to 600 ℃. The method of claim 1, The chemical etching method is a plasma display panel manufacturing method using a chemical etching solution selected from the group consisting of nitric acid, hydrochloric acid and sulfuric acid. The method of claim 1, The display electrode may include a pair of bus electrodes extending in a direction crossing the address electrode; And a pair of transparent electrodes extending from the bus electrode toward the center of each discharge cell and facing each other. The method of claim 1, The display electrode may include a pair of bus electrodes extending in a direction crossing the address electrode; A pair of transparent electrodes extending from the bus electrode toward the center of each discharge cell and facing each other; The transparent electrode may include a first portion extending from the bus electrode in a direction crossing the bus electrode, connected to the first portion, extending in the bus electrode direction, and facing each other at a central portion of each discharge cell. A method of manufacturing a plasma display panel comprising a second portion. The method of claim 1, The groove of the dielectric layer is formed to extend in a long correspondence to the central portion of each discharge cell.

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