KR100751325B1 - Display device - Google Patents

Abstract

SUMMARY OF THE INVENTION An object of the present invention is to provide a display device having a structure capable of effectively dissipating heat generated from a semiconductor device included in a display device to the outside. To achieve the above object, the present invention provides a panel for implementing an image. and; A chassis member coupled to the rear of the panel to support the panel; Provided is a display device provided on a chassis member inclined at an angle except a right angle from an imaginary surface extending vertically up and down, and having at least one circuit board mounted with at least one semiconductor element for driving or controlling a panel.

Description

Display apparatus

1 is a perspective view showing a part of a conventional plasma display device.

FIG. 2 is a plan view illustrating a portion A of FIG. 1 from the rear.

3 is an exploded perspective view schematically illustrating an example of a display device having a heat dissipation structure of a driving circuit chip according to an exemplary embodiment of the present invention.

4 is an exploded perspective view schematically illustrating an example of the panel of FIG. 3.

5 is an exploded perspective view schematically illustrating the driving circuit chip of FIG. 3 and a heat sink contacting the driving circuit chip of FIG. 3.

FIG. 6 is a plan view of a part of FIG. 5 from the rear;

7 is an exploded perspective view illustrating a modification of FIG. 5.

8 is a plan view of a part of FIG. 7 from the rear;

9 is an exploded perspective view schematically showing another example of a display device having a heat dissipation structure of a driving circuit chip according to an exemplary embodiment of the present invention.

10 is an enlarged plan view of a portion B of FIG. 9.

<Brief Description of Major Codes in Drawings>

100, 200: display device 110: panel

123: X electrode 124: Y electrode

140: chassis member 150: circuit portion

151: logic board 152: power board

153: address logic-buffer substrate 154: scan logic-buffer substrate

155: semiconductor device 155a: IPM chip

155b: FET 160, 260: heat sink

161, 261: base 165, 265: heat sink

260_b: lower semiconductor element 260_t: upper semiconductor element

RA: air euro

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and more particularly, to a display device having a circuit board mounting structure having an improved structure for smoothly dissipating heat generated from a semiconductor device mounted on a circuit board to the outside.

BACKGROUND ART In general, a plasma display device is a flat panel display device that displays an image by using a gas discharge phenomenon, and has recently been in the spotlight as a flat panel display device because it is possible to realize a thin screen and a high quality large screen having a wide viewing angle.

1 shows an enlarged view of a particularly rear side of a plasma display device according to the prior art. Referring to FIG. 1, the plasma display apparatus 1 includes a plasma display panel 10 and a chassis member 40. The plasma display panel 10 is formed by injecting and encapsulating a discharge gas into a discharge cell formed between the front substrate 20 and the rear substrate 30, and discharging by applying a voltage between the electrodes crossing the discharge cell. An image is realized by emitting visible light by exciting a phosphor by ultraviolet rays generated by causing discharge in a discharge cell filled with gas.

The chassis member 40 is disposed behind the plasma display panel 10. The chassis member 40 serves to support the plasma display panel 10. At the rear of the chassis member 40, at least one circuit board 50 for driving the plasma display panel 20 is mounted to the chassis member 40. The circuit boards 50 are spaced apart from the rear of the chassis member, and are formed in horizontal and vertical sides of each side without being inclined in one direction. The plasma display panel 10 and the circuit board 40 are electrically connected by the signal transmission member 70.

On the other hand, the voltage applied to the electrodes of the plasma display panel 10 is controlled in response to the image signal received from the outside, for this purpose, the driving circuit chip for driving the plasma display device on the circuit board 50 is instantaneous time During the control of a large amount of video signal, a lot of load is generated, and as a result, a lot of heat is generated. In particular, an intelligent power module (IPM) chip may be used as a driving circuit chip in the plasma display device. When the IPM chip is used, more heat is generated than a conventional semiconductor device due to the integration.

The heat generated from the semiconductor element causes the air in the semiconductor element portion to become a high temperature, and the high temperature air is naturally radiated by the convective phenomenon to naturally radiate heat.

However, as shown in FIG. 1, in the substrates that are arranged to extend upward and downward among the circuit boards 50, heat generated in the lower semiconductor element 55 is moved along the upper portion of the circuit boards 50 as it is. .

Meanwhile, a heat sink 60 may be mounted on the circuit board as shown in FIGS. 1 and 2. The heat sink 60 is bonded to one surface of a semiconductor element 55 such as an IPM chip mounted on the circuit board 51. In this case, the heat sink 60 includes a base 61 which is in contact with the rear surface of the semiconductor element 55 and a heat dissipation plate 65 extending from the base, and is formed between the heat dissipation plates 65. The RA is formed in the vertical direction, thereby inducing the hot air 11 generated from the semiconductor element 55 to naturally rise due to the convection phenomenon, so that the semiconductor element 55 is radiated.

However, since the circuit board 50 is vertically disposed up and down, the semiconductor elements 55 mounted thereon are also vertically disposed, and the heat dissipation plates 65 of the heat sink 60 in contact with the semiconductor elements are also vertically disposed. Are placed vertically. For this reason, the heat dissipation surface area of the heat sink is limited.

In addition, when the heat dissipation plate 65 is disposed vertically and vertically so that the length of the heat dissipation plate is vertically formed vertically for sufficient heat dissipation of the semiconductor device 55, an air flow path RA formed between the heat dissipation plates 65. It is also formed up and down. In this case, the air received from the heat dissipation plate located in the lower portion of the semiconductor element 55 is moved to the upper side along the air flow path (RA) formed up and down in a state of high temperature, has a higher temperature, As a result, there is a problem that the high temperature heat generated in the upper portion of the semiconductor device 55 is not cooled smoothly.

The plasma display module 10 having such a configuration may be rotated 90 degrees if necessary, that is, installed in the longitudinal direction. In this case, the heat dissipation plates 65 of the heat sink 60 are oriented in the transverse direction, whereby the space between the heat dissipation plates 65 is also oriented in the transverse direction, so that the space between the heat dissipation plates 65 is oriented. There is a problem that the flow of air flowing through the stagnation in the space between the heat dissipation plate 65 is lowered the heat dissipation performance of the heat sink (60).

In addition, in the plasma display panel, when the semiconductor elements 55 are adjacent to each other in a straight line, the heat generated from the lower semiconductor elements flows through the heat sink 60 to immediately generate high temperature Hb. Due to the air (Ht) flowing into the heat sink on the rear surface of the upper semiconductor element, the heat dissipation of the upper semiconductor element is not excellent.

An object of the present invention is to provide a display device having a structure capable of effectively dissipating heat generated in a semiconductor device included in a display device to the outside.

Another object of the present invention is to provide a display device having a structure in which heat generated from an upper semiconductor element can be effectively released to the outside regardless of heat radiation from the lower semiconductor element.

In order to achieve the above object, the display device according to the first embodiment of the present invention comprises: a panel for implementing an image; A chassis member coupled to a rear surface of the panel to support the panel; And at least one circuit board mounted on the chassis member having side surfaces inclined at an angle excluding right angles from an imaginary surface extending vertically up and down, and having at least one semiconductor element for driving or controlling the panel.

In this case, the display device may further include a heat sink disposed to be in contact with at least one semiconductor element mounted on the circuit board and dissipating heat generated from the semiconductor element to the outside, wherein the heat sink may be connected to the semiconductor element. It is preferred that the base portion and a plurality of heat dissipation plate extending from the base portion, the heat dissipation plate is inclined at an angle except a right angle from the imaginary surface extending vertically up and down.

The heat dissipation plates may be inclined at the same angle as the semiconductor device.

In addition, the heat sink may be formed to extend to the outside of the circuit board.

The semiconductor device may be an Intelligent Power Module (IPM) chip. In contrast, the semiconductor device may be disposed as a field emission transistor (FET) such that a plurality of the semiconductor devices are in contact with one heat sink.

On the other hand, the panel is preferably a plasma display panel that implements an image using plasma discharge.

On the other hand, the display device according to the second embodiment of the present invention is: a front substrate and a rear substrate spaced apart in front and rear to form a discharge space therebetween, and a discharge electrode disposed between the front substrate and the rear substrate to generate a plasma discharge And a panel including dielectric layers covering the discharge electrodes, a phosphor layer disposed in the discharge space, and a discharge gas in the discharge cells; And at least one circuit board arranged to be inclined at an angle except a right angle from an imaginary surface extending vertically vertically from the rear or the side of the panel, and having at least one semiconductor element for driving or controlling the panel. .

Preferably, between the panel and the circuit boards, a chassis member for supporting the panel at the rear and the circuit boards provided at the rear thereof is further provided.

In addition, a partition wall is formed between the front substrate and the rear substrate to partition the discharge cells together with the front substrate and the rear substrate, and the discharge electrodes are disposed in contact with or adjacent to the rear surface of the front substrate. X electrodes and Y electrodes extending side by side in one direction in which they extend; And address electrodes disposed in contact with or adjacent to the front surface of the rear substrate and extending in a direction crossing the direction in which the X and Y electrodes extend.

Wherein the circuit boards comprise: a scan logic-buffer substrate connected with the X and Y electrodes; An address logic-buffer substrate coupled with the address electrodes; Preferably, the circuit board including the scan logic-buffer substrate and the control boards connected to the address logic-buffer substrate, and arranged to be inclined at an angle excluding a right angle from the virtual plane, is a scan logic-buffer substrate.

Hereinafter, a display apparatus according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

3 and 4, the preferred display apparatus 100 of the present invention basically includes a panel 110 and a circuit unit 150 including at least one circuit board driving the panel 110. .

The panel 110 is disposed so that two substrates face each other, thereby realizing an image. Various kinds of display panels may be used as the panel 110, and the panel 110 may include a front panel 120 and a rear panel 130, and may be a plasma display panel using plasma discharge. have.

4 illustrates an example of an AC plasma display panel having a surface discharge type 3-electrode structure among plasma display panels. However, the present invention is not limited thereto, and a display device including signal transmitting means mounted with a mounting element for generating high heat, as described below, belongs to the present invention. Referring to FIG. 4, the panel 110 includes a front panel 120, a back panel 130 coupled to face the front panel 120, a partition wall 134, and a pair of sustain electrodes 122. The address electrodes 132 and the phosphor layer 136 may be provided.

In more detail, the front panel 120 is formed on the front substrate 121 disposed at the front and the rear surface of the front substrate 121, and the X electrode 123 and the Y electrode 124 for each discharge cell. Sustain electrode pairs 122 formed of a pair of? The X electrode 123 and the Y electrode 124 constituting the sustain electrode pair 122 serve as a common electrode and a scan electrode, and are spaced apart from each other by a discharge gap. The X electrode 123 may include an X transparent electrode 123a and an X bus electrode 123b formed to be connected thereto. Likewise, the Y electrode 124 may also be connected to the Y transparent electrode 124a. It may be formed to have a formed Y bus electrode 124b.

In addition, the rear panel 130 may be disposed at a rear of the front substrate 121 to form a discharge space 135 between the front substrate 121 and the rear substrate. Address electrodes 132 are formed on the front surface of the substrate 131 and extend in a direction crossing the sustain electrode pairs 122. In this case, the phosphor layer 136 is formed in the discharge spaces 135.

The sustain electrode pairs 122 may be covered by the front dielectric layer 125. In this case, the passivation layer 126 may be formed on the rear surface of the front dielectric layer 125. In addition, the address electrodes 132 may be covered by the rear dielectric layer 133. In this case, the partition wall 134 is formed on the rear dielectric layer 133.

Meanwhile, the circuit unit 150 may be supported by the chassis member 140. In this case, the chassis member 140 may be coupled to the rear surface of the panel 110 that implements the image to support the panel 110.

The circuit unit 150 is installed behind the chassis member 140 and includes at least one circuit board 151, 152, 153, and 154. The circuit boards 151, 152, 153, and 154 mount at least one semiconductor device 155 to drive the panel 110.

In detail, the chassis member 140 is disposed behind the panel 110, and the panel 110 and the chassis member 140 are coupled by an adhesive member 103, for example, a double-sided tape. In addition, a panel heat dissipation means 105 may be provided between the panel 110 and the chassis member 140 to transfer heat generated from the panel 110 to the chassis member 140.

The circuit unit 150 may transmit an electrical signal to the panel 110 through the signal transmission member 170. The signal transmission member 170 may be a flexible circuit board such as a tape carrier package (TCP), a chip on film (COF), and the like, and in this case, the signal transmission members 170 may be formed on the wiring part 171 in a tape shape. At least one mounting element 172 may be mounted and packaged.

At least one of the circuit boards 151, 152, 153, 154 is inclined at an angle α (see FIG. 6) except a right angle from an imaginary surface S (see FIG. 6) extending vertically. Is placed. Due to this, as will be described later, the air rising along the lower rear of the circuit board does not move to the upper side of the circuit board. The fresh and cold air flows into the semiconductor device located above the circuit board, thereby providing excellent heat dissipation effect. Lose. Therefore, it is preferable that the circuit board inclined from the said virtual surface is a circuit board formed long in the vertical direction.

The circuit board may include a plurality of circuit boards, such as a central processing board 151, 152, and a logic-buffer board 153, 154, and functions to drive the panel 110.

In this case, the central processing boards 151 and 152 may be formed as a single board, or may include a logic board and a power board, and may include a plurality of boards. Here, the logic substrate 151 is responsible for converting the image signal supplied from the outside into a logical operation to match the driving method of the panel 110, and is typically disposed at the center of the chassis member 140. The power board 152 is typically disposed at the center of the chassis member 140, and serves to receive power from the outside and convert the power board into a power of a required type.

Logic-buffer substrates 153 and 154 temporarily store data processed by the logic substrate 151 and discharge pulses on the electrodes of the front panel 120 and the back panel 130. It functions to apply.

In this case, if the display device is a plasma display device, the logic-buffer substrate may be composed of the scan logic-buffer substrate 154 and the address logic-buffer substrate 153.

The address logic-buffer substrate 153 is connected to the address electrode 132 through the signal transmission member 170. As shown in FIG. 3, an upper address logic-buffer substrate formed at an upper end of the chassis member 140. And a lower address logic-buffer substrate disposed at the lower end of the chassis member 140, may be formed at the upper and lower ends of the chassis member 140, or alternatively, may be disposed only at the upper or lower end of the chassis member 140.

The scan logic-buffer substrate 154 is connected to the X electrode 123 or the Y electrode 124 through the signal transmission member, and is installed at a side end of the rear surface of the chassis member 140 and is disposed long over the top and bottom. .

Thus, the circuit board disposed to be tilted with respect to the virtual plane preferably includes at least a scan logic-buffer substrate 154.

The at least one semiconductor device 155 may be disposed to contact the heat sink 160. That is, the heat sink 160 is disposed to be in contact with the rear surface or the front surface of the semiconductor device 155 to function to radiate heat generated from the semiconductor device 155 to the outside. In this case, the heat sink 160 may include the base 161 and the heat dissipation plate 165 as shown in FIGS. 5 and 7. The base 161 is in contact with the semiconductor element 155 to function to receive heat generated from the semiconductor element.

In this case, the semiconductor device 155 in contact with the heat sink 160 may be an intelligent power module (IPM) chip 155a as shown in FIGS. 5 and 6. The IPM chip 155a is composed of a switching element, an element driving circuit, a basic protection circuit, and the like as a single module. The IPM chip 155a is a highly integrated semiconductor device that operates only in response to a signal by supplying power and providing a signal without additional components. Accordingly, the IPM chip 155a generates more heat than a conventional semiconductor device due to the integration, and the heat sink 160 contacts the rear surface of the IPM chip in order to smoothly discharge the heat to the outside. It is preferably arranged to.

In this case, the side surfaces of the heat dissipation plates 165 of the heat sink 160 formed to contact the IPM chip 155a may have the base portion at an angle β except a right angle from an imaginary surface S extending vertically up and down. It is preferably arranged to be inclined from 161. That is, the heat dissipation plates 165 may be disposed diagonally over the top and bottom.

Since the heat dissipation plates 165 of the heat sink are inclined from the vertical plane at a non-vertical angle, the length L of the air flow path disposed between the adjacent heat dissipation plates 165 is a conventional display device 1. Compared to the air flow path length K in, it has an effect of lengthening by K / sin (β). As a result, an area in which heat emitted from the semiconductor device 155 contacts increases, and as a result, the heat radiation effect from the semiconductor device increases.

In addition, the ratio of the air directly introduced from the outside is greater than that of the air Hb passing through the semiconductor device disposed below the air Ht facing the upper portion of the semiconductor device 155. Therefore, since the temperature of the air toward the upper portion of the semiconductor device 155 is not high, heat generated in the semiconductor device 155 may be smoothly received. This effect is even more pronounced when the semiconductor element 155 and the heat sink 160 in contact with the semiconductor element 155 are formed to be vertically long.

On the other hand, in order to increase the surface area of the heat sink 160, it is preferable that the heat sink 160 is formed to be the longest in the range that does not interfere with other elements, in this case, the heat sink 160 is the circuit board 154 It may be arranged extending to the outside of the.

Here, the angle β at which the heat sink 160 is inclined may be the same as the angle α at which the circuit board 154 is inclined. In this case, the shape of the heat sink 160 is not changed. After attaching to the rear surface of the semiconductor element 155 as described above, the circuit board 154 is rotated to be mounted on the chassis member 140, thereby making it simple.

In addition, although not shown, a heat conductive member may be interposed between the semiconductor device 155 and the heat sink 160. The heat transfer member functions to smoothly transfer heat generated in the semiconductor element to a heat sink, and preferably has a high heat transfer coefficient and elasticity. A heat conductive sheet, a thermal grease, or the like may be used.

 As shown in FIGS. 7 and 8, the semiconductor device 155 may be a high power switching device such as a field emission transistor (FET) 155b.

Also in this case, the heat sink 160 to which at least one FET 155b is attached may be provided, and the heat dissipation plates 165 of the heat sink 160 formed to contact the EET 155b may have side surfaces thereof. It may be arranged to be inclined from the base portion 161 at an angle β except a right angle from the imaginary surface (S) extending vertically up and down. That is, the heat dissipation plates 165 may be disposed diagonally over the top and bottom. In addition, the heat sink 160 is preferably inclined at the same angle as the inclination of the circuit board on which the FET 155b is mounted, which is omitted as it is the same as the heat sink in contact with the IPM chip 155a.

9 and 10, the circuit boards 251, 252, 253, and 254 of the display apparatus 200 according to the second embodiment of the present invention extend vertically and vertically. It is formed at right angles from the formed virtual surface S. FIG. That is, the circuit board is not inclined from the vertical up and down. Instead, the side surface of the heat sink 260 disposed in contact with the semiconductor element 255 is disposed to be inclined at an inclination β rather than at right angles from an imaginary surface S that extends vertically and vertically. On the other hand, the differences from the first embodiment of the present invention will be mainly described.

In this case, at least one semiconductor device 255 is mounted on the circuit boards 251, 252, 253, and 254, and the semiconductor device 255 is disposed to contact the heat sink 260.

The heat sink 260 includes a base portion 261 in contact with the base portion and a plurality of heat dissipation plates 265 extending from the base portion. That is, the heat dissipation plates 265 are disposed to be inclined at an angle β not perpendicular to the virtual surface S extending vertically and vertically. As a result, the length of the air passage RA disposed between the heat radiating plates 265 of the heat sink 260 is increased compared to the air flow passages disposed at right angles, and the surface area of the heat radiating plate 265 is increased. As a result, the heat dissipation effect is large.

In addition, an air flow path RA inlet of the heat dissipation plates 265 may be formed at the side of the semiconductor element 255 as well as the bottom of the semiconductor element 255. As a result, the air Ht directed toward the upper portion of the semiconductor element 255 does not pass through the lower portion of the semiconductor element 255 and flows directly from the outside to the side surface of the semiconductor element 255, thereby providing an upper portion of the semiconductor element 255. Since the temperature of the air toward the side is not high, heat generated from the upper portion of the semiconductor device 255 may be smoothly transmitted. This effect is even more pronounced when the semiconductor element 255 and the heat sink 260 in contact with the semiconductor element 255 are formed to be vertically long.

On the other hand, the semiconductor device 255 may be disposed adjacent to the top and bottom, in which case the air (Hb) passing through the heat sink in contact with the lower semiconductor device (260_b) is in contact with the semiconductor device (260_t) disposed above. The amount entering the heat sink is reduced. Accordingly, the heat dissipation effect of the upper semiconductor element due to the air Ht flowing into the upper semiconductor element 260_t is also excellent.

On the other hand, in order to increase the surface area of the heat sink 260, it is preferable that the heat sink 260 is formed to be the longest in the range that does not interfere with other elements, in this case, the heat sink 260 is the circuit board 251 It may be extended to the outside of the (252) (253) (254).

The present invention having the configuration as described above, the heat of the semiconductor element provided in the display device can be discharged to the outside effectively by contacting the low temperature air.

In addition, since the air in which heat generated in the lower semiconductor device is introduced does not face the upper semiconductor device, heat generated in the upper semiconductor device may be effectively released to the outside.

As a result, the reliability of the semiconductor device is increased, and as a result, the reliability of the display device is increased, and the lifetime of the semiconductor device is not deteriorated due to at least high heat.

Although the present invention has been described with reference to the embodiments shown in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. will be. Therefore, the true technical protection scope of the present invention will be defined by the matter described in the appended claims.

Claims (17)

A panel for implementing an image; A chassis member coupled to a rear surface of the panel to support the panel; And A display disposed on the chassis member inclined at an angle excluding right angles from an imaginary surface vertically extending vertically, and having at least one circuit board mounted with at least one semiconductor element for driving or controlling the panel Device. The method of claim 1, A heat sink disposed to be in contact with at least one semiconductor element mounted on the circuit board and dissipating heat generated in the semiconductor element to the outside;  The heat sink may include a base part contacting the semiconductor element and a plurality of heat dissipation plates extending from the base part and inclined at an angle excluding a right angle from an imaginary surface of which a side surface extends vertically and vertically. . The method of claim 2, And the heat dissipation plates are inclined at the same angle as the semiconductor element. The method of claim 2, And the heat sink extends to the outside of the circuit board. The method of claim 1, The semiconductor device is a display device, characterized in that the IPM (Intelligent Power Module) chip. The method of claim 1, The semiconductor device is a field emission transistor (FET), and a plurality of display devices are arranged to be in contact with one heat sink side by side. The method of claim 1, The panel is a display device, characterized in that the plasma display panel for implementing an image using the plasma discharge. A front substrate and a rear substrate spaced apart in front and rear to form a discharge space therebetween; discharge electrodes disposed between the front substrate and the rear substrate to generate plasma discharge; dielectric layers covering the discharge electrodes; and the discharge space. A panel including a phosphor layer disposed within and a discharge gas within the discharge cells; And At least one circuit board disposed at the rear or side of the panel, and having at least one semiconductor element for driving or controlling the panel, the side of which is inclined at an angle except a right angle from an imaginary surface extending vertically and vertically. Display device characterized in that it comprises. The method of claim 8, Between the panel and the circuit board, there is further provided a chassis member for supporting the panel from the rear, And the circuit boards are provided behind the chassis member. The method of claim 8, The virtual board and the inclined circuit board comprises a circuit board elongated over at least up and down. The method of claim 8, Between the front substrate and the rear substrate, a partition wall which partitions a discharge cell together with the front substrate and the rear substrate is disposed, The discharge electrodes are: X electrodes and Y electrodes which are installed in contact with or adjacent to the rear surface of the front substrate and extend in parallel in one direction in which the discharge cells extend; And And a plurality of address electrodes disposed in contact with or adjacent to the front surface of the rear substrate, the address electrodes extending in a direction crossing the direction in which the X and Y electrodes extend. The method of claim 11, And the circuit board inclined to the virtual plane comprises a scan logic-buffer substrate connected to at least the X and Y electrodes. The method of claim 8, A heat sink disposed to be in contact with at least one semiconductor element mounted on the circuit board and dissipating heat generated in the semiconductor element to the outside; The heat sink has a base portion in contact with the semiconductor element and a plurality of heat dissipation plates extending from the base portion and having a side inclined at an angle except a right angle from an imaginary surface vertically extending vertically. The method of claim 13, The heat dissipation plate is a display device, characterized in that inclined at the same angle as the semiconductor element. The method of claim 8, The semiconductor device is a display device, characterized in that formed to extend to the outside of the circuit board. The method of claim 8, The semiconductor device is a display device, characterized in that the IPM (Intelligent Power Module) chip. The method of claim 8, The semiconductor device is a field emission transistor (FET), and a plurality of display devices are arranged to be in contact with one heat sink side by side.

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