KR100784530B1 - Plasma Display and Driving Method - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device and a driving method thereof, and more particularly, to a plasma display device and a driving method thereof for improving a reset waveform to ensure stable driving.

The plasma display device according to the present invention is configured by applying a plasma display panel including a scan electrode, a scan driver for driving the scan electrode, and a setup control signal for alternately repeating a plurality of turn-on and turn-off signals to the scan driver. It characterized in that it comprises a setup control unit for adjusting the slope of the pulse.

A driving method of a plasma display device according to the present invention is a driving method of a plasma display device in which a plurality of subfields are divided into a reset period, an address period, and a sustain period, respectively, and display images in frame units in which the subfields are combined. And applying a setup control signal alternately repeating the turn-on signal and the turn-off signal to adjust the slope of the setup pulse.

Description

Plasma Display Apparatus and Driving Method

1 is a perspective view showing the structure of a typical plasma display panel.

2 is a diagram illustrating a method of implementing image gradation of a conventional plasma display panel.

3 is a view showing a drive waveform of a conventional plasma display panel.

4 is a circuit diagram showing a conventional setup pulse and its implementation method.

5 is a circuit diagram showing a conventional setdown pulse and its implementation method.

6 illustrates a plasma display device according to a first embodiment of the present invention.

7 illustrates a driving waveform of the plasma display device according to the first embodiment of the present invention.

8A and 8B are circuit diagrams illustrating a setup pulse and a method of implementing the same in a plasma display device according to a first embodiment of the present invention.

9 illustrates a plasma display device according to a second embodiment of the present invention.

FIG. 10 illustrates driving waveforms of a plasma display device according to a second exemplary embodiment of the present invention. FIG.

11A and 11B are circuit diagrams illustrating a setdown pulse and a method of implementing the same in a plasma display device according to a second exemplary embodiment of the present invention.

12 illustrates a plasma display device according to a third embodiment of the present invention.

13 illustrates a driving waveform of a plasma display device according to a third exemplary embodiment of the present invention.

14A and 14B are circuit diagrams illustrating a reset pulse and a method of implementing the same in a plasma display device according to a third exemplary embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device and a driving method thereof, and more particularly, to a plasma display device and a driving method thereof for improving a reset waveform to ensure stable driving.

In general, a plasma display panel forms a unit cell with a space between partition walls formed between a front substrate and a rear substrate, and each cell includes neon (Ne), helium (He), or a mixture of neon and helium (Ne +). A main discharge gas such as He) and an inert gas containing a small amount of xenon (Xe) are filled. When discharged by a high frequency voltage, the inert gas generates vacuum ultraviolet rays and emits phosphors formed between the partition walls to realize an image. Plasma display devices employing such plasma display panels have been spotlighted as next generation display devices because they can be made thin and light.

1 is a perspective view showing the structure of a typical plasma display panel.

As shown in FIG. 1, the plasma display panel is coupled in parallel with a front substrate 100, which is a display surface on which an image is displayed, and a rear substrate 110, which forms a rear surface, with a predetermined distance therebetween.

The front substrate 100 is based on the front glass 101, and scan electrodes 102 (Y electrodes) and sustain electrodes 103 (Z electrodes), that is, mutually discharged in one discharge cell and maintain light emission of the cells. The scan electrode 102 and the sustain electrode 103 formed of a transparent electrode a made of a transparent ITO material and a bus electrode b made of a metal material are formed in pairs. Scan electrode 102 and sustain electrode 103 are covered by one or more dielectric layers 104 that limit the discharge current and insulate the electrode pairs, and on top of dielectric layer 104 to facilitate discharge conditions. A protective layer 105 on which magnesium oxide (MgO) is deposited is formed.

The rear substrate 110 is arranged with the stripe-type (or well-type) partition walls 112 to form a plurality of discharge spaces, that is, discharge cells, based on the rear glass 111. In addition, a plurality of address electrodes 113 (X electrodes) for performing address discharge to generate vacuum ultraviolet rays are disposed in parallel with the partition wall 112. The upper surface of the rear substrate 110 is coated with R, G, B phosphors 114 that emit visible light for image display during address discharge. A white dielectric 115 is formed between the address electrode 113 and the phosphor 114 to protect the address electrode 113 and reflect the visible light emitted from the phosphor 114 to the front substrate 100.

A method of implementing gray levels of an image in such a plasma display panel will now be described with reference to FIG. 2.

2 is a diagram illustrating a method of implementing image grayscale of a conventional plasma display panel.

As shown in FIG. 2, the conventional plasma display panel performs time division driving by dividing one frame into several subfields having different number of emission times in order to realize gray level of an image. Each subfield is divided into a reset period for initializing the full screen, an address period for selecting a scan line and selecting a discharge cell in the selected scan line, and a sustain period for implementing gray levels according to the number of discharges. For example, when the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. Each of the eight subfields SF1 to SF8 is divided into a reset period RP, an address period AP, and a sustain period SP as described above. In this case, while the reset period RP and the address period AP of each subfield are the same for each subfield, the sustain period and the number of sustain pulses allocated thereto are 2 ⁿ (n = 0,1,2) in each subfield. 3,4,5,6,7).

3 is a diagram illustrating a driving waveform of a conventional plasma display panel.

Referring to FIG. 3, each of the subfields SF has a reset period RP for initializing the discharge cells of the entire screen, an address period AP for selecting the discharge cells, and a sustain for maintaining the discharge of the selected discharge cells. It includes a period SP.

In the reset period RP, the rising ramp waveform PR is simultaneously applied to all the scan electrodes Y in the setup period SU. The rising ramp waveform PR causes a weak discharge (setup discharge) to occur in the cells of the entire screen, thereby generating wall charges in the cells. After the rising ramp waveform PR is applied in the set-down period SD, a predetermined slope from the positive sustain voltage Vs lower than the peak voltage of the rising ramp waveform PR to the negative scan voltage (-Vy) is given. The falling ramp waveform NR, which falls down, is applied to the scan electrodes Y simultaneously. The falling ramp waveform NR generates weak erase discharges in the cells, thereby eliminating unnecessary charges during wall charges and space charges generated by setup discharges, thereby uniformly retaining wall charges required for address discharges in the cells of the entire screen. .

In the address period AP, the negative scan pulse SCNP is sequentially applied to the scan electrodes Y, and the positive data pulse DP is applied to the address electrodes. As the voltage difference between the scan pulse SCNP and the data pulse DP and the wall voltage generated in the reset period RP are added, an address discharge is generated in the cell to which the data pulse DP is applied. Wall charges are generated in the cells selected by the address discharge.

On the other hand, a positive bias voltage Vzb is applied to the sustain electrodes Z during the set down period SD and the address period AP.

In the sustain period SP, the sustain pulse SUSP is applied to the scan electrodes Y and the sustain electrodes Z alternately. Then, the cell selected by the address discharge is in the form of surface discharge between the scan electrode Y and the sustain electrode Z whenever the sustain pulse SUSP is applied while the wall voltage and the sustain pulse SSUS in the cell are added. Sustain discharge, that is, display discharge for displaying an image, occurs.

In this way, the driving process of the plasma display panel in one subfield is completed.

In the conventional driving process of the plasma display panel, as shown in FIGS. 4 and 5, it is common to fix and apply the slopes of the setup pulse and the setdown pulse as one.

That is, by applying a setup control pulse that remains on for the setup period as shown in FIG. 4B to the gate terminal of the setup FETQu as shown in FIG. 4C, FIG. 4. Implement a setup pulse that rises with a fixed slope as shown in (a) of FIG.

In addition, as shown in (c) of FIG. 5, by applying a setdown control pulse for maintaining the on state for the setdown period as shown in (b) of FIG. 5 to the gate terminal of the set-down FET (Qd), FIG. As shown in (a) of FIG. 3, a setdown pulse descending with a fixed slope is implemented.

However, by fixing the slopes of the setup pulse and the setdown pulse as one, it is difficult to control the wall charges during the reset period including the setup period and the setdown period, which adversely affects the entire driving process afterwards, and ultimately the plasma There is a problem that destabilizes the entire driving process of the display panel.

The present invention to solve this problem is to improve the image display quality by ensuring a stable drive by improving the reset waveform to more precisely adjust the wall charge distribution in the discharge cells during the reset period and a driving method thereof It aims to provide.

In accordance with another aspect of the present invention, a plasma display device includes a plasma display panel including a scan electrode, a scan driver for driving the scan electrode, and a plurality of turn-on and turn-off signals alternately. And a setup controller configured to apply a setup control signal to the scan driver to adjust the slope of the setup pulse.

The duration of each turn-on signal and each turn-off signal is characterized by the same.

The duration of at least one of the turn-on signals is different from the duration of the remaining turn-on signals.

The duration of the first turn-on signal of the turn-on signal is characterized by the longest.

The duration of at least one of the turn-on signals is adjusted differently for each subfield.

The duration of at least one of the turnoff signals is different from the duration of the remaining turnoff signals.

The duration of at least one of the turn-off signals is adjusted differently for each subfield.

The plasma display device according to the second embodiment of the present invention includes a plasma display panel including a scan electrode, a scan driver for driving the scan electrode, and a setdown control signal for alternately repeating a plurality of turn-on and turn-off signals. And a set down control unit applied to the scan driver to adjust the slope of the set down pulse.

The duration of each turn-on signal and each turn-off signal is characterized by the same.

The duration of at least one of the turn-on signals is different from the duration of the remaining turn-on signals.

The duration of the first turn-on signal of the turn-on signal is characterized by the longest.

The duration of at least one of the turn-on signals is adjusted differently for each subfield.

The duration of at least one of the turnoff signals is different from the duration of the remaining turnoff signals.

The duration of at least one of the turn-off signals is adjusted differently for each subfield.

A plasma display device according to a third embodiment includes a plasma display panel including a scan electrode, a scan driver for driving the scan electrode, a setup control signal for alternately repeating a plurality of first turn-on signals and first turn-off signals. A setup control unit applied to the scan driver to adjust the slope of the setup pulse, and a set down control signal applied to the scan driver to alternately repeat a plurality of second turn-on and second turn-off signals to the scan driver to adjust the slope of the set-down pulse. It characterized in that it comprises a control unit.

The duration of each first turn-on signal and each first turn-off signal is the same.

The duration of at least one of the first turn on signals is different from the duration of the remaining first turn on signals.

The duration of the first first turn-on signal of the first turn-on signal is the longest.

The duration of at least one of the first turnoff signals is different from the duration of the remaining first turnoff signals.

The duration of at least one of the first turnoff signals may be adjusted differently for each subfield.

The duration of each second turn-on signal and each second turn-off signal is the same.

The duration of at least one of the second turn-on signals is different from the duration of the remaining second turn-on signals.

The duration of the first second turn-on signal of the second turn-on signal is the longest.

The duration of at least one of the second turnoff signals is different from the duration of the remaining second turnoff signals.

The duration of at least one of the second turnoff signals may be adjusted differently for each subfield.

In a driving method of a plasma display device according to a first embodiment, a plurality of subfields are divided into a reset period, an address period, and a sustain period, respectively, and the plasma display device driving method includes: And applying a setup control signal that alternately repeats the plurality of turn-on and turn-off signals to adjust the slope of the setup pulse.

A driving method of a plasma display device according to a second embodiment of the present invention is a driving method of a plasma display device in which a plurality of subfields are divided into a reset period, an address period, and a sustain period, respectively, and display images in frame units in which the subfields are combined. And applying a setdown control signal that alternately repeats the plurality of turn-on and turn-off signals to adjust the slope of the setdown pulse.

In a driving method of a plasma display device according to a third embodiment, a method of driving a plasma display device in which a plurality of subfields are divided into a reset period, an address period, and a sustain period, respectively, and displays an image in units of frames in which the subfields are combined, Adjusting a slope of a setup pulse by applying a setup control signal that alternately repeats the plurality of first turn-on signals and the first turn-off signal, and alternately repeating the plurality of second turn-on signals and the second turn-off signal And applying a set down control signal to adjust the slope of the set down pulse.

Hereinafter, a preferred embodiment of a plasma display device and a driving method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

<Example>

6 is a diagram illustrating a plasma display device according to a first embodiment of the present invention.

As shown in FIG. 6, in the plasma display device according to the first embodiment of the present invention, the address electrodes X1 to Xm, the scan electrodes Y1 to Yn, and the sustain electrode Z in the reset period, the address period, and the sustain period. A plasma display panel 600 expresses an image by generating a gas discharge in a discharge space containing an inert gas by applying a predetermined driving pulse to the X-ray), and address electrodes X1 to Xm formed on a rear panel (not shown). A setup controller for supplying data to the scan driver 62 by applying a data driver 61 for supplying data to the scan driver 62 and a setup control signal CTRYsu that alternately repeats a plurality of turn-on and turn-off signals. 601, a scan driver 62 for driving the scan electrodes Y1 to Yn formed on the front panel (not shown), and a sustain drive for driving the sustain electrode Z formed on the front panel (not shown). The unit 63 includes a timing controller 64 for controlling the driving units 61, 62, and 63, and a driving voltage generator 65 for supplying driving voltages to the driving units 61, 62, and 63. .

Hereinafter, functions and operations of the components of the plasma display device according to the first embodiment of the present invention will be described in detail.

Although not shown, the plasma display panel 600 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals with a discharge space including an inert gas therebetween. For example, the scan electrodes Y1 to Yn and the sustain electrode Z are formed in pairs, and on the rear panel, the address electrodes X1 to Y cross the scan electrodes Y1 to Yn and the sustain electrode Z. Xm) is formed.

The data driver 61 is subjected to inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like not shown, and then data mapped according to a subfield pattern preset by the subfield mapping circuit is supplied. The data driver 61 samples and latches data under the control of the timing controller 64, and then supplies the data to the address electrodes X1 to Xm.

The setup controller 601 applies a setup control signal CTRYsu that alternately repeats the plurality of turn-on and turn-off signals to the scan driver 62 to adjust the slope of the setup pulse during the setup period.

The scan driver 62 performs a setup control signal alternately repeating a plurality of turn-on signals and turn-off signals to the scan electrodes Y1 to Yn during the setup period under the control of the timing controller 64 and the setup controller 601. According to CTRYsu), a plurality of rising sections to which rising waveforms of the same slope are applied and a plurality of voltage level holding sections to which voltage level holding waveforms to maintain voltage levels at the end of each rising section are alternately raised. Apply a setup pulse. In addition, during the subsequent setdown period, under the control of the timing controller 64, a setdown pulse which starts at the sustain voltage Vs and falls to the negative setdown voltage (-Vy) lower than the sustain voltage Vs is scanned electrodes Y1 to Yn. ) Is applied.

In addition, the scan driver 62 supplies the scan electrodes Y1 to Yn to select the scan line during the address period after the reset waveform including the setup pulse and the set down pulse is supplied to the scan electrodes Y1 to Yn. A scan pulse that falls from the scan reference voltage Vsc and the scan reference voltage Vsc to the negative scan voltage -Vy is applied.

In addition, the scan driver 62 supplies a sustain pulse to the scan electrodes Y1 to Yn to allow sustain discharge to occur in the selected cell in the address period during the sustain period.

The sustain driver 63 supplies a bias voltage having a sustain voltage (Vs) level to the sustain electrode Z during the setdown period and the address period under the control of the timing controller 64, and then the scan driver 62 and the scan driver 62 during the sustain period. Alternatingly, a sustain pulse is supplied to the sustain electrode (Z).

The timing controller 64 receives a vertical / horizontal synchronization signal and generates timing control signals CTRX, CTRY, and CTRZ required for each driver, and transmits the timing control signals CTRX, CTRY, and CTRZ to the corresponding driver 61, 62, or the like. Each drive unit 61, 62, 63 is controlled by supplying the power to 63. The timing control signal CTRX applied to the data driver 61 includes a sampling clock for sampling data, a latch control signal, an energy recovery circuit, and a switch control signal for controlling on / off time of the driving switch element. The timing control signal CTRY applied to the scan driver 62 includes an energy recovery circuit in the scan driver 62 and a switch control signal for controlling on / off time of the driving switch element. The timing control signal CTRZ applied to the sustain driver 63 includes an energy recovery circuit in the sustain driver 63 and a switch control signal for controlling on / off time of the driving switch element.

The driving voltage generation unit 65 includes respective driving units 61 and 62 including a sustain voltage Vs, a setup ramp voltage Vst, a scan reference voltage Vsc, a data voltage Va, a scan voltage (-Vy), and the like. And various driving voltages required by (63). These driving voltages may vary depending on the composition of the discharge gas or the structure of the discharge cell.

Hereinafter, the operation principle of the plasma display device according to the first embodiment of the present invention will be described in detail with reference to FIGS. 7 to 8B.

7 illustrates a driving waveform of the plasma display device according to the first embodiment of the present invention.

As shown in FIG. 7, the plasma display device according to the first embodiment of the present invention implements an image in a frame unit composed of a combination of a plurality of subfields, and one subfield SF initializes all cells. The driving period is divided into a reset period RP for performing the operation, an address period AP for selecting the cell to be discharged, and a sustain period SP for maintaining the discharge of the selected cell.

Hereinafter, the voltage applied to each period and its function will be described in detail.

First, in the reset period RP, in the setup period SU, rising waveforms having the same slope are generated according to a setup control signal in which a plurality of turn-on signals and turn-off signals are alternately repeated in all the scan electrodes Y1 to Yn. A setup pulse that alternately repeatedly rises between a plurality of rising sections to be applied and a plurality of voltage level holding zones to which voltage level holding waveforms to maintain voltage levels at the end of each rising section is applied is simultaneously applied. The electrode Z and the address electrodes X1 to Xm maintain ground.

This setup pulse causes weak dark discharge in the discharge cells of the entire screen. Due to this setup discharge, positive wall charges are accumulated on the address electrodes X1 to Xm and the sustain electrode Z, and negative wall charges are accumulated on the scan electrodes Y1 to Yn.

Meanwhile, as a specific means for implementing such a setup pulse, a setup ramp voltage source Vst for supplying a setup ramp voltage to the scan electrode Y during the setup period and a setup ramp voltage source Vst as shown in (c) of FIG. 8A. ) Is connected between the scan electrode (Y) and the scan electrode (Y) and switched in accordance with the setup control signal (CTRYsu), and the setup capacitor (Cu) connected between the scan electrode (Y) and the gate terminal of the setup FET (Qu). ) And a scan driver including a setup variable resistor (Ru) commonly connected to the setup capacitor (Cu) and a gate terminal of the setup FET (Qu), and the setup FET (Qu) is turned on according to the setup control signal (CTRYsu). Adjust the slope of the setup pulse by turning it off.

That is, by applying the setup control pulse (CTRYsu) to repeat the on and off, as shown in (b) of Figure 8a to the gate terminal of the setup FET (Qu), without the addition of additional circuit elements (a of FIG. Adjust the slope of the setup pulse as shown in. That is, the set-up pulse is raised while alternately repeating the plurality of rising sections and the plurality of voltage level holding sections, thereby adjusting the slope of the whole set-up pulse.

Preferably, the duration of each turn-on signal and each turn-off signal is the same. By adjusting the duration of each turn-on signal and each turn-off signal in this way, the switching operation of the circuit for implementing the setup pulse is simplified while ensuring stable setup discharge.

Preferably, the duration of at least one of the turn-on signals is different from the duration of the remaining turn-on signals. As such, by adjusting the duration of at least one of the turn-on signals differently from the duration of the remaining turn-on signals, the waveform of the setup pulse is adjusted according to the driving environment, thereby ensuring stable setup discharge.

It is desirable to make the duration of the first turn-on signal the longest among the turn-on signals. That is, by adjusting the duration of the first turn-on signal among the setup control signals CTRYsu as the longest as shown in (b) of FIG. 8B, the first of the plurality of rising sections of the setup pulse as shown in (a) of FIG. 8B is adjusted. The duration of the rising section is adjusted to be the longest, thereby enhancing the setup discharge in the first half of the setup period SU and thus reducing the overall setup time to secure the driving margin of the plasma display device.

Preferably, the duration of at least one of the turn-on signals is adjusted differently for each subfield. As described above, by adjusting the duration of at least one of the turn-on signals differently for each subfield, more efficient setup discharge is ensured according to the driving environment.

Preferably, the duration of at least one of the turnoff signals is different from the duration of the remaining turnoff signals. In this way, by adjusting the duration of at least one of the turn-off signal different from the duration of the remaining turn-off signal to adjust the duration of the voltage level maintenance period according to the turn-off signal, to ensure an efficient setup discharge.

Preferably, the duration of at least one of the turn-off signals is adjusted differently for each subfield. As described above, by adjusting the duration of at least one of the turn-off signals differently for each subfield, the duration of the voltage level maintenance interval according to the turn-off signal is adjusted for each subfield, thereby ensuring more efficient setup discharge according to the driving environment.

During the subsequent set down period SD, all the scan electrodes Y1 to Yn have a setdown pulse starting at the sustain voltage Vs and falling to a constant slope with a negative setdown voltage (-Vy) lower than the sustain voltage Vs. Are simultaneously applied, and when a bias voltage having a positive sustain voltage Vs level is applied to the sustain electrode Z, the positive wall charges of the address electrodes X1 to Xm are maintained, but the sustain electrode Z and While discharging the positive wall charge of the sustain electrode Z by a discharge between the scan electrodes Y1 to Yn, the sustain electrode Z receives a large amount of negative charge accumulated in the scan electrodes Y1 to Yn. And address electrodes X1 to Xm are divided.

By this set down discharge, the wall charges such that the address discharge can stably occur remain uniformly in the cells.

Next, in the address period AP, the data pulse DP rising from the ground GND to the positive data voltage Va at the address electrodes X1 to Xm, and the scan reference voltages at the scan electrodes Y1 to Yn. When the scan pulse SCNP falling to the negative scan voltage (-Vy) at Vsc is applied in synchronization, the voltage difference between the address electrodes X1 to Xm and the scan electrodes Y1 to Yn, and the reset period RP ), An address discharge is generated as the wall voltage between the address electrodes X1 to Xm and the scan electrodes Y1 to Yn due to the wall charges formed during the above step is added.

On the other hand, the sustain electrode Z has a positive sustain voltage Vs level so as to reduce the voltage difference between the scan electrodes Y1 to Yn during the address period AP so that no misdischarge occurs with the scan electrodes Y1 to Yn. The bias voltage is supplied.

Next, in the sustain period SP, a sustain pulse SUSP that rises from the ground GND to the sustain voltage Vs is applied to the scan electrodes Y1 to Yn and the sustain electrode Z alternately. The cell selected by the address discharge has a sustain discharge, i.e., between the scan electrodes Y1 to Yn and the sustain electrode Z every time the sustain pulse SSUS is applied as the wall voltage and the sustain pulse SSUS in the cell are added. Display discharge occurs.

In this way, the driving process of the plasma display device according to the first embodiment of the present invention in one subfield is completed.

As described in detail above, the plasma display device according to the first embodiment of the present invention improves the waveform of the setup pulse to more precisely adjust the wall charge distribution in the discharge cell during the setup period, thereby ensuring stable driving and The image display quality of the display device is improved.

9 is a diagram illustrating a plasma display device according to a second embodiment of the present invention.

As shown in FIG. 9, the plasma display device according to the second exemplary embodiment of the present invention has address electrodes X1 to Xm, scan electrodes Y1 to Yn, and sustain electrodes Z in a reset period, an address period, and a sustain period. A plasma display panel 900 expressing an image by generating a gas discharge in a discharge space containing an inert gas by applying a predetermined driving pulse to the N s) and address electrodes X1 to Xm formed on a rear panel (not shown). A set-down control unit which applies a data driver 91 for supplying data to the scan driver 92 by applying a set-down control signal CTRYsd which alternately repeats a plurality of turn-on and turn-off signals to the scan driver 92. 901, a scan driver 92 for driving the scan electrodes Y1 to Yn formed on the front panel (not shown), and a sustain for driving the sustain electrode Z formed on the front panel (not shown). An in driver 93, a timing controller 94 for controlling each of the drivers 91, 92, and 93, and a driving voltage generator 95 for supplying a driving voltage to each of the drivers 91, 92, and 93. do.

Hereinafter, functions and operations of each component of the plasma display device according to the second embodiment of the present invention will be described in detail.

First, although not shown, the plasma display panel 900 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals with a discharge space including an inert gas therebetween. For example, the scan electrodes Y1 to Yn and the sustain electrode Z are formed in pairs, and on the rear panel, the address electrodes X1 to Y cross the scan electrodes Y1 to Yn and the sustain electrode Z. Xm) is formed.

The data driver 91 is subjected to inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like not shown, and then data mapped according to a subfield pattern preset by the subfield mapping circuit is supplied. The data driver 91 samples and latches data under the control of the timing controller 94, and then supplies the data to the address electrodes X1 to Xm.

The setdown controller 901 adjusts the slope of the setdown pulse by applying the setdown control signal CTRYsd which alternately repeats the plurality of turn-on and turn-off signals to the scan driver 92 during the setdown period.

The scan driver 92 applies a setup pulse that gradually rises to the scan electrodes Y1 to Yn during the setup period under the control of the timing controller 94.

In addition, according to the setdown control signal CTRYsd which alternately repeats a plurality of turn-on signals and turn-off signals to the scan electrodes Y1 to Yn under the control of the timing controller 94 and the setdown controller 901 during the subsequent setdown period. A set-down pulse that alternately descends a plurality of falling sections to which a falling waveform of the same slope is applied and a plurality of voltage level holding sections to which a voltage level holding waveform is applied to maintain a voltage level at the end of each falling section. Is authorized.

In addition, the scan driver 92 supplies the scan electrodes Y1 to Yn to select a scan line during an address period after a reset waveform including a setup pulse and a set down pulse is supplied to the scan electrodes Y1 to Yn. A scan pulse that falls from the scan reference voltage Vsc and the scan reference voltage Vsc to the negative scan voltage -Vy is applied.

In addition, the scan driver 92 supplies a sustain pulse to the scan electrodes Y1 to Yn to allow sustain discharge to occur in the selected cell in the address period during the sustain period.

The sustain driver 93 supplies a bias voltage having a sustain voltage (Vs) level to the sustain electrode Z during the setdown period and the address period under the control of the timing controller 94, and then the scan driver 92 is connected to the scan driver 92 during the sustain period. Alternatingly, a sustain pulse is supplied to the sustain electrode (Z).

The timing controller 94 receives a vertical / horizontal synchronization signal and generates timing control signals CTRX, CTRY, and CTRZ required for each driver, and transmits the timing control signals CTRX, CTRY, and CTRZ to the corresponding drive units 91, 92, Each of the driving units 91, 92, and 93 is controlled by supplying to 93. The timing control signal CTRX applied to the data driver 91 includes a sampling clock for sampling data, a latch control signal, an energy recovery circuit, and a switch control signal for controlling on / off time of the driving switch element. The timing control signal CTRY applied to the scan driver 92 includes an energy recovery circuit in the scan driver 92 and a switch control signal for controlling on / off time of the driving switch element. The timing control signal CTRZ applied to the sustain driver 93 includes a switch control signal for controlling the on / off time of the energy recovery circuit and the drive switch element in the sustain driver 93.

The driving voltage generation unit 95 includes each driving unit 91 and 92 including a sustain voltage Vs, a setup ramp voltage Vst, a scan reference voltage Vsc, a data voltage Va, and a scan voltage (-Vy). 93 generates various driving voltages required. These driving voltages may vary depending on the composition of the discharge gas or the structure of the discharge cell.

Hereinafter, the operation principle of the plasma display device according to the second embodiment of the present invention will be described in detail with reference to FIGS. 10 to 11B.

10 illustrates a driving waveform of the plasma display device according to the second embodiment of the present invention.

As shown in FIG. 10, the plasma display device according to the second embodiment of the present invention implements an image in a frame unit composed of a combination of a plurality of subfields, and one subfield SF initializes all cells. The driving period is divided into a reset period RP for performing the operation, an address period AP for selecting the cell to be discharged, and a sustain period SP for maintaining the discharge of the selected cell.

Hereinafter, the voltage applied to each period and its function will be described in detail.

First, in the reset period RP, a gradually rising set-up pulse is simultaneously applied to all the scan electrodes Y1 to Yn in the setup period SU, and the sustain electrode Z and the address electrodes X1 to Xm are simultaneously applied. Keeps ground.

This setup pulse causes weak dark discharge in the discharge cells of the entire screen. Due to this setup discharge, positive wall charges are accumulated on the address electrodes X1 to Xm and the sustain electrode Z, and negative wall charges are accumulated on the scan electrodes Y1 to Yn.

A plurality of falling sections to which a falling waveform of the same slope is applied to all the scan electrodes Y1 to Yn during the subsequent set down period SD according to a set down control signal that alternately repeats a plurality of turn-on signals and turn-off signals. And a set-down pulse that alternately repeatedly descends a plurality of voltage level holding sections to which a voltage level holding waveform is applied to maintain the voltage level at the end of each falling section, while simultaneously applying a positive electrode to the sustain electrode Z. When a bias voltage having a positive sustain voltage (Vs) level is applied, the positive wall charges of the address electrodes X1 to Xm are kept as they are, but are sustained through discharge between the sustain electrode Z and the scan electrodes Y1 to Yn. While erasing the positive wall charge of the electrode Z by a certain amount, a large amount of negative charges accumulated on the scan electrodes Y1 to Yn are stored in the sustain electrode Z and the address. The electrodes X1 to Xm are divided.

By this set down discharge, the wall charges such that the address discharge can stably occur remain uniformly in the cells.

Meanwhile, as a specific means for implementing such a setdown pulse, a setdown lamp voltage source (-Vy) for supplying a setdown lamp voltage to the scan electrode (Y) during the setdown period as shown in (c) of FIG. 11A, and a setdown lamp voltage source ( A set-down capacitor connected between the scan electrode Y and the gate terminal of the set-down FET Qd, which is connected between Vy and the scan electrode Y and switched according to the set-down control signal CTRYsd. And a scan driver including (Cd) and a setdown variable resistor (Rd) commonly connected to the setdown capacitor (Cd) and the gate terminal of the setdown FET (Qd), and the setdown FET (Qd) is connected to the setdown control signal (CTRYsd). The slope of the setdown pulse is adjusted by turning on and off accordingly.

That is, by applying the set-down control pulses (CTRYsd) to repeat the on and off, as shown in (b) of FIG. 11a to the gate terminal of the set-down FET (Qd), without additional circuit elements of FIG. Adjust the slope of the setdown pulse as shown in a). That is, the setdown pulse alternately repeats the plurality of falling sections and the plurality of voltage level maintaining sections, and as a result, adjusts the slope of the entire setdown pulse.

Preferably, the duration of each turn-on signal and each turn-off signal is the same. By adjusting the duration of each turn-on signal and each turn-off signal in this way, the switching operation of the circuit for implementing the set-down pulse is simplified while ensuring stable set-down discharge.

Preferably, the duration of at least one of the turn-on signals is different from the duration of the remaining turn-on signals. As such, by adjusting the duration of at least one of the turn-on signals differently from the duration of the remaining turn-on signals, the waveform of the set-down pulse is adjusted according to the driving environment, thereby ensuring stable set-down discharge.

It is desirable to make the duration of the first turn-on signal the longest among the turn-on signals. That is, by adjusting the duration of the first turn-on signal among the setdown control signals CTRYsd as the longest as shown in (b) of FIG. 11B, the first of the plurality of falling sections of the setdown pulse as shown in (a) of FIG. 11B. The duration of the falling section is adjusted to be the longest, thereby strengthening the setdown discharge in the first half of the setdown period SD and thereby reducing the overall setdown time to secure the driving margin of the plasma display device.

Preferably, the duration of at least one of the turn-on signals is adjusted differently for each subfield. As described above, the duration of at least one of the turn-on signals is adjusted differently for each subfield, thereby ensuring more efficient setdown discharge according to the driving environment.

Preferably, the duration of at least one of the turnoff signals is different from the duration of the remaining turnoff signals. As described above, the duration of at least one of the turn-off signals is adjusted differently from the duration of the remaining turn-off signals to adjust the duration of the voltage level maintenance period according to the turn-off signal, thereby ensuring efficient set-down discharge.

Preferably, the duration of at least one of the turn-off signals is adjusted differently for each subfield. As described above, the duration of at least one of the turn-off signals is adjusted differently for each subfield, so that the duration of the voltage level maintenance interval according to the turn-off signal is adjusted for each subfield, thereby ensuring more efficient setdown discharge according to the driving environment.

Next, in the address period AP, the data pulse DP rising from the ground GND to the positive data voltage Va at the address electrodes X1 to Xm, and the scan reference voltages at the scan electrodes Y1 to Yn. When the scan pulse SCNP falling to the negative scan voltage (-Vy) at Vsc is applied in synchronization, the voltage difference between the address electrodes X1 to Xm and the scan electrodes Y1 to Yn, and the reset period RP ), An address discharge is generated as the wall voltage between the address electrodes X1 to Xm and the scan electrodes Y1 to Yn due to the wall charges formed during the above step is added.

On the other hand, the sustain electrode Z has a positive sustain voltage Vs level so as to reduce the voltage difference between the scan electrodes Y1 to Yn during the address period AP so that no misdischarge occurs with the scan electrodes Y1 to Yn. The bias voltage is supplied.

Next, in the sustain period SP, a sustain pulse SUSP that rises from the ground GND to the sustain voltage Vs is applied to the scan electrodes Y1 to Yn and the sustain electrode Z alternately. The cell selected by the address discharge has a sustain discharge, i.e., between the scan electrodes Y1 to Yn and the sustain electrode Z every time the sustain pulse SSUS is applied as the wall voltage and the sustain pulse SSUS in the cell are added. Display discharge occurs.

In this way, the driving process of the plasma display device according to the second embodiment of the present invention in one subfield is completed.

As described above in detail, the plasma display device according to the second embodiment of the present invention improves the waveform of the setdown pulse to more precisely adjust the wall charge distribution in the discharge cells during the setdown period, thereby securing stable driving and The image display quality of the display device is improved.

12 is a diagram illustrating a plasma display device according to a third embodiment of the present invention.

As shown in FIG. 12, the plasma display device according to the third exemplary embodiment of the present invention has address electrodes X1 to Xm, scan electrodes Y1 to Yn, and sustain electrodes Z in a reset period, an address period, and a sustain period. A plasma display panel 1200 expressing an image by generating a gas discharge in a discharge space containing an inert gas by applying a predetermined driving pulse to the N s) and address electrodes X1 to Xm formed on a rear panel (not shown). The data driver 1201 for supplying data to the scan driver 1201 and a setup control signal CTRYsu for alternately repeating the plurality of first turn-on signals and the first turn-off signals are applied to the scan driver 1202 to incline the slope of the setup pulse. The set-up control unit 121 to adjust and the set-down control signal CTRYsd for alternately repeating the plurality of second turn-on signals and the second turn-off signals are applied to the scan driver 1202 to incline the set-down pulses. The set-down controller 122 for adjusting the group, the scan driver 1202 for driving the scan electrodes Y1 to Yn formed on the front panel (not shown), and the sustain electrode Z formed on the front panel (not shown). A sustain driver 1203 for driving, a timing controller 1204 for controlling each of the drivers 1201, 1202, and 1203, and a driving voltage generator 1205 for supplying a driving voltage to each of the drivers 1201, 1202, and 1203. It includes.

Hereinafter, functions and operations of the components of the plasma display device according to the third embodiment of the present invention will be described in detail.

First, although not shown, the plasma display panel 1200 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals with a discharge space including an inert gas therebetween. For example, the scan electrodes Y1 to Yn and the sustain electrode Z are formed in pairs, and on the rear panel, the address electrodes X1 to Y cross the scan electrodes Y1 to Yn and the sustain electrode Z. Xm) is formed.

The data driver 1201 performs inverse gamma correction and error diffusion by an inverse gamma correction circuit, an error diffusion circuit, and the like not shown, and then data mapped according to a subfield pattern preset by the subfield mapping circuit is supplied. The data driver 1201 samples and latches data under the control of the timing controller 1204 and then supplies the data to the address electrodes X1 to Xm.

The setup controller 121 applies a setup control signal CTRYsu that alternately repeats the plurality of first turn-on signals and the first turn-off signal to the scan driver 1202 to adjust the slope of the setup pulse during the setup period.

The setdown controller 122 applies the setdown control signal CTRYsd which alternately repeats the plurality of second turn-on signals and the second turn-off signal to the scan driver 1202 to adjust the slope of the setdown pulse during the setup period.

The scan driver 122 alternately repeats a plurality of first turn-on signals and first turn-off signals to the scan electrodes Y1 to Yn during the setup period under the control of the timing controller 1204 and the setup controller 121. According to the setup control signal CTRYsu, a plurality of rising intervals to which rising waveforms of the same slope are applied and a plurality of voltage level holding intervals to which voltage level holding waveforms to maintain voltage levels at the end of each rising period are alternately applied. Apply the rising set pulse repeatedly.

In addition, a setdown control signal for alternately repeating a plurality of second turn-on signals and second turn-off signals to the scan electrodes Y1 to Yn under the control of the timing controller 1204 and the setdown controller 122 during the subsequent setdown period ( According to CTRYsd), a plurality of falling sections to which a falling waveform of the same slope is applied and a plurality of voltage level holding sections to which voltage level holding waveforms to maintain voltage levels at the end of each falling section are alternately repeated Apply a set down pulse.

In addition, the scan driver 1202 may apply the scan waveforms Y1 to Yn to select a scan line during the address period after a reset waveform including a setup pulse and a set down pulse is supplied to the scan electrodes Y1 to Yn. A scan pulse that falls from the scan reference voltage Vsc and the scan reference voltage Vsc to the negative scan voltage -Vy is applied.

In addition, the scan driver 1202 supplies a sustain pulse to the scan electrodes Y1 to Yn to allow sustain discharge to occur in the selected cell in the address period during the sustain period.

The sustain driver 1203 supplies a bias voltage having a sustain voltage Vs level to the sustain electrode Z during the setdown period and the address period under the control of the timing controller 1204, and then the scan driver 62 and the scan driver 62 during the sustain period. Alternatingly, a sustain pulse is supplied to the sustain electrode (Z).

The timing controller 1204 receives a vertical / horizontal synchronization signal and generates timing control signals CTRX, CTRY, and CTRZ required for each driving unit, and outputs the timing control signals CTRX, CTRY, and CTRZ to the corresponding driving units 1201, 1202, Each driving unit 1201, 1202, 1203 is controlled by supplying the same to the 1203. The timing control signal CTRX applied to the data driver 1201 includes a sampling clock for sampling data, a latch control signal, an energy recovery circuit, and a switch control signal for controlling on / off time of the driving switch element. The timing control signal CTRY applied to the scan driver 1202 includes a switch control signal for controlling on / off time of the energy recovery circuit in the scan driver 1202 and the driving switch element. The timing control signal CTRZ applied to the sustain driver 1203 includes a switch control signal for controlling the on / off time of the energy recovery circuit and the drive switch element in the sustain driver 1203.

The driving voltage generation unit 1205 includes each driving unit 1201 and 1202 including a sustain voltage Vs, a setup ramp voltage Vst, a scan reference voltage Vsc, a data voltage Va, and a scan voltage (-Vy). A variety of driving voltages required at 1203 are generated. These driving voltages may vary depending on the composition of the discharge gas or the structure of the discharge cell.

Hereinafter, the operation principle of the plasma display device according to the third embodiment of the present invention will be described in detail with reference to FIGS. 13 to 14B.

13 is a view illustrating a driving waveform of the plasma display device according to the third embodiment of the present invention.

As shown in FIG. 13, the plasma display device according to the third embodiment of the present invention implements an image in a frame unit composed of a combination of a plurality of subfields, and one subfield SF initializes all cells. The driving period is divided into a reset period RP for performing the operation, an address period AP for selecting the cell to be discharged, and a sustain period SP for maintaining the discharge of the selected cell.

Hereinafter, the voltage applied to each period and its function will be described in detail.

First, in the reset period RP, in the setup period SU, the same slope according to the setup control signal which alternately repeats the plurality of first turn-on signals and the first turn-off signals to all the scan electrodes Y1 to Yn. A plurality of rising sections to which a rising waveform of is applied and a set-up pulse that alternately repeatedly rises are repeatedly applied to a plurality of voltage level holding sections to which a voltage level holding waveform is applied to maintain a voltage level at the end of each rising section. The sustain electrode Z and the address electrodes X1 to Xm maintain ground.

This setup pulse causes weak dark discharge in the discharge cells of the entire screen. Due to this setup discharge, positive wall charges are accumulated on the address electrodes X1 to Xm and the sustain electrode Z, and negative wall charges are accumulated on the scan electrodes Y1 to Yn.

Meanwhile, as a specific means for implementing such a setup pulse, a setup ramp voltage source Vst for supplying a setup ramp voltage to the scan electrode Y during the setup period and a setup ramp voltage source Vst as shown in (d) of FIG. 14A. ) Is connected between the scan electrode (Y) and the scan electrode (Y) and switched in accordance with the setup control signal (CTRYsu), and the setup capacitor (Cu) connected between the scan electrode (Y) and the gate terminal of the setup FET (Qu). ) And a scan driver including a setup variable resistor (Ru) commonly connected to the setup capacitor (Cu) and a gate terminal of the setup FET (Qu), and the setup FET (Qu) is turned on according to the setup control signal (CTRYsu). Adjust the slope of the setup pulse by turning it off.

That is, by applying the setup control pulse (CTRYsu) to repeat the on and off, as shown in (b) of FIG. 14A to the gate terminal of the setup FET (Qu), without the addition of additional circuit elements (a) of FIG. Adjust the slope of the setup pulse as shown in. That is, the set-up pulse is raised while alternately repeating the plurality of rising sections and the plurality of voltage level holding sections, thereby adjusting the slope of the whole set-up pulse.

Preferably, the duration of each first turn-on signal and each first turn-off signal is the same. By adjusting the duration of each turn-on signal and each turn-off signal in this way, the switching operation of the circuit for implementing the setup pulse is simplified while ensuring stable setup discharge.

Preferably, the duration of at least one of each first turn-on signal is different from the duration of the remaining first turn-on signal. As such, by adjusting the duration of at least one of each of the first turn-on signals differently from the duration of the remaining first turn-on signals, the waveform of the setup pulse is adjusted according to the driving environment, thereby ensuring stable setup discharge.

Preferably, the duration of the first first turn-on signal is the longest. That is, as shown in (a) of FIG. 14, the plurality of rising periods of the setup pulse are adjusted by controlling the longest duration of the first first turn-on signal among the setup control signals CTRYsu as shown in (b) of FIG. 14B. The duration of the first rising section is adjusted to be the longest, thereby strengthening the setup discharge in the first half of the setup period SU, thereby reducing the overall setup time, thereby securing a driving margin of the plasma display device.

Preferably, the duration of at least one of the first turn-on signals is adjusted differently for each subfield. As described above, by adjusting the duration of at least one of the first turn-on signals differently for each subfield, more efficient setup discharge is ensured according to the driving environment.

Preferably, the duration of at least one of the first turnoff signals is different from the duration of the remaining first turnoff signals. In this way, by adjusting the duration of at least one of the first turn-off signal different from the duration of the remaining first turn-off signal to adjust the duration of the voltage level holding period according to the first turn-off signal, to ensure efficient setup discharge do.

Preferably, the duration of at least one of the first turnoff signals is adjusted differently for each subfield. In this way, the duration of at least one of the first turn-off signals is adjusted differently for each subfield, so that the duration of the voltage level maintenance interval according to the first turn-off signal is differently for each subfield, thereby making setup discharge more efficient according to the driving environment. To secure.

During the subsequent set-down period (SD) According to the set-down control signal which alternately repeats the plurality of second turn-on signals and the second turn-off signals to all the scan electrodes Y1 to Yn, a plurality of falling sections and respective falling sections are provided with falling waveforms having the same slope. A set-down pulse that alternately repeatedly descends a plurality of voltage level holding sections to which a voltage level holding waveform is applied to maintain the voltage level at the end is simultaneously applied, while a positive sustain voltage Vs is applied to the sustain electrode Z. When a bias voltage having a) level is applied, the positive wall charges of the address electrodes X1 to Xm are kept as they are, but are discharged between the sustain electrode Z and the scan electrodes Y1 to Yn. The sustain electrode Z and the address electrodes X1 to Xm divide a large amount of negative charges accumulated on the scan electrodes Y1 to Yn while erasing a positive amount of the positive wall charges. Have.

By this set down discharge, the wall charges such that the address discharge can stably occur remain uniformly in the cells.

Meanwhile, as a specific means for implementing such a setdown pulse, a setdown lamp voltage source (-Vy) for supplying a setdown lamp voltage to the scan electrode (Y) during the setdown period as shown in (e) of FIG. 14A, and a setdown lamp voltage source ( A set-down capacitor connected between the scan electrode Y and the gate terminal of the set-down FET Qd, which is connected between Vy and the scan electrode Y and switched according to the set-down control signal CTRYsd. And a scan driver including (Cd) and a setdown variable resistor (Rd) commonly connected to the setdown capacitor (Cd) and the gate terminal of the setdown FET (Qd), and the setdown FET (Qd) is connected to the setdown control signal (CTRYsd). The slope of the setdown pulse is adjusted by turning on and off accordingly.

That is, by applying the set-down control pulses CTRYsd which repeat on and off to the gate terminal of the set-down FET Qd as shown in (c) of FIG. 14A, the circuit of FIG. Adjust the slope of the setdown pulse as shown in That is, the setdown pulse alternately repeats the plurality of falling sections and the plurality of voltage level maintaining sections, and as a result, adjusts the slope of the entire setdown pulse.

Preferably, the duration of each second turn-on signal and each second turn-off signal is the same. By adjusting the duration of each of the second turn-on signal and the second turn-off signal in this way, the switching operation of the circuit for implementing the set-down pulse is simplified while ensuring stable set-down discharge.

Preferably, the duration of at least one of each second turn-on signal is different from the duration of the remaining second turn-on signal. As such, by adjusting the duration of at least one of the second turn-on signals differently from the duration of the remaining second turn-on signals, the waveform of the set-down pulse is adjusted according to the driving environment, thereby ensuring stable set-down discharge.

Preferably, the duration of the first second turn-on signal of the second turn-on signal is the longest. That is, as illustrated in (a) of FIG. 14B, the plurality of falling sections of the setdown pulse are adjusted by controlling the longest duration of the first second turn-on signal among the setdown control signals CTRYsd as shown in FIG. 14B. The duration of the first falling section is adjusted to be the longest, thereby strengthening the setdown discharge in the first half of the setdown period SD and thereby reducing the overall setdown time to secure the driving margin of the plasma display device.

Preferably, the duration of at least one of the second turn-on signals is adjusted differently for each subfield. As described above, the duration of at least one of the second turn-on signals is adjusted differently for each subfield, thereby ensuring more efficient setdown discharge according to the driving environment.

Preferably, the duration of at least one of the second turnoff signals is different from the duration of the remaining second turnoff signals. As such, the duration of at least one of the second turn-off signals is adjusted differently from the duration of the remaining second turn-off signals to adjust the duration of the voltage level maintenance period according to the second turn-off signal, thereby ensuring efficient set-down discharge. do.

Preferably, the duration of at least one of the second turnoff signals is adjusted differently for each subfield. As such, the duration of at least one of the second turn-off signals is adjusted differently for each subfield, so that the duration of the voltage level maintenance interval according to the second turn-off signal is differently for each subfield, so that the set-down discharge is more efficient according to the driving environment. To secure.

Next, in the address period AP, the data pulse DP rising from the ground GND to the positive data voltage Va at the address electrodes X1 to Xm, and the scan reference voltages at the scan electrodes Y1 to Yn. When the scan pulse SCNP falling to the negative scan voltage (-Vy) at Vsc is applied in synchronization, the voltage difference between the address electrodes X1 to Xm and the scan electrodes Y1 to Yn, and the reset period RP ), An address discharge is generated as the wall voltage between the address electrodes X1 to Xm and the scan electrodes Y1 to Yn due to the wall charges formed during the above step is added.

On the other hand, the sustain electrode Z has a positive sustain voltage Vs level so as to reduce the voltage difference between the scan electrodes Y1 to Yn during the address period AP so that no misdischarge occurs with the scan electrodes Y1 to Yn. The bias voltage is supplied.

Next, in the sustain period SP, a sustain pulse SUSP that rises from the ground GND to the sustain voltage Vs is applied to the scan electrodes Y1 to Yn and the sustain electrode Z alternately. The cell selected by the address discharge has a sustain discharge, i.e., between the scan electrodes Y1 to Yn and the sustain electrode Z every time the sustain pulse SSUS is applied as the wall voltage and the sustain pulse SSUS in the cell are added. Display discharge occurs.

In this way, the driving process of the plasma display device according to the third exemplary embodiment of the present invention in one subfield is completed.

As described above in detail, the plasma display device according to the third embodiment of the present invention improves the waveform of the setup pulse to more precisely adjust the wall charge distribution in the discharge cell during the setup period, thereby ensuring stable driving and The image display quality of the display device is improved.

Since the method of driving the plasma display device according to the first to third embodiments of the present invention is driven under the same principle as the plasma display device according to the first to third embodiments of the present invention described above, the detailed description will be made as follows. The description of the plasma display device according to the first to third embodiments will be replaced.

As such, the technical configuration of the present invention described above can be understood by those skilled in the art that the present invention can be implemented in other specific forms without changing the technical spirit or essential features of the present invention.

Therefore, the exemplary embodiments described above are to be understood as illustrative and not restrictive in all respects, and the scope of the present invention is indicated by the following claims rather than the foregoing detailed description, and the meaning and scope of the claims are as follows. And all changes or modifications derived from the equivalent concept should be construed as being included in the scope of the present invention.

As described in detail above, the present invention provides a plasma display device and a driving method thereof, which improve the image display quality by ensuring stable driving by improving the reset waveform to more precisely adjust the wall charge distribution in the discharge cells during the reset period. To provide.

Claims (28)

A plasma display panel including a scan electrode; A scan driver driving the scan electrode; And And a setup controller configured to apply a setup control signal for alternately repeating a plurality of turn-on and turn-off signals to the scan driver to adjust the slope of the setup pulse. And a duration of at least one of the turn-on signals is different from a duration of the remaining turn-on signals. delete delete The method of claim 1, And the longest duration of the first turn-on signal of the turn-on signals. The method according to claim 1 or 4, And controlling a duration of at least one of the turn-on signals for each subfield. The method of claim 1, And a duration of at least one of the turnoff signals is different from a duration of the remaining turnoff signals. The method of claim 6, And controlling a duration of at least one of the turn-off signals differently for each subfield. A plasma display panel including a scan electrode; A scan driver driving the scan electrode; And And a set-down control unit configured to apply a set-down control signal that alternately repeats a plurality of turn-on and turn-off signals to the scan driver to adjust the slope of the set-down pulse. And a duration of at least one of the turn-on signals is different from a duration of the remaining turn-on signals. delete delete The method of claim 8, And the longest duration of the first turn-on signal of the turn-on signals. The method according to claim 8 or 11, wherein And controlling a duration of at least one of the turn-on signals for each subfield. The method of claim 8, And a duration of at least one of the turnoff signals is different from a duration of the remaining turnoff signals. The method of claim 13, And controlling a duration of at least one of the turn-off signals differently for each subfield. A plasma display panel including a scan electrode; A scan driver driving the scan electrode; A setup controller configured to apply a setup control signal for alternately repeating a plurality of first turn-on signals and first turn-off signals to the scan driver to adjust the slope of the setup pulse; And And a set-down control unit configured to apply a set-down control signal for alternately repeating a plurality of second turn-on signals and second turn-off signals to the scan driver to adjust the slope of the set-down pulse. And a duration of at least one of the first turn on signals is different from a duration of the remaining first turn on signals. delete delete The method of claim 15, And the longest duration of the first first turn-on signal among the first turn-on signals. The method of claim 15, And a duration of at least one of the first turnoff signals is different from a duration of the remaining first turnoff signals. The method of claim 19, And controlling a duration of at least one of the first turn-off signals differently for each subfield. The method according to any one of claims 15 or 18 to 20, And a duration of each of the second turn-on signals and the second turn-off signal is the same. The method according to any one of claims 15 or 18 to 20, And a duration of at least one of the second turn-on signals is different from a duration of the remaining second turn-on signals. The method of claim 22, And the longest duration of the first second turn-on signal among the second turn-on signals. The method of claim 22, And a duration of at least one of the second turnoff signals is different from a duration of the remaining second turnoff signals. The method of claim 24, And controlling a duration of at least one of the second turn-off signals differently for each subfield. A driving method of a plasma display device, wherein a plurality of subfields are divided into a reset period, an address period, and a sustain period, respectively, and display an image in units of frames in which the subfields are combined. Adjusting a slope of a setup pulse by applying a setup control signal to alternately repeat the plurality of turn-on and turn-off signals, And a duration of at least one of the plurality of turn-on signals is different from that of the remaining turn-on signals. A driving method of a plasma display device, wherein a plurality of subfields are divided into a reset period, an address period, and a sustain period, respectively, and display an image in units of frames in which the subfields are combined. Adjusting a slope of the setdown pulse by applying a setdown control signal that alternately repeats the plurality of turn-on and turn-off signals, And a duration of at least one of the plurality of turn-on signals is different from that of the remaining turn-on signals. A driving method of a plasma display device, wherein a plurality of subfields are divided into a reset period, an address period, and a sustain period, respectively, and display an image in units of frames in which the subfields are combined. Adjusting a slope of a setup pulse by applying a setup control signal to alternately repeat the plurality of first turn-on signals and the first turn-off signal; And Adjusting a slope of the setdown pulse by applying a setdown control signal that alternately repeats the plurality of second turn-on signals and the second turn-off signal; The duration of at least one of the plurality of first turn-on signals is different from the duration of the remaining first turn-on signals, and the duration of at least one of the plurality of second turn-on signals is different from the duration of the remaining second turn-on signals. A method of driving a plasma display device.

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