KR100857455B1 - Method of manufacturing thin film transistor by patterning by forming protective film on oxide semiconductor film - Google Patents

Abstract

In the present invention, in order to protect the surface of the semiconductor film from photoresistor (PR), photoresist stripper (PR stripper), etc. in the patterning process of the oxide semiconductor film, after forming a semiconductor film using a layer deposition method using a protective layer (protection layer) After forming a protective insulating film as a pattern, a semiconductor film and a protective insulating film are patterned using the same mask, The manufacturing method of the thin film transistor characterized by the above-mentioned.

A method of manufacturing a thin film transistor according to an embodiment of the present invention includes forming a source and a drain electrode on a substrate; Depositing an oxide semiconductor film on an entire surface of the substrate on which the source and drain electrodes are formed; Depositing a protective insulating film protecting the oxide semiconductor film on the oxide semiconductor film using an atomic layer deposition method; Simultaneously patterning the semiconductor film and the protective insulating film; Forming a gate insulating film on the patterned protective insulating film; Forming a gate electrode on the gate insulating film. Accordingly, it is possible to reduce the off-current of the transistor, improve mobility, and reduce the sub-threshold swing value. In addition, when the protective insulating film as the protective film is used for the lower gate electrode structure, it can play a role of protecting the device from the environment, thereby improving the reliability of the device.

Description

Method of Fabricating Thin Film Transistor including ALD Deposited Protection Layer On The Oxide Semiconductor

FIG. 1A is a schematic side cross-sectional view of an upper gate thin film transistor manufactured according to the present invention, and FIG. 1B is a manufacturing block diagram illustrating a manufacturing process of the upper gate thin film transistor of FIG. 1A.

FIG. 2A is a schematic side cross-sectional view of a thin film transistor having a lower gate structure manufactured according to the present invention, and FIG. 2B is a manufacturing block diagram illustrating a manufacturing process of the thin film transistor having a lower gate structure of FIG. 2A.

3A is a graph showing electrical characteristics of a thin film transistor without a protective insulating film as a protective film, and FIG. 3B is a graph showing electrical characteristics of a thin film transistor including a protective insulating film according to the present invention.

** Description of symbols for the main parts of the drawing **

1: substrate 2: source and drain electrodes

3: semiconductor film 4: protective insulating film

5: gate insulating film 6: gate electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor including a semiconductor film and a gate insulating film, and a method of manufacturing the same, and more particularly, a photoresistor (PR) and a photoresist stripper (PR stripper) are formed on a surface of a semiconductor film during patterning of an oxide semiconductor film. After the semiconductor film is formed to protect it, the protective insulating film is formed on the semiconductor film with a protection layer of 30 to 1000 GPa or less, and the semiconductor film and the protective insulating film are patterned using the same mask. A method for manufacturing a thin film transistor. In the present invention, the formation of a protective insulating film serving as a protective film is applicable to both the lower gate transistor structure and the upper gate transistor. The protective insulating film may be deposited continuously with a semiconductor film or after exposure to air, which is not a continuous process. You may also

Recently, there is an increasing demand for the development of electronic devices that can be used regardless of time and place, and in particular, the development of thin film transistors using a semiconductor film having excellent transparency has attracted attention.

Among the transparent transistors disclosed so far, the most excellent mobility characteristic is InGaO ₃ (ZnO) ₅ published in Science, vol. 300, p. 1269, 2003 by Hosono Group of Japan. It is a transistor using a semiconductor. Wager et al. Applied transistors using ZnO as a semiconductor. Phys. Lett, vol. 82, p.733, 2003, and M. Kawasaki et al., Japan, disclosed in US Pat. No. 65,63,174 B2 a transparent transistor technology comprising a semiconductor such as ZnO, MgZnO, CadZnO, and an inorganic double insulating film structure. Started.

The manufacturing process of the transparent transistors disclosed so far is mostly for the production of unit devices, and most of them are patterned using a lift-off or a shadow mask. However, the transistor manufacturing process as described above is not applicable to the actual mass production technology. In general, when manufacturing an array, processes such as wet / dry-etching and photolithography are used. When manufacturing a transistor array using a process such as wet / dry-etching and photolithography, a transistor array is manufactured using a lift-off or a shadow mask. In the case, it is difficult to obtain the same characteristics as those that can be achieved.

Accordingly, a technology that can be applied to actual mass production has been developed, and as a transistor developed by a technology that can be applied to mass production, the inventors of the present invention used a wet etching process using ZnO formed by atomic layer deposition as a semiconductor film. Patterned transistor array ”was developed and released in 2005 (IDW proceeding), and other oxide semiconductors formed by sputtering by Kochi University (2006, SID proceeding) and LG Electronics (2006, IDW proceeding) in Japan. A transistor array comprising layers has been developed and announced.

In general, since most device characteristics are determined by the interfacial properties of the insulating film and the semiconductor film, it is most important to secure excellent interfacial properties. In particular, in the production of an oxide transistor containing ZnO as a semiconductor film, hydrogen or the like doped by adsorption of water in the air or a subsequent process acts as a low energy level donor in the ZnO film, thereby forming a carrier in the semiconductor film. As the amount increases, it causes an increase in the off-current of the transistor. In particular, in the case of the oxide semiconductor film, when the surface of the oxide semiconductor film is exposed to a photoresist or a photoresist stripper or the like in the patterning process, the surface characteristics deteriorate seriously and the characteristics of the transistor deteriorate much.

In 2006, Kochi University of Japan presented the transistor array including ZnO semiconductor film as a method of protecting the interface between the semiconductor film and the insulating film by the process of continuously depositing the semiconductor film and the insulating film. They deposit 50 nm of ZnO on the substrate on which the source and drain are formed by sputtering, and form SiN 50 nm using PECVD in a continuous process under vacuum, and then pattern the SiN first by dry etching. Subsequently, ZnO was patterned by wet etching using SiN as a hard mask. Subsequently, SiN was deposited by PECVD with a second insulating film to secure insulation properties, and then a gate electrode was formed to secure a transistor array. However, in the aforementioned process, doping of hydrogen cannot be avoided due to the hydrogen plasma used in the SiN process, which seriously causes deterioration of the ZnO thin film transistor.

Accordingly, the present invention solves all the above-mentioned problems, and is an invention devised to be applicable not only to the upper gate structure but also to the thin film transistor of the lower gate structure, and an object of the present invention is to provide a ZnO semiconductor film or another oxide semiconductor film. The present invention provides a method of manufacturing a thin film transistor which prevents a photoresist or a photoresist stripper from directly contacting a surface on a semiconductor film by forming a protective insulating film that serves to protect the semiconductor film on the semiconductor film when manufacturing the thin film transistor.

Another object of the present invention is to provide a method for manufacturing a thin film transistor having stable and excellent characteristics by maximally suppressing doping of an element that can act as a donor in a semiconductor film when forming an oxide thin film transistor.

Another object of the present invention is to form a protective insulating film having a thickness capable of physically protecting a semiconductor film by atomic layer deposition, thereby preventing damage to the oxide semiconductor film due to etching or other subsequent processes. It is to provide a manufacturing method.

According to an aspect of the present invention for achieving the above object, the manufacturing method of the thin film transistor is formed by patterning the source and drain electrodes on the substrate; Depositing an oxide semiconductor film on the entire surface of the substrate on which the source and drain electrodes are formed, and depositing a protective insulating film on the oxide semiconductor film by using an atomic layer deposition method using an atomic layer deposition method; Simultaneously patterning the semiconductor film and the protective insulating film using the same mask; Forming a gate insulating film on the patterned protective insulating film; Forming a gate electrode on the gate insulating film.

According to another aspect of the invention, forming a gate electrode on a substrate; Forming a gate insulating film on the substrate on which the gate electrode is formed; Forming a source and a drain electrode on the gate insulating film, and forming an oxide semiconductor film on the substrate on which the source and drain electrodes are formed; Depositing a protective insulating film protecting the oxide semiconductor film on the oxide semiconductor film by atomic layer deposition (or organic pyrolysis polymerizing deposition); Patterning the semiconductor film and the protective insulating film at the same time. In the above-described manufacturing method, the process of exposing a part of the electrode may be performed at once or after the gate insulating film is formed, which may vary slightly depending on the array structure and process.

In some cases, the method of manufacturing the thin film transistor may further include forming the semiconductor film and then treating the surface of the semiconductor film using oxygen plasma. In the depositing of the semiconductor film, one of atomic layer deposition, sputtering, spin coating, MOCVD, or printing is used. The semiconductor film is an amorphous oxide semiconductor film (IGZO) or a polycrystalline oxide semiconductor film (ZnO, ZnSnO, MgZnO, ZnSnO ₃ , ZnSnO _{4 ,} SnO ₂ , ZnInO or CdZnO).

The forming of the protective insulating film may include depositing a part of the entire thickness of the protective insulating film by the atomic layer deposition method, treating the surface of the deposited protective insulating film by oxygen plasma or oxygen / nitrogen plasma; Depositing the remainder of the thickness of the protective insulating film on the surface treated protective insulating film. The protective insulating film is selectively deposited in a thickness range of 30 to 1000 micrometers, and a part of the protective insulating film thickness is 5 to 20 micrometers. The protective insulating layer uses at least one of AlOx, HfOx AlON, TiO2, TaOx, SiON, ZrO2, SiOx, Y ₂ O ₃ .

The atomic layer deposition method is one of a traveling wave reactor type deposition method, a remote plasma atomic layer deposition method, or a direct plasma atomic layer deposition method. In the patterning of the semiconductor film and the protective insulating film, the semiconductor film and the protective insulating film are simultaneously patterned using a dry etching process or a wet etching process.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention in detail.

FIG. 1A is a schematic side cross-sectional view of a top gate TFT manufactured according to the present invention, and FIG. 1B is a manufacturing block diagram illustrating a manufacturing process of the top gate TFT of FIG. 1A.

Referring to FIG. 1A, the thin film transistor includes a source electrode and a drain electrode 2 formed on the substrate 1, a semiconductor film 3 formed on the source electrode and the drain electrode 2, and a semiconductor film 3. A top gate structure including a protective insulating film 4 formed on the gate insulating film, a gate insulating film 5 formed on the protective insulating film 4, and a gate electrode 6 formed on the gate insulating film 5. Thin film transistor. The protective insulating film 4 serves to protect the semiconductor film 3.

Hereinafter, referring to FIG. 1B, each component and a manufacturing method of the upper gate thin film transistor having the above structure will be described in more detail.

In order to manufacture the upper gate thin film transistor according to the present invention, first, the substrate 1 is prepared (S1). The substrate 1 may be formed of various materials such as glass, plastic, and metal foil.

After preparing the substrate 1, the source electrode and the drain electrode 2 are formed on the substrate 1 (S2). In order to form the source and drain electrodes 2, first, a metal thin film (not shown) for the source and drain electrodes is deposited. As the metal thin film for the source and drain electrodes, a single layer or multiple layers may be formed using at least one of metals such as Al, Cr, Au, Ti, and Ag and transparent oxides such as ITO, IZO, ITZO, ZnO: Al, and ZnO: Ga. It may be formed as a layer or as a double layer in which the metal and the transparent oxide are respectively deposited. At this time, it is preferable that a part having a work function similar to that of the semiconductor film 3 be used as a part which contacts the semiconductor film 3 to be formed in a later step. After the metal thin film is deposited on the substrate 1, the source and drain electrodes 2 having a desired shape are formed by using a photolithography method and an etching process.

After the source and drain electrodes 2 are formed, an oxide semiconductor film 3 is deposited on the substrate 1 on which the source and drain electrodes 2 are formed (S3). The oxide semiconductor film 3 is deposited using one of atomic layer deposition, sputtering, spin coating, MOCVD, or printing, and the semiconductor film 3 is polycrystalline including amorphous oxide or ZnO, such as IGZO, or the like. Oxides (eg, ZnO, ZnSnO, MgZnO, ZnSnO ₃ , ZnSnO _{4 ,} SnO ₂ , ZnInO or CdZnO) are used. The semiconductor film 3 is deposited to a thickness of 30 to 1000 Å, and when the thickness of the semiconductor film 3 exceeds 1000 Å, the characteristics of the thin film transistor may be degraded due to an increase in the electrical resistance of the semiconductor film 3 itself. It is preferable to deposit within the said range as much as possible.

After the semiconductor film 3 is deposited, the protective insulating film 4 is formed by atomic layer deposition (S4). The protective insulating film 4 can be formed in a continuous process while maintaining a vacuum, and can be formed after exposure to air. The protective insulating film 4 serves to protect the semiconductor film 3, and may include at least one of alumina, AlON, TiO ₂ , AlO _x , TaO _x , HfO _x , SiON, SiO _x , ZrO _x Y ₂ O ₃ . Deposition using one. Moreover, parylene or polyacrylate can be used as an organic substance. The protective insulating film 4 is preferably deposited at a thickness of 30 to 1000 micrometers, which is a minimum thickness capable of physically protecting each deposited layer. When the thickness of the protective insulating film 4 exceeds 1000 kV, the Vth (threshold voltage) shift of the thin film transistor is increased during deposition. In addition, when the protective insulating film 4 exceeds 1000 microseconds, patterning of the semiconductor film 3 and the protective insulating film 4 which will be advanced to a later process is not easy. Therefore, it is most preferable to form the protective insulating film 4 to 50-150 micrometers in thickness.

Atomic layer deposition (ALD) used in the present invention is generally chemically adsorbed molecules on the surface by chemical bonding with the surface of the substrate, and then replaced the adsorbed precursor with the next precursor through surface chemical reaction. As a result of the adsorption and substitution alternately (repetitive cycle) through reactions such as combustion, protonation, etc., it is possible to deposit ultra thin layer-by-layer and to deposit oxides as thinly as possible. Way. Atomic layer deposition is classified into a traveling wave reactor type, plasma enhanced atomic layer deposition, and the like. In addition, in the case of the plasma enhanced atomic layer deposition method, the plasma generator may be classified into a remote plasma atomic layer deposition method (direct plasma atomic layer deposition) and a direct plasma atomic layer deposition method (direct plasma atomic layer deposition). . The atomic layer deposition method for depositing the protective insulating film 4 is not limited to a specific atomic layer deposition method, and various atomic layer deposition methods can be used. In this embodiment, both the case of using plasma enhanced atomic layer deposition (PEALD) and the case of using a traveling wave type may be used. PEALD is a method of applying a plasma to the existing ALD to lower the process temperature and increase the reactivity between the precursor and the reaction gas to obtain a thin film as thin as possible, it is possible to obtain a thin film of uniform thickness even in a large area. As the oxygen precursor, water, oxygen, oxygen plasma, ozone, alcohol, or the like can be used.

On the other hand, the method of manufacturing the thin film transistor further includes an oxygen plasma treatment (not shown) of the oxide semiconductor film 3 to remove defects in the semiconductor film 3 before the protective insulating film 4 is formed. can do. Specifically, when depositing the protective insulating film 4, a portion of the protective insulating film 4 is deposited, then the surface is subjected to an interfacial treatment, and then the rest of the protective insulating film 4 to be deposited is deposited. For example, the process using the atomic layer deposition method is performed 10 times or less to form the protective insulating film 4 at a thickness of 5 to 20 μs, and then exists at the interface with an oxygen plasma or an oxygen / nitrogen mixed plasma to improve the performance of the thin film transistor. After the oxygen is removed, the remaining thickness of the protective insulating film 4 is formed. When the protective insulating film 4 is formed by the above-described configuration and manufacturing method, it is possible to improve the covering power of the protective insulating film 4 and to form the semiconductor film 3 using polycrystalline oxide having a relatively poor surface roughness. Even in this case, defects at the interface can be minimized.

After the protective insulating film 4 is deposited, the semiconductor film 3 and the protective insulating film 4 are simultaneously patterned (S5). When patterning the semiconductor film 3 and the protective insulating film 4, either wet etching or dry etching can be used.

After the semiconductor film 3 and the protective insulating film 4 are patterned, the gate insulating film 5 is formed on the protective insulating film 4 (S6). The gate insulating film 5 is for reducing the leakage current of the protective insulating film 4 and increasing the breakdown voltage. Since the protective insulating film 4 which is densely deposited by the atomic layer deposition method prevents the migration of dopants or the like which deteriorates the characteristics of hydrogen or other semiconductor film 3 caused in the gate insulating film 5 process, The gate insulating film 5 is deposited by various deposition methods, such as PECVD, sputtering, atomic layer deposition, and spin coating, depending on the material. As the gate insulating film 5, an inorganic insulating film, an organic insulating film, a dual structure of an inorganic insulating film, an organic / inorganic hybrid insulating film, or the like can be used. In particular, in the case of using the organic insulating film, a spin coating method is mainly used. In the case of forming the insulating film with the organic / inorganic dual structure, the stress caused by the bending when forming the flexible thin film transistor array can be eliminated, and the plastic substrate can be used by lowering the process temperature of the insulating film.

In the next step, the gate insulating film 5 is patterned to form contact holes (not shown) for contacting the source and drain electrodes 2. After the contact hole is formed, a metal thin film for the gate electrode is formed to form the gate electrode 6 on the gate insulating film 5. After the metal thin film for the gate electrode is formed, the metal thin film is patterned into a gate electrode 6 having a desired shape by using a photolithography process and an etching process (S7). The gate electrode 6 may be formed of a transparent oxide such as ITO, IZO, ITZO, ZnO: Al, ZnO: Ga, or a metal having low resistance such as Ag, Au, Al, Al / Nd, Cr, Al / Cr / Al, or Ni. Use one layer or more than one double layer.

FIG. 2A is a schematic side cross-sectional view of a thin film transistor having a bottom gate structure manufactured according to the present invention, and FIG. 2B is a manufacturing block diagram illustrating a manufacturing process of the thin film transistor having a bottom gate structure of FIG. 2A.

2A and 2B, the lower gate thin film transistor includes a substrate 1, a gate electrode 6, a gate insulating film 5, a source and drain electrode 2, a semiconductor film 3, and a protective insulating film 4. It includes. 1A and 1B are thin film transistors having a lower gate structure having different positions of gate electrodes, and thus, each component plays the same role as those of FIGS. 1A and 1B for convenience of description. The same reference numerals are used for the elements, and specific features of each component refer to the description of FIGS. 1A and 1.

Hereinafter, a manufacturing method of manufacturing a lower gate thin film transistor will be described with reference to FIG. 2B. In order to manufacture the lower gate thin film transistor, first, the substrate 1 is prepared (S21). The gate electrode 6 is formed on the substrate 1 (S22). A gate insulating film 5 is formed on the gate electrode 6 (S23), and a source electrode and a drain electrode 2 are formed on the gate insulating film 5 (S24). The semiconductor film 3 is formed on the source and drain electrodes 2 (S25).

The protective insulating film 4 is formed on the semiconductor film 3 (S26). The protective insulating film 4 may be deposited in a continuous process or after exposure to air while maintaining a vacuum, and the protective insulating film 4 serves to protect the semiconductor film 3. The protective insulating film 4 is deposited using at least one of alumina, AlON, TiO ₂ , AlO _x , TaO _x , HfO _x , SiON, SiO _x , ZrO _{x, and} Y ₂ O ₃ . The protective insulating film 4 is preferably deposited at a thickness of 30 to 1000 micrometers, which is a minimum thickness capable of physically protecting each deposited layer. In addition, when the protective insulating film 4 exceeds 1000 microseconds, patterning of the semiconductor film 3 and the protective insulating film 4 which will be advanced to a later process is not easy. Therefore, it is most preferable to form the protective insulating film 4 to 50-150 micrometers in thickness. In addition, the protective insulating film 4 constituting the lower gate thin film transistor performs a passivation role to protect the device.

On the other hand, the method of manufacturing the thin film transistor further includes an oxygen plasma treatment (not shown) of the oxide semiconductor film 3 to remove defects in the semiconductor film 3 before the protective insulating film 4 is formed. can do. When depositing the protective insulating film 4, a portion of the protective insulating film 4 is deposited, then the surface thereof is subjected to an interfacial treatment, and then the rest of the protective insulating film 4 to be deposited is deposited.

After the protective insulating film 4 is deposited, the semiconductor film 3 and the protective insulating film 4 are simultaneously patterned using the same mask (S27). When patterning the semiconductor film 3 and the protective insulating film 4, either wet etching or dry etching can be used. Other subsequent processes of manufacturing the thin film transistor are omitted since they are similar to or the same as the general thin film transistor.

3A is a graph showing electrical characteristics of a thin film transistor when there is no protective insulating film, and FIG. 3B is a graph showing electrical characteristics of a thin film transistor including a protective insulating film manufactured according to the present invention. Specifically, FIGS. 3A and 3B are graphs showing electrical characteristics of an S / D current amount according to a gate electrode voltage of a thin film transistor having W / L = 40/10. As shown in FIGS. 3A and 3B, the horizontal axis represents the gate voltage VG and the vertical axis represents the drain current ID. The thin film transistor according to the present invention used in this experiment is a source and drain electrode (2) formed of ITO, a transparent conductor oxide, a ZnO semiconductor film (3) deposited by plasma enhanced atomic layer deposition at 150 ° C, and a continuous process. A protective insulating film 4 deposited with alumina having a thickness of 90 kW using the plasma enhanced atomic layer deposition method, a gate insulating film 5 deposited with a 1600 kW thickness with an atomic layer deposition method at 250 ° C., and a gate electrode 6 formed of Al. ).

In the graph, in the case of FIG. 3A without the protective insulating film, the mobility is 0.385 cm ² / Vs, and the SS value is 1.11 V / dec. 3b with a protective insulating film while the mobility is 8.9 cm ² / Vs and SS is 0.95 V / dec. It can be seen that the excellent properties. In this case, Al used as a constituent element of the protective insulating film 4 is an element capable of acting as a donor in the ZnO semiconductor thin film. However, it is held by a strong chemical bond on the surface of the ZnO thin film by atomic layer deposition. It can be seen that it stays on the pole surface and does not act as a donor. This technique also improves mobility and other electrical characteristics in the bottom gate thin film transistor.

Although the technical spirit of the present invention has been described in detail according to the above-described preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the spirit of the present invention.

According to the above-described configuration of the present invention, by forming an oxide semiconductor film and growing a protective insulating film deposited by atomic layer deposition as a protective film on the oxide semiconductor film, the interface between the oxide semiconductor film and the protective insulating film can be protected, As a result, the performance of the thin film transistor can be improved. In this case, the protective insulating layer may be continuously deposited using a continuous process, or may be deposited after exposure to air rather than a continuous process.

Therefore, before the oxide semiconductor film is directly patterned, a protective film is formed on the semiconductor thin film by using an atomic layer deposition method, which can serve as an insulating film, and then the semiconductor film and the protective film are etched using the semiconductor film patterning mask. In this case, the characteristics of the transistor device can be improved. This method can be applied not only to the top gate TFT but also to the bottom gate TFT in the same manner, thereby improving device characteristics and forming a passivation layer in the bottom gate structure.

In addition, by depositing the protective insulating film by the atomic layer deposition method, it is possible to prevent hydrogen and other elements that can degrade the semiconductor film from penetrating into the oxide semiconductor film. In addition, the atomic layer deposition method is one of the most dense deposition methods, so that even a very thin film thickness of several nanometers can sufficiently protect the oxide semiconductor film, thereby minimizing the Vth movement of the thin film transistor. Can be.

In addition, since the protective insulating film and the semiconductor film can be deposited to a thin thickness by using the atomic layer deposition method, it can be performed simultaneously by dry etching or wet etching when patterning them.

In addition, according to the present invention, by treating the interface with an oxygen plasma or an oxygen / nitrogen plasma, oxygen defects at the interface, which can be commonly generated in an oxide thin film transistor, can be minimized. In the case of forming the protective insulating film according to the present invention, even if a polycrystalline semiconductor film having a poor roughness is formed, the protective insulating film has excellent covering power, so that defects at the interface can be minimized.

Claims (11)

Forming source and drain electrodes on the substrate; Forming an oxide semiconductor film on the substrate on which the source and drain electrodes are formed; Depositing a protective insulating film protecting the oxide semiconductor film on the oxide semiconductor film using an atomic layer deposition method; Simultaneously patterning the semiconductor film and the protective insulating film; Forming a gate insulating film on the patterned protective insulating film; Forming a gate electrode on the gate insulating film Method of manufacturing a thin film transistor comprising a. Forming a gate electrode on the substrate; Forming a gate insulating film on the substrate on which the gate electrode is formed; Forming a source and a drain electrode on the gate insulating film, Forming an oxide semiconductor film on the substrate on which the source and drain electrodes are formed; Depositing a protective insulating film protecting the oxide semiconductor film on the oxide semiconductor film using an atomic layer deposition method; And patterning the semiconductor film and the protective insulating film at the same time. The method according to claim 1 or 2, Forming the semiconductor film and then treating the surface of the semiconductor film using oxygen plasma. The method of claim 3, The method of manufacturing a thin film transistor using one of atomic layer deposition, sputtering, spin coating, printing or MOCVD in the step of depositing the semiconductor film. The method according to claim 1 or 2, The protective insulating film is a method of manufacturing a thin film transistor using parylene or polyacrylate. The method according to claim 1 or 2, And the semiconductor film is an amorphous oxide semiconductor film or a polycrystalline oxide semiconductor film. The method according to claim 1 or 2, Forming the protective insulating film a) depositing a portion of the total thickness of the protective insulating layer by atomic layer deposition; b) treating the surface of the deposited protective insulating film with an oxygen plasma or an oxygen / nitrogen plasma; c) depositing the rest of the protective insulating film on the surface treated protective insulating film Method of manufacturing a thin film transistor comprising a. The method of claim 7, wherein The overall thickness of the protective insulating film is 30 ~ 1000Å, the thickness of the protective insulating film deposited in the step a) is 5 ~ 20Å of thin film transistor manufacturing method. The method according to claim 1 or 2, The protective insulating film is a method of manufacturing a thin film transistor using at least one of AlOx, HfOx AlON, TiO2, TaOx, SiON, ZrO2, SiOx, Y ₂ O ₃ . The method according to claim 1 or 2, The atomic layer deposition method is one of a traveling wave reactor type deposition method, a remote plasma atomic layer deposition method, or a direct plasma atomic layer deposition method. The method according to claim 1 or 2, And in the patterning of the semiconductor film and the protective insulating film, simultaneously patterning the semiconductor film and the protective insulating film using a dry etching process or a wet etching process.

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