KR100948248B1 - Clock synchronization detection device and synchronization method using the same - Google Patents

Abstract

The present invention relates to a clock synchronization detection device for a microwave repeater and a synchronization method using the same. More specifically, when the determination result using the synchronization state and the intensity value of the input signal, the voltage value of the steady state is applied. The present invention relates to a clock synchronization detection device for a microwave repeater capable of generating an output signal similar to a steady state and a synchronization method using the same.

Microwave, clock, sync, normal, abnormal

Description

Clock synchronous detection device and synchronization method using the same {Clock-Synchro Detector and Synchronizing method

The present invention relates to a clock synchronization detection device for a microwave repeater and a synchronization method using the same. More specifically, when the determination result using the synchronization state and the intensity value of the input signal, the voltage value of the steady state is applied. The present invention relates to a clock synchronization detection device for a microwave repeater capable of generating an output signal similar to a steady state and a synchronization method using the same.

In general, the microwave repeater includes a clock synchronization detecting device for synchronizing a system clock of a donor and a remote corresponding to a transmitter and a receiver of a repeater.

However, the conventional clock synchronous detection device has a problem that it is difficult to detect the clock synchronous and EVM (Error Vector Magnitude) compensation is not possible because the precise voltage control is impossible when the input signal is not input or the asynchronous state is abnormal.

In addition, the conventional voltage controlled oscillator needs to compensate the applied voltage according to the temperature because the frequency can be shifted from the clock frequency according to the temperature.

In order to solve the above problems, an object of the present invention is to apply a voltage value of a steady state in the case of an abnormal state as a result of determination using the synchronization state and the intensity value of the input signal when the input signal is not input or abnormal Accordingly, the present invention provides a clock synchronization detection device for a microwave repeater capable of generating an output signal similar to a steady state and a synchronization method using the same.

In order to achieve the above object, a clock synchronization detecting device according to the present invention comprises: a first analog-to-digital converter (first ADC) for detecting an intensity of an input signal; Synchronize an output clock which is a frequency signal fed back from a reference signal of the input signal and a frequency signal output from a voltage controlled oscillator, and a voltage applying signal for applying a voltage of the voltage controlled oscillator and a synchronization state signal according to the result of the synchronization operation. A frequency synchronizer for outputting; A loop filter converting the voltage application signal into a DC voltage value and outputting the converted voltage; A second analog-to-digital converter (second ADC) for measuring a voltage value output from the loop filter; A digital-to-analog converter (DAC) for outputting a voltage value measured by the second ADC; A switching unit for selectively outputting a voltage value of the loop filter or a digital-to-analog converter (DAC) to the voltage controlled oscillator; The voltage controlled oscillator for generating the frequency signal according to the voltage output from the switching unit; And a microprocessor for controlling the switch unit by determining whether it is in a normal state or an abnormal state according to the synchronization state signal.

The clock synchronization detecting device according to the present invention further comprises a temperature sensor for measuring a temperature for setting an initial value of the voltage controlled oscillator, and a lookup table for storing a voltage value determined according to the temperature value; The voltage value mapped to the temperature value measured by the temperature sensor may be extracted from the lookup table and output through the DAC.

The microprocessor; When the input signal is greater than the threshold value and the normal state receiving the lock state completion signal (Lock Detector) from the frequency synchronizer, the switching unit controls the switching unit so that the output of the loop filter is input to the voltage controlled oscillator, the input signal The control unit controls the switching unit so that the output of the DAC is input to the voltage controlled oscillator when the threshold value is equal to or less than a threshold value or an abnormal state in which a synchronization state incomplete signal is received.

The microprocessor; In the steady state, the voltage value of the loop filter is recorded through the ADC, and the voltage values are sequentially recorded in at least three heap buffers, and the maximum and minimum values of the voltage values recorded in the heap buffer are sequentially recorded. The average value of the remaining values except for the value is calculated and controlled to be output to the DAC.

The voltage controlled oscillator may be configured to include any one of VCTCXO and VCXO.

In another aspect, the present invention provides a method of determining a system including: (a) determining whether an input signal is greater than or equal to a threshold value; (b) the frequency synchronizer confirming a synchronization state; (c) outputting a voltage value of a loop filter to a voltage controlled oscillator when the synchronous state is normal; and (d) outputting a voltage value of the DAC to a voltage controlled oscillator when the synchronization state is abnormal.

When the voltage value of the voltage controlled oscillator is initialized, the clock synchronization detecting method includes: measuring a temperature from a temperature sensor; The method may further include extracting a predetermined voltage value according to the temperature stored in the lookup table from the measured temperature and outputting the preset voltage value to the DAC.

Step (b) is; If the input signal is above the threshold and the frequency synchronizer is in the normal state of the lock detector (lock detector), and outputs a synchronization completion signal (high) to the microprocessor, the input signal is below the threshold or incomplete synchronization (Unlock Detector) It is characterized in that the synchronization incomplete signal (low) is output to the microprocessor in the abnormal state.

Step (c) includes: (c1) the input signal being above a threshold and the microprocessor receiving a synchronization completion signal (high); (c2) switching the switching unit to input the output value of the loop filter to the voltage controlled oscillator; And (c3) recording the output value of the loop filter through an ADC and outputting it to a DAC.

The step (d) may include: receiving an incomplete synchronization signal (low) by the input signal below a threshold or by a microprocessor; Switching by the switching unit such that an output value of the DAC is input to a voltage controlled oscillator; And inputting the output value of the DAC of step (c3) to the voltage controlled oscillator.

In the step (c3), the voltage value of the loop filter is recorded through the ADC, and the voltage values are sequentially recorded in at least three heap buffers, and the maximum value of the voltage values recorded in the heap buffers is recorded. And calculating the average value of the remaining values except for the minimum value and output to the DAC.

As described through the problem solving means described above, the clock synchronization detecting device and the synchronization method using the same according to the present invention are operated in a stable manner by supplying a voltage of the steady state to the voltage controlled oscillator even when the synchronization is abnormal. Excellent effect occurs.

Hereinafter, specific embodiments of the present invention will be described in detail with reference to the drawings.

1 is an overall system configuration diagram of a microwave repeater according to a preferred embodiment of the present invention, Figure 2 is a detailed block diagram of the synchronous detection device of FIG.

1 and 2, the microwave repeater is composed of a transmitter and a receiver, the transmitter comprises a donor unit 10 and a donor microwave unit 20, the receiver is a remote microwave unit 30 ) And a remote unit 40.

More specifically, the donor unit 10 may include an oscillator (OCXO, Oven Cotroller Oscillator), a combiner, a clock generator (1029MHz Pilot Generator) and a mux.

Here, the voltage-controlled oscillator is an oven capable of controlling temperature, and a crystal-controlled oscillator is generally used to maintain a constant temperature around the crystal so that an error of the oscillation frequency does not occur. The highest frequency accuracy among them is commonly used in missiles, satellites, and precision measurement equipment. In general, it can be used normally only after the stable temperature is maintained after applying power. In the microwave repeater according to the present invention, it is used to generate a donor system clock (10 MHz), and typically an OCXO can be used.

In addition, the input signal generator outputs a pilot signal (continuous wave of 1029 MHz) to be used as an input signal of the synchronous detection apparatus according to the present invention, and the pilot signal is output from the oscillator. It is synchronized to the clock (10 MHz).

In addition, the combiner serves to combine the RF input signal for transmission from the donor to the remote and the pilot signal (1029 MHz) output from the input signal generator.

In addition, the mux combines the pilot signal and the system clock to transfer the donor microwave unit through a cable. Here, a band pass filter may be built in the mux to pass only a desired frequency.

In addition, the donor microwave unit 20 converts the IF frequency (997.52 ~ 1059.75MHz) signal into the microwave frequency (10.935 ~ 11.175GHz) to amplify the signal by the system gain (for example, 40dB) to amplify the signal It is responsible for transmitting to the remote microwave unit.

 The remote microwave unit 30 is responsible for converting the received microwave frequency signal into an IF frequency signal to amplify by a system gain (for example, 23 dB) to transmit the signal.

The remote unit 40 remotely generates a system clock synchronized with the donor system clock (10 MHz).

More specifically, referring to the synchronization detector 410 with reference to FIG. 2, only the pilot signal (1029MHz) that is an input signal is passed through the band pass filter 411 among the input signals, and out-of-band unnecessary waves are removed. A signal (257.25 MHz) divided in quarter through 412 is input to the reference clock of frequency synchronizer 413.

The frequency synchronizer 413 performs a synchronization operation using the voltage control to the voltage controlled oscillator 420 to synchronize the 10MHz input frequency for synchronization with the reference clock.

Here, the input signal is input to the microprocessor 415 by measuring the strength of the input signal through a first analog-to-digital converter (hereinafter referred to as a first ADC) 414. The strength of the input signal is used to determine the presence or absence of the input signal.

3 is a detailed block diagram of a frequency synchronizer 413 according to the present invention.

The frequency synchronizer 413 is a block for synchronizing the output clock fed back with the reference clock and loops a voltage pump signal for applying voltage to the voltage controlled oscillator 420 for synchronization. It outputs to the filter 416, and outputs a synchronization signal (Lock Detector or Unlock Detector) signal to the microprocessor 415 according to the result of the synchronization operation. Here, the microprocessor 415 is a block for controlling all blocks of the synchronous detection device to operate normally by an algorithm.

When the intensity of the input signal measured from the first ADC 414 is greater than or equal to a threshold value and the synchronization is completed from the frequency synchronizer and the lock completion signal is input, the microprocessor 415 determines that it is in a normal state and switches. Switching control unit 419 is connected to the loop filter 416 so that the output value of the loop filter is input to the voltage controlled oscillator 420.

Here, the second analog-to-digital converter (hereinafter referred to as second ADC) 417 records the output value of the loop filter and outputs it to the digital-to-analog converter (hereinafter referred to as DAC) 418. The loop filter 416 serves as a low pass filter to convert a charge pump signal of a frequency synchronizer into a DC voltage value.

On the other hand, if the intensity of the input signal is less than the threshold value or the synchronization is not completed because the synchronization incomplete signal (Unlock Dectector) is input, the microprocessor 415 determines that the abnormal state and switching control the switching unit 419 DAC 418 The output value of the DAC is input to the voltage controlled oscillator 420. Through this, the voltage controlled oscillator 420 generates an output signal similar to the steady state. Here, the voltage controlled oscillator 420 may be used as long as it can control the voltage, and may be a VC-TCXO (Voltage Controlled- Temperature Compensated crystal Oscillator) or a VCXO (Voltage Controlled crystal Oscillator).

In addition, the second ADC 417 and the DAC 418 may be configured to measure in about 4.8mV unit based on 5V using a 10-bit resolution in order to measure a more accurate voltage value.

When the initial value of the voltage controlled oscillator is initialized to set the initial value of the synchronous detection device, when the temperature change is large, the frequency is changed, so it is necessary to compensate the influence on the ambient temperature.

To this end, the temperature sensor 421 further includes a temperature sensor 421 which measures the ambient temperature of the clock synchronous detection device and converts the digital data into digital data, and a look-up table (not shown) that stores a predetermined voltage value according to the temperature value. The voltage value mapped to the measured temperature value may be extracted from the lookup table and output through the DAC 418.

Hereinafter, the clock synchronization detecting method of the present invention will be described.

4 is a flowchart schematically illustrating a clock synchronization detection method according to a preferred embodiment of the present invention.

Referring to FIG. 4, when initialization is necessary (S110) In other words, when initializing a voltage value of a voltage controlled oscillator, temperature is measured from a temperature sensor and converted into digital data (S111) and stored in a lookup table from the measured temperature. Extracts a predetermined voltage value according to the temperature and outputs it to the DAC. (S112)

This is because the voltage value of the voltage controlled oscillator for the system clock (10MHz) output is different depending on the temperature to compensate for the temperature to generate an accurate system clock.

Next, when the initialization is not necessary or the initialization is completed, it is determined whether the input signal is greater than or equal to the threshold (S120).

More specifically, the presence of the input signal is checked by measuring the strength of the input signal (pilot signal) through the first ADC and transmitting it to the microprocessor. Herein, if the input signal is less than or equal to the threshold value, it may be assumed that there is no noise or a signal to determine whether the input signal is present. The threshold may be freely set according to the environment of the repeater or the user's request.

If the input signal is greater than or equal to the threshold value, check the synchronization state (S130).

More specifically, the frequency synchronizer attempts to synchronize the signal of the frequency divider and the signal of the voltage controlled oscillator, and when the synchronization is completed, outputs a lock detector signal (high) to the microprocessor. Signal (Unlock Detector) Outputs the signal (low).

Subsequently, when the synchronous state is a normal state, the switching unit selects a loop filter (S140).

More specifically, the microprocessor controls the switching unit so that the output value of the loop filter is input to the voltage controlled oscillator.

Here, the normal state refers to a state in which an input signal (pilot signal) is greater than or equal to a threshold value and synchronization is completed and a lock detector is input to the microprocessor.

At this time, the output value of the loop filter is recorded through the second ADC and output to the DAC (S141).

5 is a detailed flowchart of step S141 of FIG. 4 in accordance with a preferred embodiment of the present invention.

Referring to FIG. 5, first, a voltage value of a loop filter is read using a second ADC (S141a), and a voltage value of a loop filter is read using the second ADC, but three or more (N) voltage values are read. Read sequentially into the buffer (S141b).

Subsequently, three or more (N) data accumulated in the heap buffer are arranged in order from large to small (S141c), and the average value is obtained with the remaining values (N-2) except the maximum and minimum values (S141c). S141d), and outputs the calculated average value as a voltage value through the DAC. (S141e) Here, the value output through the DAC is input to the voltage controlled oscillator through switching control of the switching unit when the synchronization state is abnormal. Will be.

In this case, when N number of heap buffers is input, when N voltage values are input, the voltage value first inputted to the heap buffer is deleted and the value of the heap buffer is moved so that the N + 1 th voltage value is written to the heap buffer. . Therefore, the voltage value is upgraded in real time.

In fact, when the voltage value of the loop filter is abnormal, an invalid voltage value may be read by the second ADC. Therefore, the largest and smallest values are not regarded as valid data, and the average value of the remaining data is obtained. This allows accurate voltage calculation.

At the same time as the step S141, the voltage value output from the loop filter is input to the voltage controlled oscillator. (S150) Next, the voltage controlled oscillator generates a frequency according to the input voltage to perform synchronization.

If the synchronous state is abnormal, the switching unit selects the DAC (S170). More specifically, the microprocessor controls the switching unit so that the output value of the DAC is input to the voltage controlled oscillator. The abnormal state refers to a state in which an unlock signal is input to the microprocessor because an input signal (pilot signal) is equal to or less than a threshold value or synchronization is not completed.

At this time, the DAC output value of the step S141 is input to the voltage controlled oscillator (S150). Next, the voltage controlled oscillator generates a frequency according to the input voltage to perform synchronization.

 Although the detailed description of the present invention described above has been described with reference to the preferred embodiment of the present invention, the protection scope of the present invention is not limited to the above embodiment, and those skilled in the art will appreciate It will be understood that various modifications and changes can be made in the present invention without departing from the spirit and scope of the invention.

1 is an overall system configuration of a microwave repeater according to a preferred embodiment of the present invention.

FIG. 2 is a detailed block diagram of the synchronous detection device of FIG.

3 is a detailed block diagram of a frequency synchronizer according to the present invention.

4 is a flowchart schematically illustrating a clock synchronization detection method according to a preferred embodiment of the present invention.

5 is a detailed flowchart of step S141 of FIG. 4 in accordance with a preferred embodiment of the present invention.

* Description of the symbols for the main parts of the drawings *

10: donor unit 20: donor microwave unit

30: remote microwave unit 40: remote unit

410: synchronous detection device 411: band pass filter

412 frequency divider 413 frequency synchronizer

414: first ADC 415: microprocessor

416: loop filter 417: second ADC

418: DAC 419: switching unit

420: voltage controlled oscillator 421: temperature sensor

Claims (11)

A first analog-to-digital converter (first ADC) for detecting the strength of the input signal; Synchronize an output clock which is a frequency signal fed back from a reference signal of the input signal and a frequency signal output from a voltage controlled oscillator, and a voltage applying signal for applying a voltage of the voltage controlled oscillator and a synchronization state signal according to the result of the synchronization operation. A frequency synchronizer for outputting; A loop filter converting the voltage application signal into a DC voltage value and outputting the converted voltage; A second analog-to-digital converter (second ADC) for measuring a voltage value output from the loop filter; A digital-to-analog converter (DAC) for outputting a voltage value measured by the second ADC; A switching unit for selectively outputting a voltage value of the loop filter or a digital-to-analog converter (DAC) to the voltage controlled oscillator; The voltage controlled oscillator for generating the frequency signal according to the voltage output from the switching unit; And a microprocessor for controlling the switching unit by determining whether it is in a normal state or an abnormal state according to the synchronization state signal. The method of claim 1, In order to set the initial value of the voltage controlled oscillator, A temperature sensor measuring an ambient temperature of the clock synchronization detector; And a lookup table for storing a voltage value determined according to the temperature value; And a voltage value mapped to a temperature value measured by the temperature sensor is extracted from the lookup table and output through the DAC. The method of claim 1, The microprocessor; If the input signal is greater than the threshold value and the steady state receiving the lock state completion signal (Lock Detector) from the frequency synchronizer, the switching unit is controlled so that the output of the loop filter is input to the voltage controlled oscillator, And the switching unit controls the output of the DAC to be input to the voltage controlled oscillator when the input signal is equal to or less than a threshold value or an abnormal state in which a synchronous state incomplete signal is received. The method of claim 3, wherein The microprocessor; In the steady state, the voltage value of the loop filter is recorded through the ADC, and the voltage values are sequentially recorded in at least three heap buffers, and the maximum and minimum values of the voltage values recorded in the heap buffer are sequentially recorded. And calculating an average value of the remaining values except for the value, and controlling the output to the DAC. The method of claim 1, The voltage controlled oscillator; Clock synchronization detection device comprising any one of VCTCXO and VCXO. A clock synchronization detection method using a clock synchronization detection device according to claim 1, (a) the first ADC determining whether an input signal is greater than or equal to a threshold; (b) comparing the reference clock of the input signal with an output clock fed back from the voltage controlled oscillator and outputting a synchronous state signal; (c) outputting a voltage value of the loop filter to the voltage controlled oscillator when the input signal is greater than or equal to a threshold and the synchronous state is a lock detector; and (d) outputting a voltage value of the DAC to the voltage controlled oscillator when the input signal is less than or equal to a threshold or when the synchronization state is an unlock detector. The method of claim 6, When initializing the voltage value of the voltage controlled oscillator, Measuring an ambient temperature of the clock synchronization detector with a temperature sensor; And extracting a predetermined voltage value according to the temperature stored in the lookup table from the measured temperature and outputting the preset voltage value to the DAC. The method of claim 6, Step (b) is; When the input signal is greater than the threshold value and the frequency synchronizer is in a normal state (Lock Detector), the synchronization complete signal (high) is output to the microprocessor, And outputting a synchronization incomplete signal (low) to a microprocessor when the input signal is below a threshold or in an abnormal state in which a synchronization is not completed. The method of claim 6, Step (c) is: (c1) the input signal is above a threshold and the microprocessor receives a synchronization completion signal (high); (c2) switching the switching unit so that the output value of the loop filter is input to the voltage controlled oscillator; And (c3) recording the output value of the loop filter through an ADC and outputting the DAC to a DAC. The method of claim 9, Step (d) is: The input signal is below a threshold or the microprocessor receives a synchronization incomplete signal (low); Switching by the switching unit such that an output value of the DAC is input to a voltage controlled oscillator; And inputting the output value of the DAC of the step (c3) to the voltage controlled oscillator. The method of claim 10, Step (c3) is; The voltage value of the loop filter is recorded through the ADC, and the voltage value is sequentially recorded in at least three heap buffers, and the remaining values except for the maximum and minimum values among the voltage values recorded in the heap buffer. And calculating the average value of the output to the DAC.

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