KR101101684B1 - Probe Block - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device inspection object. Specifically, an electrode substrate of a probe block is manufactured by MEMS process to form a wiring pattern, thereby forming a silicon electrode substrate, and the silicon electrode substrate improves the manufacturing efficiency of the probe block and also the probe. The present invention relates to an inspection element for inspecting electronic devices with improved block assembly.

Probe block configuration of the present invention is composed of a contact block and a connection block, the contact block and the connection block to accommodate the electrode substrate in the storage box by opening the inside, the electrode substrate is a vertical through-hole and horizontal groove in the silicon substrate Then, the conductive electrode material is embedded in the vertical through hole and the horizontal groove to form a wiring pattern, and a plurality of such silicon substrates are laminated and bonded to form a conductive silicon electrode substrate.

In addition, by attaching the ejector to the contact block storage box is configured to be easily removable.

Contact block, connection block, silicon electrode substrate

Description

Probe block

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a probe block for semiconductor chip inspection, and more particularly, to a conductive wiring pattern added to a silicon electrode substrate of a probe block and to improved functionality and assemblability.

As is known, a probe card assembled with a probe block is a device for inspecting a defect of a semiconductor chip having a pattern formed on a wafer, and is used by being mounted on a prober device. The probe pin attached to the probe block uses tungsten wire. The blade-type MEMS probe pins are finely and uniformly manufactured by using a needle type, CVD process, lithography process, etching process, metal plating process, planarization process (CMP), residue removal and cleaning process. Will be used.

1A, 1B and 1C illustrate a conventional probe block head.

As illustrated in FIG. 1A, the probe head for semiconductor chip inspection is assembled into a plurality of probe blocks, such as a semiconductor chip region in which a pattern is formed by arranging a plurality of probe blocks in a row with semiconductor chips having a pattern formed on a wafer.

As shown in FIG. 1B, the probe block is made of a ceramic material to groove one side or both sides of the ceramic to process the probe slit groove. The ceramic material is strong so that the grooving depth and width are first set when the slit groove is processed. As the value of the slit groove processed to the numerical value and the middle of the slit groove is not processed the same as the value of the first processed slit groove, the slit groove is continuously processed with the last processed slit groove due to the cumulative tolerance generated during processing. In the processing dimensions of the slit grooves, a large number of processing errors occur, and the gap is broken when the gap between the slit grooves and the slit grooves is minute.

The probe block of FIGS. 1A and 1B has a structure in which the outside of the ceramic without the wiring pattern is simply machined to fix the probe pin with an adhesive to the processing part, and screw holes are attached to both ends of the probe block housing or printed circuit board. It was difficult to detach the probe block by fastening the screw to the adhesive and fixing it with an adhesive. Also, the central part mounted on the longer length of the probe block generates fine lifting phenomenon when used in high temperature conditions.

As shown in Fig. 1C, there is a probe head made of a multilayer circuit board (MLC) made of a single plate of the same size as a semiconductor chip formed on the entire wafer.

Conventional single-headed probe head is made of multilayer circuit board by molding ceramic and divided into transformer and interposer.

In recent years, the size of a probe head is required to be 12 inches in size. The reason is that the wafer size is large and the semiconductor chip is manufactured with a 12-inch wafer, so the 12-inch wafer is inspected with the probe head # 1 touch.

In the future, manufacturing process equipment is being developed to manufacture semiconductor chips from 16-inch and 18-inch wafers. However, in the manufacture of ceramic multilayer circuit board (MLC) made of single plate, the inner layer wiring pattern is short-circuited due to shrinkage when ceramic is sintered in manufacturing the size of the area more than 8 inches in width and length. Difficulties make supply a problem.

Tens of thousands of pins must be assembled in the probe head of the probe card. However, due to the large size of the probe head, it is difficult to supply the material of the probe head and the delivery time is delayed.

The present invention has been proposed to solve the problems pointed out as a problem in the above, the vertical through the silicon substrate using the MEMS process using the electrode substrate of the probe block as the material of the silicon substrate of the same material as the thermal expansion coefficient It is made of a structure that can cope with the enlargement of the probe head by forming a hole and a horizontal groove.

In addition, in the method of fastening the probe block to a printed circuit board, an ejector is added to both ends of the contact block storage box without fastening the bolts at both ends of the probe block for quick detachment, and opening holes are formed at regular intervals in the length direction of the probe block. The hole is an empty opening hole, and the next opening hole is fastened with a printed circuit board by a bolting hole.

It is preferable to form the space | interval of an opening hole at equal intervals. The fastening bolt can adjust the probe block Z-axis flatness according to the degree of locking.

The probe block is a structure that is separated into a contact block and a connection block.

The contact block is a storage type and a silicon electrode substrate is stored therein.

In addition, the connection block is also an accommodating anisotropic electrode substrate therein.

The connection block is fixed and standardized and attached to the printed circuit board, and the contact block is replaced with only the contact block in the probe card during inspection of a memory semiconductor having a reduced circuit line width of the same storage capacity type. It can be reused.

As such, the price of printed circuit boards and equipment to be reused is excluded, which enables fast delivery and fast repair, and also reduces semiconductor chip inspection costs.

As described above, the present invention is a useful invention in which a probe block, a probe pin, and a contact pin, which can inspect a semiconductor chip having a circuit pattern formed on a wafer of 12 inches or more at a time, have a function of preventing departure from a negative pad conducting electrode.

In addition, the probe block is composed of a contact block and a connection block in a detachable form, and the detachable type is to use the connection block as a standard type and replace only the contact block without having to manufacture a new probe card due to the change of the semiconductor device.

The ejector is attached to the detachable probe block, so if the problem occurs during use, the probe pin of the probe card is easy to replace and repair, so that only the corresponding contact block is detached and maintained, and the electrode substrate of the probe block is formed of a multilayer silicon electrode substrate and an energizing pad. It is formed by the intaglio pad so that the contact pin can contact the energizing electrode intaglio pad or select the probe block according to the type of semiconductor to be tested to manufacture a probe card.

Hereinafter, a method and an embodiment of a silicon electrode substrate according to the present invention and specific effects obtained therefrom will be described in detail with reference to FIG. 6.

As shown in Fig. 6A, the electrode substrate is made of a single-crystal silicon substrate in a 100-direction good etching method using a MEMS process, and the silicon substrate cleans the surface to improve adhesion and coating performance.

Next, the upper surface of the silicon substrate is thinned by chemical vapor deposition (CVD) or physical vapor deposition (PVD).

The thin film is preferably carried out by an atmospheric pressure CVD apparatus capable of satisfactorily thinning the entire surface of the side wall of the deep groove or the through hole.

As shown in Fig. 6B, the photoresist is uniformly and evenly coated on the upper surface of the silicon substrate using a spin coater.

As shown in Fig. 6C, a SiO2 mask or a photoresist mask is prepared for drilling a vertical through hole in the silicon substrate, and is prebaked and developed with a through mask prepared to evaporate the solvent of the photoresist-coated silicon substrate. Is to pattern.

As shown in Fig. 6D, a plurality of deep vertical through holes are processed at a fine and narrow pitch by deep etching on the upper surface of the silicon substrate. Etching may use an anisotropic dry etching (Deep Reactive Ion Etching) technique, such as a bosch process using inductivity coupled plasma (ICP).

The bosch process is deep etching while maintaining verticality by repeating the etching process by SF6 gas and the sidewall protection process by C4F8 gas.

As shown in Fig. 6E, the oxide film and the remaining photoresist are removed. When the SiO 2 mask is used as the photoresist mask, the SiO 2 photoresist mask is removed by ashing.

6F, the lower surface of the silicon substrate is thinned by a chemical vapor deposition (CVD) process or a physical vapor deposition (PVD) process.

As shown in Fig. 6G, the photoresist is uniformly and evenly coated on the bottom surface of the silicon substrate by using a spin coater.

As shown in Fig. 6H, a SiO 2 mask or a photoresist mask is prepared for digging the horizontal grooves in the silicon substrate, and then prebaked and developed with a prepared horizontal groove mask to evaporate the solvent of the photoresist-coated silicon substrate. Pattern.

Since SiO2 has the same selectivity as that of the silicon substrate, it is advantageous to form deep holes and grooves.

As shown in Fig. 6I, a plurality of horizontal grooves are processed at a fine and narrow pitch by deep etching on the bottom surface of the silicon substrate. Etching may use an anisotropic dry etching (Deep Reactive Ion Etching) technique, such as a bosch process using inductivity coupled plasma (ICP). The bosch process is deep etching while maintaining verticality by repeating the etching process by SF6 gas and the sidewall protection process by C4F8 gas.

As shown in Fig. 6J, the oxide film and the remaining photoresist are removed. When the SiO 2 mask is used as the photoresist mask, the SiO 2 photoresist mask is removed by ashing.

As shown in Fig. 6K, an insulating film is formed in the vertical grooves and horizontal grooves on the front surface of the silicon substrate.

The via bottom SiO2 is then removed by etching to expose the metal surface of the via bottom.

As shown in Fig. 6L, a barrier film and a seed film are formed in the vertical through hole and the horizontal groove. As the barrier film, Ti / Au, titanium nitride, and the seed film are preferably Cu.

The seed film is required as a Cu seed layer for supplying electrons for reducing Cu ions when electroplating is used to embed conductive electrode materials in vertical through holes and horizontal grooves.

As shown in Fig. 6M, plating is carried out by filling and filling the conductive cathode material Cu in the vertical through hole and the horizontal groove by electroplating.

As shown in Fig. 6N, Cu embedded in the vertical through hole and the horizontal groove is polished. Polishing is preferably carried out by a chemical machining (CMP) process.

6A through 6H, a plurality of silicon substrates are processed.

As shown in Fig. 6O, two silicon substrates each having a vertical through hole and a horizontal groove formed therein and filled with electrode material are aligned so that the horizontal groove and the vertical through groove become a wiring pattern, and the silicon electrode substrate is bonded with a special adhesive.

In this way, a plurality of silicon electrode substrates are joined to a desired thickness to form embedded vertical through wiring patterns and horizontal recess wiring patterns.

In a method of forming a negative electrode pad of a silicon electrode substrate, photoresist is applied to a silicon substrate on which upper and lower conducting electrodes are formed in which vertical through holes are embedded.

Patterning is performed with a shape mask in which vertical through holes are formed.

The vertical through hole mask is preferably rectangular or circular.

Next, the insulating material is deposited except for the portion of the conducting electrode in which the vertical through-holes are embedded. The photoresist is removed and cleaned. In this way, except for the portion of the conducting electrode in which the vertical through-holes are embedded, the insulating material may be applied to a predetermined thickness to engrav the vertical through-holes. The engraved pad shape is formed in a square or a circle.

Alternatively, the insulating film perforated to the vertical through hole size of the silicon electrode substrate or the insulating film perforated to the vertical through hole size is applied to the surface of the silicon electrode substrate except for the conductive electrode portion having the vertical through holes embedded in the upper and lower surfaces thereof. The electrode can be engraved pad.

The heat insulation film has a high heat generated inside the probe head has a heat-reducing effect to the printed circuit board to reduce the sagging of the probe block attached to the printed circuit board due to the high temperature.

In another method, the silicon electrode substrate accommodated in the connection block is filled with a polymer elastomer or a silicon louver except for a portion in which the vertical through-holes of the upper and lower surfaces of the silicon electrode substrate are embedded. The polymer elastomer or silicon louver thus filled protrudes to the outside to engrave the portion where the vertical through-hole is embedded and does not break due to the elastic support of the silicon substrate.

The conductive electrode material is to select one of Cu, Au, Ni, Ag, Al.

The engraved pad formed on the probe block can be stably contacted without preventing the probe pin or the connecting pin from coming off from the protruding embossed pad.

The silicon electrode substrate having the electrode engraved therein may be cut into blocks or used in a desired size.

According to the above-described manufacturing method, it can be used as a separate probe block by using a contact block and a connection block according to the method of assembling the probe block, and can be used as a test body as an integrated probe block according to the use.

In addition, the probe block is to quickly attach and detach by locking and loosening device.

The locking and loosening device is attached to the contact block or connecting block or stiffener or probe block housing according to the method of assembling the probe block.

Example 1

As shown in Figure 2, the probe block 10 is a structure consisting of a contact block 15 and the connection block (25).

The contact block 15 includes a test body 3 having a probe pin installed at an upper end thereof, and then includes a contact block storage box 18 and a silicon electrode substrate 5.

The contact block storage box 18 is made of a metal material on which an insulating film is deposited.

The metal material is preferably selected from novenite and invar.

A fixed end 18a is formed inside the contact block storage box 18 and the silicon electrode substrate 5 is mounted, and the silicon electrode substrate 5 is accommodated in the fixed end 18a.

In addition, the contact portion of the probe pin contacts the wiring pattern negative pad 95 formed on the upper surface of the silicon electrode substrate 5, and an anisotropic electrode in which the connection pin or the pogo pin is accommodated in the connecting block 25 is formed on the negative pad formed on the lower surface of the silicon electrode substrate 5. The electrodes are energized by contacting the electrode pads of the substrate 7.

Depending on the semiconductor device to be inspected, the semiconductor device changed according to the circuit line width reduced in the same type of memory by replacing the probe electrode test body 3 and the silicon electrode substrate 5 housed in the contact block storage box 18. It can be.

The silicon electrode substrate 5 has a plurality of silicon substrates bonded to each other, and each layer has a wiring pattern added thereto to accommodate the silicon electrode substrate 5 in the contact block storage box 18.

The conductive electrode of the silicon electrode substrate 5 is formed of the intaglio pad 95.

The intaglio pad 95 is an intaglio recess formed when the insulator 86 is applied except for the conducting electrode part formed on the upper and lower surfaces of the silicon electrode substrate 5.

The silicon electrode substrate 5 manufactures a silicon substrate by MEMS process.

The method of manufacturing the silicon electrode substrate 5 is as described above.

As shown in Fig. 6A, a silicon substrate is made of a single crystal silicon substrate in a 100-direction good etching method using a MEMS process, and the silicon substrate is cleaned on the surface to improve adhesion and coating performance.

Next, the upper surface of the silicon substrate is oxidized by chemical vapor deposition (CVD) or physical vapor deposition (PVD).

The oxide film is preferably performed by an atmospheric pressure CVD apparatus capable of satisfactorily thinning the entire surface of the sidewall of the deep groove or the vertical through hole.

As shown in Fig. 6B, the photoresist is uniformly and evenly coated on the upper surface of the silicon substrate using a spin coater.

As shown in Fig. 6C, a SiO 2 mask or a photoresist mask is prepared for drilling a vertical through hole in the silicon substrate, and then prebaked and developed with a vertical penetration mask prepared to evaporate the solvent of the photoresist-coated silicon substrate. Pattern the hole.

As shown in FIG. 6D, a plurality of deep vertical through holes are processed at a fine and narrow pitch by deep etching on the upper surface of the silicon substrate. Etching may be used by a deep anisotropic dry etching (Reactive Ion Etching) technique such as a bosch process using inductivity coupled plasma (ICP). The bosch process is deep etching while maintaining verticality by repeating the etching process by SF6 gas and the sidewall protection process by C4F8 gas.

As shown in Fig. 6E, the oxide film on the upper surface of the silicon substrate and the remaining photoresist are removed. When using a mask of SiO 2 as a photoresist mask, the SiO 2 photoresist mask is removed by ashing.

6F, the bottom surface of the silicon substrate is oxidized by a chemical vapor deposition (CVD) process or a physical vapor deposition (PVD) process.

As shown in Fig. 6G, the photoresist is applied on the lower surface of the silicon substrate uniformly and evenly using a spin coater.

As shown in FIG. 6h, a SiO 2 mask or a photoresist mask is prepared to dig a horizontal recess in the bottom surface of the silicon substrate, and the photoresist is prebaked and developed with a horizontal recess mask prepared to evaporate the solvent of the silicon substrate to which the photoresist is applied. Pattern the grooves.

Since SiO2 has the same selectivity as that of a silicon substrate, it is advantageous to form vertical through holes and horizontal grooves.

As shown in FIG. 6I, a deep etching process is performed on the bottom surface of the silicon substrate to process a plurality of horizontal grooves at narrow pitch intervals. Etching may use an anisotropic dry etching (Deep Reactive Ion Etching) technique, such as a bosch process using inductivity coupled plasma (ICP). The bosch process is deep etching while maintaining verticality by repeating the etching process by SF6 gas and the sidewall protection process by C4F8 gas.

When the SiO 2 mask is used as the photoresist mask, the SiO 2 photoresist mask is removed by ashing.

As shown in Fig. 6J, the oxide film on the lower surface of the silicon substrate and the remaining photoresist are removed. When using a mask of SiO 2 as a photoresist mask, the SiO 2 photoresist mask is removed by ashing.

As shown in Fig. 6K, an insulating film is formed in the vertical grooves and horizontal grooves on the front surface of the silicon substrate.

Then, the via bottom SiO 2 is removed by etching to expose the metal surface of the via bottom.

As shown in Fig. 6L, a barrier film and a seed film are formed in the vertical through hole and the horizontal groove.

It is preferable to use Ti / Au as a barrier film and Cu as a seed film.

The seed film is required as a Cu seed layer for supplying electrons for reducing Cu ions when electroplating is used to embed conductive electrode materials in vertical through holes and horizontal grooves.

As shown in Fig. 6M, electroplating is carried out by filling and filling the conductive electrode material in the vertical through hole and the horizontal groove by electroplating.

The conductive electrode material is to select one of Cu, Au, Ni, Ag, Al.

As shown in Fig. 6N, the conductive electrode material overfilled in the vertical through hole and the horizontal groove is polished.

Polishing is preferably carried out by a chemical machining (CMP) process.

6a to 6n, after the process of manufacturing a plurality of silicon substrates

As shown in Fig. 6O, two silicon electrode substrates each having a vertical through hole and a horizontal groove formed therein and filled with a conductive electrode material are aligned so that the horizontal groove and the vertical through groove form a wiring pattern, and the silicon electrode substrate is bonded with an adhesive.

In this manner, a plurality of silicon electrode substrates are bonded to each other at a desired thickness to form a vertical through wiring pattern and a horizontal recess wiring pattern.

Next, the insulating material is deposited except for the portion of the conducting electrode in which the vertical through-holes are embedded.

In addition, the insulating material 86 applied except for the portion of the conducting electrode in which the vertical through holes are embedded may have a predetermined thickness so that the vertical through holes may be engraved with the intaglio pad 95.

The engraved pad 95 is formed in a square or circular shape.

Engraving of the conductive electrode contact pad is disengaged when the connecting pin of the bottom surface of the silicon electrode substrate 5 housed in the contact block 15 contacts the electrode pad of the anisotropic electrode substrate 7 housed in the connection block 25. Will prevent

The conductive electrode is used by cutting the silicon electrode substrate 5 having the engraved pad 95 into blocks, or by cutting to a desired size.

The silicon electrode substrate 5 housed in the contact block 15 is connected to the pad land of the printed circuit board by contacting the bottom pin with the electrode pad of the anisotropic electrode substrate 7 housed in the connection block 25. It is energized.

The intaglio pads 95 of the silicon electrode substrate 5 are arranged in a zigzag arrangement to reduce the number of silicon substrates stacked by arranging the intaglio pads 95 as large as possible.

The connection block 25 has a structure including a connection block storage box 28 and an anisotropic electrode substrate 7.

In addition, the locking and loosening device is added to both ends of the probe block 10.

The locking and plumbing device is formed in the structure of the ejector 1 and the ejector holder 1a so as to quickly attach and detach. The locking device of the ejector 1 is formed at both ends of the connection block storage box 28 so as to be locked to the pull device of the ejector holder 1a at both ends of the contact block storage box 18 so that the contact block storage box 18 is connected to the connection block box. It can be fixed in the holder (28).

Since the connection block 25 is standardized and fixed, the probe card of the memory semiconductor of the same storage capacity type can be reused by replacing only the contact block 15 and the printed circuit board and the apparatus attached thereto.

In this way, the cost of reusable printed circuit boards and fixtures is excluded, so that inspection and delivery costs can be reduced by using a prompt and reasonable probe card.

An opening hole is formed at a predetermined interval in the longitudinal direction of the probe block, and the first opening hole is made into an empty opening hole, and the next opening hole is made of a bolt hole to be fastened with the printed circuit board. It is preferable to form the space | interval of an opening hole at equal intervals.

Opening holes in the probe block are formed in the same line as opening holes in the printed circuit board. The fastening bolt can adjust the probe block Z-axis flatness according to the degree of locking.

In addition, both ends of the contact block 15 and both ends of the connection block 25 are provided with adjusting bolts 99 so that the silicon electrode substrate 5 contained in the contact block 15 and the anisotropic electrode received in the connection block 25 are provided. By controlling the substrate 7 it is possible to control the left and right fine pitch of the X-axis.

The connection block storage box 28 is preferably manufactured by selecting any one of novenite, ceramic, or engineering plastic.

The probe pin is used by the present applicant in the structure and shape of the application and the description is omitted in the present application.

Example 2

As shown in FIG. 3, the probe block 30 is divided into a contact block 35 and a connection block 45. The multilayer ceramic circuit board 9 (MLC) stored in the contact block 35 is blocked and used in the contact block storage box 18 to be used as the contact block 35, and the probe pin is disposed in the test body 3. The test body 3 is energized by contacting the conduction electrode of the bottom surface of the multilayer ceramic circuit board 9 with a connection pin or pogo pin and contacting the conduction electrode formed on the silicon electrode substrate 5 of the connection block 45. .

The multilayer ceramic circuit board 9 is formed into a plurality of layers, and each layer is housed in the contact block storage box 18 in a structure of a built-in wiring pattern.

The connection block 45 has a storage box inside and accommodates the silicon electrode substrate 5 in the connection block storage box 28.

The inside of the connection block storage box 28 is formed with a fixed end 28a for opening and mounting the electrode substrate, and the silicon electrode substrate 5 is received and mounted in the fixed end 28a.

The insulating film 87 perforated to the vertical through hole size of the silicon electrode substrate 5 is attached to the upper and lower surfaces of the silicon electrode substrate 5 except for the conductive electrode portion having the vertical through holes embedded therein, and the conductive electrode is engraved on the negative pad. (95) It can be made.

The intaglio pads 95 on the upper surface of the silicon electrode substrate 5 are arranged in a zigzag arrangement, and the intaglio pads 95 are disposed as large as possible, thereby reducing the number of silicon substrate stacks.

The probe block 30 is formed at both ends of the locking and loosening device. The locking and loosening device is formed in the ejector 1 and the ejector holder 1a structure to quickly remove the attachment and detachment.

The locking device of the ejector 1 is formed at both ends of the contact block storage box 18 so as to be locked to the pull device of the ejector holder 1b at both ends of the connection block storage box 28 so that the contact block storage box 18 is connected to the connection block. It can be fixed in the holder (28).

In addition, the multilayer ceramic circuit board 9 housed in the contact block 35 and the silicon electrode substrate 5 housed in the connection block 45 are provided with adjusting bolts at both ends of the contact block 35 and at both ends of the connection block 45. 99) is added to control the left and right fine pitch of the X-axis by adjusting the multilayer ceramic circuit board 9 and the silicon electrode substrate (5).

Since the connection block 45 is standardized and fixed, the probe card of the memory semiconductor of the same type of storage capacity can be reused by replacing only the contact block 35 with the PCB.

Example 3

As shown in FIG. 4, the probe block 50 is divided into a contact block 55 and a connection block 65. The contact block 55 is composed of an anisotropic electrode substrate (7) and a contact block storage box 18, the test body 3 having a probe pin disposed on the top.

An opening is formed inside the contact block storage box 18 so that a probe pin joint provided in the test body 3 is inserted into the opening of the test body alignment substrate so that the probe pin joint contacts the conducting electrode of the anisotropic electrode substrate 7. It is energized.

The silicon electrode substrate 5 housed in the connection block 65 has a plurality of silicon substrates bonded to each other, and each layer has a structure of a wiring pattern to store the silicon electrode substrate 5 in the connection block storage box 28. To be mounted.

The intaglio pad forming method of the silicon electrode substrate 5 accommodated in the connection block 65 may include a polymer elastomer 89 or a silicon louver except for a portion in which the vertical through-holes of the upper and lower surfaces of the silicon electrode substrate 5 are embedded. Fill. The polymer elastomer 89 or the silicon louver filled as described above is engraved to protrude to the outside to engrave the portion where the vertical through-hole is embedded, and has an effect of elastically supporting the silicon electrode substrate 5 so that it is not broken.

In the silicon electrode substrate 5 accommodated in the connection block 65, the contact pins contact the intaglio pads 95 so that the contact pins are provided on the intaglio pads 95 disposed on the bottom surface of the silicon electrode substrate 5 through a wiring pattern. The pad circuit is bonded to the printed circuit board 100 to be energized.

The intaglio pads 95 of the silicon electrode substrate 5 may be arranged in a zigzag arrangement so that the size of the intaglio pads 95 is arranged as large and large as possible to reduce the number of silicon substrates stacked.

The intaglio pad 95 disposed on the bottom surface of the silicon electrode substrate 5 housed in the connection block 65 has a connection pin installed on the printed circuit board 100 in contact with the intaglio pad 95 to prevent separation. The poor contact between the circuit board 100 and the connection block 65 can be reduced.

In addition, the probe block 50 is attached and detached by the locking and unwinding device.

The locking and plumbing device has a structure of locking (lock) 2a and LOCK (2) to quickly lock the probe block 50 with the upper stiffener 110 and the plume. The lock (2a) device is formed on both ends of the upper stiffener 110 can be fixed to the LOCK (2) device on both ends of the contact block storage box (18).

Example 4

As shown in FIG. 5, the probe block 70 is divided into a contact block 75 and a connection block 85.

The contact block 75 has an inspector 3 having a probe pin disposed on the upper end thereof, and then includes a contact block storage box 18. The contact block storage box 18 is made of a metal material having an insulating film thereon. The contact block storage box 18 has an opening, so that the junction of the probe pin disposed in the inspection body 3 is inserted into the opening of the inspection body alignment substrate so that the probe pin junction is connected to the silicon electrode substrate 6 of the connection block 85. Is in contact with the bump 97).

The silicon electrode substrate 6 accommodated in the connection block 85 is formed into a plurality of layers, each layer having a wiring pattern, and the silicon electrode substrate 6 is accommodated in the connection block storage box 28.

The insulating film 88 perforated to the size of the vertical through hole of the silicon electrode substrate 6 is attached to the upper and lower surfaces of the silicon electrode substrate 6 except for the conductive electrode portion having the vertical through holes embedded therein. The insulation film 88 has a high heat generated inside the probe head has a heat-reducing effect to the printed circuit board to reduce the sag of the probe block attached to the printed circuit board due to the high temperature.

The upper and lower conductive electrodes of the silicon electrode substrate 6 accommodated in the connection block storage box 28 are formed of bumps 97.

The connection pins of the probe pin junction portion contacting the bump 97 of the silicon electrode substrate 6 and contacting the bump 97 disposed on the bottom surface of the silicon electrode substrate 6 through the wiring pattern are pad lands of the printed circuit board 100. It is connected to and conducts.

The bumps 97 on the top and bottom surfaces of the silicon electrode substrate 6 are arranged in a zigzag arrangement to reduce the number of silicon substrates stacked by arranging the bumps 97 as large as possible.

The bumps 97 disposed on the bottom surface of the silicon electrode substrate 6 are flexible in a convex embossing structure to prevent separation from the joints and to contact the printed circuit board 100 even when compressed by a certain amount of pressing force. (85) can correct the difference in flatness, thereby reducing the contact failure.

In addition, the probe block 70 is to attach and detach with a lock and a plume device. The lock and the plumbing device is formed in the structure of the lock (lock) (2b) and pull (Lock) (2) to quickly lock the probe block 70 and the plume. The lock (2b) device is formed on both ends of the probe block housing 120 can be fixed to the lock (2) device on both ends of the contact block storage box (18).

The present invention is not limited to the above-described embodiments, and various modifications may be made by those skilled in the art within the spirit and scope of the present invention.

Figure 1a, 1b, 1c is a perspective view illustrating a conventional probe block.

Figure 2 is a perspective view illustrating a configuration state in which the locking and loosening device is added to the probe block 10 of the present invention.

Figure 3 is a perspective view illustrating a configuration state in which the locking and loosening device is added to the probe block 30 of the present invention.

Figure 4 is a perspective view illustrating a configuration state in which the locking and loosening device is added to the probe block 50 of the present invention.

5 is a perspective view illustrating a configuration in which the locking and loosening device is added to the probe block 70 of the present invention.

6a to 6o are process drawings illustrating a method for manufacturing a silicon electrode substrate.

Description of the Related Art

1: ejector 3: inspector 5: silicon electrode substrate 7: anisotropic electrode substrate

9: Multilayer ceramic circuit board 10, 30, 50, 70: Probe block 15, 35, 55, 75: Contact block

18: Contact block box 25, 45, 65, 85: Connection block 28: Connection block box

86: insulating material 87: insulating film 88: insulating film 89: polymer elastomer

93: horizontal groove 95: intaglio pad 97: bump

99: adjusting bolt 100: printed circuit board 110: upper stiffener 120: probe block housing

Claims (2)

In the probe block for the probe card, The probe block 70 is composed of a contact block 75 and the connection block 85, The contact block 75 is that the test body 3 is provided with a probe pin is formed in the contact block storage box 18, The connection block 85 is provided with a connection block storage box 28 and the silicon electrode substrate (6). Locking and unwinding device of the probe block 70 is a lock (2b) device formed on the probe block housing 120 is fastened to a lock (2) device formed in the contact block storage box 18 to contact block storage Probe block (18), characterized in that detachable from the probe block housing (120). The conducting electrode formed on the upper and lower surfaces of the silicon electrode substrate 6 is formed of a bump 97, except for the bumps 97 formed on the upper and lower surfaces of the silicon electrode substrate 6. The probe block is characterized in that the insulating film 88 is attached.

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