KR101118976B1 - Canonical Piecewise-Linear Model-Based Digital Predistorter for Power Amplifier Linearization And Apparatus including the Same - Google Patents

Abstract

Disclosed are a canonical piecewise-linear model based digital predistorter for linearization of a power amplifier and a wireless communication device including the same. In a system including a power amplifier (HPA) of the present invention, the digital predistorter includes a PWL modeling unit estimating and modeling characteristics of the HPA, an error signal that is a difference between an output signal of the HPA and an output signal of the PWL modeling unit. An inverse of the modeled characteristic in accordance with the output of the inverse calculator, an operator for calculating a, a modeled characteristic received from the PWL modeling unit, and calculating an inverse of the modeled characteristic. And a pre-distortion unit having a) characteristic, wherein the PWL modeling unit updates the modeled characteristic parameters in a direction of reducing the error signal.

Description

Canonical Piecewise-Linear Model-Based Digital Predistorter for Power Amplifier Linearization And Apparatus including the Same}

The present invention relates to an electronic circuit and a device comprising the same, and more particularly, to a digital predistorter for linearizing a power amplifier, an apparatus including the same, and a method thereof.

Wireless communication systems generally use a high power amplifier (HPA) to obtain the transmit power of a signal. However, performance degradation is caused by nonlinear distortion of HPA.

On the other hand, in recent years, the types of wireless communication services are becoming very diverse, and users' demand for information throughput and reliability is increasing. Due to such technical requirements, multi-carrier transmission schemes such as orthogonal frequency division multiplexing (OFDM), which can transmit large amounts of information, and multi-dimensional modulation schemes are being developed.

An OFDM system transmits signals modulated by M-ary Quadrature Amplitude Modulation (QAM) or Phase Shift Keying (PSK) using a plurality of orthogonal subcarriers. The OFDM system is robust to frequency selective fading or narrowband interference channel environment compared to the system using a single carrier, and efficiently modulates and demodulates using a fast fourier transform (FFT) algorithm. The advantage is that it can be implemented.

Due to these advantages, the OFDM scheme is applied to digital video broadcasting (DVB), broadband wireless access (BWA), and digital multimedia broadcasting (DMB) in Europe.

In particular, it is used as a core transmission technology of WiBro (Wireless Broadband, 802.11e Mobile WiMax), which has been adopted as an international standard, and is a transmission technology that is likely to be developed and used in 4G systems incorporating WiBro. However, unlike a single carrier system, in an OFDM system, since the output signal has a Rayleigh distribution, a single carrier is used due to nonlinear characteristics of HPA such as Traveling Wave Tube Amplifier (TWTA) or Solid State Power Amplifier (SSPA) in a wireless communication environment. Severe nonlinear distortion occurs than transmission.

This nonlinearity of HPA can be reduced by sufficiently backing off the output signal level into the linear region, but this results in excessively reducing the output of the transmitted signal, which in turn reduces the phase margin. . Therefore, the nonlinear distortion of the HPA must be compensated to effectively utilize the advantages of OFDM that is strong in multipath fading.

The most serious problem with HPA is that nonlinear distortion occurs in the amplitude and phase of the input signal. In general, non-linear distortion of HPA is caused by amplitude modulation to amplitude modulation (AM / AM) conversion and amplitude modulation to phase modulation (AM / PM) conversion. The AM / AM conversion is a nonlinear characteristic of the output signal amplitude according to the amplitude of the input signal, and the AM / PM conversion is a nonlinear characteristic of the phase of the output signal according to the amplitude of the input signal. Linearization methods to reduce nonlinearity of HPA include analog predistortion, feed-forward, back-feed, and digital predistortion.

As mentioned above, the performance of a device using HPA depends on how effectively it removes the nonlinear distortion of the HPA. Therefore, there is an urgent need for a method to effectively remove the nonlinear distortion of the HPA.

It is an object of the present invention to provide a digital predistorter and an apparatus including the same that can effectively remove nonlinear distortion of HPA.

According to an aspect of the present invention, there is provided a digital predistorter, comprising: a PWL modeling unit estimating and modeling characteristics of the HPA in a system including a power amplifier (HPA); A calculator for calculating an error signal that is a difference between an output signal of the HPA and an output signal of the PWL modeling unit; An inverse calculator for receiving a modeled characteristic from the PWL modeling unit and calculating an inverse of the modeled characteristic; And a pre-distortion unit having an inverse characteristic of the modeled characteristic according to the output of the inverse calculator, wherein the PWL modeling unit updates the modeled characteristic parameters in a direction of reducing the error signal.

According to another aspect of the present invention, there is provided a digital predistorter including a power amplifier (HPA), comprising: a predistortion unit connected to a front end of the HPA; An indirect learning block modeling an inverse characteristic of the characteristic of the HPA; A calculator for calculating an error signal that is a difference between an output signal of the predistorter and an output signal of the indirect learning block; And an estimation algorithm block for updating the coefficients of the indirect learning block in a direction of reducing the error signal, wherein the predistortion unit has the same characteristics as the indirect learning block.

According to the canonical PWL model-based digital predistorter of the present invention, it is possible to prevent signal distortion and spectrum spread due to high PAPR of the OFDM signal and nonlinearity of HPA.

1 is a graph showing the non-linear characteristics of HPA used in the wireless communication system of one embodiment of the present invention.
2 is a block diagram of a canonical PWL modeling unit according to an embodiment of the present invention.
3 is a schematic structural diagram of a wireless communication device including a digital predistorter using a canonical PWL model according to an embodiment of the present invention.
4 is a table illustrating input signals, the number of samples, and initial parameters set for the operation experiment of FIG. 3.
FIG. 5 is a graph illustrating an average of mean square errors (MSEs) between the output signal of the PWL modeling unit and the output signal of the HPA in 100 sample units in the apparatus of FIG. 4.
6 is a graph showing an MSE characteristic curve according to step size among experimental conditions.
7 is a schematic structural diagram of a wireless communication device including a digital predistorter using a canonical PWL model according to another embodiment of the present invention.
8 is a schematic block diagram of an OFDM system according to an embodiment of the present invention.
9 is a constellation diagram of received symbols for QPSK, 16-QAM, and 64-QAM modulation.
Figure 10 shows the bit error rate according to the signal to noise ratio for QPSK, 16-QAM, 64-QAM modulation.
11 shows AM-AM conversion characteristic curves for 64-QAM modulation.

In order to fully understand the present invention, the operational advantages of the present invention, and the objects achieved by the practice of the present invention, reference should be made to the accompanying drawings which illustrate preferred embodiments of the present invention and the contents described in the accompanying drawings. Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals in the drawings denote like elements.

As a method for compensating for nonlinear distortion caused by HPA, recently, digitally processable baseband techniques have been actively studied due to the development of general-purpose digital signal processing devices. In particular, the method of using a predistorter in a transmitter is very effective in that the input data can be easily compensated for in a transmitter having a source of nonlinear distortion. The predistorter is located at the front of the HPA. The predistorter is pre-distorted and applied to the HPA in a direction that compensates for the signal being distorted by the HPA. It is operated to be equal to the signal.

1 is a graph showing the non-linear characteristics of HPA used in the wireless communication system of one embodiment of the present invention. In particular, the graph of FIG. 1 shows AM / AM conversion characteristics and AM / PM conversion characteristics of SSPA, which is a type of HPA. The nonlinear characteristics of SSPA are modeled by Equations 1 and 2, respectively, for AM / AM conversion characteristics and AM / PM conversion characteristics.

Where r is the normalized input amplitude, A (r) is the output amplitude, r _sat is the input saturation level, g ₀ is the gain of SSPA, and k is an integer used to adjust the slope of the curve in the saturation region. It means the value.

Where Ø (r) is the output phase.

2 is a block diagram of a canonical PWL modeling unit 100 according to an embodiment of the present invention. Referring to this, the PWL modeling unit 100 includes a first layer block 110 and a second layer block 140. The first layer block 110 includes a plurality of multipliers 111-115, summers 121-123, and absolute value calculators 131-133.

The first to fifth multipliers 111 to 115 respectively include vector inner products of the corresponding vector product coefficients B ^T ₁₁ , α ^T ₁₁ , α ^T ₁₂ , α ^T ₁₃ , B ^T ₁₂ and the input signal x. product). The first to third summers 121 to 123 subtract the corresponding beta coefficients β ₁₁ , β ₁₂ , β ₁₃ from the outputs of the second to fourth multipliers 112 to 114, respectively. Each of the first to third absolute value calculators 131 to 133 is an absolute value (| g ₁₁ ) of the output of the corresponding summers 121, 122, and 123 of the first to third summers 121 to 123. |, | g ₁₂ |, | g ₁₃ |) are calculated. The output signals of the first to third absolute value calculators 131 to 133 are multiplied by the corresponding multiplication coefficients C ₁₁ , C ₁₂ , and C _13, respectively, and then the fourth to fifth summers 141 to 142. Is entered.

The fourth summer 141 may have multiplication coefficients C ₁₁ , C ₁₂ , and C ₁₃ corresponding to outputs of the first multiplier 111 and output signals of the first to third absolute value calculators 131 to 133, respectively. and summing the multiplied signals made, and a first coefficient (a _11). The fifth summer 142 may have multiplication coefficients C ₁₁ , C ₁₂ , and C ₁₃ corresponding to the outputs of the fifth multiplier 115 and the output signals of the first to third absolute value calculators 131 to 133, respectively. The sum of the multiplied signal and the second coefficient a ₁₂ is output.

The regular expression of the continuous PWL function of the canonical PWL modeling unit shown in FIG. 2 may be expressed as Equation 3 below.

는 n차원 벡터이고, B 는 n X n행렬,

는 스칼라, 그리고 < , >는 벡터의 내적을 나타낸다.here,

Is an n-dimensional vector, B is an n by n matrix,

Is a scalar, and <and> represent the dot product of the vector.

This method requires less memory space for the storage of device parameters because redundant data is not stored and is very efficient in terms of implementation. The parameter update equation of the canonical PWL model shown in Equation 3 is as follows.

이고, μ는 LMS (Least Mean Square) 알고리즘의 스텝사이즈를 나타낸다. d_i와

는 각각 원래의 RF 신호와 모델의 출력 신호를 의미하며, e_i는 d_i와

의 오차를 나타낸다.here,

And μ represents the step size of the Least Mean Square (LMS) algorithm. d _i and

Denotes the original RF signal and the output signal of the model, respectively, and e _i denotes d _i and

Error.

Briefly looking at the operation principle of the Canonical PWL modeling unit, the same input signal is input to the target system HPA and the canonical PWL modeling unit, and the error is obtained by comparing the output signals of the two systems. The error obtained here is applied to the parameter update equation of the canonical PWL model mentioned above and iteratively performed until the error is minimized.

3 is a schematic diagram of a wireless communication device 200 including a digital predistorter using a canonical PWL model according to an embodiment of the present invention. Referring to this, the wireless communication device 200 according to an embodiment of the present invention includes an HPA 210 and a digital predistorter 220.

 The digital predistorter 220 includes a predistortion unit 225, a PWL modeling unit 230, an operator 235, and an inverse calculator 240. Since the PWL modeling unit 230 has the same configuration and operation as the PWL modeling unit 100 illustrated in FIG. 2, a description thereof will be omitted.

The PWL modeling unit 230 models the HPA by estimating the characteristics of the target system HPA. Here, the characteristic of the HPA is referred to as G, and the characteristic modeled by the PWL modeling unit 230 is referred to as G '. The calculator 235 calculates an error signal e (n) by subtracting the output signal y '(n) of the PWL modeling unit 230 from the output signal y (n) of the HPA 210. The error signal e (n) is input to the PWL modeling unit 230.

 The PWL modeling unit 230 uses the error signal e (n) to update the parameters set for the characteristic modeling of the HPA. That is, the PWL modeling unit 230 updates the characteristic estimation parameters of the HPA in the direction of reducing the error signal e (n), so that the characteristic of the HPA estimated by the PWL modeling unit 230 increases as the number of updates increases. It will converge to the characteristics of the actual HPA.

Inverse calculator 240 receives the modeled feature from PWL modeling unit 230 and calculates the inverse of the modeled feature G ′. In other words, the inverse calculator 240 calculates 1 / G '. The predistortion unit 225 has a characteristic of 1 / G 'according to the output of the inverse calculator 240.

The overall operation of the wireless communication device 200 will be described below.

The input signal s (n) may be a random signal. The input signal s (n) is input to the predistortion unit 225, and the signal that has passed through the predistortion unit 225 is input to the HPA 210 and the PWL modeling unit 230.

The input signal x (n) that has passed through the pre-distortion unit 225 may be expressed as shown in Equation 5 below.

In addition, the output signal y (n) of the HPA 210 may be expressed by Equation 6 below.

The calculator 235 calculates an error signal e (n) by subtracting the output signal y '(n) of the PWL modeling unit 230 from the output signal y (n) of the HPA 210.

Here, e (n) may be expressed as follows.

The PWL modeling unit 230 uses the error signal e (n) to update the estimation parameters of the HPA's target system (here HPA 210).

4 is a table illustrating input signals, the number of samples, and initial parameters set for the operation experiment of FIG. 3. That is, in order to realize the apparatus of FIG. 3, two random input signals are generated as in the experimental conditions of the table shown in FIG. 4 to estimate parameters of the target system (ie, HPA 210). At this time, the applied step size is 0.003. As a result of the experiment, it can be seen that initial parameter values of an arbitrarily set canonical PWL model converge to parameter values of the target system (that is, Desired parameters in FIG. 4).

FIG. 5 is a graph illustrating an average of mean square errors (MSEs) between the output signal of the PWL modeling unit and the output signal of the HPA in 100 sample units in the apparatus of FIG. 4.

Referring to this, it can be seen that the MSE decreases as the parameters of the PWL modeling unit are continuously updated. That is, the difference between the output signal of the PWL modeling unit and the output signal of the HPA gradually decreases.

6 is a graph showing an MSE characteristic curve according to step size among experimental conditions. Referring to FIG. 6, the MSE decreases rapidly as the step size increases. However, if the step size is too large, such as 0.0049, it can be seen that it does not converge and diverges as it is. On the other hand, when the step size is too small (e.g., when mu = 0.0001), the rate of decrease of the MSE is slow. Therefore, setting the appropriate step size within the appropriate range is very important.

7 is a schematic diagram of a wireless communication device 300 including a digital predistorter using a canonical PWL model according to another embodiment of the present invention. Referring to this, the wireless communication apparatus 300 according to another embodiment of the present invention includes an HPA 310 and a digital predistorter 320. The digital predistorter 320 according to another embodiment of the present invention uses an indirect learning structure predistortion technique.

The digital predistorter 320 includes a predistortion unit 325, an indirect learning block 330, an estimation algorithm block 340, and an operator 335. In this case, the predistorter 325 and the indirect learning block 330 are nonlinear systems having characteristics opposite to those of the HPA 310, respectively. The final goal of the learning is to obtain parameters of the predistorter that accurately compensate for the nonlinearity. Here, x (t) represents the input signal of the predistorter 325, and v (t) represents the distortion generated in the HPA 310 in the direction opposite to the distortion through the compensation process of the predistorter 325. It was distorted in advance.

Looking at the structure of a digital predistorter based on a canonical PWL model according to another embodiment of the present invention, a signal v (t) passing through the predistorter 325 and a signal w (t) passing through the indirect learning block 330 are described. Updating the coefficients of the indirect learning block 330 using the error signal e (t) of)), the values of v (t) and w (t) are close to each other so that the error signal e (t) converges to zero. Learning is done. As a result, the input signal x (t) and the output signal y (t) of the HPA 310 are approximately equal. The predistorter 325 and the indirect learning block 330 have the same canonical PWL model structure, and when the coefficients of the indirect learning block 330 are updated, the coefficients of the predistorter 325 are automatically updated identically.

Estimation algorithm block 340 uses the error signal e (t) to update parameters indicative of a characteristic (ie, inverse characteristic) as opposed to HPA 310. That is, the estimation algorithm block 340 updates the coefficients of the indirect learning block 330 in the direction of reducing the error signal e (t), so that the HPA estimated by the indirect learning block 330 as the number of updates increases. The inverse of is converged to the inverse of the actual HPA.

8 is a block diagram of an OFDM system according to an embodiment of the present invention. The system of FIG. 8 is an OFDM system for examining the effects of the nonlinear characteristics of the HPA 310 shown in FIG. 7.

In an OFDM system, QPSK, 16-QAM, and 64-QAM modulation schemes are used, and 1024-point IFFT / FFT is used for subcarrier modulation and demodulation.

9 shows constellations of received symbols for QPSK, 16-QAM, and 64-QAM modulation. The graphs on the left show the constellations without a predistorter, and the graph on the right shows the dictionary according to an embodiment of the present invention. It shows the constellation in the case of using a distortion device. As shown in the figure on the left, it can be seen that serious nonlinear distortion occurs when the predistorter is not used. However, looking at the constellation of the predistorter according to the embodiment of the present invention in the same environment, it can be seen that the nonlinear distortion of the SSPA is compensated.

Figure 10 shows the bit error rate according to the signal to noise ratio for QPSK, 16-QAM, 64-QAM modulation. In the case of using the predistorter according to the embodiment of the present invention, in the QPSK modulation, the SNR is improved by about 1 dB when the bit error rate is 10 ⁻⁴ . In the 16-QAM modulation, the SNR is improved by about 2 dB when the bit error rate is 10 ^-5 , and the SNR is improved by about 8 dB when the bit error rate is 10 ^-3 in the 64-QAM modulation. Therefore, the higher the modulation level, the better the bit error rate performance.

11 shows AM-AM conversion characteristic curves for 64-QAM modulation. As can be seen in FIG. 11, it can be observed that nonlinearity is improved when the proposed predistorter is used as compared with the case without the predistorter.

As described above, as a result of the simulation by applying various step sizes to the update equation of the Canonical PWL model, the MSE decreases as the step size increases. However, if the step size is too small or too large, it can be seen that it diverges without being converged. Therefore, the proper step size setting is very important for canonical PWL models. And, to evaluate the performance of the predistorter according to an embodiment of the present invention using a QPSK, 16-QAM, 64-QAM modulation scheme under the AWGN channel, a simulation for an OFDM system implemented with 1024-point FFT / IFFT As a result of the experiment, when the predistorter according to the embodiment of the present invention is used, the error vector size is improved by about 8% or more compared with the case without the predistorter, and has excellent performance in terms of improving bit error rate and nonlinearity. Indicated.

Therefore, according to the canonical PWL model-based digital predistorter of the present invention, it is possible to prevent signal distortion and spectrum spread due to high PAPR of the OFDM signal and nonlinearity of the HPA.

The present invention can be implemented in hardware, software, or a combination thereof.

The present invention can also be embodied as computer readable code on a computer readable recording medium. The computer-readable recording medium includes all kinds of recording devices in which data that can be read by a computer system is stored. Examples of computer-readable recording media include ROM, RAM, CD-ROM, magnetic tape, optical data storage, and the like. The computer readable recording medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion. And functional programs, codes and code segments for implementing the present invention can be easily inferred by programmers in the art to which the present invention belongs.

Although the present invention has been described with reference to one embodiment shown in the drawings, this is merely exemplary, and those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

PWL modeling unit: 100, first layer block: 110,
2nd layer block: 140, multipliers: 111-115,
Summers: 121-123, absolute value calculators 131-133,
Wireless communication device: 200, HPA: 210,
Digital predistorter: 220, predistortion unit: 225,
PWL modeling unit: 230, calculator: 235,
Station calculator: 240, wireless communication device: 300,
HPA: 310, Digital Predistorter: 320,
Predistortion Unit: 325, Indirect Learning Block: 330,
Estimation Algorithm Block: 340, Operator: 335

Claims (8)

In a system comprising a high power amplifier (HPA),
A Piecewise-Linear (PWL) modeling unit for estimating and modeling characteristics of the HPA;
A calculator for calculating an error signal that is a difference between an output signal of the HPA and an output signal of the PWL modeling unit;
An inverse calculator for receiving a modeled characteristic from the PWL modeling unit and calculating an inverse of the modeled characteristic; And
A predistortion unit having an inverse characteristic of the modeled characteristic according to the output of the inverse calculator,
The PWL modeling unit updates the modeled characteristic parameters in a direction of reducing the error signal,
The PWL modeling unit,
PWL modeling function

Model the characteristics of the HPA according to

Is an n-dimensional vector, B is an n by n matrix,

Is a scalar, and <,> is a digital predistorter based on a canonical piecewise-linear model representing the dot product of a vector. In a system comprising a high power amplifier (HPA),
A pre-distortion unit connected to the front end of the HPA;
An indirect learning block modeling an inverse characteristic of the characteristic of the HPA;
A calculator for calculating an error signal that is a difference between an output signal of the predistortion unit and an output signal of the indirect learning block; And
An estimation algorithm block for updating coefficients of the indirect learning block in a direction of reducing the error signal,
And the predistortion unit and the indirect learning block have the same characteristics and have the same canonical PWL model structure. delete delete The method of claim 1, wherein the PWL modeling unit
Update the parameters of the PWL modeling function according to the following parameter update equations,
The parameter update equations

Lt; / RTI &gt;

And, μ is the step size of the LMS (Least Mean Square) algorithm, and d _i

Denotes the original RF signal and the output signal of the model, respectively, and e _i denotes d _i and

Digital predistorter based on a canonical piecewise-linear model of error. The method of claim 5, wherein the step size
Digital predistorter based on a canonical piecewise-linear model that is determined to be greater than 0.0001 and less than 0.004. In a system comprising a high power amplifier (HPA),
A Piecewise-Linear (PWL) modeling unit for estimating and modeling characteristics of the HPA;
A calculator for calculating an error signal that is a difference between an output signal of the HPA and an output signal of the PWL modeling unit;
An inverse calculator for receiving a modeled characteristic from the PWL modeling unit and calculating an inverse of the modeled characteristic; And
A predistortion unit having an inverse characteristic of the modeled characteristic according to the output of the inverse calculator,
The PWL modeling unit updates the modeled characteristic parameters in a direction of reducing the error signal,
The PWL modeling unit
First to fifth multipliers, each of which calculates a corresponding vector product coefficient and a vector product of the input signal;
First to third adders, each subtracting a corresponding beta coefficient at the output of the second to fourth multipliers;
First to third absolute value calculators, each of which calculates an absolute value of an output of a corresponding summer among the first to third summers;
A fourth summer that adds an output of the first multiplier, a signal multiplied by a multiplication coefficient corresponding to the output signals of the first to third absolute value calculators, and a first coefficient; And
A canonical piecewise-linear comprising a fifth adder for adding an output of the fifth multiplier, a signal multiplied with a multiplication coefficient corresponding to the output signals of the first to third absolute value calculators, and a second coefficient, respectively; Model-based digital predistorter. A wireless communication system comprising the digital predistorter of claim 1.

Images