KR101474259B1 - Display device including a process key and method thereof - Google Patents

Abstract

The present invention relates to a display device, and more particularly, to a display device including a process key capable of improving process defects due to misalignment during a photoalignment process, and a photoeliner method thereof.

The display device according to the present invention is made of an opaque conductive material which is divided into a display area for realizing an image on an exposure chuck and a non-display area excluding the display area, and an inspection area is defined in a dummy area on one side of the non- A photoalignment process for aligning a substrate with a mask, comprising: forming a buffer layer made of a resin material on the substrate; A plurality of process keys spaced apart from each other corresponding to the inspection area on the buffer layer; An insulating film covering an upper portion of the plurality of process keys; And a semiconductor material layer on the insulating film.

The above-described structure is advantageous in that the buffer layer made of resin capable of absorbing light on the substrate can prevent the noise defect due to the scratch of the substrate during the alignment process using the process key or interference with the foreign substance, Can be precisely controlled.

Description

[0001] The present invention relates to a display device including a process key,

The present invention relates to a display device, and more particularly, to a display device including a process key capable of improving process defects due to misalignment during a photoalignment process, and a photoeliner method thereof.

2. Description of the Related Art In general, a liquid crystal display, a plasma display, and an organic electric field display have become mainstream in display devices. However, recently, various types of display devices have been introduced to meet the rapidly diversifying consumer needs.

Especially, it is accelerating the implementation of lightweight, thin, high efficiency, and full color video by enhancing the information utilization environment and portability. As a result, studies on electrophoretic display devices that merely combine the merits of paper and conventional display devices have been actively conducted.

The electrophoretic display device is attracting attention as a next generation display device having paper texture due to its excellent contrast ratio, visibility, fast response speed, natural color display, low cost and easy portability.

Hereinafter, a conventional electrophoretic display device will be described with reference to the accompanying drawings.

FIG. 1 is a view for explaining a driving principle of an electrophoretic display device, and will be described with reference to FIG.

As shown in the figure, a conventional electrophoretic display device 1 includes first and second substrates 5 and 10, and an ink layer 15 interposed between the first and second substrates 5 and 10 . The ink layer 15 includes a plurality of capsules 80 filled with a plurality of black pigments 82 and white pigments 84 charged through a condensation polymerization reaction.

A plurality of pixel electrodes 70 connected to a plurality of thin film transistors (not shown) are patterned for each pixel region (not shown) on the second substrate 10. That is, the plurality of pixel electrodes 70 are selectively applied with (+) polarity or (-) polarity, respectively.

When the sizes of the capsules 80 including the black pigment 82 and the white pigment 84 are not constant, only the capsules 80 of a certain size can be selectively used. When a voltage having a positive polarity or a negative polarity is applied to the ink layer 15 as described above, the charged black pigment and white pigment 82 and 84 in the capsule 80 are attracted toward the opposite polarity .

That is, when the black pigment 82 moves upward, black is displayed, and when the white pigment 84 moves upward, white is displayed.

Hereinafter, a conventional electrophoretic display device will be described in detail with reference to the accompanying drawings.

2 is a cross-sectional view schematically showing a conventional electrophoretic display device.

As shown in the figure, the electrophoretic display device 100 according to the related art includes first and second substrates 105 and 110 which are bonded to each other and are separated into a display region for realizing an image and a non-display region except for the display region, And an ink layer 115 interposed between the first and second substrates 105 and 110. The ink layer 115 includes first and second plastic sheets 175 and 176 made of a transparent material corresponding to the opposing surfaces and a condensation polymerization reaction between the first and second plastic sheets 175 and 176 And a plurality of capsules 180 filled with a plurality of black pigments 182 and a white pigment 184 that are charged through the black pigment 182. Generally, the black pigment 182 is charged to (+) polarity and the white pigment 84 is charged to (-) polarity, respectively.

At this time, the first substrate 105 may be made of a transparent plastic material, and the first substrate 105 may be omitted. The second substrate 110 may be made of a transparent material such as glass or plastic, or an opaque conductive material such as stainless or chromium may be used.

The second substrate 110 is divided into a pixel region P and a switching region T. A thin film transistor T is formed corresponding to the switching region S on the second substrate 110. The thin film transistor T includes a gate electrode 125 extending from a gate wiring (not shown) formed in one direction, a gate insulating film 145 covering the gate electrode 125, A data line 130 which is located on the semiconductor layer 142 and which defines the pixel region P in a direction perpendicular to the gate line and which overlaps with the gate electrode 125; A source electrode 132 extending from the source electrode 130 and a drain electrode 134 spaced apart from the source electrode 132.

The gate electrode 125 and the source electrode 132 and the drain electrode 134 may be formed using an opaque conductive metal material containing copper (Cu), aluminum (Al), and aluminum alloy (AlNd) have. The semiconductor layer 142 includes an active layer 140 made of pure amorphous silicon (a-Si: H) and an ohmic contact layer 141 made of amorphous silicon (n + a-Si: H) do. Although not shown in the drawings, the semiconductor layer 142 may be formed using crystalline silicon.

A protective film 155 is formed on the upper surface of the thin film transistor T by a selected one of an organic insulating material group including benzocyclobutene and photoacryl and a drain contact hole CH1 for exposing the drain electrode 134 do. A pixel electrode 170 which is in contact with the drain electrode 134 through the drain contact hole CH1 is formed on the passivation layer 155 in a plate-like pattern corresponding to the pixel region P.

The common electrode 190 is formed of a transparent conductive material group including indium-tin-oxide (ITO) and indium-zinc-oxide (IZO) on the lower surface of the first substrate 105.

The electrophoretic display device 150 having the above-described configuration uses external light including natural light or room light as a light source, and a (+) polarity or a (-) polarity by a thin film transistor T serving as a switching The pixel electrode 170 selectively applied thereto induces a change in the positions of the black pigment 182 and the white pigment 184 filled in the capsule 180 to realize an image.

That is, when the thin film transistor T is selectively controlled so that the pixel electrode 170 has a (+) polarity or a (-) polarity, the external light EL incident on the upper portion of the first substrate 110 After passing through the first substrate 105, the reflected light RL reflected by the black pigment 182 or the white pigment 184 drawn upward or downward by the pixel electrode 170 passes through the first substrate 105 So that the image can be implemented.

A gate wiring and a gate electrode 125, a semiconductor layer 142, source and drain electrodes 132 and 134 (hereinafter, referred to as " first substrate ") are formed on a second substrate (hereinafter abbreviated as substrate) of the electrophoretic display device 100 having the above- ) Between the pixel electrodes 170 and the pixel electrodes 170. In order to prevent mis-alignment between the pixel electrodes 170 and the pixel electrodes 170 before the exposure process, A plurality of process keys (not shown) are formed so that the inspection area can be designed in the dummy area so that the process control can be precisely performed, and a plurality of process keys and masks And then the exposure process is performed.

The photoelaine using the plurality of process keys will be described in detail with reference to the accompanying drawings.

FIG. 3 is a view for explaining a photo aligner using a process key according to the first example of the related art. The same reference numerals are given to the same names as in FIG.

As shown in the figure, a second substrate 110 (hereinafter abbreviated as a substrate) on which an inspection area DA is defined is located on a dummy portion on one side of a non-display area that does not implement an image on the exposure chuck 175. The substrate 110 is made of transparent glass or plastic.

A plurality of process keys (not shown) spaced apart from each other by the same material in the same layer as a gate wiring or a data wiring (not shown) corresponding to a display region (not shown) A gate insulating layer 145 formed on the plurality of process keys 160 and formed of one selected from the group of inorganic insulating materials including silicon oxide (SiO ₂ ) and silicon nitride (SiNx) 145 are stacked in this order on the upper surface of the semiconductor material layer 142a.

The semiconductor material layer 142a may be a single layer of polysilicon or a bilayer of pure amorphous silicon (a-Si: H) and amorphous silicon (n + a-Si: Lt; / RTI > Although not shown in detail, a photosensitive layer (not shown) coated with a photoresist is further formed on the upper surface of the semiconductor material layer 142a.

A mask (not shown) consisting of a transmitting portion and a blocking portion is disposed on an upper portion of the substrate 110 separated from the photosensitive layer. The shielding portion functions to completely block light, and the transmissive portion transmits light to chemically change the photosensitive layer exposed to light to function as a complete exposure.

A plurality of process keys 160 are irradiated with light irradiated from the exposing device corresponding to the inspection area DA on one side spaced apart from the exposure device, (Not shown) for detecting the reflected light.

Generally, the exposure chuck 175 is made of an anti-reflection treated ceramic material capable of absorbing all of the light emitted from the exposing machine, and is a part except for the plurality of process keys 160 The irradiated light is all absorbed by the exposure chuck 175.

Accordingly, the photo-alignment process of aligning the substrate 110 and the mask in a predetermined position is performed by recognizing the re-reflected light by the plurality of process keys 160 as inspection equipment. That is, in the photo-alignment process, only the light reflected by the plurality of process keys 160 is recognized and detected by the inspection equipment, thereby accurately aligning the substrate 110 and the mask through the plurality of process keys 160 Process.

When the substrate 110 and the mask are aligned through the photo-alignment process, a plurality of gate electrodes (also referred to as " masks ") corresponding to the display region are formed through an exposure process using an exposure apparatus, a development process using a developer, A plurality of semiconductor layers (142 in FIG. 2) and a plurality of semiconductor patterns (not shown) are formed on the overlapped upper portions and the plurality of process keys 160, respectively, That is, the photoalignment process using the plurality of process keys 160 described above is repeatedly performed in each step of forming the wirings and the electrodes on the substrate 110 in order.

However, in the case of the electrophoretic display device 150 and the substrate 110 having the warping characteristics such as the flexible display device, the trend of fabricating the substrate 110 with a selected one of opaque conductive material groups including stainless steel and chromium However, in the case of the substrate 110 made of such a metal material, when a scratch or foreign matter existing in the substrate 110 itself is subjected to a photoalignment process, it causes an interference effect to cause a problem of generating misalignment have.

This will be described in detail with reference to the accompanying drawings.

FIG. 4A is a view for explaining a photo aligner using a process key according to a second conventional example, FIG. 4B is an enlarged plan view of a portion corresponding to the inspection region of FIG. 4A, The same reference numerals are used, and redundant descriptions are omitted.

As shown in FIGS. 4A and 4B, a substrate 110 made of a selected one of opaque conductive material groups including stainless (SUS) or chromium (Cr) is used for planarization because its exposed surface is irregular The buffer layer 112 is formed on the upper surface of the substrate 110. The buffer layer 112 is selected from the group of photo-acrylic organic insulating materials and has a thickness of about 1.5 mu m.

A plurality of process keys 160 and a gate insulating layer 145 covering the upper portion of the plurality of process keys 160 and a plurality of process keys 160 formed on the upper surface of the gate insulating layer 145 And a photosensitive layer (not shown) covering the upper portion of the semiconductor material layer 142a are stacked in this order.

At this time, a mask consisting of a transmitting portion and a blocking portion is disposed on an upper portion apart from the substrate 110 on which the photosensitive layer is formed. The mask is spaced apart from the exposure unit, and the inspection equipment is located on one side of the exposure unit.

However, in the case of the substrate 110 made of the opaque conductive metal material, the scratch 162 or the foreign substance 164 present on the substrate 110 itself acts as noise causing an interference effect during the photoalignment process The process yield is remarkably lowered due to occurrence of misalignment in which the inspection equipment proceeds to the exposure process in a state in which the position of the plurality of process keys 160 is not accurately recognized.

The light emitted from the exposure device is not absorbed by the exposure chuck 175 located below the substrate 110 but is partially absorbed or scattered by the substrate 110 made of an opaque conductive material, The remaining light causes a result of being retroreflected, so that it is difficult to proceed with the photo-alignment process using a plurality of process keys 160. [

Further, in the above-described configuration, the buffer layer 112 made of a material of a photo acrylic series I have a dielectric constant of 10, ⁸ or so, such a buffer layer 112, a plurality of process patterns 160 corresponding to the display area (not shown) And the substrate 110 made of a conductive material, thereby generating a parasitic capacitance. The parasitic capacitance causes a detrimental effect on the driving characteristics of the thin film transistor due to the parasitic capacitance. .

SUMMARY OF THE INVENTION The present invention has been made in order to solve the above-mentioned problems, and it is an object of the present invention to provide a display device using a substrate made of an opaque conductive material for the purpose of preventing process defects due to misalignment between photoelain processes, do.

According to an aspect of the present invention, there is provided a display device including a process key, the display device including a display area for displaying an image on an exposure chuck and a non-display area excluding the display area, 1. A photoalignment process for aligning a substrate made of an opaque conductive material, the region of which is defined by a transparent conductive material, with a mask, comprising: a buffer layer made of a resin-based material on the substrate; A plurality of process keys spaced apart from each other corresponding to the inspection area on the buffer layer; An insulating film covering an upper portion of the plurality of process keys; And a semiconductor material layer on the insulating film.

An interlayer insulating film is formed in a space between the buffer layer and the plurality of process keys by a selected one of an inorganic insulating material and an organic insulating material group. Wherein the buffer layer is formed of one selected from the group of materials of resin series including red, green, blue and black.

The buffer layer is formed to a thickness of 1.5 to 2.5 탆 and has a dielectric constant of 10 ¹² to 10 ²⁰ .

The plurality of process keys are formed of the same material as the gate wiring or the data wiring. Wherein the substrate is formed of a selected one of a conductive material group including SUS and chromium.

According to an aspect of the present invention, there is provided a photo-alignment method for a display device including a process key, the method comprising: forming a photosensitive layer covering an upper portion of a semiconductor material layer; Disposing an inspection apparatus on one side of the mask, the mask being spaced apart from the photosensitive layer; Irradiating the substrate corresponding to the inspection region with a light source from an exposure device located at an upper portion spaced apart from the mask; Wherein light irradiated to a portion excluding the plurality of process keys corresponding to the inspection region is absorbed in the buffer layer and only the light reflected by the plurality of process keys is detected by the inspection equipment to align the substrate and the mask The method comprising the steps of:

In the present invention, first, a buffer layer made of a resin-based material capable of absorbing light is formed on a substrate made of an opaque conductive material, so that scratches or interference effects due to foreign substances can be eliminated, Can be carried out.

Secondly, the influence of parasitic capacitance between the substrate and the array element can be minimized by forming a buffer layer made of a resin-based material having a dielectric constant of 10 ¹² to 10 ²⁰ on a substrate made of an opaque conductive material.

--- Example ---

Disclosed is a display device including a substrate made of an opaque conductive material. The display device absorbs light on a substrate so as to prevent a noise defect due to scratches or interference with a foreign substance during an alignment process using a process key And a buffer layer made of resin is formed.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

5A and 5B are plan views schematically showing an array mother substrate for a display device including a plurality of process keys, and a mother substrate capable of manufacturing two display devices will be described as an example.

5A and 5B, an array mother array substrate 210a for a display device including a plurality of process keys according to the present invention includes a display area AA for implementing an image and a non-display area NAA excluding the display area AA, . A plurality of inspection areas DA are located in a dummy portion on one side of the non-display area NAA.

At this time, a plurality of process keys 260 are formed in the plurality of inspection areas DA, and the photoalignment process is performed using the plurality of process keys 260.

In the photoeliner process, the number of process keys 260 and the design position may vary depending on the type of the exposure apparatus. That is, as shown in FIG. 5A, in the case of a mother board 210a in which a plurality of process keys 260 can be manufactured in six parts per one display device, that is, two display devices, a process key 260 As shown in FIG. 5B, a plurality of process keys 260 may be formed at each of four portions corresponding to the corners of the four edges, one for each display device . Accordingly, the process key 260 can be variously changed depending on the process conditions and the design position.

FIG. 6 is a view for explaining the alignment method using the process key according to the present invention, and FIG. 7 is an enlarged plan view showing a portion corresponding to the inspection area in FIG.

6, a substrate 210 composed of a selected one of opaque conductive material groups including SUS (stainless) and chromium (Cr) is formed on the upper portion of the exposure chuck 275, A buffer layer 212 covering an upper surface of the substrate 210 for planarization, an interlayer insulating layer 214 covering an upper portion of the buffer layer 212, and a non-display region 214 not forming an image on the interlayer insulating layer 214. [ A plurality of process keys 260 corresponding to the inspection area DA located in one side dummy portion of the plurality of process keys 260 (NAA of FIGS. 5A and 5B), a gate insulating film 245 covering the upper portions of the plurality of process keys 260, And a semiconductor material layer 242a on the gate insulating film 245 are stacked in this order.

The exposure chuck 275 may be selected from an anti-reflect treated ceramic material capable of absorbing all the light emitted from an exposure device (not shown).

In particular, the present invention is characterized in that a buffer layer 212 is formed on a substrate 210 made of a group of opaque conductive materials and capable of absorbing light. Examples of such materials include red, green, blue and black For example, a resin series containing at least one resin.

The buffer layer 212 and 1.5μm ~ 2.5μm, preferably formed of 2.0μm so as to ensure the insulating property of the gate wiring or the data wiring is formed in the display area, mixed to have a dielectric constant of 10 ~ ¹² 10 ²⁰ It is preferable to use a material of the resin series.

The interlayer insulating film 214 is formed for reliability of the array elements and for planarization of the buffer layer 212, and can be omitted if necessary. The interlayer insulating layer 214 may be formed of an inorganic insulating material containing silicon oxide (SiO ₂ ) and silicon nitride (SiN x) or an organic insulating material group including benzocyclobutene or photo acryl do.

At this time, the semiconductor material layer 242a may be formed of a single layer made of polysilicon or a layer made of pure amorphous silicon (a-Si: H) and an impurity-containing amorphous silicon (n + a-Si: It can be composed of two layers. Although not shown in detail in the drawings, the upper surface of the semiconductor material layer 242a further includes a photosensitive layer (not shown) coated with a photoresist.

A mask consisting of a transmissive portion and a shielding portion is located at an upper portion spaced apart from the substrate 210 on which the photosensitive layer is formed. The blocking portion functions to completely block light, and the transmissive portion transmits light to chemically change the photosensitive layer exposed to light to function as a complete exposure.

A plurality of process keys 160 are irradiated with a light source from the exposure device corresponding to the inspection area DA on one side spaced apart from the exposure device, (Not shown) for detecting the light to be detected.

The light reflected by the plurality of process keys 260 is recognized as an inspection device, and a photo aligning process for aligning the substrate 210 and the mask in a predetermined position is performed.

At this time, in the present invention, when a plurality of process keys 260 are irradiated with a light source from the exposure machine, the light irradiated to the portion F excluding the plurality of process keys 260 is all absorbed by the buffer layer 212 And the light G irradiated to the plurality of process keys 260 is reflected again so that only the light H reflected by the plurality of process keys 260 is recognized and detected by the inspection equipment It becomes possible to precisely control the photo-alignment process.

That is, when the buffer layer 212 is formed of a resin-based material capable of absorbing light as in the present invention, there is no reflection of light at portions except for the plurality of process keys 260 during the photoelayer process, Even if a scratch or foreign matter is present on the substrate 210, the substrate 210 can be absorbed through the buffer layer 212 covering the upper portion of the substrate 210, so that no noise due to the interference effect is generated, and the precise alignment process can be performed.

When the substrate 210 and the mask are aligned through the photo-alignment process, a plurality of gate electrodes corresponding to the display region are formed through an exposure process using an exposure device, a development process using a developer, and an etching process using an etchant, A plurality of semiconductor layers (not shown) and a plurality of semiconductor patterns (not shown) are formed on the overlapped upper portion and the plurality of process keys 260, respectively. That is, the photoalignment process using the plurality of process keys 260 described above is repeatedly performed on the substrate 210 every step of forming the wirings and the electrodes in turn.

In addition, when the buffer layer 212 is formed of a resin material having a dielectric constant of 10 ¹² to 10 ²⁰ as in the present invention, the influence of parasitic capacitance between the gate wiring or the data wiring and the substrate 210 can be minimized .

Therefore, even if the substrate 210 made of an opaque conductive material is used, since the buffer layer 212 is formed of a resin-based material capable of absorbing light on the substrate 210, accurate photo- As a result, it becomes possible to improve the production yield by minimizing the process failure by the misalignment.

Although the electrophoretic display device has been consistently described in the present invention, the present invention is merely illustrative and can be applied to most display devices to which a substrate made of an opaque conductive material is applied.

Accordingly, it is to be understood that the present invention is not limited to the above-described embodiment, and that various changes and modifications can be made without departing from the spirit and scope of the present invention.

1 is a view for explaining a driving principle of an electrophoretic display device;

2 is a cross-sectional view schematically showing a conventional electrophoretic display device.

3 is a view for explaining a photo aligner using a process key according to a first conventional example;

FIG. 4A is a view for explaining a photo aligner using a process key according to a second conventional example; FIG.

4B is an enlarged plan view of a portion corresponding to the inspection region of FIG. 4A; FIG.

Figures 5a and 5b are top views schematically showing an array mother substrate for a display device comprising a plurality of process keys.

6 is a view for explaining an alignment method using a process key according to the present invention;

FIG. 7 is an enlarged plan view of a portion corresponding to the inspection region of FIG. 6; FIG.

Description of the Related Art [0002]

210: substrate 212: buffer layer

214: interlayer insulating film 242a: semiconductor material layer

245: gate insulating film 260: process key

275: Exposure Chuck

Claims (8)

A photoelectric conversion device for aligning a substrate made of an opaque conductive material, which is divided into a display region for realizing an image on an exposure chuck and a non-display region excluding the display region, and an inspection region is defined in one dummy portion of the non- In carrying out the phosphorus process, A buffer layer made of a resin-based material on the substrate; A plurality of process keys spaced apart from each other corresponding to the inspection area on the buffer layer; An insulating film covering an upper portion of the plurality of process keys; The semiconductor material layer / RTI > Wherein the buffer layer is formed of a material selected from the group consisting of red, green, blue and black. The method according to claim 1, Wherein an interlayer insulating film is formed in a space between the buffer layer and the plurality of process keys by a selected one of an inorganic insulating material and an organic insulating material group. delete The method according to claim 1, Wherein the buffer layer is formed to a thickness of 1.5 to 2.5 占 퐉. The method according to claim 1, Wherein the buffer layer has a dielectric constant of 10 ¹² to 10 ²⁰ . The method according to claim 1, Wherein the plurality of process keys are formed of the same material as the gate wiring or the data wiring. The method according to claim 1, Wherein the substrate is formed of a selected one of a group of conductive materials including SUS and chromium. A photoalignment method using an exposure apparatus and an inspection apparatus for manufacturing a display device according to claim 1, Forming a photosensitive layer covering an upper portion of the semiconductor material layer; Disposing an inspection apparatus on one side of the mask, the mask being spaced apart from the photosensitive layer; Irradiating the substrate corresponding to the inspection region with a light source from an exposure device located at an upper portion spaced apart from the mask; The light irradiated to the portion excluding the plurality of process keys corresponding to the inspection region is all absorbed in the buffer layer and only the light reflected by the plurality of process keys is detected by the inspection equipment to align the substrate and the mask step And a photolithography method using the inspection equipment.

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