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KR101728550B1 - Circuit for reducing electromagnetic interference noise - Google Patents

Circuit for reducing electromagnetic interference noise Download PDF

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KR101728550B1
KR101728550B1 KR1020100119107A KR20100119107A KR101728550B1 KR 101728550 B1 KR101728550 B1 KR 101728550B1 KR 1020100119107 A KR1020100119107 A KR 1020100119107A KR 20100119107 A KR20100119107 A KR 20100119107A KR 101728550 B1 KR101728550 B1 KR 101728550B1
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noise
emi
present
circuit
noise reduction
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KR20120057401A (en
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이진섭
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엘지이노텍 주식회사
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Priority to EP20110190525 priority patent/EP2458738A1/en
Priority to CN201110382050.7A priority patent/CN102545583B/en
Priority to US13/305,107 priority patent/US9203410B2/en
Priority to JP2011259416A priority patent/JP5917898B2/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents

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Abstract

본 발명은 전자기간섭(EMI) 노이즈 저감회로에 관한 것이다. 드라이버 집적회로(IC)의 적어도 하나 이상의 출력단으로 유입되는 EMI 노이즈를 저감하기 위한, 본 발명의 EMI 노이즈 저감회로는, 상기 적어도 하나 이상의 출력단 각각과 상기 드라이브IC 사이에 직렬로 배치되는 적어도 하나 이상의 저항을 포함한다.
본 발명에 의하면, 고주파 대역(30MHz~108MHz) 대역에서 전체적인 노이즈 레벨을 낮추고, 노이즈로 인한 신호의 마진을 충분히 확보할 수 있다.The present invention relates to an electromagnetic interference (EMI) noise reduction circuit. An EMI noise reduction circuit of the present invention for reducing EMI noise introduced into at least one output end of a driver integrated circuit (IC) includes at least one or more resistors arranged in series between each of the at least one output end and the drive IC .
According to the present invention, the overall noise level can be lowered in the high frequency band (30 MHz to 108 MHz), and the margin of the signal due to the noise can be sufficiently secured.

Description

전자기간섭 노이즈 저감회로{CIRCUIT FOR REDUCING ELECTROMAGNETIC INTERFERENCE NOISE}TECHNICAL FIELD [0001] The present invention relates to a CIRCUIT FOR REDUCING ELECTROMAGNETIC INTERFERENCE NOISE,

본 발명은 노이즈 저감회로에 관한 것으로, 보다 구체적으로는 자동차에서 헤드램프 내의 액츄에이터(actuator)를 구동하는 드라이버집적회로(Intergrated Circuit; IC)의 전원부 등에 사용하기 위한 전자기간섭(ElectroMagnetic Interference; EMI) 노이즈 저감용 전원회로에 관한 것이다.
BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a noise reduction circuit, and more particularly to a noise reduction circuit for reducing electromagnetic interference (EMI) noise for use in a power source of a driver integrated circuit (IC) To a power supply circuit for reducing power consumption.

EMI 문제는, 전자제품의 동작주파수가 높아지면서 고질적인 노이즈 문제로 인식되어 왔다. 특히, 최근 들어 전자제품의 동작주파수가 수십MHz~수GHz 대역으로 되면서 이러한 EMI 문제는 더욱 심각해져서 해결책이 절실히 필요한 상황이다. EMI 노이즈는 어느 하나의 전자회로, 소자, 부품 등에서 발생한 전자기파(EM wave)가 다른 회로, 소자, 부품 등으로 전달됨으로써 간섭에 의한 노이즈 문제를 발생시키는 원인이 되는 노이즈를 말한다.
The EMI problem has been recognized as an inherent noise problem as the operating frequency of an electronic device increases. Especially, recently, as the operating frequency of electronic products is in the range of tens MHz to several GHz, the EMI problem becomes more serious and a solution is urgently needed. EMI noise refers to noise that causes electromagnetic waves (electromagnetic waves) generated in any one of electronic circuits, elements, and components to be transmitted to other circuits, elements, components, and the like, thereby causing a noise problem due to interference.

도 1은 종래 액츄에이터를 구동하기 위한 드라이브IC와 그에 전원을 공급하기 위한 전원부 및 그 출력부의 회로도이다.1 is a circuit diagram of a conventional drive IC for driving an actuator, a power supply for supplying power to the drive IC, and an output portion thereof.

도면에 도시된 바와 같이, 드라이브IC(30)에 전원을 공급하기 위한 전원부(10)는, 다수의 디커플링 용도의 캐패시터 C1 내지 C4가 DC 입력부(11)와 접지부 사이에 연결되어 있다. 위 디커플링을 위한 캐패시터 C1 내지 C4는, DC 입력부(11)로부터 공급되는 전류에 발생하는 저주파 또는 고주파 교류성분을 충전 및 방전하는 기능을 담당하는 것이다. As shown in the figure, in the power supply unit 10 for supplying power to the drive IC 30, a plurality of decoupling capacitors C1 to C4 are connected between the DC input unit 11 and the grounding unit. The capacitors C1 to C4 for upper decoupling are responsible for charging and discharging low-frequency or high-frequency AC components generated in the current supplied from the DC input unit 11. [

드라이브IC(30)의 출력단은 도 1의 A 부분으로, 전원부(10)로부터 입력되는 신호가 드라이브IC(30)를 거쳐 A 부분으로 출력하게 된다. The output terminal of the drive IC 30 is part A in FIG. 1, and a signal input from the power supply section 10 is outputted to the A section through the drive IC 30.

그러나, 위와 같은 구성을 가지는 드라이브IC(30)는, 액츄에이터에서 출력단 A로 펄스폭 변조(pulse width modulation; PWM) 노이즈 및 캐패시터 용량으로 인한 저주파 대역의 노이즈가 유입되는 문제점이 있다.
However, the drive IC 30 having the above-described configuration has a problem that a low frequency band noise due to the pulse width modulation (PWM) noise and the capacitor capacity flows from the actuator to the output terminal A.

본 발명은 상기한 바와 같은 문제점을 해결하기 위하여 제안된 것으로, 드라이버IC의 출력단에 저항을 직렬로 각각 배치하여, 드라이버IC의 출력회로의 EMI 노이즈를 저감하기 위한, EMI 노이즈 저감용 전원회로를 제공하는데 그 목적이 있다.
SUMMARY OF THE INVENTION The present invention has been proposed in order to solve the problems described above and provides a power supply circuit for EMI noise reduction for reducing EMI noise of an output circuit of a driver IC by arranging resistors in series at output ends of the driver ICs It has its purpose.

상기와 같은 목적을 달성하기 위한, 드라이버 집적회로(IC)의 적어도 하나 이상의 출력단으로 유입되는 전자기간섭(EMI) 노이즈를 저감하기 위한, 본 발명의 EMI 노이즈 저감회로는, 상기 적어도 하나 이상의 출력단 각각과 상기 드라이브IC 사이에 직렬로 배치되는 적어도 하나 이상의 저항을 포함하는 것을 특징으로 한다.In order to achieve the above object, an EMI noise reduction circuit of the present invention for reducing electromagnetic interference (EMI) noise introduced into at least one output terminal of a driver integrated circuit (IC) And at least one resistor arranged in series between the drive ICs.

본 발명의 EMI 노이즈 저감회로에서, 상기 적어도 하나 이상의 저항은, 각각 실질적으로 20Ω의 값을 가지는 것이 바람직하다.In the EMI noise reduction circuit of the present invention, it is preferable that each of the at least one resistance has a value of substantially 20?.

또한, 본 발명의 EMI 노이즈 저감회로에서, 상기 적어도 하나 이상의 저항은, 각각 실질적으로 36Ω의 값을 가지는 것이 바람직하다.
In the EMI noise reduction circuit of the present invention, it is preferable that each of the at least one resistance has a value of substantially 36?.

상기와 같은 본 발명은, 출력단에 각각 저항을 직렬연결함으로써, 고주파 대역(30MHz~108MHz) 대역에서 전체적인 노이즈 레벨을 낮추고, 노이즈로 인한 신호의 마진을 충분히 확보할 수 있도록 하는 효과가 있다.
The present invention as described above has an effect of lowering the overall noise level in a high frequency band (30 MHz to 108 MHz) and sufficiently ensuring a margin of a signal due to noise by connecting resistors in series to the output terminals.

도 1은 종래 액츄에이터를 구동하기 위한 드라이브IC와 그에 전원을 공급하기 위한 전원부 및 그 출력부의 회로도이다.
도 2는 본 발명의 일실시예 따른 EMI 노이즈 저감회로도이다.
도 3은 도 1의 회로의 출력 노이즈를 측정한 것이다.
도 4는 본 발명의 EMI 노이즈 저감회로를 부착한 도 2의 회로의 출력 노이즈를 측정한 일예시도이다.1 is a circuit diagram of a conventional drive IC for driving an actuator, a power supply for supplying power to the drive IC, and an output portion thereof.
2 is an EMI noise reduction circuit diagram according to an embodiment of the present invention.
FIG. 3 is a graph showing the output noise of the circuit of FIG. 1; FIG.
Fig. 4 is an example of measurement of output noise of the circuit of Fig. 2 with the EMI noise reduction circuit of the present invention.

본 설명에서, 어떤 구성요소가 다른 구성요소에 '연결되어' 있다거나, 또는 '접속되어' 있다고 언급된 때에는, 그 다른 구성요소에 직접적으로 연결되어 있거나 또는 접속되어 있을 수도 있지만, 중간에 다른 구성요소가 존재할 수도 있다고 이해되어야 할 것이다. 반면에, 어떤 구성요소가 다른 구성요소에 '직접 연결되어' 있다거나, '직접 접속되어' 있다고 언급된 때에는, 중간에 다른 구성요소가 존재하지 않는 것으로 이해되어야 할 것이다.In the present description, when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, It should be understood that the element may also be present. On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between.

이하, 첨부된 도면을 참조하여 본 발명에 따른 바람직한 일실시예를 상세히 설명한다.Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

도 2는 본 발명의 일실시예 따른 EMI 노이즈 저감회로도이다.2 is an EMI noise reduction circuit diagram according to an embodiment of the present invention.

도면에 도시된 바와 같이, 본 발명의 EMI 노이즈 저감회로는, 전원부(10)와, 출력단 A에 연결되는 저항부(20) 및 드라이브IC(30)를 포함하여 구성된다. 저항부(20)는, 출력단의 각 포트마다 저항을 연결한 것으로서, 각 저항은 출력단 A의 각각의 포트에 직렬로 연결되어 있다.As shown in the figure, the EMI noise reduction circuit of the present invention comprises a power supply unit 10, a resistance unit 20 connected to the output terminal A, and a drive IC 30. [ The resistor section 20 is formed by connecting a resistor to each port of the output stage, and each resistor is connected in series to each port of the output terminal A.

저항부(20)의 각 저항 R1 내지 R4는, 바람직하게는 각각 36Ω일 수 있으며, 20Ω일 수도 있다. 또한, 모두 동일한 값을 가질 수 있으며, 각각 다른 값을 가질 수도 있다. 다만 이는 바람직한 일실시예로서, 본 발명이 이 숫자에 한정되는 것은 아니다. 또한, 출력단의 수는 본 발명의 설명에서는 4개로 한정하였으나, 이에 한정되는 것은 아니다. 따라서, 출력단에 연결되는 저항의 수 또한 본 발명의 수인 4개에 한정되는 것이 아니다.Resistances R1 to R4 of the resistor portion 20 may preferably be 36? And 20?, Respectively. Further, they may all have the same value, or may have different values. However, this is a preferred embodiment, and the present invention is not limited to this number. The number of output stages is limited to four in the description of the present invention, but the present invention is not limited thereto. Therefore, the number of resistors connected to the output terminal is not limited to four, which is the number of the present invention.

위와 같이 구성되는 본 발명의 EMI 노이즈 저감회로에 의해, 출력단 A를 통해 유입되는 노이즈를 차단할 수 있다.
With the above-described EMI noise reduction circuit of the present invention, the noise introduced through the output terminal A can be cut off.

도 3은 도 1의 회로의 출력 노이즈를 측정한 것이다.FIG. 3 is a graph showing the output noise of the circuit of FIG. 1; FIG.

도면에 도시된 바와 같이, 전체적으로 노이즈가 많고, 일부 대역에서 리미트오버(limit over)가 발생하는 것을 확인할 수 있다. 도 3에서, 붉은색 선은 해당 대역에서의 피크값에 대한 리미트라인(limit line)이며, 분홍색 선은 해당 대역에서의 평균값(average)에 대한 리미트라인이다. 이때, 피크값에 대한 리미트라인에서 피크값을 뺀 값을 '마진(margin)'이라 하는데, 도 3에서는 리미트라인보다 피크값보다 커서 리미트오버가 발생하는 주파수 대역이 존재하며, 이는 심각한 EMI 노이즈에 해당하는 것이다. 또한, 전체적인 대역에서 일반적인 기준의 마진에 대한 확보가 이루어지지 않게 된다.As shown in the figure, it can be seen that there is a large amount of noise as a whole and a limit over occurs in some bands. In Figure 3, the red line is the limit line for the peak value in the band and the pink line is the limit line for the average in that band. In this case, a value obtained by subtracting the peak value from the limit line with respect to the peak value is referred to as a margin. In FIG. 3, there is a frequency band in which a limit over is larger than a peak value, It is applicable. In addition, the general margin of the reference is not secured in the whole band.

도 4는 본 발명의 EMI 노이즈 저감회로를 부착한 도 2의 회로의 출력 노이즈를 측정한 일예시도로서, 저항부(20)의 저항을 20Ω으로 하였을 때의 출력을 측정한 것이다.Fig. 4 is an example of measurement of output noise of the circuit of Fig. 2 with the EMI noise reduction circuit of the present invention, and the output when the resistance of the resistance portion 20 is 20? Is measured.

도면에 도시된 바와 같이, 도 3에 비해, 리미트오버가 발생하는 주파수대역 없이, 전 주파수 내역에서 리미트인(limit in)인 것을 확인할 수 있으며, 도 3에서는 마진이 약 2dB로, 충분한 마진 확보가 불가능하지만, 도 4의 본 발명의 저감회로에 의하면, 약 10dB 정도의 충분한 마진을 가짐을 알 수 있다.As shown in the figure, it can be seen that the limit in the entire frequency range is limited without a frequency band in which a limit over occurs. Compared with FIG. 3, it can be seen that the margin is about 2 dB in FIG. Although it is impossible, according to the reduction circuit of the present invention in Fig. 4, it can be seen that there is a sufficient margin of about 10 dB.

이와 같이, 본 발명의 EMI 노이즈 저감회로에 의해, 고주파 대역(30MHz~108MHz) 대역에서 전체적인 노이즈 레벨을 낮추고, 노이즈로 인한 신호의 마진을 충분히 확보할 수 있다.
As described above, according to the EMI noise reduction circuit of the present invention, the overall noise level can be lowered in the high frequency band (30 MHz to 108 MHz), and the margin of the signal due to the noise can be sufficiently secured.

이상에서 본 발명에 따른 실시예들이 설명되었으나, 이는 예시적인 것에 불과하며, 당해 분야에서 통상적 지식을 가진 자라면 이로부터 다양한 변형 및 균등한 범위의 실시예가 가능하다는 점을 이해할 것이다. 따라서, 본 발명의 진정한 기술적 보호 범위는 다음의 특허청구범위에 의해서 정해져야 할 것이다.
While the invention has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined by the appended claims. Accordingly, the true scope of the present invention should be determined by the following claims.

10: 전원부 20: 저항부
30: 드라이버IC10: power supply unit 20:
30: Driver IC

Claims (3)

드라이버 집적회로(IC)의 적어도 하나 이상의 출력단으로 유입되는 전자기간섭(EMI) 노이즈를 저감하기 위한, EMI 노이즈 저감회로에 있어서,
복수의 입력단 중에서 어느 하나와 연결되어, 상기 드라이버 집적회로(IC)로 전류를 출력하는 전원부(10);
상기 적어도 하나 이상의 출력단 각각과 드라이브 집적회로(IC) 사이에 직렬로 배치되는 적어도 하나 이상의 저항을 포함하되,
전원부(10)는,
DC 입력부(11);
DC 입력부(11)로부터의 전류의 저주파 노이즈 부분의 필터링을 위해 DC 입력부(11)와 그라운드 사이를 연결하는 제1 캐패시터(C2); 및
DC 입력부(11)로부터의 전류의 고주파 노이즈 부분의 필터링을 위해 DC 입력부와 그라운드 사이를 연결하는 제2 캐패시터(C3, C4)를 포함하는 EMI 노이즈 저감회로.
An EMI noise reduction circuit for reducing electromagnetic interference (EMI) noise introduced into at least one output end of a driver integrated circuit (IC)
A power supply unit (10) connected to any one of a plurality of input terminals and outputting a current to the driver integrated circuit (IC);
At least one resistor disposed in series between each of the at least one output terminal and the drive IC (IC)
The power supply unit 10,
A DC input unit 11;
A first capacitor C2 connecting between the DC input unit 11 and the ground for filtering the low frequency noise portion of the current from the DC input unit 11; And
And a second capacitor (C3, C4) connecting between the DC input part and the ground for filtering the high frequency noise portion of the current from the DC input part (11).
제1항에 있어서, 상기 적어도 하나 이상의 저항은, 각각 20Ω의 값을 가지는 EMI 노이즈 저감회로.
The EMI noise reduction circuit according to claim 1, wherein the at least one resistance has a value of 20?.
제1항에 있어서, 상기 적어도 하나 이상의 저항은, 각각 36Ω의 값을 가지는 EMI 노이즈 저감회로.The EMI noise reduction circuit according to claim 1, wherein the at least one resistance has a value of 36?.
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EP20110190525 EP2458738A1 (en) 2010-11-26 2011-11-24 Circuit for reducing electromagnetic interference noise
CN201110382050.7A CN102545583B (en) 2010-11-26 2011-11-25 For reducing the circuit of electromagnetic interference noise
US13/305,107 US9203410B2 (en) 2010-11-26 2011-11-28 Circuit for reducing electromagnetic interference noise
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