KR101769087B1 - Current sensing circuit - Google Patents

Abstract

A current sensing circuit according to an embodiment includes: a plurality of first transistors including an emitter coupled to an emitter node electrically coupled to a first terminal of a load; And a second transistor including a base connected to a base of the plurality of first transistors and an emitter connected to a second terminal of the load, the collector of the second transistor being connected to the base of the second transistor, A maximum allowable current of the load is measured based on a first sensing voltage between the first terminal and the second terminal, a first current flowing through the plurality of first transistors, and a second current flowing through the second transistor , And generates an error signal corresponding to the maximum allowable current.

Description

[0001] CURRENT SENSING CIRCUIT [0002]

The present invention relates to a current sensing circuit.

In general, the conventional maximum allowable current sensing circuit corrects the value through trimming according to the temperature variation since the allowable current value for generating an error signal varies depending on the temperature.

However, if the maximum allowable current value does not change immediately due to the instantaneous temperature change, an overcurrent may occur, and such an overcurrent causes a problem of abnormal operation or failure of the circuit.

The present invention is to overcome the above-described problems, and the current sensing circuit according to the embodiment is for omitting temperature-dependent trimming.

It is also intended to protect the circuit and the load from the overcurrent according to the rapidly varying temperature.

The technical objects to be achieved by the present invention are not limited to the technical matters mentioned above, and other technical subjects which are not mentioned can be clearly understood by those skilled in the art from the description of the present invention .

A current sensing circuit according to an embodiment includes: a plurality of first transistors including an emitter coupled to an emitter node electrically coupled to a first terminal of a load; And a second transistor including a base connected to a base of the plurality of first transistors and an emitter connected to a second terminal of the load, the collector of the second transistor being connected to the base of the second transistor, A maximum allowable current of the load is measured based on a first sensing voltage between the first terminal and the second terminal, a first current flowing through the plurality of first transistors, and a second current flowing through the second transistor , And generates an error signal corresponding to the maximum allowable current.

Each of the plurality of first transistors of the current sensing circuit according to the embodiment includes a plurality of emitters connected in parallel to the emitter node, a plurality of collectors connected in parallel to the collector node, A first current source is connected to the collector node of the first transistor, and the collector of the second transistor is connected to the second current source.

The first transistor of the current sensing circuit according to the embodiment includes a first transistor and the second transistor each have a first magnification and the second transistor includes a second magnification. The first magnification is smaller than the second magnification and produces the error signal at a first point in time where the magnification ratio formed by the first magnification and the second magnification and the first sensing voltage are identical, 1, and the second magnification corresponds to the number of the second transistors connected in parallel in Fig.

In addition, the sum of the first magnifications of each of the plurality of first transistors of the current sensing circuit according to the embodiment is smaller than the second magnification.

Further, the second current of the current sensing circuit according to the embodiment is constant, the first current increases in accordance with the first sensing voltage, and the point in time when the first current and the second current become equal is the first Time.

In addition, the magnification ratio of the current sensing circuit according to the embodiment is configured such that the first viewpoint is formed at the first temperature to the third temperature.

In addition, the first temperature of the current sensing circuit according to the embodiment is minus 45 degrees, the second temperature is 27 degrees, and the third temperature is 150 degrees.

In addition, the rate of change of the first current in the current sensing circuit according to the embodiment is proportional to the temperature and the amount of change of the first current with respect to the first sensing voltage variation.

The trimming current source may further include a plurality of trimming current sources connected to a collector node of the current sensing circuit according to the embodiment and a plurality of switches corresponding to the plurality of trimming current sources, And generates a trimming current formed by a current of at least one trimming current source among the plurality of trimming current sources in accordance with a switching operation of the plurality of switches, and wherein the trimming current and the current of the first current source are connected to the collector node .

Further, the error signal is generated based on the second sensing voltage corresponding to the trimming current of the current sensing circuit according to the embodiment.

Further, the error signal is generated based on the second sensing voltage at a second time point different from the first time point of the current sensing circuit according to the embodiment.

In addition, the sensing voltage of the current sensing circuit according to the embodiment is a variable resistor, a third transistor including an emitter connected to the emitter node, a base connected to the collector, and the collector connected to the first terminal; And an emitter coupled to the emitter of the second transistor, a base coupled to the collector, and a collector coupled to the second terminal.

The current sensing circuit according to the embodiment has the effect of omitting the temperature-dependent trimming.

Also, there is an effect that the circuit and the load can be protected from an overcurrent according to a suddenly changing temperature.

1 shows a current sensing circuit according to an embodiment.
Figure 2 shows the load connected to the current sensing circuit of Figure 1;
3 is a graph showing an output signal of the current sensing circuit of FIG.
4 is a graph showing the effect of current trimming in Fig.
5 is a graph showing the current of the current sensing circuit when the magnification is not adjusted.
6 is a graph showing the output signal of the current sensing circuit when the magnification is not adjusted.
7 is a graph showing the current of the sensing circuit when the magnification is adjusted.
8 shows the output signal of the current sensing circuit when the magnification is adjusted.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, wherein like or similar elements are denoted by the same or similar reference numerals, and redundant description thereof will be omitted. The suffix "module" and " part "for the components used in the following description are given or mixed in consideration of ease of specification, and do not have their own meaning or role. In the following description of the embodiments of the present invention, a detailed description of related arts will be omitted when it is determined that the gist of the embodiments disclosed herein may be blurred. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. , ≪ / RTI > equivalents, and alternatives.

Terms including ordinals, such as first, second, etc., may be used to describe various elements, but the elements are not limited to these terms. The terms are used only for the purpose of distinguishing one component from another.

It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between.

The singular expressions include plural expressions unless the context clearly dictates otherwise.

In the present application, "comprises." Or "have." , Etc. are intended to designate the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, may be combined with one or more other features, steps, operations, components, It should be understood that they do not preclude the presence or addition of combinations thereof.

1 shows a current sensing circuit according to an embodiment.

Hereinafter, a current sensing circuit according to an embodiment will be described with reference to FIG.

1, the current sensing circuit 1 according to the embodiment includes a current trimming section CT, a first current source S1, a second current source S2, an inverter section INV, a magnification section M, A second transistor T2, a third transistor T3, and a fourth transistor T4. The current sensing circuit 1 is connected to the load 2 (see FIG. 2) via terminals IN and IP.

The sensing circuit 1 measures the sensing voltage Vs of the sense resistor Rs (see FIG. 2), and when the measured sensing voltage Vs and the maximum allowable current magnification ratio Rm1 are equal (Vs = Rm1) (See FIG. 2) corresponding to the load current IL (see FIG. The sensing circuit 1 outputs an error signal through the terminal OUT when the load current IL has the maximum allowable current.

The current trimming portion CT includes a plurality of trimming current sources TS1 to TS3 and a plurality of switches SW1 to SW3 corresponding to the plurality of trimming current sources TS1 to TS3 respectively. The current trimming section CT generates a trimming current It formed by at least one of the currents of the plurality of trimming current sources TS1 to TS3 in accordance with the switching operation of the plurality of switches SW1 to SW3. The current trimming unit CT adds the trimming current It and the current I1 of the first current source to perform a current trimming operation. The specific current trimming operation of the current trimming portion CT will be described later.

The first current source S1 is driven in accordance with the operating voltage VDD and supplies the current I1 to the multiplier M.

The second current source S2 is driven according to the operation voltage VDD and supplies the current I2 to the second transistor T2.

The first current source S1 and the second current source S2 are current sources composed of a metal oxide semiconductor field effect transistor (MOSFET), and the drain of the MOSFET may be connected to the output terminal of each current source, but the embodiment is not limited thereto.

The inverter INV inverts the voltage of the collector node C and outputs the inverted voltage to the output terminal OUT.

The magnification portion M includes a plurality of first transistors T1-1 to T1-n. Each of the plurality of first transistors T1-1 to T1-n includes a collector connected in parallel to the collector node C, an emitter connected in parallel to the emitter node E, and an emitter connected in parallel to the base of the second transistor T2 Respectively.

The current IC1 flowing through the plurality of first transistors T1-1 to T1-n varies in the maximum allowable current value depending on the temperature. A configuration in which a plurality of first transistors T1-1 to T1-n are connected in parallel to adjust the magnification ratio will be described later.

The second transistor T2 includes a collector connected to the second current source S2, a base connected to the collector, and an emitter connected to the emitter of the fourth transistor. The second transistor T2 includes a diode connection to which a collector and a base are connected.

Since the transistor T2 is always biased through the diode connection, the current IC2 flowing through the transistor T2 is constant.

The first current source S1, the plurality of first transistors T1-1 to T1-n, the second current source S2 and the second transistor T2 form a current mirror, The current mirror S1 of the first current source S1 and the current mirror S2 of the second current source S2 are the same, but the embodiment is not limited thereto.

The third transistor T3 includes an emitter connected to the emitter of each of the plurality of first transistors T1-1 through T1-n, a base connected to the collector, and a collector connected to the terminal IN. The third transistor T3 includes a diode connection to which a collector and a base are connected.

 The fourth transistor T4 includes an emitter connected to the emitter of the second transistor T2, a base connected to the collector, and a collector connected to the terminal IP. The fourth transistor T4 includes a collector and a base connected to each other. Diode connections.

The plurality of first transistors T1-1 to T1-n, the second transistor T2, the third transistor T3 and the fourth transistor T4 may be a bipolar junction transistor (BJT) The examples are not limited thereto.

Figure 2 shows the load connected to the current sensing circuit of Figure 1;

Hereinafter, the rod according to the embodiment will be described with reference to FIG.

Referring to FIG. 2, the load 2 includes a fifth transistor, a sense resistor Rs, a sixth transistor T6, a first diode D1, and a second diode D2. The load current IL flows through the fifth transistor T5 and the load current IL does not flow through the sixth transistor T6.

The fifth transistor T5 includes a drain connected to the terminal PUB, a gate connected to the terminal Vgate, and a source connected to the terminal IP. When an enable level signal is applied to the terminal Vgate, A load current IL corresponding to a high voltage (for example, a high voltage of the vehicle battery) flows through the fifth transistor T5 to the sense resistor Rs through the fourth transistor PUB.

The cathode of the first diode D1 is connected to the drain of the fifth transistor, and the anode is connected to the source of the fifth transistor. The first diode D1 prevents a reverse current from flowing to the fifth transistor T5.

One end of the sense resistor Rs is connected to the terminal IP and the other end is connected to the terminal IN. A potential difference corresponding to the sense voltage Vs is formed between the terminal IP and the terminal IN as the load current IL flows to the sense resistor Rs.

The sixth transistor T6 includes a drain connected to the terminal Vgate, a gate connected to the terminal Vgate_off, and a source connected to the ground. When an enable level signal is applied to the terminal Vgate_off, ) Flows to the ground through the sixth transistor T6.

The second diode D2 prevents a reverse current from flowing to the sixth transistor T6.

The signal applied to the terminal Vgate and the signal applied to the terminal Vgate_off have opposite levels. More specifically, when a signal of an enable level is applied to the terminal Vgate, a signal of a disable level is applied to the terminal Vgate_off. Therefore, the fifth transistor T5 and the sixth transistor T6 are not turned on or off at the same time.

3 is a graph showing an error signal of the current sensing circuit of FIG.

Hereinafter, an operation in which the current sensing circuit of the embodiment generates an error signal when the magnification ratio is not adjusted will be described with reference to FIG. 1 to FIG.

It is assumed that the magnification ratio Rm1 is not adjusted, so that the magnification portion M of FIG. 1 includes only the first transistor T1-1, and the current trimming portion CT does not exist.

Referring to FIGS. 1 and 2, the fifth transistor T5 is turned on in accordance with the gate signal of the enable level of the terminal Vgate. The load current I _L flows through the fifth transistor T5 and a potential difference of the sense voltage Vs is generated between the terminal IP and the terminal IN by the sense resistor Rs.

Therefore, the voltage of the emitter node E of the first transistor T1-1 and the emitter voltage of the second transistor are different by the sensing voltage Vs. At this time, the base-emitter voltage V _BE1 of the first transistor T1-1 can be expressed by the following equation (1) because the base transistor T1-1 and the second transistor T2 have the same base voltage.

[Equation 1]

V _BE1 = V _BE2 + Vs

The current (IC1) flowing through the first transistor (T1-1) and the current (IC2) flowing through the second transistor can be expressed by the following equation (2).

&Quot; (2) "

_{Ic1 = M1I s exp (V BE1} / V T) [(1 + V CE1) / V A]

_{Ic2 = M2I s exp (V BE2} / V T) [(1 + V CE2) / V A]

Here, M1 is a magnification determined by the first transistor T1-1, M2 is a magnification determined by the second transistor T2 (M1 <M2), V _T is a thermal voltage Is a constant proportional to the operating temperature of the transistor, and Is and V _A are both constants.

First, when the load current IL does not flow, since the sensing voltage Vs is 0V, the base-emitter voltage VBE1 of the first transistor T1-1 and the second transister T2 are calculated by Equation (1) The base-emitter voltage VBE2 is equal to (VBE1 = VBE2)

In Equation (2), the magnification M1 of the first transistor is smaller than the magnification M2 of the second transistor T2. The current Ic2 is larger than the current IC1 and the current Ic1 and the current IC2 are equal to each other due to the characteristics of the current mirror, The voltage VCE1 of the collector node C of the transistor Q1 increases to the operating voltage VDD. Then, the drain voltage of the transistor included in the first current source S1 rises. As the drain voltage increases, the first current source S1 can not operate in the saturation region and the magnitude of the current I1 is reduced. As a result, the current I1 becomes smaller than the current I2 (I1 <I2), and the voltage VCE1 of the collector node C at this time increases and is larger than VDD / 2.

Thereafter, the voltage VCE1 of the collector node C is inverted through the inverter INV to output the corresponding output signal Vo. That is, referring to FIG. 3, a low level output signal Vo is output. The output signal Vo of a low level is an output signal in a steady state and the output signal Vo of a high level is an error signal.

Thereafter, when the load current IL flows, the sensing voltage Vs is generated and the base-emitter voltage VBE1 of the first transistor T1-1 rises by the sensing voltage Vs according to Equation (1) do. Thus, the current IC1 increases, the rate of change is proportional to the temperature by the column voltage VT, and is proportional to the change amount IC1 /? Vs of the current IC1 relative to the change in the sense voltage Vs.

The base-emitter voltage VBE2 and the current IC2 of the second transistor T2 are constant. The voltage of the collector node C of the first transistor T1-1 decreases as the current IC1 increases so that the current IC1 and the current IC2 become equal to each other due to the characteristics of the current mirror.

The difference between the base-emitter voltage VBE1 of the first transistor T1-1 and the base-emitter voltage VBE2 of the second transistor T2, that is, the sensing voltage Vs is the maximum allowable current magnification ratio Rm1, (Vs = Rm1), the current IC1 and the current IC2 become equal to each other, and the load current IL at this time is the maximum allowable current. The maximum allowable current magnification ratio (Rm1) is expressed by the following equation (3). In Equation 3, the maximum allowable current magnification ratio Rm1 is proportional to the column voltage VT.

&Quot; (3) &quot;

_{Rm1 = V T ln (M 2} / M 1)

The voltage of the collector node C of the first transistor T1-1 at the time when the sensing voltage Vs and the maximum allowable current magnification ratio Rm1 are equal to each other (Vs = Rm1) by Equations (2) and (3) (VCE1) is rapidly lowered. The voltage VCE1 of the collector node C is inverted through the inverter INV to output the corresponding output signal Vo. 3, when the load current IL reaches the maximum allowable current Ip, a high-level output signal Vo is output.

For convenience of explanation, the second transistor T2 is described as being one, but the embodiment is not limited thereto, and the collector emitter and the base of the plurality of second transistors T2 may be connected in parallel. In this case also, the magnification M1 of the first transistor is smaller than the sum of the magnifications M2 of the plurality of second transistors T2.

4 is a graph showing the effect of current trimming in Fig.

Hereinafter, the current trimming operation of the current sensing circuit according to the embodiment will be described with reference to Figs. 1 and 4. Fig. At this time, it is assumed that the temperature does not change at 27 °.

Referring to Fig. 1, when the switch SW1 of the current trimming portion CT is turned on, a current trimming operation is performed to generate a current Ic1 + It.

When the current of the trimming current source TS1 and the current of the current I1 of the first current source are added, the detection voltage Vs between the detection voltage Vs before the trimming operation is performed and the detection voltage after the trimming operation is performed (? Vs) is generated.

At this time, the current (Ic1 + It) is expressed by the following equation (4).

&Quot; (4) &quot;

_{Ic1 + It = M 1 I s} exp ((V BE2 + Vs + ΔVs) / V T) [(1 + V CE1) / V A]

4, before the current trimming operation is performed, as described above, when the sensing voltage Vs is the sensing voltage Vp1 at the same time when the current IC1 and the current IC2 are the same, The signal Vo is outputted.

After the trimming operation is performed, a high-level output signal Vo is output at the time when the sensing voltage Vs is the voltage Vp2 corresponding to the sensing voltage difference DELTA Vs.

That is, the current trimming portion CT can change the load current (IL = Vs / Rs) based on the sense voltage difference DELTA Vs.

The manner in which the output signal Vo of the high level is output in response to the increased sensing voltage difference DELTA Vs when the switch SW2 and the switch SW3 are also turned on and the trimming current Ic1 + 3It is generated, It is omitted because it is self-explanatory in the case where one switch SW1 is turned on.

For convenience of explanation, the trimming current sources TS1 to TS3 and the plurality of switches SW1 to SW3 of the current trimming unit CT are three, respectively, but the embodiment is not limited thereto.

5 is a graph showing the current of the current sensing circuit when the magnification is not adjusted.

6 is a graph showing the output signal of the current sensing circuit when the magnification is not adjusted.

Hereinafter, the operation of the current sensing circuit according to the temperature when the maximum allowable current magnification ratio is not adjusted using Figs. 5 and 6 will be described.

It is assumed that the maximum allowable current magnification ratio Rm1 is not adjusted. Therefore, it is assumed that the magnification portion M of FIG. 1 includes only the first transistor T1-1.

As described with reference to Fig. 3, the current IC1 increases as the load current IL increases, and the slope is proportional to the temperature. Further, the current sensing circuit 1 generates an error signal in accordance with the sensing voltage Vs corresponding to the current IC1 and the current IC2 at the same time.

Referring to Figure 5, the transistor T2 is always biased, so that the first temperature (e.g., -45 degrees), the second temperature (e.g., 27 degrees), and the third temperature RTI ID = 0.0 &gt; IC2 &lt; / RTI &gt; is constant.

5 and 6, the current IC1 rises at a slope corresponding to the first temperature, and the current sensing circuit 1 outputs the output signal Vo of a high level at the time of the sensing voltage VP3 ). The current IC1 rises at a slope corresponding to the second temperature and the current sensing circuit 1 outputs the output signal Vo of a high level at the time of the sensing voltage VP4. The current IC1 rises at a slope corresponding to the third temperature and the current sensing circuit 1 outputs a high level output signal Vo at the time of the sensing voltage VP5.

Therefore, the time point at which the output signal Vo of the high level is output changes to the time point of the sensing voltage VP3 to the sensing voltage VP5 according to the first to third temperatures.

7 is a graph showing the current of the sensing circuit when the magnification is adjusted.

8 shows the output signal of the current sensing circuit when the magnification is adjusted.

Hereinafter, the operation of the current sensing circuit when the magnification is adjusted using Figs. 1, 7 and 8 will be described.

1, each collector of n first transistors T1-1 to T1-n is connected in parallel to a collector node C, each of the emitters is connected in parallel to an emitter node E, Each base is connected in parallel. At this time, the magnifications M1 of the n first transistors T1-1 to T1-n may be all the same, but the embodiment is not limited thereto, but the n first transistors T1-1 to T1-n ) Magnification is smaller than the magnification M2 of the second transistor T2. The maximum permissible current magnification ratio Rm2 is expressed by the following equation (4)

&Quot; (4) &quot;

Rm2 = VTln (M2 / nM1)

Referring to Figs. 7 and 8, the currents IC2 at the first to third temperatures are the same. The current IC1 rises at a slope corresponding to the first temperature and the current sensing circuit 1 outputs the output signal Vo of the high level at the time of the sensing voltage VP6. The current IC1 rises at a slope corresponding to the second temperature and the current sensing circuit 1 outputs the output signal Vo of the high level at the time of the sensing voltage VP6. The current IC1 rises at a slope corresponding to the third temperature and the current sensing circuit 1 outputs the output signal Vo of a high level at the time of the sensing voltage VP6.

Therefore, the time when the sensing voltage Vs and the maximum allowable current magnification ratio Rm1 become equal to each other at the same time point (the sensing voltage Vs) (VP6) time point). Therefore, the current sensing circuit 1 can detect the maximum allowable current regardless of the temperature and output an error signal.

For convenience of explanation, the second transistor T2 is described as being one, but the embodiment is not limited thereto, and the collector emitter and the base of the plurality of second transistors T2 may be connected in parallel. In this case, the sum of the magnifications of the n first transistors T1-1 to T1-n is smaller than the sum of the magnifications M2 of the plurality of second transistors T2.

In addition, the sense resistor Rs can be configured as a variable resistor to change the load current (IL = Vs / Rs).

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, It belongs to the scope of right. Accordingly, the above description should not be construed in a limiting sense in all respects and should be considered illustrative. The scope of the present invention should be determined by rational interpretation of the appended claims, and all changes within the scope of equivalents of the present invention are included in the scope of the present invention.

1: Current sensing circuit
2: Load
CT: current trimming section
S1: first current source
S2: the second current source
INV: Inverter section
M: Magnification part
T1-1 to T1-n:
T2: second transistor
T3: Third transistor
T4: fourth transistor
IN, IP: terminal
Rs: sense resistor

Claims (11)

A first transistor including an emitter coupled to an emitter node electrically coupled to a first terminal of the load; And
And a second transistor including a base connected to a base of the plurality of first transistors and an emitter connected to a second terminal of the load,
Wherein the collector of the second transistor is connected to the base of the second transistor and the first sensing voltage between the first terminal and the second terminal, the first current flowing through the plurality of first transistors, Measuring a maximum allowable current of the load based on a second current flowing in the transistor,
Generates an error signal corresponding to the maximum allowable current,
The plurality of first transistors each including a first magnification,
The second transistor comprising a second magnification,
Wherein a first magnification of the first transistor is smaller than a second magnification of the second transistor and a magnification ratio formed by the first magnification and the second magnification and the first sensing voltage are the same, / RTI &gt; The method according to claim 1,
Wherein each of the plurality of first transistors includes:
A plurality of emitters are connected in parallel to the emitter node, a plurality of collectors are connected in parallel to the collector node, a plurality of bases are connected in parallel, a first current source is connected to the collector node,
And the collector of the second transistor is coupled to a second current source. delete 3. The method of claim 2,
Wherein the sum of the first magnifications of each of the plurality of first transistors is less than the second magnification. 5. The method of claim 4,
The second current is constant,
Wherein the first current increases according to the first sense voltage,
Wherein a time point at which the first current and the second current are equal to each other is the first time point. 6. The method of claim 5,
The magnification ratio,
Wherein the first time point is formed at a first temperature to a third temperature, which is an operating temperature of the current sensing circuit. The method according to claim 6,
The first temperature is minus 45 degrees,
The second temperature is image 27 °,
And the third temperature is image 150 °.
Wherein the rate of change of the first current is proportional to a temperature and a change amount of the first current to the first sense voltage change amount. 8. The method of claim 7,
Further comprising a plurality of trimming current sources connected to the collector node and a plurality of switches corresponding to the plurality of trimming current sources,
The plurality of switches being connected between a corresponding plurality of trimming current sources and the collector node,
Generating trimming currents formed by currents of at least one trimming current source among the plurality of trimming current sources in accordance with a switching operation of the plurality of switches,
Wherein the trimming current and the current of the first current source are applied to the collector node. 9. The method of claim 8,
And generates the error signal based on a second sense voltage corresponding to the trimming current. 10. The method of claim 9,
And generates the error signal based on the second sense voltage at a second time point different from the first time point. 11. The method of claim 10,
The sensing voltage is a variable resistance,
A third transistor including an emitter coupled to the emitter node, a base coupled to the collector, and the collector coupled to the first terminal; And
A fourth transistor including an emitter coupled to the emitter of the second transistor, a base coupled to the collector, and a collector coupled to the second terminal.

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