KR102275871B1 - A buffer management method for efficiently processing transmission and reception data and communication system - Google Patents

Abstract

A buffer management method for creating and releasing a storage space of a buffer for storing transmission/reception data in a communication system is disclosed. In the buffer management method, as a descriptor pool and a memory block pool existing in a physical memory area, a plurality of descriptors are allocated in advance to the descriptor pool, and the plurality of memory blocks are allocated to the pre-allocating a memory block pool; receiving one descriptor from the descriptor pool and receiving a predetermined number of memory blocks from the memory block pool; and creating a storage space of the buffer by connecting the one descriptor and the predetermined number of memory blocks in a linked list structure.

Description

Buffer management method for efficiently processing transmission and reception data and communication system {A buffer management method for efficiently processing transmission and reception data and communication system}

The present invention is a buffer management technology for dynamically allocating and releasing a storage space for transmission/reception data by a required size in a communication system.

In a communication system, a process of temporarily storing or reading transmission/reception data in a buffer is performed very frequently. In addition, since the length of the transmitted/received data is variably changed according to the application, a buffer, which is a data storage space, must be used variably.

The general method for variable operation of the buffer is to use the malloc() function to dynamically allocate memory as much as the required size in the heap area, and when it is no longer needed, use the free() function to re-create it in the heap area. How to free memory.

For example, if memory is dynamically allocated in the heap area, memory is generally allocated in order as shown in FIG. 1 . However, since memory release is performed regardless of the allocation order, the second and third allocation areas may be sequentially released in the middle.

After that, when trying to allocate 900 bytes of heap memory, since the size of the already freed second, third, and heap areas are smaller than 900 bytes, they are sequentially allocated after the fourth heap allocation area. Even though there is a reusable heap area in the middle, an empty area in the middle is called "memory fragmentation".

Memory fragmentation is more likely to occur as dynamic allocation and deallocation are repeated in the heap area, so the efficiency of using memory space decreases and the time taken for heap allocation is delayed due to the procedure of checking the reusability of the freed area. problems arise.

An object of the present invention is that a buffer used to store and read transmission/reception data in a communication system can be dynamically allocated memory according to a variable size of transmission/reception data, and when the buffer is no longer used, the memory allocated to the buffer It is to provide a buffer management method that can increase resource efficiency by returning

A buffer management method according to an aspect of the present invention for achieving the above object is a descriptor pool and a memory block pool existing in a physical memory area, and includes a plurality of descriptors as the descriptors. pre-allocating a pool and pre-allocating a plurality of memory blocks to the memory block pool; receiving one descriptor from the descriptor pool and receiving a predetermined number of memory blocks from the memory block pool; and creating a storage space of the buffer by connecting the one descriptor and the predetermined number of memory blocks in a linked list structure.

A communication system according to another aspect of the present invention includes a memory having a physical memory area in which a descriptor pool including a plurality of descriptors and a memory block pool including a plurality of memory blocks exist; and one descriptor is allocated from the descriptor pool, a predetermined number of memory blocks are allocated from the memory block pool, and the one descriptor and the predetermined number of memory blocks are connected in a linked list structure, and a processor that creates a storage space of the buffer.

According to the present invention, even if memory allocation and release for the buffer, which is a storage space for transmitting and receiving data, is repeatedly repeated, memory fragmentation does not increase as in the heap area, so memory recyclability is easy, and thus the delay time for memory allocation is also does not increase

1 is a diagram for explaining memory fragmentation, in which the probability of occurrence increases as dynamic allocation and release are repeated in a conventional heap area.
2 is a conceptual diagram for explaining a memory allocation method in a buffer pool according to an embodiment of the present invention.
3 is a flowchart illustrating a process of generating one buffer for storing transmission/reception data according to an embodiment of the present invention.
4 is a structural diagram of a buffer for storing data that is a basic unit of transmission and reception by receiving descriptors and memory blocks allocated from a buffer pool according to an embodiment of the present invention;
5 is a conceptual diagram schematically illustrating a process of releasing a buffer and returning a memory to a buffer pool according to an embodiment of the present invention;
6 is a block diagram illustrating a communication system to which a buffer management method according to a buffer generation process of the present invention is applied.

The above and other objects, advantages and features of the present invention, and a method of achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings.

However, the present invention is not limited to the embodiments disclosed below, but can be implemented in various different forms, and only the following examples are provided to those of ordinary skill in the art to which the present invention pertains to the purpose of the invention, It is only provided to easily inform the configuration and effect, and the scope of the present invention is defined by the description of the claims.

On the other hand, the terms used herein are for the purpose of describing the embodiments and are not intended to limit the present invention. As used herein, the singular also includes the plural unless specifically stated otherwise in the phrase. As used herein, "comprises" and/or "comprising" means that a referenced element, step, operation and/or element is the presence of one or more other elements, steps, operations and/or elements. or added.

The present invention does not use the allocation function (malloc()) and the free function (free()) for the heap memory provided by the C language, but dynamically allocates the transmit/receive buffer based on the buffer pool composed of descriptors and memory blocks. It is characterized by providing a buffer management method that operates in its own mechanism of allocating and freeing.

2 is a conceptual diagram for explaining a memory allocation method in a buffer pool according to an embodiment of the present invention.

Referring to FIG. 2 , the buffer 100, which is a storage space for transmission/reception data (or transmission/reception packet) according to an embodiment of the present invention, includes a descriptor 112 and a memory block 122 in a buffer pool. It is configured to operate in the form of (Buffer Pool).

To this end, the buffer pool includes a descriptor pool 110 (Descriptor Pool or a descriptor buffer pool) and a memory block pool 120 (Memory Block Pool or a memory block buffer pool).

The buffer pool exists in a physical memory area, and when the buffer is initialized, descriptors 112 and memory blocks 122 of fixed sizes are allocated in advance to each buffer pool area (descriptor pool 110 and memory block pool 120). Accordingly, as shown in FIG. 2 , descriptors and memory blocks can be quickly allocated from each buffer pool area (the descriptor pool 110 and the memory block pool 120 ) whenever necessary.

3 is a flowchart illustrating a process of creating a storage space of one buffer for storing transmission/reception data according to an embodiment of the present invention. FIG. 2 is referred to together to facilitate understanding of the description. A subject performing each of the steps below may be a processor that manages a buffer to efficiently process transmission/reception data (transmission/reception packets) in a communication system.

However, if the subject performing all the steps below is limited to the processor, it may become unclear what the subject performing the operation of each step is. described as However, the subject performing each step may be embodied in hardware means such as one processor or different processors, which will be apparent to those skilled in the art.

Referring to FIG. 3 , first, in S311 , a process of determining whether there is a descriptor that can be allocated from the descriptor pool 110 is performed.

Next, in S313, if there is a descriptor that can be allocated to the buffer pool in the descriptor pool 110, one descriptor 112 is allocated from the descriptor pool 110, and can be allocated to the descriptor pool 110. If the descriptor does not exist, it is determined that the buffer creation has failed and the buffer creation process is terminated.

Next, in S315, when one descriptor 112 is allocated from the descriptor pool 110 according to the execution of the previous step S313, a process of calculating the number of memory blocks according to the data size is performed. The number of memory blocks suitable for the data size may be calculated according to Equation 1 below.

Here, BlockCount is the number of memory blocks that is the final calculated value, and is an integer value, DataSize is the actual size of transmitted and received data, and BlockSize is the size of the storage space of the memory block.

Next, in S317, it is determined whether the remaining values are generated in the calculation process of Equation 1.

If the remaining values are not generated, the linked list structure is sequentially allocated to the memory blocks 122 from the memory block pool (120 in FIG. 2 ) as many as the number of memory blocks (BlockCount) calculated according to Equation 1 in step S321. (linked list structure), the descriptor allocated in step S313 and the memory blocks 122 allocated in step S323 are connected.

If the remaining values are generated in the calculation process, in S310, the number of memory blocks (BlockCount) is incremented by 1, and in step S321, the memory block pool (120 in FIG. ) in which the memory blocks 122 are allocated and the descriptor allocated in step S313 and the allocated memory blocks 122 are connected in a linked list structure.

If there is no memory block that can be allocated from the memory block pool 120 in the process of linking the memory blocks in the linked list structure, it is determined that the buffer creation is a failure, and all previously allocated memory blocks are removed from the memory block pool 120 . returns (releases) to to end the buffer storage space creation process.

4 is a structural diagram of a buffer for storing data, which is a basic transmission/reception unit, by receiving a descriptor and a memory block allocated from a buffer pool according to an embodiment of the present invention.

Referring to FIG. 4 , the buffer according to an embodiment of the present invention is different from the structure of a general buffer capable of storing generally continuous data, the memory block field of the descriptor 112 is connected to the first memory block MB, and The memory block field F1 of the first memory block MB1 is connected to the second memory block MB2 in the same manner as the last memory block MB6. In this way, one descriptor 112 and a plurality of memory blocks MB1 to MB6 have a buffer structure in the form of a linked list that are sequentially connected.

Additional information (frame length, frame type, transmission rate, transmission time, etc.) necessary for transmitting and receiving data is recorded in the descriptor 112 . The additional information includes, for example, a frame length, a frame type, a transmission rate, a transmission time, and the like. Accordingly, the descriptor 112 may be composed of a field F1 in which the frame length is recorded, a field F2 in which the frame type is recorded, a field F3 in which the transmission rate is recorded, and a field F4 in which the transmission time is recorded. have.

Additionally, the descriptor 112 may be configured to further include a field Fn in which the address of the first memory block MB1 is written. As described above, since the address of the first memory block MB1 is written in the field Fn, the descriptor 112 and the first memory block MB1 are connected.

The actual data payload (or data) is stored in each memory block. Accordingly, each memory block may be configured with a field F2 in which an actual data payload is stored.

Additionally, each memory block may be configured to include a memory block field F1 in which the address of the next memory block is written. As described above, since the next memory block address is written in the memory block field of each memory block, all memory blocks can be connected in a linked list structure.

Meanwhile, when the size of data is larger than the space of the data field F2 of the memory block, the data may be divided and stored in data fields of other memory blocks connected to the memory block.

The number of memory blocks connected in a linked list structure is variable depending on the size of the space that can be stored in one memory block and the size of transmission/reception data. For example, if the space that can be stored in the Data field in the memory block is 256 bytes and the maximum transmission size of the transmitted data is 1518 bytes, 6 memory blocks that can secure the 1536 bytes (256 bytes x 6) buffer space are required.

The reason that the size of the data storage space of one memory block is smaller than the maximum size of transmission data is that the number of memory blocks is variably operated according to the variable transmission/reception data size to minimize waste of memory blocks and improve the utilization of buffer space in order to maximize

5 is a conceptual diagram schematically illustrating a process of releasing a buffer and returning a memory to a buffer pool according to an embodiment of the present invention.

Referring to FIG. 5 , if the transmission data has been successfully transmitted or the reception data has already been processed, the dynamically allocated buffer is no longer needed. In order to release the buffer used as shown in FIG. 5 , it is connected to the descriptor 112 first. Each memory block is returned to the memory block pool 120 while sequentially following the address link from the first memory block MB1 to the last memory block MB6.

After that, a process of finally returning the descriptor 112 to the descriptor pool 110 is performed.

As described above, if dynamic allocation and deallocation are repeated without a memory pool, memory fragmentation may occur as allocation and deallocation are repeated in random locations of memory. No fragmentation occurs.

6 is a block diagram illustrating a communication system to which a buffer management method according to a buffer generation process of the present invention is applied.

Referring to FIG. 6 , the communication system 600 includes at least one processor 610 , a memory 630 , a user interface input device 640 , a user interface output device 650 , and storage connected through a bus 6200 . 660 , and a network interface 670 .

The processor 610 may be a central processing unit (CPU) or a semiconductor device that processes instructions stored in the memory 630 and/or the storage 660 .

In one example, according to the execution of the processor 610 , a predetermined number of the memory blocks may be calculated according to the size of a space that one memory block can store and the size of the transmitted/received data.

In another example, according to the execution of the processor 610, the predetermined number suitable for the size of the transmission/reception data is calculated according to Equation 1 below, and

이다. Equation 1 is,

to be.

Here, BlockCount is a certain number of memory blocks that are the final calculated value, and is an integer value, DataSize is the actual size of transmitted and received data, and BlockSize is the size of the storage space of the memory block

In another example, according to the execution of the processor 610, each memory block is sequentially followed by an address link from the first memory block connected to the one descriptor in a linked list structure to the last memory block. After returning all of the memory blocks to the memory block pool, when the return of each memory block is completed, a process of releasing the storage space of the buffer by returning the one descriptor to the descriptor pool is performed.

The memory 630 and the storage 660 may include various types of volatile or nonvolatile storage media. For example, the memory 630 may include read only memory (ROM) and random access memory (RAM).

In one example, the memory 630 may be configured to have a physical memory area in which a descriptor pool including a plurality of descriptors and a memory block pool including a plurality of memory blocks exist.

The steps of a method or algorithm described in connection with the embodiments disclosed herein may be implemented directly in hardware executed by the processor 610 , a software module, or a combination of the two.

A software module resides in a storage medium (ie, memory 630 and/or storage 660 ) such as RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM. You may.

An exemplary storage medium is coupled to the processor 610 , the processor 610 capable of reading information from, and writing information to, the storage medium. Alternatively, the storage medium may be integral with the processor 610 . The processor and storage medium may reside within an application specific integrated circuit (ASIC). The ASIC may reside within the user terminal. Alternatively, the processor and storage medium may reside as separate components within the user terminal.

Example methods of the present disclosure are expressed as a series of operations for clarity of description, but this is not intended to limit the order in which the steps are performed, and if necessary, each step may be performed simultaneously or in a different order. In order to implement a method according to the present disclosure, other steps may be included in addition to the illustrated steps, some steps may be included except some steps, or additional other steps may be included except some steps.

Various embodiments of the present disclosure do not list all possible combinations, but are intended to describe representative aspects of the present disclosure, and matters described in various embodiments may be applied independently or in combination of two or more.

In addition, various embodiments of the present disclosure may be implemented by hardware, firmware, software, or a combination thereof. For implementation by hardware, one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), general purpose It may be implemented by a processor (general processor), a controller, a microcontroller, a microprocessor and the like.

The scope of the present disclosure includes software or machine-executable instructions (eg, operating system, application, firmware, program, etc.) that cause an operation according to the method of various embodiments to be executed on a device or computer, and such software or and non-transitory computer-readable media in which instructions and the like are stored and executed on a device or computer.

The above description is merely illustrative of the technical idea of the present invention, and various modifications and variations are possible without departing from the essential characteristics of the present invention by those skilled in the art to which the present invention pertains.

Accordingly, the embodiments expressed in the present invention are not intended to limit the technical spirit of the present invention, but to illustrate, and the scope of the present invention is not limited by these embodiments. The protection scope of the present invention should be construed by the following claims, and all technical ideas that are equivalent to or within the equivalent range should be construed as being included in the scope of the present invention.

Claims (8)

In a buffer management method of creating and releasing a storage space of a buffer for storing transmission and reception data in a communication system,
As a descriptor pool and a memory block pool existing in a physical memory area, a plurality of descriptors are pre-allocated to the descriptor pool, and a plurality of memory blocks are pre-allocated to the memory block pool. to do;
receiving one descriptor from the descriptor pool and receiving a predetermined number of memory blocks from the memory block pool; and
creating a storage space of the buffer in a way that the one descriptor and the predetermined number of memory blocks are connected in a linked list structure,
returning all memory blocks to the memory block pool while sequentially following address links from a first memory block connected to the one descriptor in a linked list structure to a last memory block; and
When the return of each memory block is completed, returning the one descriptor to the descriptor pool to release the storage space of the buffer
A buffer management method further comprising a. In claim 1,
Allocating the predetermined number of memory blocks comprises:
variably calculating a predetermined number of the memory blocks according to a size of a space that can be stored in one memory block and a size of the transmitted/received data; and
receiving the variably calculated number of memory blocks allocated from the memory block pool;
Buffer management method including. The method of claim 1 , wherein the receiving of the predetermined number of memory blocks comprises:
Comprising the step of calculating the predetermined number suitable for the size of the transmission and reception data according to Equation 1 below,
Equation 1 is,

Here, BlockCount is a predetermined number of memory blocks, which is a final calculated value, and is an integer value, DataSize is an actual size of transmitted/received data, and BlockSize is a size of a storage space of a memory block. delete In a communication system that creates and releases a storage space of a buffer for storing transmit/receive data,
a memory having a physical memory area in which a descriptor pool including a plurality of descriptors and a memory block pool including a plurality of memory blocks exist; and
One descriptor is allocated from the descriptor pool, a predetermined number of memory blocks are allocated from the memory block pool, and the one descriptor and the predetermined number of memory blocks are connected in a linked list structure to connect the a processor that creates a storage space for the buffer;
The processor is
Returning each memory block to the memory block pool while sequentially following the address link from the first memory block connected to the one descriptor in a linked list structure to the last memory block When this is completed, the communication system releases the storage space of the buffer by returning the one descriptor to the descriptor pool. In claim 5,
The processor is
A communication system for calculating a predetermined number of memory blocks according to a size of a space that one memory block can store and a size of the transmitted/received data. In claim 5,
The processor is
Calculate the predetermined number suitable for the size of the transmission and reception data according to Equation 1 below,
Equation 1 is,

ego,
Here, BlockCount is a predetermined number of memory blocks, which is a final calculated value, and is an integer value, DataSize is an actual size of transmitted/received data, and BlockSize is a size of a storage space of a memory block. delete

Images