KR102286754B1 - Single-side-band frequency mixer based on folded switching structure - Google Patents

Abstract

The present invention relates to a single sideband frequency mixer of a cascode structure using an input stage switching, and the frequency mixer according to an embodiment includes _{a load unit connected to a supply voltage (V DD} ) line, and an output of the load unit connected to an intermediate frequency (IF) comprising a signal amplifying unit for receiving a signal as an input and outputting an amplified intermediate frequency signal and a plurality of signal mixing transistors connected in a folded cascode structure, and receiving the amplified intermediate frequency signal and a signal mixing unit outputting an RF signal through a switching operation of a plurality of signal mixing transistors.

Description

Single sideband frequency mixer with folded switching structure {SINGLE-SIDE-BAND FREQUENCY MIXER BASED ON FOLDED SWITCHING STRUCTURE}

The present invention relates to a single sideband frequency mixer, and more particularly, to a technical idea of a single sideband frequency mixer having a cascode structure using an input stage switching.

A wireless communication system uses a frequency of a certain band to transmit data, and the frequency band is widening as the amount of data to be transmitted using a wireless communication system increases in recent years.

Such a wide frequency band is called an ultra wide band (UWB), and a single sideband frequency mixer is applied to the UWB frequency generator.

For reference, in a wireless communication system, the transmitting side modulates at least one key band information signal using at least one carrier signal, converts it into an RF signal, and transmits it, and the receiving side removes the carrier component from the received RF signal and performs an intermediate frequency (IF) ) signal to demodulate the IF signal, or directly demodulate the RF signal without an intermediate frequency.

In addition, in amplitude modulation, in which an information signal modulates the amplitude of a carrier wave, when the modulated signal is Fourier transformed and frequency analysis is performed, the upper and lower sidebands with the same amount of information are generated by shifting up and down by the carrier frequency. . Transmission of both sidebands is called double sideband (DSB) modulation, and transmission of only one sideband by removing unnecessary one sideband with a filter is called single sideband (SSB) modulation. do.

On the other hand, the conventional single sideband frequency mixer uses a Gilbert cell structure, and by applying a stacked transistor structure of three or more stages, a voltage of 1.8V or more and a large amount of current are required.

However, in the recent transistor process, the length of the gate is shortened due to scaling, and as a result, the drain-source break-down voltage is lowered, making it difficult to operate the transistor at a high voltage.

In addition, the conventional short sideband frequency mixer has a problem in that, when the supply voltage is lowered, it is difficult to secure a sufficient saturation region in the transistor of each stage, and the conversion gain and various characteristics are deteriorated.

Korean Patent No. 10-0703595 "Cascode-type amplifier with improved linear characteristics"

The present invention divides the transistor stack of the core circuit into a folded form and operates it with different current sources, so that it can be operated with a low power supply voltage of 1.5V or less, and a frequency mixing operation with excellent performance can be performed even at a low power supply voltage. We want to provide a frequency mixer that can

In addition, an object of the present invention is to provide a frequency mixer capable of reducing the area of a circuit by using a field effect transistor as a load, compared to the existing technology using an inductor and a capacitor as a load.

A single sideband frequency mixer of a cascode structure using an input stage switching according to an embodiment includes _{a load unit connected to a supply voltage (V DD} ) line, an output of the load unit, and receiving an intermediate frequency (IF) signal as an input. A signal amplifying unit for outputting the amplified intermediate frequency signal and a plurality of signal mixing transistors connected in a folded cascode structure, the switching operation of the plurality of signal mixing transistors receiving the amplified intermediate frequency signal It may include a signal mixing unit for outputting an RF signal through the.

According to one side, the load unit may include a third transistor and a fourth transistor connected through a supply voltage line and a source terminal.

According to one side, the signal amplifying unit includes a first transistor connected to a third transistor and a drain terminal and a second transistor connected to a fourth transistor and a drain terminal through a drain terminal, and transmits an intermediate frequency signal to the first transistor and the second transistor, respectively. It can be received as the gate input signal of

According to one side, each of the first transistor and the second transistor may receive an intermediate frequency signal having a different phase from each other as a gate input signal.

According to one side, the signal mixing unit receives the amplified intermediate frequency signal through the source terminal, and may include fifth to eighth transistors connected in a folded cascode structure.

According to one side, the fifth transistor and the sixth transistor are connected through the first folded line and the source terminal, and may receive the amplified intermediate frequency signal through the first folded line.

According to one side, the seventh transistor and the eighth transistor are connected through the second folded line and the source terminal, and may receive the amplified intermediate frequency signal through the second folded line.

According to one side, the fifth to eighth transistors may receive a local oscillation (LO) signal as a gate input signal.

According to one side, the fifth transistor and the eighth transistor are turned on in response to a positive pulse of the local oscillation signal, and the sixth transistor and the seventh transistor are the negative pulses of the local oscillation signal ( may be turned on in response to a negative pulse).

According to one side, the fifth transistor and the eighth transistor are turned on in response to a negative pulse of the local oscillation signal, and the sixth transistor and the seventh transistor are the positive pulses of the local oscillation signal ( It may be turned on in response to a positive pulse).

According to one side, the single sideband frequency mixer having a cascode structure using input switching may further include an output load unit including an output node from which an RF signal is output and a ninth transistor connected through a drain terminal.

According to one embodiment, by dividing the transistor stack of the core circuit in a folded form and operating it with different current sources, it is possible to operate with a low power supply voltage of 1.5V or less, and a frequency mixing operation with excellent performance even at a low power supply voltage can be performed.

According to an embodiment, by using a field effect transistor as a load, it is possible to reduce the area of a circuit compared to a conventional technology using an inductor and a capacitor as a load.

1 is a diagram for explaining a wireless communication system according to an embodiment.
2 is a diagram for explaining an example of frequency mixing through switching in a wireless communication system according to an embodiment.
3 is a diagram for explaining a frequency mixer according to an embodiment.
4 is a diagram for explaining an operation example of a frequency mixer according to an embodiment.
5 is a diagram for explaining an implementation example of a frequency mixer according to an embodiment.
6A to 6B are diagrams for explaining examples of signals for operation of a frequency mixer according to an embodiment.
7 is a diagram for explaining an example of an output of a frequency mixer according to an embodiment.

Specific structural or functional descriptions of the embodiments according to the concept of the present invention disclosed herein are only exemplified for the purpose of explaining the embodiments according to the concept of the present invention, and the embodiment according to the concept of the present invention These may be embodied in various forms and are not limited to the embodiments described herein.

Since the embodiments according to the concept of the present invention may have various changes and may have various forms, the embodiments will be illustrated in the drawings and described in detail herein. However, this is not intended to limit the embodiments according to the concept of the present invention to specific disclosed forms, and includes changes, equivalents, or substitutes included in the spirit and scope of the present invention.

Terms such as first or second may be used to describe various elements, but the elements should not be limited by the terms. The above terms are used only for the purpose of distinguishing one element from another element, for example, without departing from the scope of rights according to the concept of the present invention, a first element may be named as a second element, Similarly, the second component may also be referred to as the first component.

When a component is referred to as being “connected” or “connected” to another component, it is understood that the other component may be directly connected or connected to the other component, but other components may exist in between. it should be On the other hand, when it is said that a certain element is "directly connected" or "directly connected" to another element, it should be understood that no other element is present in the middle. Expressions describing the relationship between elements, for example, “between” and “between” or “directly adjacent to”, etc. should be interpreted similarly.

The terminology used herein is used only to describe specific embodiments, and is not intended to limit the present invention. The singular expression includes the plural expression unless the context clearly dictates otherwise. In this specification, terms such as "comprise" or "have" are intended to designate that the described feature, number, step, operation, component, part, or combination thereof exists, and includes one or more other features or numbers, It should be understood that the possibility of the presence or addition of steps, operations, components, parts or combinations thereof is not precluded in advance.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in a commonly used dictionary should be interpreted as having a meaning consistent with the meaning in the context of the related art, and should not be interpreted in an ideal or excessively formal meaning unless explicitly defined in the present specification. does not

Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. However, the scope of the patent application is not limited or limited by these examples. Like reference numerals in each figure indicate like elements.

1 is a diagram for explaining a wireless communication system according to an embodiment.

Referring to FIG. 1 , a wireless communication system 100 according to an embodiment has a single sideband of a cascode structure using an I/Q switch 110 , an IF phase filter 120 , an LO phase filter 130 and an input stage switching. A frequency mixer 140 may be included.

For example, the frequency mixer 140 according to an embodiment may be a single sideband quadrature frequency mixer.

The wireless communication system 100 according to an embodiment uses the I/Q switch 110 and the IF phase filter 120 before the intermediate frequency (IF) signal is input to the core of the frequency mixer 140 . It is possible to adjust the phase of the intermediate frequency (IF) signal.

Specifically, only four intermediate frequency quadrature signals are input to the input terminal of the frequency mixer 140 according to an embodiment to remove an image frequency so that a single sideband output is possible. In general, only one input intermediate frequency signal is Since it has only a phase of , it is possible to generate four intermediate frequency quadrature signals using the I/Q switch 110 and the IF phase filter 120 .

Similarly, the frequency mixer 140 according to an embodiment generates four local oscillation (LO) quadrature signals using the LO phase filter 130 because four local oscillation (LO) quadrature signals must be input. can do.

The frequency mixer 140 according to an embodiment includes four intermediate frequency quadrature signals generated through the I/Q switch 110 and the IF phase filter 120 , and four generated through the LO phase filter 130 . It may include an I-channel core and a Q-channel core that receive and operate a local oscillation quadrature signal.

Here, the frequency mixer 140 may output a positive RF signal from the I-channel core and output a negative RF signal from the Q-channel core at the same timing.

Also, the frequency mixer 140 may output a negative RF signal from the I-channel core and a positive RF signal from the Q-channel core at the same timing.

In addition, the frequency mixer 140 may further include an adder for summing the RF signal output through the operation of the I-channel core and the RF signal output through the operation of the Q-channel core, and through the summing operation of the adder The summed RF signal may be output as a final output.

The frequency mixer 140 according to an embodiment will be described in more detail with reference to FIGS. 3 to 6B of the following embodiments.

2 is a diagram for explaining an example of frequency mixing through switching in a wireless communication system according to an embodiment.

Referring to FIG. 2 , reference numeral 200 denotes a switch circuit that combines and outputs an intermediate frequency IF in a switching operation. That is, the switch circuit of reference numeral 200 may be the I/Q switch and the IF phase filter described with reference to FIG. 1 .

Referring to reference numeral 200, results shown in Table 1 below may be output through the switching operation of the switch circuit.

According to Table 1, a control signal Vctrl of '0' or '1' may be applied to each transistor provided in the switch circuit, and the first to fourth IF output terminals according to the applied control signal Vctrl. (IF_1 to IF_4) may output intermediate frequency signals having different phases.

For example, when the control signal Vctrl is '0', the first IF output terminal IF_1 outputs an intermediate frequency signal having a phase of 0˚, and the second IF output terminal IF_2 has a phase of 90˚. Outputs an intermediate frequency signal having a phase, the third IF output terminal (IF_3) outputs an intermediate frequency signal having a phase of 180˚, and the fourth IF output terminal (IF_4) is an intermediate frequency signal having a phase of 270˚ can be printed out.

In addition, when the control signal Vctrl is '1', the first IF output terminal IF_1 outputs an intermediate frequency signal having a phase of 90˚, and the second IF output terminal IF_2 has a phase of 0˚ outputs an intermediate frequency signal having a phase of 270˚, the third IF output terminal (IF_3) outputs an intermediate frequency signal having a phase of 270˚, and the fourth IF output terminal (IF_4) outputs an intermediate frequency signal having a phase of 180˚ can do.

That is, the switch circuit according to an embodiment may receive the control signal Vctrl of '0' or '1' as an input to control the phase of the input component of the intermediate frequency signal, and receives it as an input. The frequency mixer according to the example may output an RF signal having the form of a single side wave of a specific frequency.

3 is a diagram for explaining a frequency mixer according to an embodiment.

In other words, the frequency mixer of FIG. 3 may be the frequency mixer described with reference to FIG. 1 .

Referring to FIG. 3 , the frequency mixer 300 according to an embodiment divides the transistor stack of the core circuit into a folded form and operates it with different current sources, so that it can be operated with a low power supply voltage of 1.5V or less. , it is possible to perform frequency mixing operation with excellent performance even at low power supply voltage.

In addition, the frequency mixer 300 uses a field effect transistor as a load, thereby reducing the area of a circuit compared to a conventional technology using an inductor and a capacitor as a load.

To this end, the frequency mixer 300 according to an embodiment may include a load unit 310 , a signal amplifier 320 , and a signal mixing unit 330 .

The load unit 310 according to an embodiment may be connected to a _{supply voltage (V DD ) line.}

Also, the signal amplifying unit 320 may be connected to the output of the load unit 310 and may receive an intermediate frequency (IF) signal as an input and output an amplified intermediate frequency signal.

In addition, the signal mixing unit 330 includes a plurality of signal mixing transistors connected in a folded cascode structure, and a plurality of signal mixing for receiving the intermediate frequency signal amplified through the signal amplifier 320 . An RF signal may be output through a switching operation of the transistor.

For example, the switching operation of the plurality of signal mixing transistors may be controlled through a local oscillation (LO) signal.

Also, the signal mixing unit 330 may be connected through a node provided between the load unit 310 and the signal amplifying unit 320 .

According to one side, the signal mixing unit 330 may further include an output load unit connected to an output node to which an RF signal is output to the outside.

The frequency mixer 300 according to an embodiment will be described in more detail with reference to FIG. 5 in the following embodiment.

4 is a diagram for explaining an operation example of a frequency mixer according to an embodiment.

Referring to FIG. 4 , the frequency mixer according to an embodiment may include a plurality of cores and an adder, and the adder includes a positive RF signal and a negative RF signal output through the plurality of cores. ) to output the final output signal Vout to the outside.

신호,

신호,

신호 및

를 입력으로 수신하여 포지티브 RF 신호 및 네거티브 RF 신호를 생성할 수 있다. Specifically, the plurality of cores are four intermediate frequency (IF) quadrature signals having different phases.

signal,

signal,

signal and

can be received as an input to generate a positive RF signal and a negative RF signal.

More specifically, the final output signal Vout summed through the adder may be expressed by Equation 1 below.

[Equation 1]

5 is a diagram for explaining an implementation example of a frequency mixer according to an embodiment.

Referring to FIG. 5 , the frequency mixer 500 according to an embodiment may include an I-channel core 510 and a Q-channel core 520 , and each of the cores 510 and 520 is a load unit ( 511 ), a signal amplifying unit 512 , a signal mixing unit 513 , and an output load unit 514 .

For example, the load unit 511 includes a third transistor M3 and a fourth transistor M4, and the signal amplifier 512 includes a first transistor M1 and a second transistor M2. , the signal mixing unit 513 may include fifth to eighth transistors M5 to M8 , and the output load unit 514 may include a ninth transistor M9 .

In other words, the I-channel core 510 and the Q-channel core 520 provided in the frequency mixer 500 may have a symmetric structure and may be configured with the same circuit.

That is, since the I-channel core 510 and the Q-channel core 520 are configured with the same circuit, hereinafter, the circuit provided in the I-channel core 510 will be mainly described. The contents may be equally applied to the circuit provided in the Q-channel core 520 .

More specifically, the third transistor (M3) and the fourth transistor (M4) of the load unit 511 may be connected via a supply voltage (V _DD) line and source terminals, on the basis of a gate input signal (VB), the switching operation This can be controlled.

Also, the drain terminal of the third transistor M3 may be connected to the first node N1 , and the drain terminal of the fourth transistor M4 may be connected to the second node N2 .

For example, the third transistor M3 and the fourth transistor M4 provided in the load unit 511 may be PMOS transistors.

In general, it is difficult to secure sufficient voltage headroom in the conventional frequency mixer based on the Gilbert cell structure, and since the conversion gain is proportional to the size of the load, gain or linearity (headroom) is given up for low voltage operation. I had to.

However, in the present invention, the first transistor M1 is removed by removing the current source connected to the source terminal of the signal amplifying unit 512 and using the field effect transistor provided in the load unit 511 as an active load. And it is possible to secure the drain-source voltage and voltage headroom of the second transistor M2, thereby ensuring a high amplification ratio and the linearity of the frequency mixer.

In addition, by using a field effect transistor as a dynamic load, the present invention can reduce the area of a circuit compared to the conventional technology using elements such as an inductor and a capacitor as a load, and can make a high resistance compared to the consumed voltage.

According to one side, the first transistor M1 of the signal amplifying unit 512 is connected to the third transistor M3 and the drain terminal through the drain terminal, and the second transistor M2 of the signal amplifying unit 512 is connected to the fourth transistor ( M4) and the drain terminal may be connected.

In other words, the drain terminal of the first transistor M1 may be connected to the first node N1 , and the drain terminal of the second transistor M2 may be connected to the second node N2 .

For example, the first transistor M1 and the second transistor M2 provided in the signal amplifier 512 may be NMOS transistors.

In addition, the first transistor M1 and the second transistor M2 maintain a turn-on state for a period of time during which the frequency mixer 500 according to an embodiment operates to obtain an input intermediate frequency IF. signal can be amplified.

According to one side, each of the gates of the first transistor M1 and the second transistor M2 may receive an intermediate frequency signal as a gate input signal.

According to one side, each of the first transistor M1 and the second transistor M2 may receive an intermediate frequency signal having different phases as a gate input signal.

More specifically, the first to second transistors provided in each of the I-channel core 510 and the Q-channel core 520 are intermediates having different phases generated through the switching operation of the switch circuit described with reference to FIG. 2 . A frequency signal can be received as an input of the gate terminal.

)가 입력되고, I-채널 코어(510)에 구비된 제2 트랜지스터(N2)의 게이트 단자에는 180˚의 위상을 갖는 중간 주파수 신호(IF_180;

)가 입력될 수 있다. For example, through the first switching operation of the switch circuit, the gate terminal of the first transistor M1 provided in the I-channel core 510 has an intermediate frequency signal IF_0 having a phase of 0°;

) is input, and an intermediate frequency signal IF_180 having a phase of 180° is input to the gate terminal of the second transistor N2 provided in the I-channel core 510;

) can be entered.

)가 입력되고, Q-채널 코어(520)에 구비된 제2 트랜지스터의 게이트 단자에는 270˚의 위상을 갖는 중간 주파수 신호(IF_270;

)가 입력될 수 있다. In addition, through the first switching operation of the switch circuit, an intermediate frequency signal IF_90 having a phase of 90° is provided to the gate terminal of the first transistor provided in the Q-channel core 520;

) is input, and an intermediate frequency signal IF_270 having a phase of 270° is input to the gate terminal of the second transistor provided in the Q-channel core 520;

) can be entered.

)가 입력되고, I-채널 코어(510)에 구비된 제2 트랜지스터(N2)의 게이트 단자에는 270˚의 위상을 갖는 중간 주파수 신호(IF_270;

)가 입력될 수도 있다. In addition, through the second switching operation of the switch circuit, an intermediate frequency signal IF_90 having a phase of 90° is provided to the gate terminal of the first transistor M1 provided in the I-channel core 510;

) is input, and an intermediate frequency signal IF_270 having a phase of 270° is input to the gate terminal of the second transistor N2 provided in the I-channel core 510;

) may be entered.

)가 입력되고, Q-채널 코어(520)에 구비된 제2 트랜지스터의 게이트 단자에는 180˚의 위상을 갖는 중간 주파수 신호(IF_180;

)가 입력될 수도 있다.In addition, through the second switching operation of the switch circuit, the gate terminal of the first transistor provided in the Q-channel core 520 has an intermediate frequency signal IF_0 having a phase of 0°;

) is input, and an intermediate frequency signal IF_180 having a phase of 180° is input to the gate terminal of the second transistor provided in the Q-channel core 520;

) may be entered.

The signal mixing unit 513 according to an embodiment may output an RF signal through a switching operation of the fifth to eighth transistors M5 to M8 connected in a folded cascode structure.

According to one side, the fifth to eighth transistors M5 to M8 provided in the signal mixing unit 513 may receive the amplified intermediate frequency signal through the source terminal.

For example, the fifth to eighth transistors M5 to M8 provided in the signal mixing unit 513 may be PMOS transistors.

Specifically, the fifth transistor M5 and the sixth transistor M6 may be connected through the first folded line and the source terminal, and may receive the amplified intermediate frequency signal through the first folded line.

In addition, the seventh transistor and the eighth transistor may be connected through the second folded line and the source terminal, and receive the amplified intermediate frequency signal through the second folded line.

For example, the first folded line may be a line connected to the first node N1 , and the second folded line may be a line connected to the second node N2 .

According to one side, the fifth to eighth transistors M5 to M8 may receive a local oscillation (LO) signal as a gate input signal.

In other words, the fifth to eighth transistors M5 to M8 provided in the signal mixing unit 513 receive the amplified intermediate frequency signal applied through the folded line through the source terminal, and receive the input through the gate terminal. A frequency mixing operation may be performed through the switching operation of the fifth to eighth transistors M5 to M8 according to the magnitude of the local oscillation signal.

For example, the fifth transistor M5 and the eighth transistor M6 are connected to the first local oscillation line ILO_P, and the sixth transistor M6 and the seventh transistor M7 are connected to the second local oscillation line (ILO_P). ILO_N). Here, a positive local oscillation signal may be applied to the first local oscillation line ILO_P and a negative local oscillation signal may be applied to the second local oscillation line.

Also, the fifth to eighth transistors M5 to M8 may be connected to one local oscillation line, and a positive local oscillation signal and a negative local oscillation signal may be applied to one local oscillation line.

According to one side, the fifth transistor M5 and the eighth transistor M8 provided in the I-channel core 510 are turned on in response to a positive pulse of the local oscillation signal, and , The sixth transistor M6 and the seventh transistor M7 provided in the I-channel core 510 may be turned on in response to a negative pulse of the local oscillation signal.

In addition, the fifth and eighth transistors provided in the Q-channel core 520 are turned on in response to the negative pulse of the local oscillation signal, and the sixth and seventh transistors provided in the Q-channel core 520 . The transistor may be turned on in response to a positive pulse of the local oscillation signal.

In other words, the local oscillation signal applied to the fifth and eighth transistors provided in the I-channel core 510 and the Q-channel core 520 is the same as the local oscillation signal applied to the sixth and seventh transistors 180 There is a phase difference of °, so that the fifth and eighth transistors and the sixth and seventh transistors may perform different switching operations at the same timing.

That is, in the present invention, since the signal amplifying unit 512 is connected to the signal mixing unit 513 in parallel, all stages can operate in a sufficiently saturated region, and since the signal amplifying unit 512 and the current are distributed and used, By minimizing the current flowing to the signal mixing unit 513 , it is possible to reduce overall power consumption and minimize performance degradation.

According to one side, the ninth transistor M9 included in the output load unit 514 may be connected to an output node N_out through which an RF signal is outputted to the outside through a drain terminal.

That is, in the present invention, by using the field effect transistor provided in the output load unit 514 as a dynamic load, the area of the circuit can be reduced compared to the case of using elements such as an inductor and a capacitor as a load, and the voltage consumed You can create a high-contrast resistance.

As a result, the frequency mixer 500 of the present invention is implemented with a two-stage stack transistor structure, unlike the conventional frequency mixer implemented with a three-stage or more stack transistor structure, so that it can be operated with a low power supply voltage of 1.5V or less, Even at a low power supply voltage, a frequency mixing operation with excellent performance can be performed.

Specifically, the frequency mixer 500 includes a first stack consisting of a first transistor M1, a second transistor M2, and a ninth transistor M9, and third to eighth transistors M3 to M9. M8) may be configured as a second stack (second stack).

6A to 6B are diagrams for explaining examples of signals for operation of a frequency mixer according to an embodiment.

6A to 6B, reference numeral 610 denotes waveforms of signals input and output from the I-channel core of the frequency mixer according to an embodiment, and reference numeral 620 denotes Q- of the frequency mixer according to an embodiment. It shows the waveform of the signal input and output from the channel core.

Here, 'IF' denotes an intermediate frequency signal applied to the gate terminals of the first to second transistors described with reference to FIG. 5, and 'LO' denotes an intermediate frequency signal applied to the gate terminals of the fifth to eighth transistors described with reference to FIG. 5 . It represents the local oscillation signal, and 'RF' represents the RF signal output through the switching operation (frequency mixing operation) of each of the fifth to eighth transistors described with reference to FIG. 5 .

Referring to reference numeral 610, the first transistor and the second transistor provided in the I-channel core are always turned on while the frequency mixer according to an embodiment operates to amplify the input intermediate frequency signal. can do it

Here, the amplified intermediate frequency signal is input to the source terminals of the fifth to eighth transistors provided in the I-channel core through the folded line, and the switching operation of the fifth to eighth transistors based on the magnitude of the local oscillation signal frequencies can be mixed.

For example, each of the fifth to eighth transistors provided in the I-channel core may be turned on when the voltage is lower than a preset voltage, and the preset voltage is 'source voltage (Vs) - threshold voltage (V _th )'. can be

According to one side, the fifth and eighth transistors provided in the I-channel core are turned on in response to a positive pulse 611 of the local oscillation signal, and the sixth transistor and the second transistor are turned on. The 7 transistor may be turned on in response to a negative pulse 612 of the local oscillation signal.

In other words, since the local oscillation signal input to the fifth and eighth transistors provided in the I-channel core is a signal having a phase difference of 180° from the local oscillation signal applied to the sixth and seventh transistors, the fifth and The eighth transistor and the sixth and seventh transistors may perform different switching operations at the same timing.

Here, the RF signal may be output as a result of the switching operation of the fifth to eighth transistors provided in the I-channel core.

Referring to reference numeral 620, the first transistor and the second transistor provided in the Q-channel core are always turned on while the frequency mixer according to an embodiment operates to amplify the input intermediate frequency signal. can do it

Here, the amplified intermediate frequency signal is input to the source terminals of the fifth to eighth transistors provided in the Q-channel core through the folded line, and the switching operation of the fifth to eighth transistors based on the magnitude of the local oscillation signal frequencies can be mixed.

For example, each of the fifth to eighth transistors provided in the Q-channel core may be turned on when the voltage is lower than a preset voltage, and the preset voltage is 'source voltage (Vs) - threshold voltage (V _th )'. can be

According to one side, the fifth transistor and the eighth transistor provided in the Q-channel core are turned on in response to the negative pulse 622 of the local oscillation signal, and the sixth transistor and the seventh transistor provided in the Q-channel core. may be turned on in response to the positive pulse 621 of the local oscillation signal.

In other words, since the local oscillation signal input to the fifth and eighth transistors provided in the Q-channel core is a signal having a phase difference of 180° from the local oscillation signal applied to the sixth and seventh transistors, the fifth and The eighth transistor and the sixth and seventh transistors may perform different switching operations at the same timing.

Here, the RF signal may be output as a result of the switching operation of the fifth to eighth transistors provided in the Q-channel core.

7 is a diagram for explaining an example of an output of a frequency mixer according to an embodiment.

Referring to FIG. 7 , reference numeral 700 denotes an output result graph according to a frequency band of a local oscillation signal in the frequency mixer according to an embodiment.

In the output result graph of reference numeral 700 , the upper line may indicate a desired component, and the lower line may indicate an image component.

According to reference numeral 700, as a result of an experiment using the frequency mixer according to an embodiment, it was found that the input-output conversion gain was about 10 dB, and the 3-db bandwidth was in a band of 3.960-8.184 GHz. In addition, the image rejection ratio at this time was more than 20 dBc, and it was found to be about 30 dBc at 5-6 GHz, where the gain is the highest.

Existing Gilbert cell mixer requires a large current of 10 mA or more, but in the frequency mixer according to an embodiment, about 1.7 mA (884 uA X2) per one core is used to 3.4 mA (1.7 mA X 2) in two cores It was confirmed that operation was possible even with only a certain amount of power.

In addition, as a result of an experiment using the frequency mixer according to an embodiment, the frequency mixer is 5.016 GHz or 5.544 GHz when the input local oscillation (LO) signal is 5.28 GHz and the input intermediate frequency (IF) signal is 264 MHz. It has been shown to output an RF signal of That is, it can be confirmed that the output of the frequency mixer according to an exemplary embodiment appears as a single side wave of a specific frequency.

After all, by using the present invention, by dividing the transistor stack of the core circuit in a folded form and operating it with different current sources, it is possible to operate with a low power supply voltage of 1.5V or less, and the frequency with excellent performance even at a low power supply voltage Mixing operations can be performed.

In addition, by using the field effect transistor as a load, it is possible to reduce the area of the circuit compared to the existing technology using an inductor and a capacitor as a load.

As described above, although the embodiments have been described with reference to the limited drawings, various modifications and variations are possible from the above description by those of ordinary skill in the art. For example, the described techniques are performed in a different order than the described method, and/or the described components of the system, structure, apparatus, circuit, etc. are combined or combined in a different form than the described method, or other components Or substituted or substituted by equivalents may achieve an appropriate result.

Therefore, other implementations, other embodiments, and equivalents to the claims are also within the scope of the following claims.

300: frequency mixer 310: load part
320: signal amplification unit 330: signal mixing unit

Claims (11)

A frequency mixer comprising an I-channel core and a Q-channel core implemented in a symmetrical structure, the frequency mixer comprising:
each of the I-channel core and the Q-channel core,
a load unit connected through a supply voltage (VDD) line and a source terminal without a separate passive element, the load unit including only a third transistor and a fourth transistor whose switching operation is controlled according to a gate input signal applied through the gate terminal;
a signal amplifier connected to the output of the load unit and outputting an intermediate frequency signal amplified through the first transistor and the second transistor for receiving an intermediate frequency (IF) signal having a different phase as an input of a gate terminal;
A signal mixing unit including a plurality of signal mixing transistors connected in a folded cascode structure, and outputting an RF signal through a switching operation of the plurality of signal mixing transistors for receiving the amplified intermediate frequency signal
including,
each of the first transistor and the second transistor of the I-channel core receives an intermediate frequency signal of a first phase and an intermediate frequency signal of a third phase, respectively, as inputs of a gate terminal;
Each of the first and second transistors of the Q-channel core receives an intermediate frequency signal of a second phase and an intermediate frequency signal of a fourth phase as inputs of a gate terminal, respectively
Single sideband frequency mixer with cascode structure using input stage switching. delete According to claim 1,
The first transistor is
connected through the third transistor and the drain terminal,
The second transistor is
connected through the fourth transistor and the drain terminal
Single sideband frequency mixer with cascode structure using input stage switching. delete According to claim 1,
The signal mixing unit,
Receiving the amplified intermediate frequency signal through a source terminal, comprising fifth to eighth transistors connected in a folded cascode structure
Single sideband frequency mixer with cascode structure using input stage switching. 6. The method of claim 5,
The fifth transistor and the sixth transistor are
connected through a first folded line and a source terminal, and receiving the amplified intermediate frequency signal through the first folded line
Single sideband frequency mixer with cascode structure using input stage switching. 6. The method of claim 5,
The seventh transistor and the eighth transistor,
connected through a second folded line and a source terminal, and receiving the amplified intermediate frequency signal through the second folded line
Single sideband frequency mixer with cascode structure using input stage switching. 6. The method of claim 5,
The fifth to eighth transistors,
Receives a local oscillation (LO) signal as a gate input signal.
Single sideband frequency mixer with cascode structure using input stage switching. 9. The method of claim 8,
A fifth transistor and an eighth transistor of the I-channel core,
is turned on in response to a positive pulse of the local oscillation signal,
A sixth transistor and a seventh transistor of the I-channel core,
turned on in response to a negative pulse of the local oscillation signal
Single sideband frequency mixer with cascode structure using input stage switching. 9. The method of claim 8,
A fifth transistor and an eighth transistor of the Q-channel core,
is turned on in response to a negative pulse of the local oscillation signal,
A sixth transistor and a seventh transistor of the Q-channel core,
turned on in response to a positive pulse of the local oscillation signal
Single sideband frequency mixer with cascode structure using input stage switching. According to claim 1,
An output load unit including an output node to which the RF signal is output and a ninth transistor connected through a drain terminal
A single sideband frequency mixer of a cascode structure using an input stage switching further comprising a.

Images