KR102297064B1 - SoC device, display driver and SoC system comprising the same - Google Patents

Abstract

An SoC device, a display driver, and an SoC system including the same are provided. The SoC device includes a display controller that receives a trigger signal from the outside and outputs image data using the trigger signal, and a transceiver that receives a first interrupt from the outside, wherein the display controller is configured to: , the image data is synchronized to the pulse included in the trigger signal and output, and in the second mode different from the first mode, the image data is not output until the first interrupt is received, and the image data is triggered when the first interrupt is received Output is synchronized with the pulse included in the signal.

Description

SoC device, display driver and SoC system comprising the same

The present invention relates to a SoC device, a display driver and an SoC system including the same.

As image resolution increases, data traffic between a mobile application processor and a display driver integrated circuit (IC) is rapidly increasing.

This increase in data traffic rapidly increases the power consumption of mobile application processors and display drivers.

Therefore, research on a technology for reducing such power consumption is in progress.

The technical problem to be solved by the present invention is to provide a SoC (System on Chip) device in which power consumption is reduced when driving to output an image.

Another technical problem to be solved by the present invention is to provide a display driver in which power consumption is reduced when driving to output an image.

Another technical problem to be solved by the present invention is to provide an SoC system in which power consumption is reduced when driving to output an image.

The technical problems of the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

SoC device according to an embodiment of the present invention for achieving the above technical problem, a display controller that receives a trigger signal from the outside, outputs image data using the trigger signal, and a first interrupt from the outside a transceiver receiving reception, wherein the display controller synchronizes and outputs image data to a pulse included in the trigger signal in a first mode, and in a second mode different from the first mode, image data until a first interrupt is received is not output, and when the first interrupt is received, the image data is synchronized with the pulse included in the trigger signal and output.

In some embodiments of the present invention, in the first mode, the image data may include moving image data, and in the second mode, the image data may include still image data.

In some embodiments of the present invention, in the first mode, the display controller outputs the image data n times per second (n is a natural number), and in the second mode, outputs the image data m per second (m is the A natural number less than n) can be printed.

In some embodiments of the present invention, the trigger signal may be provided from a display driver that generates an image signal based on the image data and provides it to the display panel.

In some embodiments of the present invention, the first interrupt may be received by the transceiver in synchronization with the trigger signal.

In some embodiments of the present invention, the first interrupt is received by the transceiver in synchronization with a first pulse included in the trigger signal, and the display controller transmits the image data to a second pulse different from the first pulse It can be output in synchronization with .

In some embodiments of the present invention, the output of the image data in synchronization with the pulse included in the trigger signal by the display controller is such that the image data stored in an external memory is output in synchronization with the pulse included in the trigger signal. It may include controlling the external memory.

In some embodiments of the present invention, when the display controller continuously outputs the same image data p (p is a natural number greater than or equal to 2) times in the first mode, the operation mode of the display controller is changed from the first mode to the second mode. mode can be changed.

In some embodiments of the present invention, when the display controller operates in the second mode using the first interrupt received from the transceiver, and the transceiver transmits a second interrupt different from the first interrupt to the outside, , an operation mode of the display controller may be changed from the second mode to the first mode.

An SoC device according to another embodiment of the present invention for achieving the above technical object is provided with a trigger signal to which n (n is a natural number) pulses per second is applied from the outside, and outputs image data using the trigger signal display controller; and a transceiver for receiving an interrupt from the outside, wherein the display controller outputs the image data n times per second by using the trigger signal in a first mode, and outputs the image data n times per second, different from the first mode In the mode, the image data is output m times per second (m is a natural number smaller than n) using the trigger signal and the received interrupt.

In some embodiments of the present invention, the interrupt may be applied m times per second to the transceiver from the outside.

In some embodiments of the present invention, m may be determined by the image data.

In some embodiments of the present invention, in the first mode, the image data includes different first and second image data, and in the second mode, the image data includes third and fourth image data identical to each other. may include.

A display driver according to an embodiment of the present invention for achieving the above another technical problem includes: a driver for receiving image data, generating an image signal based on the received image data, and outputting the generated image signal to a display panel; and an image analyzer that analyzes the image data to determine a frame rate of an image to be output to the display panel, and generates and outputs an interrupt based on this, wherein the interrupt determines the timing at which the image data is provided to the driver. can be used to determine

In some embodiments of the present invention, the display panel may include an Indium Gallium Zinc Oxide (IGZO) panel.

In some embodiments of the present invention, the display driver may further include a counter used to determine an output timing of the interrupt.

In some embodiments of the present invention, the display driver outputs a trigger signal including a plurality of pulses to the outside, and the image analysis unit is synchronized with a first pulse among the plurality of pulses to provide the image data, When the image data is not provided in synchronization with a second pulse adjacent to the first pulse among the plurality of pulses, the image data provided in synchronization with the first pulse is analyzed and the frame of the image signal to be output to the display panel rate can be determined.

In some embodiments of the present invention, the display driver further includes a frame buffer in which the received image data is stored, and the image analyzer is configured to: When the image data stored in the frame buffer is not updated at a predetermined timing, , a frame rate of the image signal to be output to the display panel may be determined by analyzing the image data stored in the frame buffer.

In some embodiments of the present invention, the image data may include still image data.

According to an embodiment of the present invention, there is provided an SoC system, comprising: a display driver generating an image signal based on image data and outputting the image signal; and an SoC device configured to provide the image data to the display driver using a trigger signal provided from the display driver, wherein the SoC device is configured to use the trigger signal when the image data is first image data. The image data is provided to the display driver, and when the image data is second image data different from the first image data, the image data is displayed using the trigger signal after receiving an interrupt from the display driver can be provided to the driver.

In some embodiments of the present invention, the first image data may include moving image data, and the second image data may include still image data.

In some embodiments of the present invention, the display driver includes an image analyzer that analyzes the second image data to determine a frame rate of the image signal to be output to the display panel, and generates and outputs the interrupt based on the frame rate can do.

In some embodiments of the present invention, the trigger signal includes a plurality of pulses, the image analyzer is synchronized with a first pulse among the plurality of pulses to provide the image data, and the first one of the plurality of pulses is provided. When the image data is not provided in synchronization with the second pulse adjacent to the pulse, the frame rate of the image signal to be output to the display panel may be determined by analyzing the image data provided in synchronization with the first pulse.

The details of other embodiments are included in the detailed description and drawings.

1 is a block diagram of a System on Chip (SoC) system according to an embodiment of the present invention.
FIG. 2 is a block diagram of the SoC device of FIG. 1 .
FIG. 3 is a block diagram of the display driver of FIG. 1 .
4 to 10 are diagrams for explaining the operation of the SoC system of FIG. 1 .
11 is a block diagram of a display driver included in an SoC system according to another embodiment of the present invention.
12 is a block diagram of a display driver included in an SoC system according to another embodiment of the present invention.
13 is a block diagram of an SoC system according to another embodiment of the present invention.
14 to 16 are exemplary semiconductor systems to which SoC systems according to some embodiments of the present invention may be applied.

Advantages and features of the present invention and methods of achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in a variety of different forms, and only these embodiments allow the disclosure of the present invention to be complete, and common knowledge in the technical field to which the present invention belongs It is provided to fully inform the possessor of the scope of the invention, and the present invention is only defined by the scope of the claims. Sizes and relative sizes of components indicated in the drawings may be exaggerated for clarity of description. Like reference numerals refer to like elements throughout, and "and/or" includes each and every combination of one or more of the recited items.

When an element is referred to as being “connected to” or “coupled to” another element with another element, it means that it is directly connected or coupled to another element, or with the other element intervening. including all cases. On the other hand, when one element is referred to as "directly connected to" or "directly coupled to" with another element, it indicates that another element is not interposed therebetween.

The terminology used herein is for the purpose of describing the embodiments and is not intended to limit the present invention. As used herein, the singular also includes the plural unless specifically stated otherwise in the phrase. As used herein, “comprises” and/or “comprising” does not exclude the presence or addition of one or more other components in addition to the stated components.

Although the first, second, etc. are used to describe various elements or elements, these elements or elements are not limited by these terms, of course. These terms are only used to distinguish one element or component from another. Therefore, it goes without saying that the first element or component mentioned below may be the second element or component within the spirit of the present invention.

Unless otherwise defined, all terms (including technical and scientific terms) used herein may be used with the meaning commonly understood by those of ordinary skill in the art to which the present invention belongs. In addition, terms defined in a commonly used dictionary are not to be interpreted ideally or excessively unless clearly defined in particular.

An SoC system according to an embodiment of the present invention will be described with reference to FIGS. 1 to 3 .

1 is a block diagram of a System on Chip (SoC) system according to an embodiment of the present invention.

Referring to FIG. 1 , the SoC system includes an SoC device 100 , an external memory 200 , and a display device 300 .

In some embodiments of the present invention, the SoC device 100 , the external memory 200 , and the display device 300 may be implemented as separate chips. Also, in some other embodiments of the present invention, the SoC system may further include other components (eg, a camera module, a network device, etc.) not shown.

Also, in some embodiments of the present invention, such an SoC system may be included in an electronic device capable of outputting a still image signal (or still image) or a moving image signal (or moving image) to the display panel 500 .

The external memory 200 may store program instructions executed in the SoC 100 .

Also, in some embodiments of the present invention, the external memory 200 may store image data for an image to be output to the display device 300 .

In this embodiment, such image data may include moving image data and still image data. Here, the moving image data may be, for example, a combination of a series of different still image data presented in a short time.

In other words, in this embodiment, the moving image data may include dynamic image data, and the still image data may include static image data.

However, the present invention is not limited to this example, and in some cases, the external memory 200 may be omitted. For example, when the SoC device 100 according to the present embodiment outputs image data on the fly, the image data is not stored in the external memory 200 and the external memory 200 is may be omitted.

In some embodiments of the present invention, the external memory 200 may include a volatile memory or a non-volatile memory.

Examples of the volatile memory include dynamic random access memory (DRAM), static random access memory (SRAM), thyristor RAM (T-RAM), zero capacitor RAM (Z-RAM), or twin transistor RAM (TTRAM). , the present invention is not limited thereto.

On the other hand, examples of non-volatile memory include electrically erasable programmable read-only memory (EEPROM), flash memory, magnetic RAM (MRAM), phase change RAM (PRAM), resistive memory, and the like. Again, the present invention is not limited thereto.

The SoC device 100 may control the external memory 100 and/or the display device 300 .

In some embodiments of the present invention, the SoC device 100 is an integrated circuit (IC), processor, application processor, multimedia processor, or integrated multimedia processor. (integrated multimedia processor) may be called.

The display device 300 may include a display driver 400 and a display panel 500 .

In some embodiments of the present invention, the SoC device 100 and the display driver 400 are one module, one system on chip, or one package, for example, a multi-chip. It may be implemented as a multi-chip package.

In some other embodiments of the present invention, the display driver 400 and the display panel 500 may be implemented as one module.

In addition, in some embodiments of the present invention, the external memory 200 , the SoC device 100 , and the display device 300 may be implemented by being included in one electronic device.

The display driver 400 may control the operation of the display panel 500 according to signals output from the SoC device 100 . For example, the display driver 400 may convert image data provided from the SoC device 100 into an image signal and then transmit it to the display panel 500 through the selected interface.

The display panel 500 may output a moving image or a still image based on the image signal provided from the display driver 400 . For example, the display panel 500 may include a liquid crystal display (LCD) panel, a light emitting diode (LED) display panel, an organic LED (OLED) display panel, or an active-matrix OLED (AMOLED) display panel, etc. have.

FIG. 2 is a block diagram of the SoC device of FIG. 1 .

Referring to FIG. 2 , the SoC device 100 includes a system memory 10 , a central processing unit (CPU) 20 , an interrupt controller 30 , a transceiver Rx/Tx 40 , and a memory. The controller may include a memory controller 60 , an image generator 70 and a display controller 80 .

The system memory 10 may store commands and parameters necessary for the operation of the SoC device 100 . For example, the CPU 20 may operate using commands and parameters stored in the system memory 10 .

The CPU 20 may control the overall operation of the SoC device 100 . For example, the CPU 20 may control the operation of each of the components 10 , 30 , 40 , 60 , 70 , and 80 .

In some embodiments of the present invention, the CPU 20 may request the image generator 70 to generate or process an image.

In addition, in some embodiments of the present invention, the CPU 20 controls the display controller 80 when a wake-up interrupt (W_I in FIG. 7 ) is received from the display driver ( 400 in FIG. 1 ) through the transceiver 40 . Image data may be provided to the display driver 400 .

In some embodiments of the present invention, the CPU 20 may be implemented as a multi-core. Such a multi-core may include two or more independent cores.

The processing performance of the plurality of cores may be the same or may be implemented differently as needed.

The interrupt controller 30 may control interrupts generated during the operation of the SoC device 100 .

The interrupt controller 30 may receive interrupts from each component, adjust the execution order of each interrupt, and transmit it to the CPU 20 to perform an operation corresponding to the corresponding interrupt.

In some embodiments of the present invention, the interrupt controller 30 generates an internal interrupt related thereto when a wake-up interrupt (W_I in FIG. 7) is received through the transceiver 40, and the CPU 20 can be forwarded to

In addition, in some embodiments of the present invention, the interrupt controller 30 receives the control of the CPU 20 to generate an exit interrupt (E_I in FIG. 9 ), which is then generated by the display controller 80 and the display driver ( 400 of FIG. 1) may be provided.

The transceiver 40 may transmit/receive commands, signals, interrupts, and data converted according to various interface standards to and from the display device ( 300 of FIG. 1 ).

In some embodiments of the present invention, the transceiver 40 receives a wakeup interrupt (W_I in FIG. 7 ) from the display driver (400 in FIG. 1 ), and sends an exit interrupt (in FIG. 9 ) to the display driver ( 400 in FIG. 1 ). of E_I) can be transmitted.

Also, in some embodiments of the present invention, the transceiver 40 may provide image data stored in an external memory ( 200 in FIG. 1 ) to the display driver ( 400 in FIG. 1 ).

The memory controller 60 may control the operation of the memory device when data is transmitted/received from the external memory ( 200 of FIG. 1 ) connected to the SoC device 100 . That is, the memory controller 60 reads, writes, or erases image data by accessing the external memory (200 in FIG. 1 ) according to the request of the CPU 20 , the image generator 70 , or the display controller 80 . can

The image generator 70 may read and execute program commands related to graphic processing. In some embodiments of the present invention, the image generator 70 may be implemented as a graphic engine, a graphic processing unit (GPU), a graphic accelerator, 2D, or the like. The image generator 70 may generate or process an image under the control of the CPU 20 .

The display controller 80 may control the operation of the SoC device 100 with respect to the display device (300 of FIG. 1 ) or control the operation of the display device (300 of FIG. 1 ) with respect to the SoC device 100 .

In some embodiments of the present disclosure, the display controller 80 may control the memory controller 60 to output data stored in the external memory ( 200 of FIG. 1 ) through the transceiver 40 .

Also, in some embodiments of the present disclosure, the display controller 80 may control the image generator 70 to output image data generated by the image generator 70 through the transceiver 40 .

The display controller 80, in the first mode (I of FIG. 4 ), provides the memory controller 60 or the image generator 70 such that moving image data is provided from the SoC device 100 to the display controller 400 . ), and in the second mode (II in FIG. 4 ), the memory controller 60 or the image generator 70 is configured to provide still image data from the SoC device 100 to the display controller 400 . can be controlled

Further, in some embodiments of the present invention, the display controller 80 transmits image data from the SoC device 100 to the display controller 400 per second (n is a natural number) in the first mode (I in FIG. 4 ). control the memory controller 60 or the image generator 70 to provide It is possible to control the memory controller 60 or the image generator 70 to be provided a number of times (a natural number less than n).

The system bus 90 may serve as a path for data transmission/reception between each component by connecting each component of the SoC device 100 . In some embodiments of the present invention, system bus 90 may include a small bus for data communication between components.

FIG. 3 is a block diagram of the display driver of FIG. 1 .

Referring to FIG. 3 , the display driver 400 may include a transceiver 410 , a driver 420 , and an image analyzer 430 .

The transceiver 410 may receive commands, signals, interrupts, and data converted according to various interface standards from the SoC device ( 100 of FIG. 1 ).

The driver 420 may receive image data through the transceiver 410 and generate an image signal based thereon. Specifically, the driver 420 may generate an image signal corresponding to the provided image data. In addition, the driver 420 may output the generated image signal to the display panel ( 500 of FIG. 1 ). The display panel ( 500 of FIG. 1 ) may be driven by the provided image signal to output an image.

In some embodiments of the present invention, the display panel ( 500 in FIG. 1 ) may include an oxide semiconductor panel. Specifically, the display panel ( 500 in FIG. 1 ) may include an Indium Gallium Zinc Oxide (IGZO) panel. As such, when the display panel (500 in FIG. 1 ) includes the IGZO panel, even if the frame rate of the image output to the panel is reduced, the quality of the image is not impaired.

In some embodiments of the present invention, the driver 420 may include a gate driver and a source driver, but the present invention is not limited thereto.

The image analysis unit 430, for example, analyzes the still image data provided through the transceiver 410 to determine a frame rate of the image to be output to the display panel (500 in FIG. 1), and Based on this, an interrupt can be generated and outputted.

In some embodiments of the present invention, the interrupt generated by the image analyzer 430 and output to the SoC device ( 100 in FIG. 1 ) is to prevent deterioration of the quality of the image output to the display panel ( 500 in FIG. 1 ). It may be a wake-up interrupt (W_I in FIG. 7) requesting image data to the SoC device (100 in FIG. 1). A more detailed description thereof will be given later.

In some embodiments of the present invention, the image analyzer 430 may include a counter 440 and an interrupt generator 450 for generating such an interrupt.

The counter 440 may be used to determine an output timing of such an interrupt. Specifically, the counter 440 counts every pulse of the trigger signal TE after receiving a predetermined control signal from the image analysis unit 430 to reach the target counting value set by the image analysis unit 430 . Then, it may be configured to output a control signal instructing generation of an interrupt to the interrupt generator 450 .

The interrupt generator 450 receives a control signal from the counter 440 to generate an interrupt (eg, a wake-up interrupt (W_I in FIG. 7 )), and transmits it to the SoC device ( FIG. 1 ) through the transceiver 410 . of 100) can be output.

Although the drawings show the counter 440 and the interrupt generator 450 separately for convenience of description, the present invention is not limited thereto.

In some embodiments of the present invention, the functions of the counter 440 and the interrupt generator 450 may be completely integrated into the image analyzer 430 and implemented.

In addition, in some other embodiments of the present invention, the image analyzer 430 , the counter 440 , and the interrupt generator 450 may be implemented completely separated from each other.

In addition, in some embodiments of the present invention, when the interrupt generating unit 450 is omitted and counting of the counter 440 is completed, the present invention is modified so that the image analysis unit 430 generates and outputs an interrupt. may be carried out.

Hereinafter, an operation of the SoC system according to an embodiment of the present invention will be described with reference to FIGS. 4 to 10 .

4 to 10 are diagrams for explaining the operation of the SoC system of FIG. 1 .

Hereinafter, the operation of the SoC system according to the technical idea of the present invention in a command mode will be described as an example. That is, when the SoC device ( 100 in FIG. 1 ) provides image data to the display driver ( 400 in FIG. 1 ), the image data is synchronized with the trigger signal TE provided from the display driver ( 400 in FIG. 1 ) and provided It is explained by taking an example. However, the present invention is not limited to these examples.

First, referring to FIGS. 4 and 5 , the SoC device 100 according to the present embodiment continuously outputs the same image data to the display driver 400 p (p is a natural number equal to or greater than 2) times in the first mode until it is output. (I) can work.

And, when the SoC device 100 outputs the same image data to the display driver 400 consecutively p times, it is determined that a still image (a state in which the image is not updated) should be output to the display panel 500, It can operate in the second mode (II).

In some embodiments of the present invention, the first mode (I) may be, for example, a video playback mode in which different images are continuously output to the display panel 500, and the second mode (II) is, for example, For example, it may be a still image reproduction mode in which the same images are continuously output to the display panel 500 .

Hereinafter, for convenience of explanation, a section in which the SoC device 100 operates in the first mode (I) and a section in which the SoC device 100 operates in the second mode (II) will be separately described. In the operation of , the first mode (I) and the second mode (II) may not be clearly distinguished.

That is, when the SoC device 100 operates to output an image to the display panel 500 , the first mode (I) and the second mode (II) may be continuously repeated.

Meanwhile, here, when the SoC device 100 outputs the same image data to the display driver 400 consecutively p (p is a natural number greater than or equal to 2) times, the first mode (I) is converted to the second mode (II) has been illustrated, but the present invention is not limited thereto. That is, the conditions under which the display driver 400 is converted from the moving picture playback mode to the still image playback mode may be changed.

Hereinafter, switching to the second mode (II) when the SoC device 100 consecutively outputs the same image data to the display driver 400 twice (ie, p=2) will be described as an example. It is not limited to these examples.

Referring back to FIGS. 4 and 5 , in section A, the SoC device 100 receives the trigger signal TE from the display driver 400 and generates different image data I1 to I3 as the trigger signal TE. It can be output in synchronization with .

In some embodiments of the present invention, the trigger signal TE may have a frequency of, for example, 60 Hz. That is, the trigger signal TE may include 60 pulses per second. However, the present invention is not limited to this example, and the frequency of the trigger signal TE may be modified differently.

In section A, for example, the display controller 80 of the SoC device 100 is configured to output the image data I1 to I3 stored in the external memory 200 in synchronization with the pulse of the trigger signal TE. (60 in FIG. 2) can be controlled.

In addition, in some other embodiments of the present invention, the display controller 80 of the SoC device 100 may include an image generator (70 in FIG. 2 ) so that the image data 200 is output in synchronization with the pulse of the trigger signal TE. ) can be controlled.

In section A, the image data I1 to I3 provided from the SoC device 100 to the display driver 400 may include moving image data.

That is, since the image data I1 to I3 provided from the SoC device 100 to the display driver 400 in the section A are image data I1 to I3 for video reproduction, they may be different from each other.

If the trigger signal TE includes n pulses per second (where n is a natural number), the SoC device 100 may output different image data I1 to I3 n times per second in section A. .

The different image data I1 to I3 provided to the display driver 400 may be generated as a predetermined image signal through the driver 420 and provided to the display panel 500 . Accordingly, images according to different image data I1 to I3 may be output to the display panel 500 .

Next, referring to FIG. 4 , in section B, since the same image data I3 from the SoC device 100 is outputted to the display driver 400 twice, the display controller 80 included in the SoC device 100 operates The mode may be switched from the first mode (I) to the second mode (II).

Next, in the second mode (II), the SoC device 100 does not output image data until the wake-up interrupt W_I is received from the display driver 400, and image data when the wake-up interrupt W_I is received (For example, I3) may be output in synchronization with a pulse included in the trigger signal TE.

In this way, the image data output from the SoC device 100 to the display driver 400 in the second mode (II) may include, for example, still image data.

The timing at which the wakeup interrupt W_I is output from the display driver 400 may be determined by the image analyzer 430 in the display driver 400 .

Specifically, the image analysis unit 430 may analyze the provided image data (here, I3) to determine a frame rate of an image to be output to the display panel, and generate and output a wakeup interrupt (W_I) based on this. .

Here, as a result of analyzing the image data I3 by the image analysis unit 430, it is assumed that when an image is output at 20 frames per second to the display panel 500, it is determined that the quality of the still image is not deteriorated. let it go

In this way, when the image analysis unit 430 determines to output the image data I3 to the display panel 500 at 20 frames per second, the display driver 400 transmits the image data I3 20 times per second to the SoC device ( 100) can be provided. Accordingly, the image analyzer 430 may provide the wakeup interrupt W_I to the SoC device 100 20 times per second.

Accordingly, if the trigger signal TE includes n pulses per second (n is a natural number), the SoC device 100 transmits the same image data I3 m per second in the second mode II. (m is a natural number less than n) can be printed.

4 and 6 , in section C, the SoC device 100 does not output the image data (eg, I3) because the wakeup interrupt W_I is not provided from the display driver 400 . can

Specifically, for example, the display controller 80 of the SoC device 100 prevents the image data (eg, I3 ) stored in the external memory 200 from being output in synchronization with the pulse of the trigger signal TE. The memory controller ( 60 in FIG. 2 ) may be controlled.

In addition, in some embodiments of the present disclosure, the display controller 80 of the SoC device 100 may include an image generator so that image data (eg, I3) is not output in synchronization with the pulse of the trigger signal TE. (70 in FIG. 2) can be controlled.

Since the image data (eg, I3) is not provided to the display driver 400 in this way, an image for the image data (eg, I3) may not be output even to the display panel 500 .

Meanwhile, in section C, the image analyzer 430 may apply a predetermined control signal to the counter 440 so that the counter 440 can start counting. In addition, the counting value of the counter 440 may be monitored.

Next, referring to FIGS. 4 and 7 , in section D, when the counting value of the counter 440 reaches a value calculated by the image analysis unit 430 by analyzing the image data I3, the image analysis unit 430 provides a wakeup interrupt (W_I) to the SoC device 100 .

In some embodiments of the present invention, the wakeup interrupt W_I may be provided to the SoC device 100 in synchronization with a pulse included in the trigger signal TE as illustrated.

The interrupt controller ( 30 in FIG. 2 ) of the SoC device 100 receiving the wakeup interrupt W_I in this way may control the display controller 80 to prepare image data output through the CPU ( 20 in FIG. 2 ). .

Referring back to FIGS. 4 and 7 , in section E, for example, the display controller 80 of the SoC device 100 receives image data (eg, I3) stored in the external memory 200 as a trigger signal. The memory controller ( 60 of FIG. 2 ) may be controlled to be output in synchronization with the pulse of (TE).

In addition, in some other embodiments of the present invention, the display controller 80 of the SoC device 100 is configured to output the image data (eg, I3) in synchronization with the pulse of the trigger signal TE. 70) of FIG. 2 can be controlled.

Accordingly, the image data I3 from the SoC device 100 is provided to the driver 420 of the display driver 400 , and the driver 420 generates an image signal based on the received image data I3 and transmits the image data. may be output to the display panel 500 . Accordingly, an image related to the image data I3 may be output to the display panel 500 .

As shown in FIG. 4 , in some embodiments of the present invention, a wake-up interrupt W_I is a pulse of a trigger signal TE provided from the display driver 400 to the SoC device 100 , and in response to the SoC Pulses of the trigger signal TE through which the device 100 provides image data (eg, I3 ) to the display driver 400 may be different from each other.

That is, when the wakeup interrupt W_I is received by the transceiver 40 in synchronization with the first pulse included in the trigger signal TE, the display controller 80 transmits the image data (eg, I3). The first pulse may be output to the display driver 400 in synchronization with a different second pulse.

Thereafter, the SoC system may operate by repeating sections C to E until a point in time when a video is to be output on the display panel 500 .

Next, referring to FIGS. 8 and 9 , in section F, when an event (eg, a user's panel touch, etc.) occurs in which the display controller 80 must be switched to the video playback mode (ie, the first mode), The interrupt controller 30 of the SoC device 100 may generate an exit interrupt E_I under the control of the CPU 20 , and may provide it to the display controller 80 . Also, the interrupt controller 30 may provide the exit interrupt E_I generated through the transceiver 40 to the display driver 400 .

The display driver 400 receiving the exit interrupt E_I in this way may prepare to drive the driver 420 using the moving image data provided from the SoC device 100 .

In addition, the display controller 80 receiving the exit interrupt E_I may synchronize the display driver 400 with the trigger signal TE to prepare to transmit the moving image data. That is, the display controller 80 may prepare to switch from the second mode (II) to the first mode (I).

Next, referring to FIGS. 8 and 10 , in section G, when image data to be provided from the SoC device 100 to the display driver 400 is changed (eg, changed from I3 to I4), the SoC device 100 The display controller 80 of the memory controller 60 so that the image data (eg, I4) stored in the external memory (200 in FIG. 1) is output in synchronization with the trigger signal TE through the transceiver 40 can be controlled

In addition, in some embodiments of the present invention, the display controller 80 outputs the image data (eg, I4 ) generated by the image generator 70 in synchronization with the trigger signal TE through the transceiver 40 . The image generator 70 may be controlled so as to be possible.

That is, the display controller 80 is configured such that, in the first mode (I), the moving image data (eg, I4 and I5) is provided from the SoC device 100 to the display controller 400 by the memory controller 60 or The image generator 70 may be controlled.

Accordingly, when the trigger signal TE includes n pulses per second, in the second mode (II), image data (eg, I3) is transmitted from the SoC device 100 to the display controller 400 at m ( natural number less than n), but in the first mode (I), image data (eg, I4, I5) may be provided n times per second.

The different image data I4 and I5 provided to the display driver 400 may be generated as a predetermined image signal through the driver 420 and provided to the display panel 500 . Accordingly, images according to different image data I4 and I5 may be output to the display panel 500 .

As such, in the SoC system according to the present embodiment, when a still image generated from still image data is to be output to the display panel 500 , the still image data is analyzed to reduce the quality of the image output to the display panel 500 . Determines the frame rate of the video that can be blocked.

Also, by generating a wakeup interrupt W_I at a point in time when image data is to be processed according to the determined frame rate, the image data throughput in the SoC device 100 and the display driver 400 is minimized.

Accordingly, in displaying an image on the display panel 500 , power consumption can be reduced.

In addition, in the SoC system according to the present embodiment, the display driver 400 is synchronized with the trigger signal TE in the first mode (I) to process the moving image data, and in the second mode (II), the wake-up interrupt Since still image data is processed using (W_I), the frame buffer in the display driver 400 can be omitted. Accordingly, miniaturization of the display driver 400 may be possible.

Next, an SoC system according to another embodiment of the present invention will be described with reference to FIG. 11 .

11 is a block diagram of a display driver included in an SoC system according to another embodiment of the present invention.

Hereinafter, descriptions overlapping those of the above-described embodiment will be omitted, and differences will be mainly described.

Referring to FIG. 11 , the display driver 401 included in the SoC system according to another embodiment of the present invention includes a transceiver 411 , a driver 421 , an image analyzer 431 , and a frame buffer 461 . may include

The transceiver 411 may receive commands, signals, interrupts, and data converted according to various interface standards from the SoC device ( 100 of FIG. 1 ).

The driver 421 may receive image data stored in the frame buffer 461 through the transceiver 411 and generate an image signal based thereon. Specifically, the driver 421 may generate an image signal corresponding to the provided image data. In addition, the driver 421 may output the generated image signal to the display panel ( 500 of FIG. 1 ). The display panel ( 500 of FIG. 1 ) may be driven by the provided image signal to output an image.

The image analysis unit 431 analyzes, for example, still image data stored in the frame buffer 461 to determine a frame rate of an image to be output to the display panel (500 in FIG. 1 ), and based on this, an interrupt (eg, For example, W_I) of FIG. 4 may be generated and output.

In some embodiments of the present invention, the image analyzer 431 may include a counter 441 and an interrupt generator 451 for generating such an interrupt.

The frame buffer 461 may store image data provided from the SoC device ( 100 of FIG. 1 ) through the transceiver 411 , and provide it to the driver 421 and the image analyzer 431 .

12 is a block diagram of a display driver included in an SoC system according to another embodiment of the present invention.

In the following, descriptions overlapped with the above-described embodiment will be omitted and the differences will be mainly described.

12 , the display driver 402 included in the SoC system according to another embodiment of the present invention includes a transceiver 412 , a driver 422 , an image analyzer 432 , and an interrupt generator 452 . ) may be included.

The transceiver 412 may receive commands, signals, interrupts, and data converted according to various interface standards from the SoC device ( 100 of FIG. 1 ).

The driver 422 may receive the image data provided through the transceiver 412 and generate an image signal based thereon. Specifically, the driver 422 may generate an image signal corresponding to the provided image data. In addition, the driver 422 may output the generated image signal to the display panel ( 500 of FIG. 1 ). The display panel ( 500 of FIG. 1 ) may be driven by the provided image signal to output an image.

The image analysis unit 432, for example, analyzes the still image data provided through the transceiver 412 to determine the frame rate of the image to be output to the display panel (500 in FIG. 1), and uses the result to the interrupt generator (452) may be provided.

That is, in the present embodiment, the image analysis unit 432 may provide only the image analysis result to the interrupt generation unit 452 without generating an interrupt (eg, W_I of FIG. 4 ).

In some embodiments of the present invention, the image analysis result may be a target counting value of the counter 442 included in the interrupt generator 452 .

The interrupt generator 452 monitors whether the counting value of the counter 442 reaches the target counting value, and when the counting value of the counter 442 reaches the target counting value, the interrupt (eg, W_I in FIG. 4 ) ) can be created.

The interrupt (eg, W_I in FIG. 4 ) generated in this way may be synchronized to a trigger signal (eg, TE in FIG. 4 ) and provided to the SoC device ( 100 in FIG. 1 ) through the transceiver 412 . .

13 is a block diagram of an SoC system according to another embodiment of the present invention.

Referring to FIG. 13 , an SoC system 600 according to another embodiment of the present invention includes an SoC device 1 , a power source 620 , input/output ports 630 , an expansion card 640 , and a network device ( 650 ), a display 660 , and a camera module 670 .

The SoC device 1 may be substantially the same as the above-described SoC device ( 100 in FIG. 1 ). The SoC device 1 may control an operation of at least one of the components 620 to 670 .

The power source 620 may supply an operating voltage to at least one of the components 1 and 630 to 670 .

The input/output ports 630 may include ports capable of transmitting data to the SoC system 600 or transmitting data output from the system 600 to an external device.

The expansion card 640 may be implemented as, for example, a secure digital (SD) card or a multimedia card (MMC). In some embodiments of the present invention, the expansion card 640 may be a Subscriber Identification Module (SIM) card or a Universal Subscriber Identity Module (USIM) card.

Network device 650 may include a device capable of connecting SoC system 600 to a wireless network.

The display 660 may display data output from the input/output ports 630 , the expansion card 640 , or the network device 650 . The display 660 may be substantially the same as the display device 300 illustrated in FIG. 1 .

The camera module 670 may be a module capable of converting an optical image into an electrical image. Accordingly, the electrical image output from the camera module 670 may be stored in the SoC device 1 or the expansion card 640 . Also, the electrical image output from the camera module 670 may be displayed through the display 660 under the control of the SoC device 1 . In some embodiments of the present invention, the camera module 670 may include an image sensor.

14 to 16 are exemplary semiconductor systems to which SoC systems according to some embodiments of the present invention may be applied.

FIG. 14 is a diagram illustrating a tablet PC 1200 , FIG. 15 is a diagram illustrating a notebook computer 1300 , and FIG. 16 is a diagram illustrating a smartphone 1400 .

At least one of the SoC systems according to the embodiments of the present invention described above may be used in the tablet PC 1200 , the notebook computer 1300 , the smart phone 1400 , and the like.

In addition, it is apparent to those skilled in the art that at least one of the SoC systems according to embodiments of the present invention may be applied to other integrated circuit devices not illustrated. That is, although only the tablet PC 1200 , the notebook computer 1300 , and the smart phone 1400 have been mentioned as examples of the semiconductor system according to the present embodiment, the example of the semiconductor system according to the present embodiment is not limited thereto.

In some embodiments of the present invention, the semiconductor system includes a computer, an Ultra Mobile PC (UMPC), a workstation, a net-book, a Personal Digital Assistants (PDA), a portable computer, a wireless phone. , mobile phone, e-book, PMP (portable multimedia player), portable game console, navigation device, black box, digital camera, 3D receiver (3-dimensional television), digital audio recorder, digital audio player, digital picture recorder, digital picture player, digital video recorder ), a digital video player, etc. may be implemented.

Although embodiments of the present invention have been described above with reference to the accompanying drawings, the present invention is not limited to the above embodiments, but may be manufactured in various different forms, and those of ordinary skill in the art to which the present invention pertains. It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without changing the technical spirit or essential features of the present invention. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive.

100: SoC device
200: external memory
300: display device
400: display driver
500: display panel

Claims (20)

a display controller that receives a trigger signal from the outside and outputs image data using the trigger signal; and
Including a transceiver receiving a first interrupt (interrupt) from the outside,
The display controller is
In the first mode, the image data is output in synchronization with the pulse included in the trigger signal,
In a second mode different from the first mode, the image data is not output until the first interrupt is received, and when the first interrupt is received, the image data is synchronized to a pulse included in the trigger signal and output System on Chip (SoC) devices. The method of claim 1,
In the first mode, the image data includes moving image data,
In the second mode, the image data includes still image data. The method of claim 1,
The display controller is
In the first mode, the image data is output n times per second (n is a natural number),
In the second mode, the SoC device outputs the image data m times per second (m is a natural number less than n). The method of claim 1,
The trigger signal is an SoC device provided from a display driver that generates an image signal based on the image data and provides it to a display panel. The method of claim 1,
The first interrupt is synchronized with the trigger signal and is received by the transceiver. 6. The method of claim 5,
The first interrupt is received by the transceiver in synchronization with the first pulse included in the trigger signal,
The display controller is configured to synchronize the image data with a second pulse different from the first pulse and output the outputted image data. The method of claim 1,
The display controller synchronizes the image data with the pulse included in the trigger signal and outputs it,
and controlling the external memory so that the image data stored in the external memory is output in synchronization with a pulse included in the trigger signal. The method of claim 1,
When the display controller continuously outputs the same image data p (p is a natural number greater than or equal to 2) times in the first mode, the operation mode of the display controller is changed from the first mode to the second mode. The method of claim 1,
The display controller operates in the second mode using the first interrupt received from the transceiver,
When the transceiver transmits a second interrupt different from the first interrupt to the outside, the operation mode of the display controller is changed from the second mode to the first mode. a display controller configured to receive a trigger signal to which pulses are applied n times per second (n is a natural number) from a display driver controlling the operation of the display panel, and output image data to the display driver using the trigger signal; and
Including a transceiver receiving an interrupt from the display driver,
The display controller is
In the first mode, outputting the image data n times per second using the trigger signal,
In a second mode different from the first mode, an SoC (System on Chip) device for outputting the image data m times per second (m is a natural number less than n) using the trigger signal and the received interrupt. 11. The method of claim 10,
The interrupt is applied m times per second to the transceiver from the outside. 11. The method of claim 10,
and m is an SoC device determined by the image data. 11. The method of claim 10,
In the first mode, the image data includes different first and second image data,
In the second mode, the image data includes third and fourth image data identical to each other. A display driver that outputs a trigger signal including a plurality of pulses to the outside, comprising:
a driver for receiving image data, generating an image signal based on the received image data, and outputting the generated image signal to a display panel; and
An image analysis unit that analyzes the image data to determine a frame rate of an image to be output to the display panel, and generates and outputs an interrupt based on this,
the interrupt is used to determine the timing at which the image data is provided to the driver;
The image analyzer may be configured to provide the image data in synchronization with a first pulse among the plurality of pulses, and may be synchronized with a second pulse adjacent to the first pulse among the plurality of pulses to provide the image data, when the image data is not provided. A display driver for determining a frame rate of the image signal to be output to the display panel by analyzing image data synchronized with a first pulse. 15. The method of claim 14,
The display panel is a display driver including an IGZO (Indium Gallium Zinc Oxide) panel. 15. The method of claim 14,
The display driver further comprising a counter used to determine an output timing of the interrupt. delete 15. The method of claim 14,
The display driver further includes a frame buffer in which the provided image data is stored,
When the image data stored in the frame buffer is not updated at a predetermined timing, the image analyzer is configured to analyze the image data stored in the frame buffer to determine a frame rate of the image signal to be output to the display panel. . 15. The method of claim 14,
wherein the image data includes still image data. a display driver generating an image signal based on the image data and outputting it to a display panel; and
a SoC device that provides the image data to the display driver using a trigger signal provided from the display driver,
The SoC device comprises:
When the image data is the first image data, the image data is provided to the display driver by using the trigger signal,
When the image data is second image data different from the first image data, after receiving an interrupt from the display driver, the SoC system provides the image data to the display driver using the trigger signal.

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