KR102723113B1 - Display Device And Method Of Fabricating The Same - Google Patents

Abstract

The present invention provides a display device including a substrate including at least one subpixel having a light-emitting region and a circuit region; at least one thin film transistor arranged in the circuit region on the substrate; a planarization layer arranged on the at least one thin film transistor; a first electrode arranged in the light-emitting region and the circuit region on the planarization layer; a shielding electrode arranged in the circuit region on the planarization layer; an light-emitting layer arranged in the light-emitting region and the circuit region on the first electrode and the light-shielding electrode; and a second electrode arranged in the light-emitting region and the circuit region on the light-emitting layer.

Description

{Display Device And Method Of Fabricating The Same}

The present invention relates to a display device, and more particularly, to a display device in which light leakage is minimized by a light-shielding electrode, and a method for manufacturing the same.

Recently, flat panel displays such as liquid crystal display devices (LCDs), plasma display panel devices (PDPs), organic light emitting diode display devices (OLEDs), and field emission display devices (FEDs) with excellent characteristics such as thinness, weight reduction, and low power consumption have been widely developed and applied in various fields.

Among flat panel displays, an organic light-emitting diode display is a device that emits light when charges are injected into a light-emitting layer formed between the cathode, which is an electron-injecting electrode, and the anode, which is a hole-injecting electrode, and then excitons are formed by the combination of electrons and holes and then annihilated.

In such organic light-emitting diode displays, light generated in the light-emitting layer is emitted to the outside through the anode of the light-emitting area of a subpixel to display an image. However, there is a problem in that light generated in the light-emitting layer is emitted to the outside through the anode of the circuit area of a subpixel that does not contribute to the image display, causing light leakage and deteriorating the display quality of the image.

The present invention has been proposed to solve such problems, and aims to provide a display device and a manufacturing method thereof in which light leakage through a circuit area is minimized and image display quality is improved by selectively forming a light-blocking electrode that blocks light from a light-emitting layer in a circuit area of each subpixel.

Another object of the present invention is to provide a display device and a manufacturing method thereof in which deterioration of a plurality of elements in a circuit area due to light from a light-emitting layer is minimized by selectively forming a light-blocking electrode that blocks light from a light-emitting layer in a circuit area of each subpixel.

In order to solve the above problem, the present invention provides a display device including a substrate including at least one subpixel having a light-emitting region and a circuit region; at least one thin film transistor arranged in the circuit region on the substrate; a planarization layer arranged on the at least one thin film transistor; a first electrode arranged in the light-emitting region and the circuit region on the planarization layer; a shielding electrode arranged in the circuit region on the planarization layer; an light-emitting layer arranged in the light-emitting region and the circuit region on the first electrode and the light-shielding electrode; and a second electrode arranged in the light-emitting region and the circuit region on the light-emitting layer.

And, the first electrode may include a transparent conductive material, and the light-shielding electrode may include an opaque metal material.

Additionally, the first electrode may include indium tin oxide, and the light-shielding electrode may include molybdenum titanium.

And, the light-shielding electrode can be in contact with the first electrode at the upper or lower portion of the first electrode.

In addition, the at least one thin film transistor may include a semiconductor layer disposed in a circuit area on the upper portion of the substrate; a gate insulating layer disposed on a central portion of the semiconductor layer; a gate electrode disposed on the upper portion of the gate insulating layer; and a source electrode and a drain electrode connected to both ends of the semiconductor layer.

And, the display device may further include a light-shielding layer disposed on an upper portion of a substrate corresponding to the semiconductor layer; a buffer layer disposed between the light-shielding layer and the semiconductor layer; an interlayer insulating layer disposed between the semiconductor layer and the source electrode and the drain electrode; and a protective layer disposed between the source electrode and the drain electrode and the planarization layer.

In addition, the display device may further include a color filter layer disposed in the light-emitting area between the protective layer and the flattening layer.

Meanwhile, the present invention provides a method for manufacturing a display device, including the steps of forming at least one thin film transistor in a circuit region among a light-emitting region and a circuit region of at least one subpixel on an upper portion of a substrate; forming a planarization layer on the at least one thin film transistor; forming a first electrode on the light-emitting region and the circuit region on the planarization layer; forming a light-shielding electrode on the circuit region on the planarization layer; forming a light-emitting layer on the light-emitting region and the circuit region on the first electrode and the light-shielding electrode; and forming a second electrode on the light-emitting region and the circuit region on the light-emitting layer.

And, the step of forming the first electrode and the step of forming the light-shielding electrode may include the step of sequentially forming a transparent conductive material layer and an opaque conductive material layer on the planarization layer; and the step of sequentially forming the first electrode and the light-shielding electrode on the planarization layer by etching the transparent conductive material layer and the opaque conductive material layer using an exposure mask having a transparent portion, a semi-transparent portion, and a blocking portion.

In addition, the step of forming the first electrode and the light-shielding electrode using the exposure mask may include the steps of forming a photoresist layer on the opaque conductive material layer; exposing the photoresist layer through the exposure mask to form a first photoresist pattern having a first thickness and a second photoresist pattern having a second thickness smaller than the first thickness on the opaque conductive material layer; the step of etching the opaque conductive material layer and the transparent conductive material layer using the first and second photoresist patterns as an etching mask to form the first electrode; the step of removing the second photoresist pattern; and the step of etching the opaque conductive material layer using the first photoresist pattern as an etching mask to form the light-shielding electrode.

And, the blocking portion of the exposure mask may correspond to the circuit area, the semi-transparent portion of the exposure mask may correspond to the light-emitting area, and the transmissive portion of the exposure mask may correspond to the boundary of the at least one subpixel.

In addition, the step of forming the first electrode and the step of forming the light-shielding electrode may include a step of forming the light-shielding electrode through a first mask process on the planarization layer; and a step of forming the first electrode through a second mask process on the light-shielding electrode.

And, the step of forming at least one thin film transistor may include the steps of forming a semiconductor layer in a circuit area on the upper portion of the substrate; the step of forming a gate insulating layer on the upper portion of the central portion of the semiconductor layer; the step of forming a gate electrode on the upper portion of the gate insulating layer; and the step of forming a source electrode and a drain electrode connected to both ends of the semiconductor layer.

In addition, the method for manufacturing the display device may further include a step of forming a light-shielding layer on an upper portion of a substrate corresponding to the semiconductor layer; a step of forming a buffer layer between the light-shielding layer and the semiconductor layer; a step of forming an interlayer insulating layer between the semiconductor layer and the source electrode and the drain electrode; and a step of forming a protective layer between the source electrode and the drain electrode and the planarization layer.

In addition, the method for manufacturing the display device may further include a step of forming a color filter layer in the light-emitting area between the protective layer and the flattening layer.

The present invention has the effect of minimizing light leakage through the circuit area and improving the display quality of the image by selectively forming a light-blocking electrode that blocks light from the light-emitting layer in the circuit area of each subpixel.

In addition, the present invention has the effect of minimizing deterioration of a number of elements in a circuit area due to light from the light-emitting layer by selectively forming a light-blocking electrode that blocks light from the light-emitting layer in the circuit area of each subpixel.

FIG. 1 is a plan view illustrating a plurality of subpixels of a display device according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view illustrating one subpixel of a display device according to an embodiment of the present invention.
FIGS. 3A to 3G are cross-sectional views illustrating a method for manufacturing a display device according to an embodiment of the present invention.
FIG. 4 is a graph showing the transmittance of the first electrode and the light-shielding electrode of the display device according to an embodiment of the present invention.

Hereinafter, a display device and a manufacturing method thereof according to the present invention will be described with reference to the attached drawings.

FIG. 1 is a plan view illustrating a plurality of subpixels of a display device according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view illustrating one subpixel of a display device according to an embodiment of the present invention, explaining using a bottom emission type organic light emitting diode display device as an example.

As illustrated in FIGS. 1 and 2, a display device (110) according to an embodiment of the present invention includes a substrate (120), a switching thin film transistor (Tsw), a driving thin film transistor (Tdr), a sensing thin film transistor (Tse), a storage capacitor (Cst), and a light emitting diode (Del).

Specifically, the substrate (120) includes a plurality of pixels (P), each pixel (P) includes first, second, third, and fourth sub-pixels (SP1, SP2, SP3, SP4), and the first, second, third, and fourth sub-pixels (SP1, SP2, SP3, SP4) each include a light-emitting area (EA) and a circuit area (CA).

For example, the first, second, third, and fourth subpixels (SP1, SP2, SP3, SP4) can emit light corresponding to blue, green, red, and white, respectively.

The subpixel (SP) of FIG. 2 may be any one of the first, second, third, and fourth subpixels (SP1, SP2, SP3, SP4) of FIG. 1.

A light-shielding layer (122) and a connection pattern (124) are arranged in the circuit area (CA) of each subpixel (SP) on the upper portion of the substrate (120).

The light-shielding layer (122) is arranged to overlap the semiconductor layers of each of the switching thin film transistor (Tsw), the driving thin film transistor (Tdr), and the sensing thin film transistor (Tse), and serves to prevent external light incident through the substrate (120) from being irradiated onto the semiconductor layer and causing the semiconductor layer to deteriorate.

The connection pattern (124) connects the power wiring (PL) and the subpixel (SP) not adjacent to the power wiring (PL), and serves to supply the high potential voltage of the power wiring (PL) to the driving thin film transistor (Tdr) of the subpixel (SP) not adjacent to the power wiring (PL).

For example, the light shielding layer (122) and the connecting pattern (124) may include a metal material such as aluminum (Al), molybdenum titanium (MoTi), or copper (Cu).

A buffer layer (126) is arranged on the front surface of the substrate (120) above the light-shielding layer (122) and the connection pattern (124).

For example, the buffer layer (126) may include a first layer of silicon nitride (SiNx) at the bottom and a second layer of silicon oxide (SiOx) at the top.

A semiconductor layer (128) is arranged on top of a buffer layer (126) corresponding to a light-shielding layer (122).

For example, the semiconductor layer (128) may include a semiconductor material such as polycrystalline silicon or an oxide semiconductor material such as indium-gallium-zinc oxide (IGZO).

When the semiconductor layer (128) includes an oxide semiconductor material, both ends of the semiconductor layer (128) exposed through the first and second contact holes of the gate insulating layer (130) are conductive and function as a source region and a drain region, and the central portion of the semiconductor layer (128) covered with the gate insulating layer (130) can function as a channel region.

A gate insulating layer (130) and a gate electrode (132) are sequentially arranged on the central upper portion of the semiconductor layer (128), and a gate wiring (GL) and a sensing wiring (SL) are arranged along the first direction (horizontal direction) on the gate insulating layer (130) of the circuit area (CA).

For example, the gate insulating layer (130) may include an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx), and the gate electrode (132), gate wiring (GL), and sensing wiring (SL) may include a metal material such as aluminum (Al), molybdenum titanium (MoTi), or copper (Cu).

An interlayer insulating layer (134) is arranged on the entire surface of the substrate (120) above the gate electrode (132), gate wiring (GL), and sensing wiring (SL).

The interlayer insulating layer (134) may have first and second contact holes exposing both ends of the semiconductor layer (128), and the interlayer insulating layer (134) and the buffer layer (126) may have a third contact hole exposing one end of the light-shielding layer (122).

For example, the interlayer insulating layer (134) may include an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx).

A source electrode (136) and a drain electrode (138) are arranged on the interlayer insulating layer (134) corresponding to both ends of the semiconductor layer (128), and a data wire (DL), a power wire (PL), and a reference wire (RL) are arranged along a second direction (vertical direction) intersecting the first direction on the interlayer insulating layer (134) of the circuit area (CA).

The source electrode (136) can be connected to one end of the semiconductor layer (128) through the first contact hole of the interlayer insulating layer (134) and to one end of the light-shielding layer (122) through the third contact hole of the interlayer insulating layer (134) and the buffer layer (126), and the drain electrode (138) can be connected to the other end of the semiconductor layer (128) through the second contact hole of the interlayer insulating layer (134).

For example, the source electrode (136), drain electrode (138), data wiring (DL), power wiring (PL), and reference wiring (RL) may include a metal material such as aluminum (Al), molybdenum titanium (MoTi), or copper (Cu).

A semiconductor layer (128), a gate electrode (132), a source electrode (136), and a drain electrode (138) constitute a driving thin film transistor (Tdr).

Although not illustrated, the switching thin film transistor (Tsw) and sensing thin film transistor (Tse) may have the same structure as the driving thin film transistor (Tdr).

The gate electrode of the switching thin film transistor (Tsw) is connected to the gate wiring (GL), the source electrode of the switching thin film transistor (Tsw) is connected to the data wiring (DL), and the drain electrode of the switching thin film transistor (Tsw) is connected to the gate electrode (132) of the driving thin film transistor (Tdr).

The source electrode (136) of the driving thin film transistor (Tdr) is connected to the first electrode (150) of the light emitting diode (Del), and the drain electrode (138) of the driving thin film transistor (Tdr) is connected to the power wiring (PL).

The gate electrode of the sensing thin film transistor (Tse) is connected to the sensing wiring (SL), the source electrode of the sensing thin film transistor (Tse) is connected to the first electrode (150) of the light emitting diode (Del), and the drain electrode of the sensing thin film transistor (Tse) is connected to the reference wiring (RL).

A protective layer (140) is arranged on the entire surface of the substrate (120) above the switching thin film transistor (Tsw), the driving thin film transistor (Tdr), and the sensing thin film transistor (Tse).

For example, the protective layer (140) may include an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx).

A color filter layer (142) is arranged in the light-emitting area (EA) on the upper side of the protective layer (140).

The color filter layer (142) can transmit components of a specific wavelength among the light of the light emitting layer (154) and absorb components of the remaining wavelengths.

For example, blue, green and red color filter layers may be arranged on the upper portion of the protective layer (140) of the light-emitting area (EA) of the first, second and third sub-pixels (SP1, SP2, SP3), respectively, and the color filter layer may be omitted on the upper portion of the protective layer (140) of the light-emitting area (EA) of the fourth sub-pixel (SP4).

A flattening layer (144) is placed on the entire surface of the substrate (120) above the color filter layer (142) and the protective layer (140).

The planarization layer (144) serves to planarize the surface of the substrate (120) having the color filter layer (142), the switching thin film transistor (Tsw), the driving thin film transistor (Tdr), and the sensing thin film transistor (Tse).

For example, the planarization layer (144) may include an organic insulating material such as photoacryl.

The planarization layer (144) and the protective layer (140) have a fourth contact hole exposing the source electrode (136).

A first electrode (150) is placed in the light-emitting area (EA) and circuit area (CA) of each subpixel (SP) on the upper side of the flattening layer (144).

The first electrode (150) may be an anode that supplies holes to the light-emitting layer (154) and is connected to the source electrode (136) through the fourth contact hole.

For example, the first electrode (150) may include indium zinc oxide (ITO) having a relatively large work function.

A light-shielding electrode (152) is placed in the circuit area (CA) of each subpixel (SP) above the first electrode (150).

The light-shielding electrode (152) absorbs light generated in the light-emitting layer (154) and prevents it from being transmitted to the substrate (120).

For example, the light-shielding electrode (152) may include molybdenum titanium (MoTi).

In the embodiment of Fig. 2, the light-shielding electrode (152) is placed in the circuit area (CA) above the first electrode (150), but in other embodiments, the light-shielding electrode (152) may be placed in the circuit area (CA) below the first electrode (150).

A light-emitting layer (154) is arranged on the entire surface of the substrate (120) above the first electrode (150) and the light-shielding electrode (152).

The emitting layer (154) may include a hole injecting layer, a hole transporting layer, an emitting material layer, an electron transporting layer, and an electron injecting layer.

A second electrode (156) is placed on the entire surface of the substrate (120) above the light-emitting layer (154).

The second electrode (156) may be a cathode that supplies electrons to the light-emitting layer (154).

For example, the second electrode (156) may include aluminum (Al) or magnesium silver (MgAg) having a relatively small work function.

The first electrode (150), the light-emitting layer (154), and the second electrode (156) constitute a light-emitting diode (Del).

Although not shown, an encapsulation layer is placed on the entire surface of the substrate (120) above the second electrode (170) to prevent the penetration of external moisture or oxygen.

In this display device (110), by directly arranging the first electrode (150) on top of the planarization layer (144) without a bank layer exposing a portion of the first electrode (150), the light-emitting area (EA) of each subpixel (SP) can be maximized, thereby improving brightness.

And, by selectively arranging a light-blocking electrode (152) that absorbs and blocks light in the circuit area (CA) of each subpixel (SP), light leakage (LL) emitted to the outside by light generated in the light-emitting layer (154) of the circuit area (CA) passing through the transparent first electrode (150), the planarization layer (144), the protective layer (140), the interlayer insulating layer (134), and the substrate (120) can be minimized, and as a result, the display quality of the image can be improved.

In addition, by selectively arranging a light-blocking electrode (152) that absorbs and blocks light in the circuit area (CA) of each subpixel (SP), it is possible to minimize light generated in the light-emitting layer (154) of the circuit area (CA) from passing through the transparent first electrode (150), the planarization layer (144), the protective layer (140), and the interlayer insulating layer (134) and being irradiated onto the semiconductor layer (128), and as a result, deterioration of the switching thin film transistor (Tsw), the driving thin film transistor (Tdr), and the sensing thin film transistor (Tse) of the circuit area (CA) can be prevented.

The method for manufacturing such a display device is described with reference to the drawings.

FIGS. 3A to 3G are cross-sectional views for explaining a method for manufacturing a display device according to an embodiment of the present invention, and are explained with reference to FIGS. 1 and 2 together.

As illustrated in Fig. 3a, a light-shielding layer (122) and a connection pattern (124) are formed in the circuit area (CA) of each subpixel (SP) on the upper portion of the substrate (120) through a deposition process of a metal material and a photolithographic process.

For example, the light shielding layer (122) and the connecting pattern (124) may include a metal material such as aluminum (Al), molybdenum titanium (MoTi), or copper (Cu).

Thereafter, through a deposition process of an insulating material, a buffer layer (126) is formed on the entire surface of the substrate (120) above the light-shielding layer (122) and the connection pattern (124).

For example, the buffer layer (126) may include a first layer of silicon nitride (SiNx) at the bottom and a second layer of silicon oxide (SiOx) at the top.

Thereafter, through a semiconductor material deposition process and an exposure etching process, a semiconductor layer (128) is formed on top of a buffer layer (126) corresponding to a light-shielding layer (122).

For example, the semiconductor layer (128) may include a semiconductor material such as polycrystalline silicon or an oxide semiconductor material such as indium-gallium-zinc oxide (IGZO).

Thereafter, through a deposition process of an insulating material and an exposure etching process, a gate insulating layer (130) is formed on the entire surface of the substrate (120) over the semiconductor layer (128).

For example, the gate insulating layer (130) may include an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx).

After the deposition process and exposure etching process of the insulating material, a heat treatment process can be performed on the gate insulating layer (130).

Thereafter, through a metal material deposition process and an exposure etching process, a gate electrode (132) is formed on top of the gate insulating layer (130), and a gate wiring (GL) and a sensing band line (SL) are formed along the first direction (horizontal direction) on top of the gate insulating layer (130) in the circuit area (CA).

For example, the gate electrode (132), gate wiring (GL), and sensing wiring (SL) may include a metal material such as aluminum (Al), molybdenum titanium (MoTi), or copper (Cu).

After forming a gate electrode (132) to expose both ends of the semiconductor layer (128), a plasma treatment process can be performed to make both ends of the exposed semiconductor layer (128) conductive.

Thereafter, through a deposition process of an insulating material, an interlayer insulating layer (140) is formed on the entire surface of the substrate (120) above the gate electrode (132), gate wiring (GL), and sensing wiring (SL).

For example, the interlayer insulating layer (134) may include an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx).

The interlayer insulating layer (134) may have first and second contact holes exposing both ends of the semiconductor layer (128), and the interlayer insulating layer (134) and the buffer layer (126) may have a third contact hole exposing one end of the light-shielding layer (122).

Thereafter, through a deposition process of a metal material and an exposure etching process, a source electrode (136) and a drain electrode (138) are formed on the interlayer insulating layer (134) corresponding to both ends of the semiconductor layer (128), and a data wire (DL), a power wire (PL), and a reference wire (RL) are formed along a second direction (vertical direction) intersecting the first direction on the interlayer insulating layer (134) of the circuit area (CA).

Thereafter, through a deposition process of an insulating material, a protective layer (140) is formed on the entire surface of the substrate above the source electrode (134), the drain electrode (138), the data wiring (DL), the power wiring (PL), and the reference wiring (RL).

For example, the protective layer (140) may include an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx).

Thereafter, through a process of applying a color filter material and an exposure development process, a color filter layer (142) is formed in the light-emitting area (EA) on the upper side of the protective layer (140).

Thereafter, through a process of applying an insulating material and an exposure development process, a flattening layer (144) is formed on the entire surface of the substrate (120) above the color filter layer (142) and the protective layer (140).

For example, the planarization layer (144) may include an organic insulating material such as photoacryl.

The planarization layer (144) and the protective layer (140) may have a fourth contact hole exposing the source electrode (136).

As shown in Fig. 3b, a transparent conductive material and an opaque conductive material are sequentially deposited on the planarization layer (144) to sequentially form a transparent conductive material layer (150a) and an opaque conductive material layer (152a) on the planarization layer (144).

For example, the transparent conductive material layer (150a) may include indium zinc oxide (ITO), and the opaque conductive material layer (152a) may include molybdenum titanium (MoTi).

As illustrated in FIG. 3c, a photoresist layer is formed on an opaque conductive material layer (152a), an exposure mask (PM) having a transmissive portion (TA), a semi-transmissive portion (HTA), and a blocking portion (BA) is placed on the photoresist layer, and the photoresist layer is exposed through the exposure mask (PM) and then developed to form a first photoresist pattern (PP1) having a first thickness and a second photoresist pattern (PP2) having a second thickness smaller than the first thickness.

The blocking area (BA) and semi-transmissive area (HTA) of the exposure mask (PM) correspond to the first and second photoresist patterns (PP1, PP2), respectively, and the photoresist layer is completely removed in the area corresponding to the transmissive area (TA) of the exposure mask (PM).

Here, the transmissive portion (TA) of the exposure mask (PM) may correspond to a boundary between subpixels (SP), the blocking portion (BA) of the exposure mask (PM) may correspond to a circuit area (CA) of each subpixel (SP), and the semi-transmissive portion (HTA) of the exposure mask (PM) may correspond to an emitting area (EA) of each subpixel (SP).

The transmittance of the semi-permeable portion (HTA) is greater than that of the blocking portion (BA) and less than that of the transmissive portion (TA).

As illustrated in FIG. 3d, the opaque conductive material layer (152a) and the transparent conductive material layer (150a) are etched using the first and second photoresist patterns (PP1, PP2) as etching masks, thereby separating the opaque conductive material layer (152a) into each subpixel (SP) and forming a first electrode (150) in each subpixel (SP).

As illustrated in FIG. 3e, through an ashing process for the first and second photoresist patterns (PP1, PP2), the second photoresist pattern (PP2) is removed, leaving only the first photoresist pattern (PP1).

At this time, the first thickness of the first photoresist pattern (PP1) can be reduced by the second thickness of the second photoresist pattern (PP2).

As illustrated in FIG. 3f, the opaque conductive material layer (152a) is etched using the first photoresist pattern (PP1) as an etching mask to form a light-shielding electrode (152) on top of the first electrode (150) of the circuit area (CA) of each subpixel (SP).

Although not illustrated, in an embodiment in which the light-shielding electrode (152) is disposed below the first electrode (150), the light-shielding electrode (152) may be formed on the planarization layer (144) through a deposition process of an opaque conductive material and an exposure etching process, and then the first electrode (150) may be formed on the light-shielding electrode (152) through a deposition process of a transparent conductive material and an exposure etching process. In this case, the light-shielding electrode (152) and the first electrode (150) may be formed using different exposure masks.

As illustrated in Figure 3g, a light-emitting layer (154) is formed on the entire surface of the substrate (120) above the first electrode (150) and the light-shielding electrode (152) through a deposition process of an organic material.

For example, the emitting layer (154) may include a hole injecting layer, a hole transporting layer, an emitting material layer, an electron transporting layer, and an electron injecting layer.

Thereafter, through a metal material deposition process, a second electrode (156) is formed on the entire surface of the substrate (120) above the light-emitting layer (154).

For example, the second electrode (156) may include aluminum (Al) or magnesium silver (MgAg).

As described above, in the display device (110) according to the embodiment of the present invention, by directly arranging the first electrode (150) on top of the planarization layer (144) without a bank layer exposing a portion of the first electrode (150), the light-emitting area (EA) of each subpixel (SP) can be maximized, and as a result, the brightness can be improved.

And, by selectively arranging a light-blocking electrode (152) that absorbs and blocks light in the circuit area (CA) of each subpixel (SP), light leakage (LL) emitted to the outside by light generated in the light-emitting layer (154) of the circuit area (CA) passing through the transparent first electrode (150), the planarization layer (144), the protective layer (140), the interlayer insulating layer (134), and the substrate (120) can be minimized, and as a result, the display quality of the image can be improved.

In addition, by selectively arranging a light-blocking electrode (152) that absorbs and blocks light in the circuit area (CA) of each subpixel (SP), it is possible to minimize light generated in the light-emitting layer (154) of the circuit area (CA) from passing through the transparent first electrode (150), the planarization layer (144), the protective layer (140), and the interlayer insulating layer (134) and being irradiated onto the semiconductor layer (128), and as a result, deterioration of the switching thin film transistor (Tsw), the driving thin film transistor (Tdr), and the sensing thin film transistor (Tse) of the circuit area (CA) can be prevented.

In addition, by forming the first electrode (150) and the light-shielding electrode (152) through a single exposure etching process using an exposure mask (PM) having a transmissive portion (TA), a semi-transmissive portion (HTA), and a blocking portion (BA), the manufacturing process can be simplified and the manufacturing cost can be reduced.

FIG. 4 is a graph showing the transmittance of the first electrode and the light-shielding electrode of the display device according to an embodiment of the present invention, which will be described with reference to FIGS. 1 to 3g.

As illustrated in FIG. 4, the first electrode (150) and the light-shielding electrode (152) of the display device (110) according to the embodiment of the present invention may have a transmittance of less than about 10% for light having a wavelength of about 380 nm to about 780 nm.

For example, the first electrode (150) may be made of indium tin oxide (ITO) and have a thickness of about 100 nm, and the light-shielding electrode (152) may be made of molybdenum titanium (MoTi) and have a thickness of about 30 nm.

And, the first electrode (150) and the light-shielding electrode (152) can have a transmittance of about 4% for light having a wavelength of about 450 nm, a transmittance of about 4.69% for light having a wavelength of about 500 nm, a transmittance of about 5% for light having a wavelength of about 550 nm, and a transmittance of about 6% for light having a wavelength of about 650 nm.

That is, the light-shielding electrode (152) of molybdenum titanium (MoTi) has a relatively low transmittance, and the first electrode (150) of indium tin oxide (ITO) and the light-shielding electrode (152) of molybdenum titanium (MoTi) can play a light-shielding role.

In this way, in the display device (110) according to the embodiment of the present invention, the light of the light emitting layer (154) of the light emitting area (EA) is emitted to the outside and the light of the light emitting layer (154) of the circuit area (CA) is blocked by using the first electrode (150) of indium tin oxide (ITO) and the light-shielding electrode (152) of molybdenum titanium (MoTi), thereby minimizing light leakage (LL) and preventing deterioration of the driving element.

Although the present invention has been described above with reference to preferred embodiments thereof, it will be understood by those skilled in the art that various modifications and changes may be made to the present invention without departing from the technical spirit and scope of the present invention as set forth in the claims below.

110: Display device 120: Board
122: Shading layer Tdr: Driving thin film transistor
142: Color filter layer 150: First electrode
152: Shading electrode 154: Light-emitting layer
156: Second electrode Del: Light-emitting diode

Claims (20)

A substrate comprising at least one subpixel having a light-emitting region and a circuit region;
At least one thin film transistor arranged in the circuit area on the upper portion of the substrate;
A planarizing layer disposed on at least one thin film transistor;
A first electrode arranged in the light-emitting region and the circuit region on the upper part of the flattening layer;
A light-shielding electrode arranged in the circuit area on the upper part of the flattening layer;
A light-emitting layer arranged in the light-emitting region and the circuit region above the first electrode and the light-shielding electrode;
A second electrode arranged in the light-emitting region and the circuit region on the upper portion of the light-emitting layer
Including,
A display device in which the above-mentioned light-shielding electrode is positioned between the first electrode and the above-mentioned light-emitting layer.
In paragraph 1,
A display device wherein the first electrode includes a transparent conductive material and the light-shielding electrode includes an opaque metal material.
In the second paragraph,
A display device wherein the first electrode comprises indium tin oxide and the light-shielding electrode comprises molybdenum titanium.
In paragraph 1,
A display device in which the above-mentioned light-shielding electrode contacts the first electrode at an upper or lower portion of the first electrode.
In paragraph 1,
At least one of the above thin film transistors,
A semiconductor layer arranged in a circuit area on the upper portion of the above substrate;
A gate insulating layer disposed on the upper central portion of the semiconductor layer;
A gate electrode arranged on the upper portion of the gate insulating layer;
Source electrode and drain electrode connected to both ends of the above semiconductor layer
A display device including:
In paragraph 5,
A light-shielding layer disposed on the upper portion of the substrate corresponding to the semiconductor layer;
A buffer layer disposed between the light-shielding layer and the semiconductor layer;
An interlayer insulating layer disposed between the semiconductor layer and the source electrode and the drain electrode;
A protective layer disposed between the source electrode, the drain electrode, and the planarization layer
A display device further comprising:
In paragraph 6,
A display device further comprising a color filter layer disposed in the light-emitting area between the protective layer and the flattening layer.
A step of forming at least one thin film transistor in a circuit region among the light-emitting region and circuit region of at least one subpixel on the upper part of the substrate;
A step of forming a planarization layer on top of at least one thin film transistor;
A step of forming a first electrode in the light-emitting region and the circuit region on the upper part of the flattening layer;
A step of forming a light-shielding electrode in the circuit area on the upper part of the flattening layer;
A step of forming a light-emitting layer in the light-emitting region and the circuit region above the first electrode and the light-shielding electrode;
A step of forming a second electrode in the light-emitting region and the circuit region on the upper portion of the light-emitting layer.
Including,
A method for manufacturing a display device, wherein the above-mentioned light-shielding electrode is placed between the first electrode and the above-mentioned light-emitting layer.
In Article 8,
The step of forming the first electrode and the step of forming the light-shielding electrode are,
A step of sequentially forming a transparent conductive material layer and an opaque conductive material layer on top of the above flattening layer;
A step of sequentially forming the first electrode and the light-shielding electrode on top of the planarization layer by etching the transparent conductive material layer and the opaque conductive material layer using an exposure mask having a transparent portion, a semi-transparent portion, and a blocking portion.
A method for manufacturing a display device including:
In Article 9,
The step of forming the first electrode and the light-shielding electrode using the above exposure mask is,
A step of forming a photoresist layer on top of the above opaque conductive material layer;
A step of exposing the photoresist layer through the exposure mask to form a first photoresist pattern having a first thickness and a second photoresist pattern having a second thickness smaller than the first thickness on the upper portion of the opaque conductive material layer;
A step of forming the first electrode by etching the opaque conductive material layer and the transparent conductive material layer using the first and second photoresist patterns as an etching mask;
A step of removing the second photoresist pattern;
A step of forming the light-shielding electrode by etching the opaque conductive material layer using the first photoresist pattern as an etching mask.
A method for manufacturing a display device including:
In Article 10,
A method for manufacturing a display device, wherein the blocking portion of the exposure mask corresponds to the circuit area, the semi-transparent portion of the exposure mask corresponds to the light-emitting area, and the transmissive portion of the exposure mask corresponds to the boundary of at least one subpixel.
In Article 8,
The step of forming the first electrode and the step of forming the light-shielding electrode are,
A step of forming the light-shielding electrode through a first mask process on the upper part of the flattening layer;
A step of forming the first electrode through a second mask process on top of the above light-shielding electrode
A method for manufacturing a display device including:
In Article 8,
The step of forming at least one thin film transistor comprises:
A step of forming a semiconductor layer in a circuit area on the upper portion of the substrate;
A step of forming a gate insulating layer on the upper central portion of the semiconductor layer;
A step of forming a gate electrode on top of the gate insulating layer;
A step of forming a source electrode and a drain electrode connected to both ends of the semiconductor layer.
A method for manufacturing a display device including:
In Article 13,
A step of forming a light-shielding layer on the upper part of the substrate corresponding to the semiconductor layer;
A step of forming a buffer layer between the light-blocking layer and the semiconductor layer;
A step of forming an interlayer insulating layer between the semiconductor layer and the source electrode and the drain electrode;
A step of forming a protective layer between the source electrode, the drain electrode, and the planarization layer
A method for manufacturing a display device further comprising:
In Article 14,
A method for manufacturing a display device, further comprising the step of forming a color filter layer in the light-emitting area between the protective layer and the flattening layer. In paragraph 1,
A display device in which the above-mentioned light-shielding electrode is in full contact with the first electrode and the light-emitting layer between the first electrode and the light-emitting layer.
In paragraph 1,
A display device in which the above light-emitting layer is arranged to correspond to the entire surface of the substrate.
In paragraph 6,
A display device in which the above source electrode is connected to one end of the above light-shielding layer.
In paragraph 7,
Further comprising a gate wiring connected to the above gate electrode,
A display device in which the first electrode is arranged to cover at least one thin film transistor, the color filter layer, and the gate wiring.
In paragraph 1,
A display device in which the above first electrode makes full contact with the above light-emitting layer without a bank layer.