KR102751402B1 - Semiconductor test apparatus including device power supply - Google Patents

Abstract

A power supply device applied to a semiconductor test device is provided to reduce heat generation and power consumption. A semiconductor test device according to some embodiments of the present disclosure may include a power supply device for supplying power to the semiconductor device based on a driving voltage, an adding amplifier for adding an output voltage of the power supply device and an offset voltage to output a reference voltage, and a switching regulator for outputting the driving voltage to follow the reference voltage of the adding amplifier.

Description

SEMICONDUCTOR TEST APPARATUS INCLUDING DEVICE POWER SUPPLY

The present disclosure relates to a power supply device applied to a semiconductor test device to reduce heat generation and power consumption.

Semiconductor test equipment, also called Automatic Test Equipment (ATE), is a device that applies electrical test signals to semiconductor devices and analyzes the response to test whether the semiconductor devices are good or not.

Semiconductor test equipment includes internal hardware components such as a power supply, measuring equipment, an algorithmic pattern generator (ALPG), a timing generator (TG), pin electronics (PE) with built-in drivers and comparators, and a central processing unit (CPU) to control them.

Among them, a power supply unit is a device that supplies power to a semiconductor device. Conventional power supply units (e.g., the power supply unit illustrated in Fig. 4) lower the stability of semiconductor test equipment and incur excessive costs for heat dissipation due to excessive heat generation during testing of semiconductor devices.

Therefore, a technology is required to reduce the heat generation and power consumption of the power supply.

Republic of Korea Registered Patent No. 10-2293671 (Published on June 7, 2019)

A technical problem to be solved by some embodiments of the present disclosure is to provide a device for reducing the heat generation and power consumption of a power supply device applied to a semiconductor test device.

Another technical problem to be solved by some embodiments of the present disclosure is to provide a device for improving the stability of a semiconductor test device.

Another technical challenge to be solved by some embodiments of the present disclosure is to provide a device for reducing the cost consumed for heat dissipation of a semiconductor test device.

Another technical challenge to be solved by some embodiments of the present disclosure is to provide a device for increasing the integration of a power supply device.

The technical problems of the present disclosure are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the description below.

In order to solve the above technical problem, according to some embodiments of the present disclosure, a semiconductor test device for applying a test signal to a semiconductor device and analyzing a response signal to the test signal to test the semiconductor device may include a power supply device for supplying power to the semiconductor device based on a driving voltage, an adding amplifier for adding an output voltage of the power supply device and an offset voltage to output a reference voltage, and a switching regulator for outputting the driving voltage so as to follow the reference voltage of the adding amplifier.

In some embodiments, the offset voltage may be a minimum voltage required to drive the power supply.

In some embodiments, the switching regulator further comprises a low pass filter for filtering the driving voltage outputted by the switching regulator, wherein the power supply device can supply power to the semiconductor device based on the driving voltage filtered by the low pass filter.

A semiconductor test apparatus according to some embodiments of the present disclosure includes a power supply for supplying power to a semiconductor device based on a driving voltage, and pin electronics for generating a test signal for electrical testing of the semiconductor device and applying the test signal to the semiconductor device, wherein the semiconductor test apparatus may include an adding amplifier for adding an output voltage of the power supply and an offset voltage to output a reference voltage, and a switching regulator for outputting the driving voltage so as to follow the reference voltage of the adding amplifier.

In some embodiments, the offset voltage may be a minimum voltage required to drive the power supply.

In some embodiments, the switching regulator further comprises a low pass filter for filtering the driving voltage outputted by the switching regulator, wherein the power supply device can supply power to the semiconductor device based on the driving voltage filtered by the low pass filter.

FIG. 1 illustrates an exemplary environment in which a semiconductor test device according to some embodiments of the present disclosure may be applied.
FIGS. 2 and 3 are exemplary drawings to explain the power supply module described with reference to FIG. 1 in more detail.
FIG. 4 is a drawing for comparison with the power supply module described with reference to FIGS. 1 to 3, and is an exemplary drawing for describing a conventional power supply module.

Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The advantages and features of the present disclosure and the methods for achieving them will become apparent with reference to the embodiments described in detail below together with the accompanying drawings. However, the technical idea of the present disclosure is not limited to the following embodiments but may be implemented in various different forms, and the following embodiments are provided only to complete the technical idea of the present disclosure and to fully inform a person having ordinary skill in the art to which the present disclosure belongs of the scope of the present disclosure, and the technical idea of the present disclosure is defined only by the scope of the claims.

When adding reference signs to components of each drawing, it should be noted that identical components are given the same signs as much as possible even if they are shown on different drawings. In addition, when describing the present disclosure, if it is determined that a specific description of a related known configuration or function may obscure the gist of the present disclosure, the detailed description is omitted.

Unless otherwise defined, all terms (including technical and scientific terms) used in this specification can be used in the meaning that can be commonly understood by a person of ordinary skill in the art to which this disclosure belongs. In addition, terms defined in commonly used dictionaries are not to be ideally or excessively interpreted unless explicitly specifically defined. The terminology used in this specification is for the purpose of describing embodiments and is not intended to limit this disclosure. In this specification, the singular also includes the plural unless specifically stated in the phrase.

Also, in describing components of the present disclosure, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are only intended to distinguish the components from other components, and the nature, order, or sequence of the components are not limited by the terms. When it is described that a component is "connected," "coupled," or "connected" to another component, it should be understood that the component may be directly connected or connected to the other component, but another component may also be "connected," "coupled," or "connected" between each component.

The terms “comprises” and/or “comprising,” as used in the specification, do not exclude the presence or addition of one or more other components, steps, operations and/or elements.

Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the attached drawings.

FIG. 1 illustrates an exemplary environment to which a semiconductor test device (10) according to some embodiments of the present disclosure may be applied. The semiconductor test device (10) illustrated in FIG. 1 applies a test signal to a semiconductor device (20, Device Under Test) and analyzes a response signal to the test signal to test whether the semiconductor device is good or not.

Meanwhile, FIG. 1 only illustrates a preferred embodiment for achieving the purpose of the present disclosure, and some components may be added or deleted as needed. For example, the semiconductor test device (10) may further include a CPU, which is a central processing unit, for controlling each component illustrated in FIG. 1. In addition to the examples described above, various components may be further included in the semiconductor test device (10) illustrated in FIG. 1, and it should be noted that all known technologies in the technical field to which the semiconductor test device (10) belongs may be applied to the present disclosure.

Hereinafter, the components constituting the semiconductor test device (10) of Fig. 1 will be described in more detail.

Referring to FIG. 1, a semiconductor test device (10) may include a power supply module (100), a timing generator (200), pin electronics (300), a test analysis module (400), and an algorithmic pattern generator (ALPG) (500).

The power supply module (100) illustrated in FIG. 1 can supply power to the semiconductor device (20) based on the driving voltage. Here, due to the difference between the driving voltage and the voltage supplied to the semiconductor device (20) (i.e., output voltage), the power supply module (100) consumes power, and heat is generated due to the power consumed. Some embodiments of the present disclosure for reducing the amount of heat generated and the power consumed by the power supply module (100) will be described in detail later, and a detailed description will be omitted to avoid redundant explanation.

Next, the timing generator (200) can generate a timing signal based on pulse data input through multiple channels. The timing signal thus generated can be transmitted to pin electronics (300).

Next, the pin electronics (300) can generate a test signal for electrical testing of the semiconductor device (20) using the timing signal. In addition, the pin electronics (300) can apply the test signal generated in this way to the semiconductor device (20).

In some embodiments, the pin electronics (300) may include a DCL (Driver Comparator Logic, not shown) that receives a timing signal and a pattern signal, modulates the pattern signal based on the timing signal, and generates a test signal.

Next, the test analysis module (400) can receive the electrical state change or response of the semiconductor device (20) according to the application of the test signal as a test result (i.e., the response signal of FIG. 1). In addition, the test analysis module (400) can analyze the test result to determine whether the semiconductor device (20) is good or not. Depending on the result of the determination of whether the semiconductor device (20) is good or not, a repair operation can be performed on the semiconductor device (20) determined to be failed.

Next, ALPG (500) can sequentially generate logic data using data stored in the memory. This logic data can include addresses, data, control signals, etc. to be applied to the semiconductor device (20). Specifically, the logic data can be provided to the timing generator (100) together with a clock signal in the form of pulse data expressed as "0" and "1".

The general configuration and functions of the power supply module (100), timing generator (200), pin electronics (300), test analysis module (400), and ALPG (500) described with reference to FIG. 1 are widely known in the art, and therefore, in order not to obscure the logic of the present disclosure, additional descriptions of each configuration and function will be omitted.

So far, the configuration of a semiconductor test device according to some embodiments of the present disclosure has been described with reference to FIG. 1. Hereinafter, a power supply module (100) that may be referenced in some embodiments of the present disclosure will be described in more detail with reference to FIGS. 2 to 4.

FIG. 2 is an exemplary drawing for more specifically explaining the power supply module (100) described with reference to FIG. 1. It should be noted that FIG. 2 only illustrates a preferred embodiment for achieving the purpose of the present disclosure, and some components may be added or deleted as needed.

Referring to FIG. 2, the power supply device (110) can supply power to the semiconductor device (20) based on the driving voltage (VR). Here, the driving voltage (VR) can mean a voltage applied to drive the power supply device (110).

This power supply device (110) can be implemented with various elements for outputting an output voltage (Vout) by referring to an input voltage (Vin), and for example, the power supply device (110) can be implemented with a Linear IC (Integrated Circuit) having good noise characteristics. As a specific example, the Linear IC can be implemented with various OP-AMPs such as OPA548.

Next, the adder amplifier (120) can output a reference voltage (VRef) by adding the output voltage (Vout) of the power supply (110) and the offset voltage (Voffset). Here, the offset voltage (Voffset) can be set to a minimum voltage required for driving the power supply (110). As will be described later, the output voltage (Vout) of the power supply (110) is used as feedback, and the offset voltage (Voffset), which is the minimum voltage required for driving the power supply (110), is added to output a reference voltage (VRef), and the reference voltage (VRef) becomes a reference for the driving voltage (VR) of the power supply (110), so that the amount of heat generated and power consumed by the power supply (110) can be reduced.

Next, the switching regulator (130) can output a driving voltage (VR) to follow the reference voltage (VRef) of the summation amplifier (120). Here, a separate voltage (Vcc) for driving the switching regulator (130) can be connected.

It should be noted that such a switching regulator (130) can repeatedly activate or deactivate a switching element (e.g., MOSFET) at high speed until a required voltage (e.g., reference voltage (VRef)) is reached, and that any known technology for implementing a switching regulator (130) can be applied to the present disclosure.

FIG. 3 is an exemplary drawing for more specifically explaining the power supply module (100) described with reference to FIG. 1. Unlike the power supply module (100) described with reference to FIG. 2, the power supply module (100) depicted in FIG. 3 may further include a low pass filter (140).

The low pass filter (140) illustrated in FIG. 3 can filter the driving voltage output by the switching regulator (130), and specifically, can filter a high frequency band. By applying the driving voltage filtered by the low pass filter (140) to the power supply device (110), the power supply device (110) can be driven. Here, it should be noted that all known technologies for implementing the low pass filter (140) can be applied to the present disclosure.

According to the embodiment described with reference to FIG. 3, noise in a high-frequency band that may be generated in a switching regulator (130) can be filtered, and the stability of a semiconductor test device (10) can be improved.

Below, the power consumption generated will be compared more specifically through a comparison of the power supply modules (100) illustrated in FIG. 4 and FIGS. 2 to 3.

FIG. 4 is a drawing for comparison with the power supply module described with reference to FIGS. 1 to 3, and is an exemplary drawing for describing a conventional power supply module.

Referring to FIG. 4, Vcc is directly connected to the power supply (110), and at this time, the power consumption (W) consumed by the power supply (110) can be calculated by the following mathematical formula.

Referring to mathematical expression 1 and explaining a specific example related to FIG. 4, if Vcc is 9 [V], Vout is 0.1 [V], Iout is 1.2 [A], and Iambient is 0.02 [A], the power consumption consumed by the power supply device (110) is 10.86 [W]. If there are 96 power supply devices (110) integrated in an environment, the power consumption is 1042.56 [W], and this power consumption can be released to the outside in the form of heat.

On the other hand, the power consumption (W) consumed by the power supply unit (110) and switching regulator (130) of Fig. 3 can be calculated by the following mathematical formula.

Here, W1 may mean power consumption (W1) consumed by the switching regulator (130), and W2 may mean power consumption (W2) consumed by the power supply device (110). At this time, W1, which is the power consumption of the switching regulator (130), may be calculated as eff, which is determined according to the maximum value of the driving voltage (VR) and the switching efficiency. For example, eff of the switching regulator (130) having a switching efficiency of 90% may be determined as 0.1.

Referring to Mathematical Formula 2 and explaining a specific example related to FIG. 3, if Vcc is 9 [V], Vout is 0.1 [V], Voffset is 1.25 [V], Iout is 1.2 [A], Iambient is 0.02 [A], and switching efficiency is 90%, the power consumption (W1) consumed in the switching regulator (130) is 1.08 [W] (=9*1.2*0.1). In addition, the power consumption (W2) consumed in the power supply unit (110) is 1.68 [W] (=(1.26-0.1)*1.2+(0.02*9)). If there are 96 power supply units (110) integrated in an environment, the total power consumption is 264.96 [W] (=(1.08+1.68)*96).

It can be confirmed that the power consumption of the power supply module (100) illustrated in FIG. 3 is 2.76 [W], whereas the power consumption of the conventional power supply module (100) illustrated in FIG. 4 is 10.86 [W]. In other words, the power consumption of the power supply module (100) illustrated in FIG. 3 can be reduced by about 74% (= (10.86-2.76)/10.86*100) compared to the power consumption of the conventional power supply module (e.g., the power supply module (100) illustrated in FIG. 4).

Hereinafter, a semiconductor test device according to some embodiments of the present disclosure will be described with reference to FIGS. 1 to 4. According to the embodiments described with reference to FIGS. 1 to 4, since the minimum voltage required to drive the power supply device is applied to the power supply device as the driving voltage, the power consumption of the power supply device can be effectively reduced. As the power consumption is reduced, the amount of heat generated can also be effectively reduced. In particular, in an environment where a highly integrated power supply device is required for testing a semiconductor device, since the power consumption and the amount of heat generated are effectively reduced, the stability of the semiconductor test device can be improved, and the cost consumed for heat dissipation of the semiconductor test device can be reduced.

Various embodiments of the present disclosure and effects according to the embodiments have been described with reference to FIGS. 1 to 4 so far. The effects according to the technical idea of the present disclosure are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description of the specification.

In the above, even though all the components constituting the embodiments of the present disclosure have been described as being combined as one or operating in combination, the technical idea of the present disclosure is not necessarily limited to these embodiments. That is, within the scope of the purpose of the present disclosure, all of the components may be selectively combined as one or more to operate.

Although the embodiments of the present disclosure have been described with reference to the attached drawings, those skilled in the art to which the present disclosure pertains will understand that the present disclosure can be implemented in other specific forms without changing the technical ideas or essential features thereof. Therefore, it should be understood that the embodiments described above are exemplary and not restrictive in all respects. The protection scope of the present disclosure should be interpreted by the following claims, and all technical ideas within a scope equivalent thereto should be interpreted as being included in the scope of rights of the technical ideas defined by the present disclosure.

Claims (6)

In a semiconductor test device that applies a test signal to a semiconductor device and analyzes a response signal to the test signal to test the semiconductor device,
A power supply device that supplies power to the semiconductor device based on a driving voltage;
An adding amplifier that adds the output voltage and offset voltage of the power supply device to output a reference voltage; and
A switching regulator is included that outputs the driving voltage to follow the reference voltage supplied from the above-mentioned adding amplifier,
The above offset voltage is,
The minimum voltage required to operate the above power supply device is:
Semiconductor test equipment. delete In the first paragraph,
Further comprising a low pass filter for filtering the driving voltage output by the switching regulator,
The above power supply unit,
Supplying power to the semiconductor device based on the driving voltage filtered by the above low pass filter,
Semiconductor test equipment. A power supply unit for supplying power to a semiconductor device based on a driving voltage; and
A semiconductor test device comprising pin electronics for generating a test signal for electrical testing of the semiconductor device and applying the test signal to the semiconductor device,
An adding amplifier that adds the output voltage and offset voltage of the power supply device to output a reference voltage; and
A switching regulator is included that outputs the driving voltage to follow the reference voltage supplied from the above-mentioned adding amplifier,
The above offset voltage is,
The minimum voltage required to operate the above power supply device is:
Semiconductor test equipment. delete In paragraph 4,
Further comprising a low pass filter for filtering the driving voltage output by the switching regulator,
The above power supply unit,
Supplying power to the semiconductor device based on the driving voltage filtered by the above low pass filter,
Semiconductor test equipment.

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