KR102870955B1 - Light emitting diode display - Google Patents

Abstract

The present specification relates to an electroluminescent display device. According to one embodiment, the electroluminescent display device includes a substrate array including a display area in which electroluminescent pixels are arranged and a non-display area around the display area, a driving circuit unit arranged on one side of the non-display area, a driving voltage supply line extending from the driving circuit unit to the non-display area and supplying a driving voltage to pixels in the display area, and an electrostatic protection unit having a low-frequency bandpass characteristic arranged between the driving circuit unit and the driving voltage supply line, wherein the electrostatic protection unit includes an inductor wiring unit including a coil wiring unit and a capacitance wiring unit connected thereto.

Description

LIGHT EMITTING DIODE DISPLAY

This specification relates to an electroluminescent display device.

As an example of electroluminescent displays, organic light-emitting diodes (OLEDs) are self-luminous displays. Unlike liquid crystal displays (LCDs), they do not require a separate light source, allowing them to be manufactured in lightweight and thin forms. Furthermore, OLEDs are advantageous in terms of power consumption due to their low-voltage operation. Furthermore, they boast superior color reproduction, response speed, viewing angle, and contrast ratio (CR), and are being studied as next-generation displays.

Furthermore, since electroluminescent displays do not require a separate light source, they are easily implemented as flexible displays. Flexible materials such as plastic and thin-film metal foil can be used as substrates for electroluminescent displays, and typically, plastic substrates such as polyimide are used.

In an electroluminescent display device, one or more driving voltages must be applied to drive light-emitting elements (EL) arranged in pixels arranged within the display area (Active Area; A/A).

These driving voltages may include a high-potential voltage (VDD) and a low-potential voltage (VSS), and these driving voltages may be applied to the inside of the display area through driving voltage lines extending from a data driving circuit (D-IC) arranged on one side of the display panel.

Meanwhile, during the manufacturing process of the display panel and the use of the display device, electrostatic discharge (ESD), which is a large voltage, may occur momentarily depending on the external environment (test, etc.), and if this static electricity is applied to the pixels within the display area, the pixels may be damaged.

Therefore, in order to prevent such static electricity from being applied inside the display area along the data line or gate line, a certain static electricity protection means may be used at the input portion of the data line and gate line supplied to the pixel.

However, static electricity can also be applied to the pixel area through the driving voltage wiring, but there has been no discussion on static electricity protection devices related to the driving voltage wiring so far.

As described above, there was a problem in which static electricity generated during the manufacturing or use of an electroluminescent display device flowed into pixels through the driving voltage wiring, damaging the pixels or deteriorating the image quality.

Accordingly, the inventors of the present specification invented an electroluminescent display device having an electrostatic protection device related to the driving voltage wiring of the electroluminescent display device.

The problems to be solved according to the embodiments of the present specification to be described below are not limited to the problems mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the description below.

According to one embodiment of the present specification, an electroluminescent display device is provided, including a substrate array including a display area in which electroluminescent pixels are arranged and a non-display area in which wiring for supplying power to the electroluminescent pixels is arranged, a driving circuit unit arranged on one side of the non-display area, a driving voltage supply wiring extending from the driving circuit unit to the non-display area and supplying a driving voltage to pixels in the display area, and an electrostatic protection unit having a low-frequency bandpass characteristic arranged between the driving circuit unit and the driving voltage supply wiring.

Meanwhile, the electrostatic protection unit may include an inductor wiring unit and a capacitance wiring unit connected thereto.

At this time, the inductor wiring section may include a coil wiring section that is electrically connected to the driving voltage supply wiring and arranged in a spiral shape, and a link wiring section that is arranged in a different layer from the coil wiring section.

The capacitance wiring portion may include a first capacitance electrode portion extending from the inductor wiring portion, and a second capacitance electrode portion arranged opposite the first capacitance electrode portion and arranged in a different layer from the first capacitance electrode portion.

At this time, the driving voltage supply wiring may be at least one of a high-potential voltage (VDD) supply wiring and a low-potential voltage (VSS) supply wiring, and the second capacitance electrode section may be a ground wiring section.

In addition, the auto probe pad section is further included, and the link wiring section can be electrically connected to the driving voltage test pad included in the auto probe pad section.

Meanwhile, according to another embodiment, the driving voltage supply wiring includes a first driving voltage supply wiring and a second driving voltage supply wiring, and the inductor wiring section includes at least one of a first coil wiring section electrically connected to the first driving voltage supply wiring and arranged in a spiral shape, and a second coil wiring section electrically connected to the second driving voltage supply wiring and arranged in a spiral shape, and may include at least one of a first link wiring section arranged in a different layer from the first coil wiring section and a second link wiring section arranged in a different layer from the second coil wiring section.

At this time, the capacitance wiring portion may include a first capacitance electrode portion formed to extend in the same layer as the first coil wiring portion, and a second capacitance electrode portion formed in a different layer from the first capacitance electrode portion at a position opposite to the first capacitance electrode portion and electrically connected to the second driving voltage supply wiring.

At this time, the first driving voltage supply wiring may be one of the high-potential voltage (VDD) supply wiring and the low-potential voltage (VSS) supply wiring, and the second driving voltage supply wiring may be the remaining one of the high-potential voltage (VDD) supply wiring and the low-potential voltage (VSS) supply wiring.

According to the embodiments of the present specification, the problem of static electricity generated during the manufacturing or use process of an electroluminescent display device flowing into a pixel through a driving voltage wiring can be solved.

In addition, according to the present embodiments, by arranging an electrostatic protection unit having low-frequency band characteristics, including an inductor wiring unit and a capacitance wiring unit, at the inlet portion of the driving voltage supply wiring of the field emission display device, there is an effect of preventing high-frequency electrostatic electricity from flowing into the display panel through the driving voltage supply wiring.

Therefore, according to the embodiments of the present specification, there is an effect of minimizing pixel damage and image quality deterioration caused by static electricity by blocking the inflow of high-frequency static electricity through the driving voltage supply wiring in an electroluminescent display device.

Figure 1 illustrates an example of a planar structure of a general electroluminescent display device to which the present embodiment can be applied.
FIG. 2 and FIG. 3 illustrate an example of an antistatic circuit arranged on a data line and a gate line in the electroluminescent display device of FIG. 1.
FIG. 4 is an equivalent circuit diagram for explaining static electricity inflow through a driving voltage supply line and pixel damage caused by it in the electroluminescent display device according to FIGS. 1 to 3.
FIG. 5 is a plan view schematically illustrating the configuration of an electroluminescent display device according to one embodiment of the present specification.
Figure 6 illustrates a schematic configuration of an electrostatic protection unit according to one embodiment of the present specification.
Fig. 7 illustrates a specific wiring structure of an electrostatic protection unit according to one embodiment.
Fig. 8 is an equivalent circuit diagram including a static electricity protection unit and pixels within a display area according to the embodiment of Fig. 7.
Fig. 9 illustrates a specific wiring structure of an electrostatic protection unit according to another embodiment of the present specification.
Fig. 10 is an equivalent circuit diagram including a static electricity protection unit and pixels within a display area according to the embodiment of Fig. 9.
Figure 11 shows a cross-section along line II' of Figure 9.
Fig. 12 illustrates an example of a pixel cross-section of an electroluminescent display device according to the present embodiment.
Fig. 13 illustrates another example of the inductor wiring section of the electrostatic protection unit according to the present embodiment.
Fig. 14 illustrates a specific wiring structure of an electrostatic protection unit according to another embodiment of the present specification.
Fig. 15 shows a cross-section of a capacitance wiring section cut along line II-II' of Fig. 14.
Fig. 16 is an equivalent circuit diagram including a static electricity protection unit and pixels within a display area according to the embodiment of Fig. 14.
Figure 17 shows the results of an electrostatic protection test when this embodiment is applied.

The advantages and features of this specification, and the methods for achieving them, will become clearer with reference to the embodiments described in detail below together with the accompanying drawings. However, this specification is not limited to the embodiments disclosed below, but may be implemented in various different forms. These embodiments are provided solely to ensure that the disclosure of this specification is complete and to fully inform those skilled in the art of the invention of the scope of the invention, and this specification is defined solely by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of this specification are illustrative and are not limited to the matters illustrated in this specification. Like reference numerals refer to like components throughout the specification. In addition, in describing this specification, if a detailed description of a related known technology is judged to unnecessarily obscure the gist of this specification, the detailed description thereof will be omitted. When "includes," "has," "consists of," etc. are used in this specification, other parts may be added unless "only" is used. When a component is expressed in the singular, it includes a case where the plural is included unless specifically stated otherwise.

When interpreting a component, it is interpreted as including the error range even if there is no separate explicit description.

When describing a positional relationship, for example, when the positional relationship between two parts is described as "on ~", "above ~", "below ~", "next to ~", etc., one or more other parts may be located between the two parts, unless "right" or "directly" is used.

When describing a temporal relationship, for example, when describing a temporal relationship using "after", "following", "next to", "before", etc., it can also include cases where it is not continuous, as long as "immediately" or "directly" is not used.

When describing the flow relationship of a signal, for example, "a signal is transmitted from node A to node B", it may include the case where the signal is transmitted from node A to node B via another node, unless "directly" or "directly" is used.

While terms like "first" and "second" are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, a "first" component referred to below may also be a "second" component within the technical scope of this specification.

The individual features of the various embodiments of this specification may be partially or wholly combined or combined with each other, and may be technically linked and operated in various ways, and each embodiment may be implemented independently of each other or may be implemented together in a related relationship.

Hereinafter, various embodiments of the present specification will be described in detail with reference to the attached drawings.

Figure 1 illustrates an example of a planar structure of a general electroluminescent display device (10) to which the present embodiment can be applied.

Referring to FIG. 1, an electroluminescent display device (10) to which the present embodiment can be applied may include a display area (A/A) where information is displayed and a non-display area (N/A) where information is not displayed.

In the display area (A/A), a data line (DL) extending in a first direction (vertical direction) and a gate line (GL) extending in a second direction (horizontal direction) are arranged, and an electroluminescent pixel (P) is formed in an area where the gate line and the data line intersect.

In the electroluminescent pixel (P) region, a pixel array in which a plurality of layers are stacked is formed, and the pixel array may include at least one switch TFT and at least one storage capacitor. The switch TFT may be turned on in response to a scan signal from the gate lines (GL), thereby applying a data voltage from the data lines (DL) to one electrode of the storage capacitor. The driving TFT may control the amount of current supplied to the light-emitting element according to the magnitude of the voltage charged in the storage capacitor, thereby controlling the amount of light emitted by the light-emitting element. That is, the light-emitting element (EL) is disposed between the drain of the driving TFT and a low-potential driving voltage (VSS), and a high-potential driving voltage (VDD) is applied as a source of the driving TFT.

The amount of light emitted from the light-emitting element may be proportional to the amount of current flowing by the high-potential driving voltage (VDD) supplied from the driving TFT. In addition, the semiconductor layer of the TFTs constituting the pixel (P) may include at least one of amorphous silicon, polysilicon, or oxide semiconductor material. The light-emitting element may include an anode electrode, a cathode electrode, and a light-emitting structure interposed between the anode electrode and the cathode electrode. The anode electrode may be connected to the driving TFT.

When the electroluminescent display device is an organic light emitting display (OLED), the light emitting structure includes an emission layer (EML), and a hole injection layer (HIL) and a hole transport layer (HTL) may be disposed on one side of the emission layer, and an electron transport layer (ETL) and an electron injection layer (EIL) may be disposed on the other side of the emission layer.

The detailed configuration of this pixel array will be described in more detail below with reference to Fig. 12.

Meanwhile, a number of wires, pads, etc. can be arranged in the non-display area (N/A) of the display device (10) so as to supply various signals/voltages, etc. into the pixel.

Specifically, the non-display area (N/A) of the display device is arranged in a form that surrounds the central display area (A/A), and a gate driver (14) may be arranged in the left and right non-display areas adjacent to the display area (A/A), and a VSS supply wire (16) for supplying a common voltage or a low-potential driving voltage VSS to the first electrode (anode electrode) of the pixel, a VDD supply wire (15) for supplying a high-potential driving voltage VDD to the second electrode (cathode electrode) of the pixel, etc. may be arranged on the periphery thereof.

In addition, a data driving circuit (D-IC; 13) may be arranged on one side of the non-display area. This data driving circuit (13) may be manufactured in a chip-on-film form and installed separately on one side of the display panel. For this purpose, a circuit area (12) in the form of a film-on-plastic (FOP) in which various pads, wiring, etc. are formed on a plastic substrate may be formed in the area where the data driving circuit is mounted on one side of the substrate array.

As illustrated in Fig. 1, the VSS supply wiring (16) extends from the data driving circuit (13) and can be placed on the edges of three sides of the display device, excluding one side (e.g., the lower side) where the data driving circuit (13) is placed, among the four sides.

In addition, the VDD supply wiring (15) may be extended from the data driving circuit (13) and may be arranged on the edge of the side where the data driving circuit is arranged among the four sides of the display device and the edges of two sides perpendicular thereto, but is not limited thereto.

Of course, the wiring arranged outside the non-display area (N/A) of the display device is not limited to the VDD supply wiring (15) and the VSS supply wiring (16), and other wiring or pads may be arranged, and for example, ground wiring may be arranged as well.

FIG. 2 and FIG. 3 illustrate an example of an antistatic circuit arranged on a data line and a gate line in the electroluminescent display device of FIG. 1.

Meanwhile, static electricity may be generated by contact with manufacturing equipment and testing devices during various processes for manufacturing or testing electroluminescent display devices.

This static electricity is a high voltage that occurs for a short period of time, and this high voltage static electricity can flow into the pixel area through various wires formed on the display panel.

If high-voltage static electricity flows into a pixel, it can damage various elements (TFT, light-emitting element, etc.) that make up the pixel. Even if the elements are not damaged, the static electricity can temporarily deteriorate the image quality.

In particular, there is a high possibility that static electricity will be introduced along the data line (DL) or gate line (GL), and therefore, a certain static electricity protection circuit may be arranged as shown in Fig. 2.

For example, as shown in Fig. 2, a first electrostatic protection circuit (18) may be placed between the data drive circuit (13) and the input portion (data pad, etc.) of the data line (DL).

Similarly, a second electrostatic protection circuit (18') may be arranged between the gate driving circuit (GIP; 14) and the gate line (GL).

This first/second electrostatic protection circuit can be configured as a circuit as in Fig. 3.

As shown in Fig. 3, the first/second electrostatic protection circuit can be implemented with a diode placed between a data line (DL) or a gate line (GL) and a ground line (GND) (left drawing of Fig. 3). Alternatively, the first/second electrostatic protection circuit can be implemented with one or more FETs (T) and one or more capacitors (C,C;') placed between a data line (DL) or a gate line (GL) and a ground line (GND) (right drawing of Fig. 3).

This first/second electrostatic protection circuit is turned on when static electricity of a certain voltage or higher generated during the process of manufacturing a substrate array constituting an electroluminescent display device flows into a data line (DL) or a gate line (GL), and passes the high-voltage electrostatic charge to the ground line.

Meanwhile, as shown in Fig. 1, in addition to data lines and gate lines, several driving voltage supply lines, i.e., VDD supply lines (15) and VSS supply lines (16), are arranged on the substrate array of the electroluminescent display device.

Therefore, a problem may arise in which static electricity exceeding a certain voltage generated during the process of manufacturing the substrate array flows into the pixels through the driving voltage supply wiring.

However, as shown in Fig. 2, up to now, an electrostatic protection circuit can only be provided at the input portion of a data line or gate line, and there is no proper electrostatic protection means for the driving voltage supply wiring.

Of course, to prevent static electricity generated during the board manufacturing process, a structure can be utilized that places a shorting bar that commonly connects all wires that may generate static electricity. This shorting bar can be removed from the display panel after the display panel is manufactured by cutting it along a specific trimming line (TL) or scribing line.

However, since this anti-static structure in the form of a shorting bar can cause burnt or moisture penetration problems, it is recently being implemented in a structure that avoids the driving voltage supply wiring (VDD, VSS supply wiring).

As a result, in electroluminescent display devices such as those in FIGS. 1 to 3, high-potential static electricity generated during the manufacturing process or use of the display device may flow into the pixels through the driving voltage supply wiring.

FIG. 4 is an equivalent circuit diagram for explaining static electricity inflow through a driving voltage supply line and pixel damage caused by it in the electroluminescent display device according to FIGS. 1 to 3.

As shown in Fig. 4, a driving transistor (Td) is placed between a high-potential driving voltage (VDD) and a light-emitting element (EL) within a pixel area (P), and the light-emitting element (EL) is placed between the driving transistor (Td) and a low-potential driving voltage (VSS). The driving transistor (Td) can be turned ON/OFF according to a data voltage signal applied from a second node (N2).

In Fig. 4, the remaining elements constituting the field-emitting pixel, such as one or more switching transistors, one or more capacitors, etc., are not shown for convenience.

In a circuit configuration such as Fig. 4, if high-voltage electrostatic discharge (ESD) generated during the manufacturing process or use of the display device flows into the pixel area (P) along the VDD supply line (15), it may damage the transistor or light-emitting element included therein.

In particular, high-frequency components of electrostatic discharge (ESD) can have a greater impact on pixels.

Among the electrostatic discharge (ESD) that occurs temporarily, when high-frequency components enter a pixel, the state of elements (transistors, light-emitting elements, etc.) within the pixel changes more frequently, so they can damage elements more than low-frequency components.

Therefore, in this embodiment, a static electricity prevention unit is provided that prevents static electricity, particularly static electricity having a high-frequency component, generated during the manufacturing process or use of an electroluminescent display device from flowing into a pixel along a driving voltage supply line.

FIG. 5 is a plan view schematically illustrating the configuration of an electroluminescent display device according to one embodiment of the present specification.

Referring to FIG. 5, an electroluminescent display device according to one embodiment of the present specification includes a substrate array (100) including a display area (A/A) in which electroluminescent pixels are arranged and a non-display area in which wiring for supplying power to the electroluminescent pixels is arranged, a data driving circuit (130) as a driving circuit unit arranged on one side of the non-display area of the substrate array, a driving voltage supply wiring that extends from the data driving circuit to the non-display area and supplies a driving voltage to pixels in the display area, and an electrostatic protection unit (200) having a low-frequency bandpass characteristic arranged between the driving circuit unit and the driving voltage supply wiring.

The non-display area (N/A) of the substrate array (100) of the electroluminescent display device is arranged in a form that surrounds the central display area (A/A), and a gate driver (140) can be arranged in the left and right non-display areas adjacent to the display area (A/A).

On the periphery of the gate driver (140), a VSS supply wire (160) for supplying a common voltage or a low-potential driving voltage (VSS) to the first electrode (anode electrode) of the pixel, a VDD supply wire (150) for supplying a high-potential driving voltage (VDD) to the second electrode (cathode electrode) of the pixel, etc. may be arranged.

That is, in this embodiment, the driving voltage supply wiring includes a VSS supply wiring (160) and a VDD supply wiring (150).

In addition, a data driving circuit (D-IC; 130) may be placed on one side of the non-display area. This data driving circuit (130) may be manufactured in a chip-on-film form and installed separately on one side of the display panel. For this purpose, a circuit structure in the form of a film-on-plastic (FOP) in which various pads, wiring, etc. are formed on a plastic substrate may be formed in an area where the data driving circuit is mounted on one side of the substrate array.

The VSS supply wiring (160) can be extended from the data driving circuit (130) and placed on the edges of three sides of the display device, excluding one side (e.g., the lower side) where the data driving circuit (130) is placed, among the four sides.

In addition, the VDD supply line (150) extends from the data driving circuit (130) and is arranged at the edge of the side where the data driving circuit is arranged among the four sides of the display device and the edges of two sides perpendicular thereto, so that it can extend to each pixel within the pixel area.

The electrostatic protection unit (200) is placed between the data drive circuit (130) and the drive voltage supply line and has a low-frequency bandpass characteristic.

Specifically, the electrostatic protection unit (200) may be configured to include an inductor wiring unit and a capacitance wiring unit connected thereto.

Fig. 6 illustrates a schematic configuration of an electrostatic protection unit according to one embodiment of the present specification, and Fig. 7 illustrates a specific wiring structure of an electrostatic protection unit according to one embodiment.

As shown in Fig. 6, the electrostatic protection unit (200) may include an inductor wiring unit (210) extending from the data driving circuit (130) and a capacitance wiring unit (220) electrically connected to the inductor wiring unit (210). The electrostatic protection unit (200) is electrically connected to the VDD supply wiring (150) or the VSS supply wiring (160).

That is, the electrostatic protection unit (200) according to the present embodiment is placed between the data driving circuit (130) and the input portion of the driving voltage supply wiring, and includes an inductor wiring portion (210) and a capacitance wiring portion (220), thereby having an LC low-frequency bandpass characteristic.

The inductor wiring section (210) can be formed with a double metal layer structure including a link wiring section and a coil wiring section in the form of a spiral coil.

The capacitance wiring section (220) may include a first capacitance electrode section and a second capacitance electrode section that are arranged opposite each other with a constant area with a dielectric in between.

At this time, the first capacitance electrode portion may be connected to the inductor wiring portion (210), and the second capacitance electrode portion may form a ground wiring portion. The ground wiring portion constituting the second capacitance electrode portion may be electrically connected to a separate ground line.

Referring to FIG. 7, the inductor wiring section (210) of the electrostatic protection unit (200) includes a coil wiring section that is electrically connected to the driving voltage supply wiring and arranged in a spiral shape, and a link wiring section that is arranged in a different layer from the coil wiring section, and the coil wiring section and the link wiring section can be electrically connected through a first contact hole.

In Fig. 7, the VDD supply line is described as an example of a driving voltage supply wiring, but is not limited thereto.

Referring to Fig. 7, a more detailed configuration of the electrostatic protection unit (200) is described.

The inductor wiring section (210) of the electrostatic protection unit extends from the VDD pad (132) arranged in the data driving circuit (130) and includes a link wiring section (211) arranged in the first layer, and a coil wiring section (212) arranged in a second layer different from the first layer and connected to the link wiring section (211) through a first contact hole (CH).

At this time, the first layer may be a gate metal layer, and the second layer may be a source-drain metal layer, but is not limited thereto.

The coil wiring section (212) is a wiring structure formed in a spiral shape centered on the contact hole.

In Fig. 7, the coil wiring section (212) is illustrated as having a straight spiral structure with two turns, but the number of turns or the specific shape of the spiral structure is not limited thereto.

When the coil wiring section (212) is formed into a spiral wiring structure, the coil wiring section functions as a type of inductance.

That is, when a constant current flows through the coil wiring due to static electricity, etc., a change in the magnetic field occurs according to the change in the current flow, and an induced electromotive force is generated accordingly.

It has a low-frequency pass characteristic that suppresses current changes due to induced electromotive force, thereby canceling out high-frequency components of current (voltage) flow.

At this time, the inductance value can be varied depending on the wiring width, wiring material, number of turns, etc. of the coil wiring section (212).

In addition, the coil wiring portion (212) electrically connected to the VDD supply line is formed in a spiral structure of multiple turns. Since the coil wiring portion must be connected to the VDD pad (132) of the data drive circuit by passing through multiple turns, a jumping structure using a contact hole must be used.

That is, as shown in FIG. 7, the coil wiring portion (212) is placed on a second layer such as a source-drain metal layer, and the link wiring portion (211) is placed on a first layer such as a gate metal layer, and the coil wiring portion (212) and the link wiring portion (211) are electrically connected through a first contact hole (CH).

Accordingly, the link wiring section (211) can connect the coil wiring section (212) to the VDD pad (132) of the data drive circuit (130) without interfering with the multiple spiral wirings constituting the coil wiring section (212).

Meanwhile, the capacitance wiring section (220) of the electrostatic protection unit may include a first capacitance electrode section (221) extending from the coil wiring section (212), and a second capacitance electrode section (230) arranged opposite the first capacitance electrode section (221) and arranged in a different layer from the first capacitance electrode section (221).

As shown in Fig. 7, the first capacitance electrode portion (221) is formed on the second layer of the source-drain metal layer, and is formed by extending from the coil wiring portion (212) and expanding the wiring width to a certain extent or more.

The second capacitance electrode portion (230) is formed to have a constant area in the first layer of the gate metal layer, and may be a ground wiring portion that is electrically grounded and has an equal potential.

The first capacitance electrode portion (221) and the second capacitance electrode portion (230), which is a ground wiring portion, form opposing electrodes having a constant area (A), and a dielectric having a constant permittivity (ε) is arranged between them.

At this time, a gate insulating layer (2231 in FIG. 12) and/or an interlayer insulating layer (2233 in FIG. 12), which will be described later, can be used as the dielectric between the two capacitance electrodes, and this will be described later.

As a result, the capacitance electrode part (220) of the electrostatic protection part (200) according to the present embodiment functions as a capacitor by the first capacitance electrode part (221) and the second capacitance electrode part (230) and the dielectric material layer disposed therebetween.

That is, in the embodiment of FIG. 7, when electrostatic charge flows along the VDD supply wiring, the coil wiring portion (210) can be operated as a capacitor that grounds the electrostatic charge passing through the second capacitance electrode (230).

At this time, when the area of the capacitance electrode part is A, the distance between the two capacitance electrode parts is d, and the dielectric constant between the two capacitance electrode parts is ε, the capacitance electrode part (220) of the electrostatic protection part (200) has an electrostatic capacitance C as shown in the following mathematical expression 1.

[Mathematical Formula 1]

C(capacitance) = ε*A/d

In addition, the substrate array (100) of the field emission display device according to the present embodiment is manufactured by arranging a plurality of unit cells on a large-area substrate, and after the manufacturing is completed, it can be cut along a trimming line (TL) or a scribing line as illustrated in FIG. 7.

Each cut cell unit array substrate constitutes one display module.

At this time, in order to examine the performance of each unit cell in the substrate manufacturing process, an auto probe pad section (170) may be further included in the non-display area of each cell.

That is, in the manufacturing process of the mother board, various signals such as driving voltage and test signals are applied to the inside of the display panel through the auto probe pad part (130). In addition, during the manufacturing process of the display device, the auto probe pad part (170) is removed from the substrate through a trimming process, etc., and thereafter, various signals are applied to the inside of the display panel from the data driving circuit (D-IC; 130).

A plurality of test pads for supplying signals to be used for inspection can be arranged in the auto probe pad section (170), and each test pad is connected to a corresponding wiring.

Test pads included in the auto probe pad section (170) may include data line test pads, gate line test pads, driving voltage test pads, etc., and for convenience, only the VDD test pad (172), which is one of the driving voltage test pads, is illustrated in FIG. 7.

As shown in Fig. 7, the link wiring section (211) constituting the inductor wiring section (210) is electrically connected to the VDD test pad (172) included in the auto probe pad section (170).

For example, a probe link wiring section (176) extending from a VDD test pad (172) of an auto probe pad section (170) may be formed on the same layer as the link wiring section (211).

In this specification, Auto-Probe refers to various inspections or tests performed in the manufacturing process of an electroluminescent display device, and may be expressed by other terms.

High-voltage static electricity to which this embodiment can be applied may occur mainly in the manufacturing process of an electroluminescent display device rather than in the actual use environment of the display device.

For example, static electricity may be generated by contact with manufacturing equipment and test devices during various processes for manufacturing or testing electroluminescent display devices.

Accordingly, as shown in Fig. 7, by connecting the VDD test pad (172) of the auto probe pad section (170) to the electrostatic protection section (200) according to the present embodiment, there is an effect of preventing high-frequency static electricity generated in the manufacturing process of the electroluminescent display device from flowing in through the driving voltage supply wiring.

Fig. 8 is an equivalent circuit diagram including a static electricity protection unit and pixels within a display area according to the embodiment of Fig. 7.

As shown in Fig. 8, between the VDD supply wiring (150) and the pixel area (P), an inductance L is formed in the inductor wiring section (210) by the electrostatic protection section (200), and an electrostatic capacitance C is formed by the capacitance wiring section (220) connected thereto. The capacitance wiring section (220) is connected to the ground GND.

In this way, an LC low-frequency filter can be implemented between the VDD supply line (150) and the pixel (P) by the electrostatic protection unit (200).

That is, the high-frequency component is blocked by the inductance L, and the high-frequency component passes to the ground potential by the electrostatic capacitance C.

Accordingly, as shown in Fig. 8, even if high-frequency static electricity is introduced into the VDD supply wiring (150), the high-frequency component (ESD AC) of the static electricity passes to the ground due to the LC low-frequency filter characteristics of the static electricity protection unit (200), and only the DC component of the static electricity can be applied to the pixel area.

In general, static electricity is a flow of charge that occurs temporarily and unstably, so it changes greatly over time and therefore can have a larger high-frequency component.

Therefore, when using an electrostatic protection unit with low-frequency pass characteristics such as that of the present embodiment, it is possible to minimize high-frequency electrostatic discharge from flowing into the pixel through the driving voltage supply wiring.

Fig. 9 illustrates a specific wiring structure of an electrostatic protection unit according to another embodiment of the present specification.

In the embodiment of Fig. 9, an electrostatic protection unit (200) is formed on both the VDD supply wiring (150) and the VSS supply wiring (160), which are driving power supply wiring.

That is, in addition to the electrostatic protection unit (200) between the VDD supply wiring (150) and the data driving circuit (130) according to the embodiment of FIG. 7, an electrostatic protection unit of a similar structure is further formed between the VSS supply wiring (160) and the data driving circuit (130).

Referring to FIG. 9, the driving voltage supply wiring includes a VDD supply wiring (150) as a first driving voltage supply wiring and a VSS supply wiring (160) as a second driving voltage supply wiring.

At this time, the electrostatic protection unit may include both an electrostatic protection unit for the VDD supply wiring and an electrostatic protection unit for the VSS supply wiring.

Similar to FIG. 7, the inductor wiring section of the electrostatic protection unit for the VDD supply wiring may include a link wiring section (211') extending from the VDD pad (132) and a coil wiring section (212') having a spiral structure connected to the link wiring section (211') by a first contact hole (CH').

In addition, the inductor wiring section of the electrostatic protection unit for VSS supply wiring may include a link wiring section (211") extending from the VSS pad (134) and a coil wiring section (212") having a spiral structure connected to the link wiring section (211") by a first contact hole (CH").

In the embodiment of FIG. 9, an auto probe pad section (170) may be placed on one side of the non-display area, and link wiring sections (211', 211") constituting the inductor wiring section of the electrostatic protection section for VDD/VSS supply wiring are electrically connected to the VDD test pad (172) and the VSS test pad (174) of the auto probe pad section (170), respectively.

Specifically, a first probe link wiring section (176') electrically connected to a VDD test pad (172) included in an auto probe pad section (170) is connected to a link wiring section (211'). In addition, a second probe link wiring section (176") electrically connected to a VSS test pad (174) included in an auto probe pad section (170) is connected to a link wiring section (211").

The first capacitance electrode section forming the capacitance wiring section includes a first-first capacitance electrode section (221') extended from a coil wiring section (211') for VDD supply wiring, and a first-second capacitance electrode section (221") extended from a coil wiring section (211") for VSS supply wiring.

The second capacitance electrode portion (230') forming the capacitance wiring portion is configured as a ground wiring portion formed with an area corresponding to both the first-first capacitance electrode portion (221') and the first-second capacitance electrode portion (221").

That is, in the embodiment of FIG. 9, the second capacitance electrode portion of the capacitance wiring portion becomes a capacitance electrode facing both the first-first capacitance electrode portion (221') and the first-second capacitance electrode portion (221") for the VDD and VSS supply wiring.

Meanwhile, as shown in FIG. 9, a VDD supply wire (150) is extended to the other end of the 1-1 capacitance electrode part (221'), and a VSS supply wire (160) is extended to the other end of the 1-2 capacitance electrode part (221").

In this way, the VDD supply wire (150) and the VSS supply wire (160) extended from the 1-1 capacitance electrode portion (221') and the 1-2 capacitance electrode portion (221") extend past the bending area of the array substrate to the non-display area.

At this time, the length D2 of the area where the capacitance wiring portion is placed is approximately 2000 um, and the horizontal and vertical lengths of the area where the inductor wiring portion is placed can be approximately 1500 um, but are not limited thereto.

FIG. 10 is an equivalent circuit diagram including a static electricity protection unit and pixels within a display area according to the embodiment of FIG. 9, and FIG. 11 illustrates a cross-section along line I-I' of FIG. 9.

As shown in FIG. 10, according to the embodiment of FIG. 9, not only is an electrostatic protection section with LC low-frequency filter characteristics formed between the VDD supply wiring and the pixel area (P), but an electrostatic protection section with LC low-frequency filter characteristics can also be formed between the VSS supply wiring and the pixel area (P).

Accordingly, as shown in Fig. 10, even if high-frequency static electricity flows into one or more of the VDD supply lines and the VSS supply lines, the high-frequency component of the static electricity (ESD) can be prevented from flowing into the pixel area by passing it to the ground due to the LC low-frequency filter characteristics of the static electricity protection unit.

Meanwhile, as shown in FIG. 11, the inductor wiring section of the electrostatic protection unit (200) can be implemented by arranging a link wiring section (211') of a gate metal layer on a substrate (2210), and forming a coil wiring section (212') of a spiral structure as a source-drain metal layer on top of a gate insulating layer (2231) and an interlayer insulating layer (2233) thereon.

Additionally, a flattening layer (2237) may be further placed on the upper portion of the coil wiring section (212").

Of course, in the present embodiments, the link wiring portion (211') and the coil wiring portion (212") do not need to be formed as a gate metal layer and a source-drain metal layer, respectively, and it is sufficient for them to be arranged in different layers.

For example, the gate metal layer and the source-drain metal layer may each be formed of two or more layers, and in this case, the link wiring portion (211') and the coil wiring portion (212") may each be formed in any two layers selected from among these.

Similarly, in the above embodiment, the first capacitance electrode portion constituting the capacitance wiring portion is formed as a source-drain metal layer, and the second capacitance electrode portion opposite thereto is formed as a gate metal layer, but the present invention is not limited thereto.

For example, the gate metal layer and the source-drain metal layer may each be formed of two or more layers, in which case the first capacitance electrode portion and the second capacitance electrode portion may each be formed in any two layers selected from among these.

According to the above embodiment, by arranging an electrostatic protection unit with LC low-frequency band filter characteristics at the inlet portions of the VDD supply wiring and the VSS supply wiring, there is an effect of blocking high-frequency electrostatic inflow through the VDD supply wiring and the VSS supply wiring.

Fig. 12 illustrates an example of a pixel cross-section of an electroluminescent display device according to the present embodiment.

In Fig. 12, the electroluminescent display device according to the present embodiment is exemplified as an organic electroluminescent display device (OLED), but is not limited thereto and may be applied to other types of electroluminescent display devices.

An organic light-emitting display device (2200) according to the present embodiment may include a substrate (2210) as a base layer, a thin film transistor (2220), an organic light-emitting element (2240), and an encapsulation layer (2260) in a pixel array area.

The substrate (2210) serves to support and protect the components of the organic light-emitting display device (2200) placed on the upper side, and recently, it can be made of a flexible material having flexible properties, so the substrate (2210) can be a flexible substrate made of polyamide or the like as described above.

For example, the flexible substrate may be in the form of a film including one selected from the group consisting of polyester polymers, silicone polymers, acrylic polymers, polyolefin polymers, and copolymers thereof. Specifically, polyethylene terephthalate (PET), polybutylene terephthalate (PBT), polysilane, polysiloxane, polysilazane, polycarbosilane, polyacrylate, polymethacrylate, polymethylacrylate, polymethylmethacrylate, polyethylacrylate, polyethylmethacrylate, cyclic olefin copolymer (COC), cyclic olefin polymer (COP), polyethylene (PE), polypropylene (PP), polyimide (PI), polymethylmethacrylate (PMMA), polystyrene (PS), polyacetal (POM), polyetheretherketone (PEEK), polyestersulfone (PES), polytetrafluoroethylene (PTFE), It may be composed of at least one of polyvinyl chloride (PVC), polycarbonate (PC), polyvinylidene fluoride (PVDF), perfluoroalkyl polymer (PFA), styrene acryl nitrile copolymer (SAN), and combinations thereof.

A buffer layer may be further formed and placed on the substrate (2210). The buffer layer prevents the penetration of moisture or other impurities through the substrate (2210) and may flatten the surface of the substrate (2210). The buffer layer is not a necessary component and may not be placed depending on the type of the substrate (2210) or the type of the thin film transistor (2220) placed on the base layer.

A thin film transistor (2220) disposed on a substrate (2210) includes a gate electrode (2222), a source electrode (2224), a drain electrode (2226), and a semiconductor layer (2228).

The semiconductor layer (2228) may be composed of polycrystalline silicon, which has amorphous silicon or mobility superior to amorphous silicon, thus having low energy consumption and excellent reliability, and can be applied to a driving thin film transistor within a pixel, but is not limited thereto.

Recently, oxide semiconductors have been attracting attention for their excellent mobility and uniformity. Oxide semiconductors are quaternary metal oxides such as indium tin gallium zinc oxide (InSnGaZnO), ternary metal oxides such as indium gallium zinc oxide (InGaZnO), indium tin zinc oxide (InSnZnO), indium aluminum zinc oxide (InAlZnO), tin gallium zinc oxide (SnGaZnO), aluminum gallium zinc oxide (AlGaZnO), and tin aluminum zinc oxide (SnAlZnO), binary metal oxides such as indium zinc oxide (InZnO), tin zinc oxide (SnZnO), aluminum zinc oxide (AlZnO), zinc magnesium oxide (ZnMgO), tin magnesium oxide (SnMgO), indium magnesium oxide (InMgO), indium gallium oxide (InGaO), or indium oxide (InO), tin oxide. It can be composed of (SnO)-based materials, zinc oxide (ZnO)-based materials, etc., and the composition ratio of each element is not limited.

The semiconductor layer (2228) may include a source region, a drain region, and a channel between the source region and the drain region, which include p-type or n-type impurities, and may include a low-concentration doping region between the source region and the drain region adjacent to the channel.

The gate insulating layer (2231) is an insulating film composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), and is arranged so that the current flowing in the semiconductor layer (2228) does not flow to the gate electrode (2222). In addition, silicon oxide has lower ductility than metal, but has better ductility than silicon nitride, and can be selectively formed as a single layer or multiple layers depending on its characteristics.

The gate electrode (2222) acts as a switch that turns on or off the thin film transistor (2220) based on an electric signal transmitted from the outside through the gate line, and may be formed of a single layer or multiple layers of conductive metals such as copper (Cu), aluminum (Al), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), and neodymium (Nd), or alloys thereof, but is not limited thereto.

The source electrode (2224) and the drain electrode (2226) are connected to the data line and allow an electric signal transmitted from the outside to be transmitted from the thin film transistor (2220) to the organic light-emitting element (2240). The source electrode (2224) and the drain electrode (2226) may be formed of a single layer or multiple layers of a conductive metal such as copper (Cu), aluminum (Al), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), and neodymium (Nd), or an alloy thereof, but are not limited thereto.

In order to insulate the gate electrode (2222), the source electrode (2224), and the drain electrode (2226) from each other, an interlayer insulating layer (2233) composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx) can be placed between the gate electrode (2222), the source electrode (2224), and the drain electrode (2226).

Meanwhile, at least one of the aforementioned gate insulating layer (2231) and layer insulating layer (2233) can be used as a dielectric placed between the first/second capacitance electrode portion of the capacitance wiring portion constituting the electrostatic protection portion according to the present embodiment.

In addition, a gate metal layer may be formed by the same layer/patterning process as the gate electrode (2222) described above, and a source-drain metal layer may be formed by the same layer/patterning process as the source electrode (2224) and the drain electrode (2226). These gate metal layers and source-drain metal layers may be used for one or more of the link wiring section (211) and the coil wiring section (212) of the inductor wiring section of the electrostatic protection unit according to the present embodiment, and the first/second capacitance electrode section of the capacitance wiring section.

That is, the link wiring section (211) and the coil wiring section (212) of the inductor wiring section of the electrostatic protection unit according to the present embodiment, and the first/second capacitance electrode section of the capacitance wiring section are arranged on different layers, but can be formed in a single-layer or multi-layer structure using a conductive metal such as copper (Cu), aluminum (Al), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), and neodymium (Nd), or an alloy thereof.

A passivation layer (2235) composed of an inorganic insulating film such as silicon oxide (SiOx) or silicon nitride (SiNx) is disposed on a thin film transistor (2220). The passivation layer (2235) can prevent unnecessary electrical connection between components of the thin film transistor (2220) and prevent contamination or damage from the outside. The passivation layer (2235) may be omitted depending on the configuration and characteristics of the thin film transistor (2220) and the organic light-emitting element (2240).

The thin film transistor (2220) can be classified into an inverted staggered structure and a coplanar structure depending on the positions of the components that make up the thin film transistor (2220). In the thin film transistor of the inverted staggered structure, the gate electrode is located on the opposite side of the source electrode and the drain electrode with respect to the semiconductor layer. As shown in Fig. 12, in the thin film transistor (2220) of the coplanar structure, the gate electrode (2222) is located on the same side as the source electrode (2224) and the drain electrode (2226) with respect to the semiconductor layer (2228).

Although a thin film transistor (2220) of a coplanar structure is illustrated in FIG. 12, the organic light emitting display device according to the present embodiment may include a thin film transistor of an inverted staggered structure.

For convenience of explanation, only the driving thin film transistor among various thin film transistors that can be included in the organic light emitting display device is illustrated, but the switching thin film transistor, capacitor, etc. can also be included in the organic light emitting display device. At this time, when a signal is applied from the gate wire, the switching thin film transistor transmits the signal from the data wire to the gate electrode of the driving thin film transistor. The driving thin film transistor transmits the current transmitted through the power wire to the anode by the signal received from the switching thin film transistor, and controls light emission by the current transmitted to the anode.

A planarization layer (2237) is disposed on the thin film transistor (2220) to protect the thin film transistor (2220), to alleviate the step difference caused by the thin film transistor (2220), and to reduce the parasitic capacitance caused between the thin film transistor (2220) and the gate line, data line, and organic light-emitting element (2240).

The flattening layer (2237) may be formed of one or more materials selected from the group consisting of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene resin, polyphenylenesulfide resin, and benzocyclobutene, but is not limited thereto.

An organic light-emitting element (2240) disposed on a planarization layer (2237) includes an anode (2242), a light-emitting portion (2244), and a cathode (2246).

The anode (2242) may be placed on the planarization layer (2237). At this time, the anode (2242) is an electrode that supplies holes to the light-emitting portion (2244) and may be electrically connected to the thin film transistor (2220) through a contact hole in the planarization layer (2237).

The anode (2242) may be composed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but is not limited thereto.

In addition, when the organic light-emitting display device (2200) is a top emission display that emits light toward the upper portion where the cathode (2246) is disposed, a reflective layer may be further included so that the emitted light can be reflected by the anode (2242) and more smoothly emitted toward the upper portion where the cathode (2246) is disposed. In addition, the anode (2242) may have a two-layer structure in which a transparent conductive layer and a reflective layer made of a transparent conductive material are sequentially laminated, or a three-layer structure in which a transparent conductive layer, a reflective layer, and a transparent conductive layer are sequentially laminated, and the reflective layer may be made of silver (Ag) or an alloy containing silver.

A bank (2250) disposed on the anode (2242) and the planarization layer (2237) can define a pixel that defines an area that emits light. After forming a photoresist on the anode (2242), the bank (2250) is formed by a photolithography process.

A spacer (2252) composed of one of transparent organic materials, such as polyimide, photoacrylic, and benzocyclobutene (BCB), may also be placed on the upper portion of the bank (2250).

A light-emitting portion (2244) is arranged between the anode (2242) and the cathode (2246). The light-emitting portion (2244) serves to emit light and may include at least one layer among a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). Depending on the structure or characteristics of the organic light-emitting display device (2200), some components of the light-emitting portion (2244) may be omitted. Here, the light-emitting layer may also apply an organic light-emitting layer and an inorganic light-emitting layer.

The hole injection layer is placed on the anode (2242) to facilitate the injection of holes, and the hole transport layer is placed on the hole injection layer to facilitate the transfer of holes to the light-emitting layer.

The light-emitting layer is disposed on the hole transport layer and can emit light of a specific color by including a material capable of emitting light of a specific color. At this time, the light-emitting material can be formed using a phosphorescent material or a fluorescent material.

An electron transport layer is placed on the light-emitting layer to facilitate the movement of electrons to the light-emitting layer.

By further arranging an electron blocking layer or hole blocking layer adjacent to the light-emitting layer to block the flow of holes or electrons, the phenomenon of electrons moving from the light-emitting layer and passing through the adjacent hole transport layer when injected into the light-emitting layer, or holes moving from the light-emitting layer and passing through the adjacent electron transport layer when injected into the light-emitting layer, can be prevented, thereby improving the light-emitting efficiency.

The cathode (2246) is placed on the light-emitting portion (2244) and serves to supply electrons to the light-emitting portion (2244). Since the cathode (2246) must supply electrons, it may be formed of a metal material such as magnesium (Mg) or silver-magnesium (Ag:Mg), which are conductive materials with a low work function, but is not limited thereto. Alternatively, when the organic light-emitting display device (2200) is of the top emission type, the cathode (2246) may be a transparent conductive oxide of the indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), and tin oxide (TiO) series.

An encapsulation layer or sealing portion (2260) may be placed on the organic light-emitting element (2240) to prevent the thin film transistor (2220), which is a component of the organic light-emitting display device (2200), and the organic light-emitting element (2240) from being oxidized or damaged by moisture, oxygen, or impurities flowing in from the outside. The sealing portion (2260) may be formed by stacking a plurality of sealing layers, a foreign matter compensation layer, and a plurality of barrier films.

The sealing layer is arranged on the upper front surface of the thin film transistor (2220) and the organic light emitting element (2240), and may be composed of one of inorganic materials such as silicon nitride (SiNx) or aluminum oxide (AlOz), but is not limited thereto. An additional sealing layer may be further laminated on the foreign matter compensation layer arranged on the sealing layer.

The foreign matter compensation layer is placed on the sealing layer, and can be made of, but is not limited to, organic silicon oxycarbon (SiOCz), acrylic, or epoxy resin. The foreign matter compensation layer compensates for defects caused by cracks caused by foreign matter or particles that may occur during the process by covering such warpage and foreign matter with the foreign matter compensation layer.

By placing a barrier film on the sealing layer and the foreign matter compensation layer, the organic light-emitting display device (2200) can further delay the penetration of oxygen and moisture from the outside. The barrier film is configured in the form of a film having light transmission and double-sided adhesiveness, and can be configured with any one insulating material among olefin series, acrylic series, and silicone series, or a barrier film configured with any one material among COP (Copolyester Thermoplastic Elastomer), COC (Cycoolefin Copolymer), and PC (Polycarbonate) can be further laminated, but is not limited thereto.

In addition, the pixels included in the electroluminescent display device according to the present embodiment are not limited to the pixel array structure shown in FIG. 12, and may have a pixel structure of a different form.

Fig. 13 illustrates another example of the inductor wiring section of the electrostatic protection unit according to the present embodiment.

In the above embodiment, the coil wiring portion (212, 212', 212") is illustrated as having a straight spiral structure with two turns, but the number of turns or the specific shape of the spiral structure is not limited thereto.

In this way, in the present embodiments, the spiral structure or spiral arrangement of the coil wiring portion includes not only a linear spiral structure but also a curved spiral structure.

Fig. 14 illustrates a specific wiring structure of an electrostatic protection unit according to another embodiment of the present specification, and Fig. 15 illustrates a cross-section of a capacitance wiring unit cut along line II-II' of Fig. 14.

In the embodiments of FIGS. 5 to 11, the second capacitance electrode portion forming the capacitance wiring portion is formed as a ground wiring portion.

However, in the embodiment of FIG. 14 or below, a separate ground wiring section is not used, and the first capacitance electrode and the second capacitance electrode forming the capacitance wiring section are configured to be equipotentially equal to the VDD electrode wiring and the VSS electrode wiring, respectively.

In the embodiment of FIG. 14, the driving voltage supply wiring includes a first driving voltage supply wiring and a second driving voltage supply wiring, and the inductor wiring section includes a first coil wiring section electrically connected to the first driving voltage supply wiring and arranged in a spiral shape, and a second coil wiring section electrically connected to the second driving voltage supply wiring and arranged in a spiral shape, and may include at least one of a first link wiring section arranged in a different layer from the first coil wiring section and a second link wiring section arranged in a different layer from the second coil wiring section.

Specifically, in the embodiment of FIG. 14, the driving voltage supply wiring includes a VDD supply wiring (1150), which is a first driving voltage supply wiring, and a VSS supply wiring (1160), which is a second driving voltage supply wiring.

The inductor wiring section includes both an inductor wiring section for the VDD supply wiring and an inductor wiring section for the VSS supply wiring, similar to the embodiment of FIG. 9.

The inductor wiring section for VDD supply wiring includes a first coil wiring section (1212) that is electrically connected to the VDD supply wiring (1150) and arranged in a spiral shape, and a first link wiring section (1211) that is arranged on a different layer from the first coil wiring section (1212) and connected to a VDD pad (1132) in a data driving circuit (1130). The first link wiring section (1211) and the first coil wiring section (1212) are formed on different layers and are electrically connected in a first contact hole.

Similarly, the inductor wiring section for the VSS supply wiring includes a second coil wiring section (1212') that is electrically connected to the VDD supply wiring (1160) and arranged in a spiral shape, and a second link wiring section (1211') that is arranged on a different layer from the second coil wiring section (1212') and connected to a VSS pad (1134) in the data driving circuit (1130). The second link wiring section (1211') and the second coil wiring section (1212') are also formed on different layers and are electrically connected in the first contact hole.

The capacitance wiring section according to the embodiment of FIG. 14 includes a first capacitance electrode section (1221) formed to extend in the same layer as the first coil wiring section (1212), and a second capacitance electrode section (1221') formed in a different layer from the first capacitance electrode section (1221) at a position opposite to the first capacitance electrode section (1221) and electrically connected to the VSS supply wiring (1160), which is a second driving voltage supply wiring.

That is, in the embodiment of FIG. 14, the first capacitance electrode portion (1221) of the capacitance wiring portion is formed by extending from one end of the first coil wiring portion (1212) for the VDD supply wiring. For example, the first capacitance electrode portion (1221) may be formed of the same source-drain metal layer as the first coil wiring portion (1212) for the VDD supply wiring.

In addition, the second capacitance electrode portion (1221') of the capacitance wiring portion is formed at a position facing the first capacitance electrode portion (1221), and can be electrically connected to the second coil wiring portion (1212') for VSS supply wiring through the second contact hole (CH2). For example, the second capacitance electrode portion (1222) is formed of a gate metal layer, and can be electrically connected to the other end of the second coil wiring portion (1212') for VSS supply wiring through the second contact hole (CH2).

Additionally, in the embodiment of FIG. 14, the VDD supply wiring (1150) of the source-drain metal layer may be extended from the other end of the first capacitance electrode portion (1221). The VSS supply wiring (1160) of the gate metal layer may be extended from the other end of the second capacitance electrode portion (1221').

At this time, the VDD supply wiring (1150) and the VSS supply wiring (1160) can be formed by reducing the width of the first capacitance electrode portion (1221) and the second capacitance electrode portion (1221'), respectively.

As shown in FIG. 15, according to the embodiment of FIG. 14, the second capacitance electrode portion (1221'), which is a lower electrode forming a capacitance wiring portion, is disposed on a gate metal layer but is electrically connected to the VSS supply wiring. In addition, the first capacitance electrode portion (1221), which is an upper electrode forming a capacitance wiring portion, is disposed on a source-drain metal layer and is electrically connected to the VDD supply wiring.

Specifically, the capacitance wiring section according to FIG. 14 forms a second capacitance electrode section (1221') as a gate metal layer on a substrate (2210), and a gate insulating layer (2231) and an interlayer insulating layer (2233) as a dielectric are disposed thereon, and a first capacitance electrode section (1221) and a planarization layer (2237) of a source-drain metal layer can be disposed thereon, respectively.

Of course, even in the embodiment of Fig. 14, it has been described that each sub-component of the inductor wiring portion and the capacitance wiring portion is formed of a gate metal layer or a source-drain metal layer, but it is not limited thereto. For example, the gate metal layer and the source-drain metal layer may each be formed of two or more layers, and in this case, each sub-component of the inductor wiring portion and the capacitance wiring portion may each be formed on any two layers selected from among them.

As a result, in the embodiment of Fig. 14, the capacitance of the electrostatic protection unit is formed between the VDD potential and the VSS potential without using a ground wiring unit.

Fig. 16 is an equivalent circuit diagram including a static electricity protection unit and pixels within a display area according to the embodiment of Fig. 14.

As shown in FIG. 16, according to the embodiment of FIG. 14, a first inductance L1 is formed by a first coil wiring portion (1212) on the VDD supply wiring side, and a second inductance L2 is formed by a second coil wiring portion (1212') on the VSS wiring side.

Additionally, a capacitance C is formed between the VDD supply wiring side and the VSS supply wiring side by the first capacitance electrode part (1221) which is equipotential with VDD and the second capacitance electrode part (1221') which is equipotential with VSS.

As in Fig. 16, in the embodiment of Fig. 14, even if high-frequency static electricity flows into the VDD supply wiring, the high-frequency component (ESD) of the static electricity can be prevented from flowing into the pixel area by passing through the VSS supply wiring due to the LC low-frequency filter characteristics of the electrostatic protection unit.

In particular, according to the embodiment of Fig. 14, since a separate ground wiring section is not required to form the capacitance of the electrostatic protection section, the structure is simplified and there is an effect of preventing electrical characteristic fluctuations due to the addition of the ground wiring section.

Figure 17 shows the results of an electrostatic protection test when this embodiment is applied.

It is assumed that an inductance L of approximately 0.026 uH is formed by the inductor wiring section of the electrostatic protection unit according to this embodiment, and an electrostatic capacitance C of approximately 0.42 uF is formed by the capacitance wiring section.

In this case, three types of high-voltage static electricity were induced as shown in [Table 1] below, and the change in status over time was measured.

Case Types of static electricity Electrostatic voltage (V) Duration 1 HBD(Human Body Model) 8000 1ns 2 MM(Machine Model) 400 1ns 3 CDM(Charged Device Model) 1000 1ns

In the above measurement, HBD (Human Body Model) is a static electricity generation model that simulates human body characteristics, MM (Machine Model) is a static electricity generation model that occurs during a semiconductor process, and CDM (Charged Device Model) is a static electricity generation model in a display device usage environment (field).

As shown in the measurement results of Fig. 17, when the electrostatic protection unit according to the present embodiment is used, it was confirmed that the size of the generated static electricity was reduced by approximately 70 to 80% at a time point approximately 1 ns after the generation of static electricity in all three static electricity generation models.

In particular, it can be confirmed that the high-frequency component of static electricity is quickly suppressed and as a result, only the output of the DC component is applied inside the pixel, thereby minimizing the effect of static electricity on the pixel.

Although the embodiments of the present specification have been described in more detail with reference to the attached drawings, the present specification is not necessarily limited to these embodiments, and various modifications may be implemented without departing from the technical spirit of the present specification. Therefore, the embodiments disclosed in this specification are not intended to limit the technical spirit of the present specification, but to explain, and the scope of the technical spirit of the present specification is not limited by these embodiments. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive. The scope of protection of this specification should be interpreted by the claims, and all technical ideas within a scope equivalent thereto should be interpreted as being included in the scope of rights of this specification.

100: Substrate array 130: Data drive circuit
140: Gate driver 150, 1150: VDD supply wiring
160, 1160: VSS supply wiring 170: Auto probe pad section
200: Electrostatic protection section 210: Inductor wiring section
220: Capacitance wiring section
211, 211', 211', : Link wiring section
212, 212', 212": Coil wiring section
221: First capacitance electrode section
230: Second capacitance electrode section

Claims (11)

A substrate array including a display area in which electroluminescent pixels are arranged and a non-display area surrounding the display area;
A driving circuit unit arranged on one side of the above non-display area;
A driving voltage supply line extending from the driving circuit unit to the non-display area and supplying a driving voltage to pixels within the display area; and
It includes an electrostatic protection unit having a low-frequency bandpass characteristic, which is arranged between the above driving circuit unit and the driving voltage supply wiring;
The above electrostatic protection unit includes an inductor wiring unit and a capacitance wiring unit connected thereto,
The above inductor wiring section includes a coil wiring section that is electrically connected to the driving voltage supply wiring and arranged in a spiral shape, and a link wiring section that is arranged in a different layer from the coil wiring section, and the coil wiring section and the link wiring section are electrically connected through a first contact hole.
The above driving voltage supply wiring includes a first driving voltage supply wiring and a second driving voltage supply wiring,
The inductor wiring section includes at least one of a first coil wiring section electrically connected to the first driving voltage supply wiring and arranged in a spiral shape, and a second coil wiring section electrically connected to the second driving voltage supply wiring and arranged in a spiral shape, and includes at least one of a first link wiring section arranged in a different layer from the first coil wiring section and a second link wiring section arranged in a different layer from the second coil wiring section.
An electroluminescent display device in which the capacitance wiring section includes a first capacitance electrode section electrically connected to the first coil wiring section and a second capacitance electrode section electrically connected to the second coil wiring section, and in which electrostatic capacitance is formed between the first driving voltage supply wiring and the second driving voltage supply wiring. delete delete In the first paragraph,
An electroluminescent display device, wherein the capacitance wiring portion includes a first capacitance electrode portion extending from the inductor wiring portion, and a second capacitance electrode portion arranged opposite the first capacitance electrode portion and arranged in a different layer from the first capacitance electrode portion. In paragraph 4,
An electroluminescent display device in which the above driving voltage supply wiring is at least one of a high-potential voltage (VDD) supply wiring and a low-potential voltage (VSS) supply wiring. In paragraph 5,
The above second capacitance electrode portion is a field emission display device that is a ground wiring portion. In the first paragraph,
The above electroluminescent display device further includes an auto probe pad portion, and the link wiring portion is an electroluminescent display device electrically connected to a driving voltage test pad included in the auto probe pad portion. delete In the first paragraph,
An electroluminescent display device including the first capacitance electrode portion formed to extend in the same layer as the first coil wiring portion, and the second capacitance electrode portion formed in a different layer from the first capacitance electrode portion at a position opposite the first capacitance electrode portion and electrically connected to the second driving voltage supply wiring. In paragraph 9,
An electroluminescent display device in which the first driving voltage supply wiring is one of a high-potential voltage (VDD) supply wiring and a low-potential voltage (VSS) supply wiring, and the second driving voltage supply wiring is the other of the high-potential voltage (VDD) supply wiring and the low-potential voltage (VSS) supply wiring. In the first paragraph,
An electroluminescent display device in which the coil wiring portion is formed of one of a source-drain metal layer and a gate metal layer, and the link wiring portion is formed of the other of the source-drain metal layer and the gate metal layer.