KR20030001985A - Exposure mask for semiconductor device manufacture - Google Patents

Abstract

PURPOSE: An exposing mask for fabricating semiconductor devices is provided to improve DOF(Depth of Focus) margin and to reduce an exposure energy and time by using a dummy pattern. CONSTITUTION: An exposing mask(10a) for forming line and space pattern comprises a quartz substrate and a chrome pattern for defining a light transmission region and a light shielding region. The chrome pattern further includes a plurality of line patterns(A) and a plurality of space patterns(B). At this time, a dummy pattern(C) having a fine width is formed at an interface between the line patterns(A) for applying the light transmission region.

Description

Exposure mask for semiconductor device manufacturing {EXPOSURE MASK FOR SEMICONDUCTOR DEVICE MANUFACTURE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to an exposure mask suitable for forming a line-and-space pattern having a fine pattern of space.

As is well known, various patterns including contact holes in a semiconductor device manufacturing process are formed through a photolithography process. The photolithography process includes a process of applying a photosensitive polymer (hereinafter referred to as a photoresist film) on an etching target layer, a process of selectively exposing the applied photoresist film using an arbitrary exposure mask, and exposure using a predetermined chemical solution. Or developing a portion of the photoresist that is not exposed, thereby forming a photoresist pattern having a predetermined shape.

Here, the critical dimension of the pattern which can be realized by the photolithography process (hereinafter, referred to as CD) depends greatly on the wavelength of the light source used in the above exposure process.

In the conventional mass production stage, exposure equipment having a G-line (λ = 436 nm) or I-line (λ = 365 nm) light source was used. However, the exposure equipment of such a light source does not realize the CD pattern required by the highly integrated device. Therefore, recently, non-optical exposure equipment having a light source having a shorter wavelength than that of the I-line exposure equipment, for example, 248 nm KrF exposure equipment, ArF exposure equipment, and light sources such as electron beams, X-rays and ion beams, or the like, Alternatively, various techniques have been proposed using the I-line exposure equipment to improve process conditions.

However, even when using exposure equipment having a shorter light source, in the case of forming a line-and-space pattern having a space pattern with a very small width compared to the width of the line pattern according to the prior art, for example, In the case of forming the floating gate 14 in the flash memory device as shown in FIG. 1, it is difficult to progress the process because the DOF (Depth Of Focus) margin in the exposure process is small, thereby lowering the yield. There is a problem that is caused. This is exposed using a conventional exposure mask 10 in which a line pattern A in which chromium is formed and a space pattern B, which is a region in which chromium is not formed, are periodically repeated, as shown in FIG. 2. This is because, when the process is performed, the contrast of light necessary for patterning the space pattern B is not sufficient.

In Fig. 2, reference numeral 11 denotes a silicon substrate, 12 a source / drain region, 13 a thin film tunnel oxide film, 14 an ONO film, and 16 a control gate, respectively.

In other words, when the exposure process is performed using the exposure mask 10 having a relatively wide line pattern A and a relatively fine space pattern B, light is emitted from the wafer surface according to the optical characteristics of the pattern. When the focal plain at the point of reaching is out of the ideal isofocal point, the DOF margin is reduced, which leads to process difficulties, resulting in lower yield.

FIG. 3 is a photograph showing a DOF margin on a wafer in an exposure process using a conventional exposure mask for forming a line and space pattern. From this photograph, it is expected that a decrease in yield and difficulty in device development are caused by a smaller DOF margin. can do.

In addition, when the exposure process is performed using a conventional exposure mask for forming a line and space pattern, the exposure energy required for exposure is increased due to the large ratio of chromium film patterns that block light per unit area on the mask. There is a problem that an increase in the exposure time and thereby an increase in the manufacturing cost is caused, and in addition, there is a problem in that the life of the exposure apparatus is shortened due to the excessive exposure energy and the exposure time required.

Accordingly, an object of the present invention is to provide an exposure mask for manufacturing a semiconductor device capable of easily embodying a fine pattern of space by improving a DOF margin by improving the DOF margin.

In addition, another object of the present invention is to provide an exposure mask for manufacturing a semiconductor device capable of improving the DOF margin and reducing the exposure energy and time.

In addition, another object of the present invention is to provide an exposure mask for manufacturing a semiconductor device capable of preventing exposure energy and time from shortening the life of the exposure equipment through the improvement of the DOF margin.

1 is a cross-sectional view illustrating a transistor of a typical flash memory device.

2 is a layout of a conventional exposure mask for forming a line and space pattern.

3 is a photograph showing DOF (depth of focus) margin on a wafer during exposure using a conventional exposure mask.

4 is a layout of an exposure mask for forming a line-and-space pattern according to an embodiment of the present invention.

5A and 5B are aerial images showing the intensity of light on a wafer during exposure using exposure masks according to the prior art and the present invention.

Explanation of symbols on the main parts of the drawings

1: quartz substrate 2: chrome film pattern

10,10a: exposure mask A: line pattern

B: space C: dummy pattern

The exposure mask for manufacturing a semiconductor device of the present invention for achieving the above object is composed of a chromium film pattern formed on a quartz substrate and the quartz substrate to define a light transmission region and a light shielding region, the chromium film pattern is Comprising a plurality of line patterns spaced apart by a fine width, the center portion of each line pattern is characterized in that the dummy pattern for providing a light transmission area with a width smaller than the resolution limit of the exposure equipment.

According to the present invention, by adding a light transmission pattern having a critical dimension that cannot be realized by exposure equipment in the center of the line pattern on the exposure mask, it is possible to increase the DOF margin, thereby reducing the exposure energy and time, of course. It is also possible to prevent a decrease in the lifetime of the exposure equipment.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

4 is a layout illustrating an exposure mask for forming a line-and-space pattern according to an embodiment of the present invention. Here, the same parts as in Fig. 1 are designated by the same reference numerals.

As shown, the exposure mask 10a of the present invention is composed of a chromium film pattern formed on a quartz substrate and the quartz substrate to define a light transmission area and a light shielding area, and the chromium film pattern includes several line patterns. (A) has a shape spaced at minute intervals, and in particular, a dummy pattern (C) having a width that cannot be resolved with conventional exposure equipment along the longitudinal direction is added to the center of each line pattern (A) It is provided with. At this time, the dummy pattern C is a region where chromium is not formed, and thus functions as a light transmitting region.

For example, when the width of the line pattern A is limited to about 0.52 μm using a KrF light source, the dummy pattern C is preferably formed to have a width of about 0.18 μm. More specifically, in the exposure process using an I-line light source, it is provided in one line or several lines with a width of 0.05 to 0.25 μm, and in the exposure process using a KrF light source, it is provided in one line or several lines with a width of 0.04 to 0.18 μm. In the case of an exposure process using an ArF light source, a width of 0.02 to 0.08 µm is provided in one or more lines.

When the exposure mask 10a of the present invention is used as described above, and the exposure process is performed using a KrF light source, the pattern to be patterned is resolved, that is, the line pattern drawn on the exposure mask 10a. Although (A) is resolved, the dummy pattern (C) is not resolved, and in particular, light transmitted through the space pattern (B) on the exposure mask (10a) by light transmitted through the dummy pattern (C). The effect of shifting the focal plane toward the ideal focal point than the actual focal plane is obtained, whereby the contrast of light passing through the space pattern B is improved, resulting in an improvement in the DOF margin.

In detail, FIGS. 5A and 5B are aerial images showing the intensity of light on a wafer when exposed using conventional and inventive exposure masks. Here, reference numerals 1 and 2 denote quartz substrates and chromium film patterns, respectively.

5A and 5B, the top portion of the curve is gentler in the case of the present invention than in the prior art, but the slope of the curve in the portion adjacent to the gentle top portion is in the case of the present invention. It can be seen that is larger than the conventional case. At this time, as is well known, the large slope of the curve means that the contrast is high. In the case of the present invention, the contrast is higher than that of the conventional case, and thus, the DOF margin is high.

Therefore, the exposure mask 10a of the present invention is provided with the fine pattern dummy pattern C in the line pattern A having a relatively large width, without affecting the resolution of the actual line pattern A, By influencing the space pattern B, the DOF margin of approximately 0.3 µm can be increased, whereby the yield can be improved. In addition, in the case of using the exposure mask 10a of the present invention, as the light is transmitted through the dummy pattern C, it is possible to obtain a reduction in the exposure energy, thereby obtaining an exposure energy saving effect of about 20%. In addition, it is possible to prevent an increase in manufacturing cost through a reduction in exposure time, and also to prevent a decrease in equipment life.

On the other hand, in applying the exposure mask of the present invention as described above to a normal exposure process, those having wavelengths of 193 nm, 248 nm and 365 nm are used as light sources, and light sources such as electron beams, X-rays, and ion beams are used.

In addition, the layout which consists of a line pattern and a space pattern in an exposure mask is applicable to all masks, such as a phase inversion mask and a cell projection mask, in addition to a typical exposure mask.

In addition, when performing the exposure process using the exposure mask of the present invention, all of the chemically amplified type, dissolution inhibiting type and main chain cutting type can be used as the photosensitive film, the thickness of the photosensitive film is limited to the range of 3,000 to 15,000 kPa, Baking of the photosensitive film is performed using all methods such as a hot plate method, an oven method, and a vacuum method.

As described above, the present invention improves the DOF margin through increasing the contrast in the space pattern by providing a dummy pattern in the center portion of the light transmission area in a width of the size that cannot be resolved by the current exposure equipment. Accordingly, the manufacturing cost can be reduced by increasing the yield, as well as reducing the exposure energy and time, and in particular, it is possible to improve the life of the exposure equipment due to the need for excessive exposure energy and exposure time.

Meanwhile, although specific embodiments of the present invention have been described and illustrated, modifications and variations can be made by those skilled in the art. Accordingly, the following claims are to be understood as including all modifications and variations as long as they fall within the true spirit and scope of the present invention.

Claims (4)

In the exposure mask for semiconductor element manufacture used at the exposure process for forming a line-and-space pattern, And a chromium film pattern formed on the quartz substrate to define a light transmission area and a light shielding area, wherein the chrome film pattern is composed of several line patterns spaced at a fine width, and each line pattern. An exposure mask for manufacturing a semiconductor device, characterized in that a dummy pattern is provided at a central portion of the exposure apparatus to provide a light transmitting area with a width smaller than the resolution limit of the exposure equipment. The method of claim 1, wherein the dummy pattern An exposure mask for manufacturing a semiconductor, comprising at least one line having a width of 0.05 to 0.25 µm in an exposure step using an I-line light source. The method of claim 1, wherein the dummy pattern At the time of the exposure process using a KrF light source, the exposure mask for semiconductor manufactures provided with one or more lines with the width | variety of 0.04-0.18 micrometers. The method of claim 1, wherein the dummy pattern An exposure mask for manufacturing a semiconductor, characterized in that at the time of an exposure process using an ArF light source, at least one line with a width of 0.02 to 0.08 µm.