KR20050045659A - Liquid crystal display device - Google Patents

Abstract

The present invention relates to a liquid crystal display device which improves the image quality by forming a drain electrode in a bent shape and reducing the W / L variation of the channel region with respect to the entire panel when a pattern mis-alignment occurs. A gate wiring and a data wiring, a gate electrode formed on a predetermined portion of the gate wiring, a gate insulating film formed on the entire surface including the gate electrode, a semiconductor layer formed on the gate insulating film on the gate electrode, and the data wiring A source electrode formed on the semiconductor layer, the source electrode being branched and spaced apart from the source electrode at a predetermined interval, the drain electrode having a shape bent over the semiconductor layer, a passivation layer formed on the entire surface including the data line, and the passivation layer. A pixel electrode contacting the drain electrode It characterized.

Description

Liquid Crystal Display Device

The present invention relates to a liquid crystal display device (LCD), and more particularly to a liquid crystal display device for improving the image quality.

Recently, the liquid crystal display device, one of the flat panel display devices that are attracting attention, is an element that changes the optical anisotropy by applying an electric field to a liquid crystal that combines the liquidity and the optical properties of the crystal, which is applied to a conventional cathode ray tube. Compared with its low power consumption, small volume, large size, and high definition, it is widely used.

The LCD has a structure in which a color filter substrate as an upper substrate and a thin film transistor (TFT) substrate as a lower substrate are disposed to face each other, and a liquid crystal having dielectric anisotropy is formed therebetween. By switching the TFTs attached to the hundreds of thousands of pixels through the pixel selection address wiring, the voltage is applied to the corresponding pixels, and is driven in such a manner that the voltage charged to the corresponding pixels is maintained by the capacitor until the next address. do.

 As described above, in order to drive the device, various patterns such as transistors and capacitors are required, and photo-lithography is commonly used to form such a pattern.

Photolithography technology uses a principle that changes a property by causing a chemical reaction when a specific photo-resist receives light, specifically, the step of depositing a film on a substrate and applying a photoresist thereon, Selectively exposing the photoresist using ultraviolet wavelengths, developing the exposed photoresist, etching the film using the developed photoresist as a mask, and The process is complicated and cumbersome because a series of complicated processes consisting of peeling the resist must be performed.

In addition, since various equipments must be provided, the area occupied by the equipment is increased, and process time and process costs are also consumed.

Instead of photolithography, a resist printing technique is used to simplify the process of forming a resist pattern, thereby reducing process time and cost.

The resist printing technique is a process of transferring a resist developed on a printing roll outer circumferential surface onto a film, and etching the film to form a pattern using the transferred resist as a mask.

However, the resist printing technique has a weakness in resolution and alignment accuracy due to variation in film thickness of about 10%, but pattern formation of a liquid crystal display device having a less dimensional dimension because of excellent productivity. It is used for.

Hereinafter, a liquid crystal display device according to the related art will be described with reference to the accompanying drawings.

1 is a plan view of a general liquid crystal display device, FIGS. 2A to 2C are plan views showing a misalignment of a thin film transistor, and FIG. 3 is a plan view of a liquid crystal display device for explaining a problem caused by the prior art.

4A to 4E are cross-sectional views for explaining a resist printing technique.

As described above, the TFT array substrate and the color filter array substrate are opposed to each other with the liquid crystal layer interposed therebetween. As shown in FIG. 1, the TFT array substrate and the color filter array substrate are coupled to each other. A gate insulating film (not shown) formed on the entire surface including the gate wiring 12, the gate wiring 12, and insulated from the gate wiring, and a semiconductor layer formed in an island shape on the gate insulating film on the gate wiring 12. 14 and a data line 15 formed in a direction perpendicular to the gate line 12 to overlap a portion of the semiconductor layer 14 to transfer an image signal, and the gate line 12 and data. A thin film transistor (TFT) formed at an intersection point of the wiring 15, a protective film (not shown) formed on the entire surface including the thin film transistor (TFT), and the thin film transistor on the protective film. The pixel electrode 17 is electrically connected to the register are formed.

In this case, the thin film transistor includes a gate electrode which is a predetermined region of the gate wiring, a semiconductor layer 14 formed on the gate electrode, a source electrode 15a branched from the data wiring on the semiconductor layer 14, and And a drain electrode 15b spaced apart from the source electrode 15a on the semiconductor layer 14 by a predetermined distance. The thin film transistor is formed to have a channel having a “U” shape in order to improve switching characteristics.

The region between the source electrode 15a and the drain electrode 15b is a channel region in which the carrier moves, and has a "U" shape. In FIG. 1, the width of the channel region is represented by W (Width) and the length is represented by L (Lengh).

At this time, in forming the patterns, if the degree of dimensionality is not very strict, it is formed by using a resist printing technique.

When the thin film transistor pattern is formed by the resist printing technique, the change in the W / L of the channel region is increased. Thus, when the change in the W / L is large, applying the U-shaped TFT changes the parasitic capacitance Cgs. Suitable for

Hereinafter, the resist printing technique will be described in detail.

In general, a gravure offset method is used to print a resist onto a substrate, and the gravure offset method includes filling the groove in the groove of the cliché, applying the resist filled in the groove to the roller, A step of transferring the buried resist onto the substrate is performed.

Since gravure printing transfers a resist onto a substrate using a transfer roll, a pattern can be formed by one transfer even in the case of a display device having a large area by using a transfer roll corresponding to the area of a desired display element. .

First, as illustrated in FIG. 4A, a cliché 82 having a recess recess 81 formed at a specific position corresponding to a pattern to be formed on a substrate is prepared. Subsequently, the resist 72 is applied to the inner surface of the cliché 82, and the concave of the cliché 82 is pushed in one direction while the seal or doctor blade 80 is in contact with the cliché 82. The resist 72 is filled in the groove 81. At this time, the resist 72 remaining on the surface of the cliché 82 is removed by the doctor braid 80.

Next, as shown in FIG. 4B, the printing roll 70 in which the blanket 71 is wound around its outer circumferential surface is rotated and advanced in one direction in contact with the inner surface of the cliché 82. At this time, the resist 72 filled in the concave groove 81 of the cliché 82 is transferred to the blanket 71 of the printing roll 70.

Thereafter, as shown in FIG. 4C, a transparent glass substrate 73, a plastic substrate, or an opaque insulating substrate is prepared to form a film 74 of a specific material, and then the printing roll 70 is oriented on one surface thereof. The resist 72 is retransmitted onto the substrate 73 on which the film 74 is formed.

Subsequently, the transferred resist 72 is cured to complete the resist 72 pattern. In this way, the desired resist pattern can be formed over the entire substrate 73 of the display device by one rotation of the printing roll 70, which is more useful for a large area display device.

In this case, if the resist 72 pattern is desired to be formed in a double thickness, a diffraction exposure technique is applied.

Subsequently, as shown in FIG. 4D, the film 74 on the substrate 73 is selectively etched using the resist 72 pattern as a mask to form a film 74 pattern. Here, the etching process is a dry etching method using a plasma and a wet etching method using a chemical solution.

Thereafter, as shown in FIG. 4E, the resist 732 formed on the film 74 is removed from the film using a stripper. The stripper may be classified into organic, inorganic, and aqueous systems, and iso-propyl alchol (IPA) may be used to prevent reattachment of resist after stripping.

As such, by forming a resist pattern using a printing technique, the photolithography process may be patterned more easily.

However, in the case where the liquid crystal display device is a large panel, when the pattern is formed by the fritting technique, miss-alignment occurs partially on the entire panel.

That is, since the size of the printing roll is limited, in order to transfer the resist onto the large substrate, the substrate must be divided into several sections and transferred several times. Therefore, there is a fear that the resist is shifted for each zone of the substrate.

When the resist pattern is shifted, a stitch defect occurs at the boundary between the first transfer region and the second transfer region, and the parasitic capacitance is different for each zone. Stitch spots occur at the transfer region boundary when the device is driven. Or because the pattern is partially misaligned for all channels, the image is uneven and the image quality is poor.

FIG. 2A illustrates a thin film transistor in which miss-alignment does not occur, and FIG. 2B illustrates a thin film transistor in the case in which the miss-alignment occurs 5 μm upward, and FIG. 2C illustrates a 5 μm downward misalignment. The thin film transistor in the case of occurrence is shown.

If it is assumed in FIG. 2A that the length of the drain electrode of the region overlapping the channel region is 10 μm, as shown in FIGS. 2B and 2C, misses of 5 μm are respectively upper and lower sides. When the alignment occurs, a total deviation of 10 μm occurs.

In addition, the region where the drain electrode overlaps the channel region also affects L of the channel region, which determines the charging rate of the pixel voltage. That is, as the length of the channel region becomes longer, the threshold voltage (Vth) becomes smaller, thereby increasing the charge rate of the pixel voltage.

Specifically, as the source / drain electrodes are shifted in the channel region length L of FIG. 2A, as shown in FIG. 2B, the length is reduced to L ′ and as shown in FIG. 2C, the length is L ″. As the length variation of the channel region becomes very large and the charge rate of the pixel voltage is changed, the image quality of the entire panel becomes uneven.

For reference, when the width W of the channel region is increased, Vth is increased, thereby reducing the charge rate of the pixel voltage.

As described above, when the resist printing technique is used, the variation of the W / L of the channel region is increased. In order to overcome the problem of the large variation of the W / L, the gate design is designed in consideration of the margin.

That is, as shown in FIG. 3, the gate electrode 52a and the semiconductor layer 54 are formed larger in order to widen the channel region, so that the source electrode 54a and the drain electrode 54b are missed up and down. Even if aligned, there is no change in W / L of the channel area. In consideration of the misalignment, the width and length of the gate electrode 52a and the semiconductor layer 54 are increased.

However, this liquid crystal display device has another problem that the aperture ratio of the device is reduced by the gate electrode 52a serving as the light blocking layer.

The present invention has been made to solve the above problems, the liquid crystal display to improve the image quality by reducing the W / L deviation of the channel region for the entire panel when the drain electrode is formed in a bent form by the pattern mis-alignment The object is to provide an element.

According to an aspect of the present invention, a liquid crystal display device includes a gate wiring and a data wiring defining a unit pixel at vertical crossings, a gate electrode formed at a predetermined portion of the gate wiring, and a front surface including the gate electrode. A gate insulating film formed on the gate insulating layer, a semiconductor layer formed on the gate insulating film on the gate electrode, a source electrode branched from the data line, and formed on the semiconductor layer, and separated from the source electrode, and bent over the semiconductor layer. And a drain electrode formed therein, a passivation film formed on the entire surface including the data line, and a pixel electrode penetrating the passivation film to be in contact with the drain electrode.

That is, by forming the drain electrode in a bent shape, it is characterized in that the W / L deviation of the channel region is reduced when the mis-alignment of the pattern occurs. Therefore, the defect due to W / L deviation can be reduced by making it in a liquid crystal panel.

Hereinafter, a liquid crystal display according to the present invention will be described in detail with reference to the accompanying drawings.

5 is a plan view of a liquid crystal display device according to the present invention, and FIGS. 6A to 6C are plan views showing mis-alignment of the thin film transistor according to the present invention.

In the thin film array substrate of the liquid crystal display device according to the present invention, as shown in FIG. 5, a unit is formed by a plurality of gate lines 112 arranged in a line and a plurality of data lines 115 perpendicular to the gate lines. A pixel is defined, and a thin film transistor TFT including a drain electrode 115b formed at an intersection of the two wires and bent in the unit pixel, and a pixel electrode connected to the thin film transistor TFT 117 is provided.

In this case, the drain electrode 115b is designed to be bent inside the semiconductor layer 114. This is because, when designed to be bent outside the semiconductor layer 114, the effect of reducing the W / L deviation during misalignment is reduced.

In this case, although not shown, a gate insulating film is formed between the gate wiring 112 and the data wiring 115 by depositing an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx) by PECVD. An inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx) is deposited between the data line 115 and the pixel electrode 117 or an organic insulating material such as benzocyclobutene (BCB) or acrylic resin (acryl resin). The protective film which apply | coated was provided.

Accordingly, the thin film transistor and the pixel electrode 117 are connected through the contact hole 120 formed by selectively removing the passivation layer.

The thin film transistor TFT may include a gate electrode that is a predetermined portion of the gate line 112, a gate insulating film formed on the entire surface including the gate electrode, and an amorphous silicon (a-Si) layer on the gate insulating film on the gate electrode. And a semiconductor layer 114 formed by sequentially depositing n + a-Si ion-implanted with impurity into amorphous silicon, and a U-shaped source electrode branched from the data line 115 to be formed on the semiconductor layer 114. 115a) and a drain electrode 115b inserted into the U-shape of the source electrode 115a and bent to control the voltage on / off of the unit pixel.

Here, the various patterns may be formed by a resist printing technique. However, the resist printing technique is suitable for low resolution liquid crystal display devices.

Specifically, the resist is transferred onto a printing roll, and then adhered to the substrate on which the film is formed to be pushed in one direction to print the resist on the film. Next, the film of the exposed portion between the printed resist is etched to pattern the film.

The resist formed on top of the film is then removed from the film using a stripper. The stripper may be classified into organic, inorganic, and aqueous systems, and iso-propyl alchol (IPA) may be used to prevent reattachment of resist after stripping.

As such, by forming a resist pattern using a printing technique, the photolithography process may be patterned more easily.

In this case, the film is a wiring material or an electrode material, and the gate wiring and data wiring film has a low specific resistance of copper (Cu), aluminum (Al), aluminum alloy (AlNd: Aluminum Neodymium), and molybdenum (Mo). ), Chromium (Cr), titanium (Ti), tantalum (Ta), molybdenum-tungsten (MoW) and the like, and the semiconductor layer film is formed by depositing amorphous silicon (a-Si: H), and the pixel The electrode film is formed using a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

The present invention is characterized in that in forming a pattern by applying the printing technique, the drain electrode is formed in a bent form.

In this way, by forming the drain electrode 115b in a bent shape, it is possible to reduce the W / L variation of the channel region at the time of mis-alignment of the pattern.

It looks at in detail below.

FIG. 6A illustrates a thin film transistor according to the present invention in which miss-alignment does not occur, and FIG. 6B illustrates a thin film transistor according to the present invention in a case where the miss-alignment occurs 5 μm upwards, and FIG. The thin film transistor according to the present invention is shown in the case where a misalignment occurs 5 µm downward.

6A, when the drain electrode corresponding to the channel region is assumed to have a length of 10 μm, as shown in FIGS. 6B and 6C, the data line 115, the source electrode 115a, If the drain electrode 115b is misaligned 5 µm upward and downward, respectively, a total deviation of 5 µm will occur. This is different from the prior art in which L deviation of 10 μm in total occurs when miss-alignment occurs by 5 μm in the upper and lower sides, respectively.

Specifically, the length of the channel region is reduced to L 'only when the misalignment occurs upward, and the length of the channel region remains L when the misalignment occurs downward. The defect caused by the L deviation can be reduced.

At this time, as shown in FIG. 6C, the side effect in the bent portion of the drain electrode 115b is negligible and therefore excluded from the L length. That is, since the width of the channel region in the bent portion is increased to W 'and the effect on Vth is insignificant, the length of the region corresponding to the bent portion is excluded from the length of the channel region. Therefore, as the degree of bending of the drain electrode 115b increases, the side effect may be further ignored.

In this manner, when the drain electrode is formed in a bent shape, large variations in the W / L of the channel region can be eliminated in the case of misalignment.

In addition, since the change in the W / L of the channel region is insignificant, it is not necessary to consider this margin when designing the gate to solve the change in the W / L.

Although not shown, the thin film array substrate having the structure has a liquid crystal layer bonded to the opposite substrate and disposed between the two substrates. The opposite substrate includes a black matrix for preventing light leakage and an R, G between the black matrix. And a color filter layer in which B color resists are formed in a predetermined order, an overcoat layer for protecting the color filter layer on the color filter layer and planarizing the surface of the color filter layer, and a pixel electrode formed on the overcoat layer. In addition, a common electrode for forming an electric field is formed.

In this case, when the liquid crystal display device is driven in a transverse electric field method, the common electrode is formed in parallel with the pixel electrode formed on the thin film array substrate to generate a horizontal electric field to control the alignment direction of the liquid crystal.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

The liquid crystal display device according to the present invention as described above has the following effects.

First, by forming the drain electrode in a bent shape, it is possible to reduce the W / L variation of the channel region when the mis-alignment of the pattern occurs, thereby reducing the defects caused by the W / L variation in the liquid crystal panel.

Therefore, the stitch unevenness that occurs at the miss-alignment of the pattern does not occur, so the image quality is improved.

Second, since the change in the W / L of the channel region is insignificant, it is not necessary to consider this margin when designing the gate to solve the change in the W / L. Therefore, the opening ratio can be prevented from being lowered by forming the gate electrode to protrude.

third. Since the resist printing technology can be applied more stably, various patterns can be more easily formed as a productive printing technology.

1 is a plan view of a general liquid crystal display device.

2A to 2C are plan views showing mis-alignment of thin film transistors.

3 is a plan view of a liquid crystal display for explaining a problem according to the prior art.

4A to 4E are cross-sectional views for explaining resist printing techniques.

5 is a plan view of a liquid crystal display device according to the present invention;

6a to 6c are plan views showing the mis-alignment of the thin film transistor according to the present invention.

* Explanation of symbols on the main parts of the drawings

112: gate wiring 112a: gate electrode

114: semiconductor layer 115a: source electrode

115b: drain electrode 117: pixel electrode

Claims (4)

A gate wiring and a data wiring defining vertically crossing unit pixels; A gate electrode formed on a predetermined portion of the gate wiring; A gate insulating film formed on the entire surface including the gate electrode; A semiconductor layer formed on the gate insulating layer on the gate electrode; A source electrode branched from the data line and formed on the semiconductor layer; A drain electrode spaced apart from the source electrode at a predetermined interval and bent over the semiconductor layer; A protective film formed on an entire surface including the data line; And a pixel electrode penetrating through the passivation layer and contacting the drain electrode. The liquid crystal display device according to claim 1, wherein the various wirings or electrodes are patterned by a resist printing technique. The liquid crystal display of claim 1, wherein the source electrode has a U shape and the drain electrode has a shape inserted into the U shape of the source electrode. The liquid crystal display device according to claim 1, wherein the drain electrode is bent in the semiconductor layer.