KR20060090331A - Clock generator of subscriber device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock generation device configured in a subscriber device of a communication network. More particularly, the present invention relates to a clock generation device capable of shortening a transfer time in the event of a failure of a subscriber device having a redundant unit.

The present invention described above comprises a clock generator for generating and outputting a system clock and a frame pulse; A synchronization matching unit for supplying transmission / reception frame pulses generated from the system clock and frame pulses of the clock generation unit to each component of the subscriber device; A control unit which performs switching according to a switching state signal of another unit and outputs a driving state signal to the clock generation unit and the synchronization matching unit; And a driving signal generation unit for generating a driving signal from the driving state signal of the controller and the switching state signal and supplying the driving signal to the clock generation unit, and is operated to maintain the clock generation unit of the standby unit in the driving state at all times.

IDLC, Subscriber Device, Framer, Redundancy Unit, Clock Generator, Transfer

Description

Clock generating apparatus of the subscriber device

1 is a block diagram of a clock generator of a subscriber station of the prior art,

2 is a block diagram of a clock generator of a subscriber device according to an embodiment of the present invention;

3 is a logic circuit diagram illustrating an embodiment of a drive signal generation unit configured in the clock generator;

4 is a signal state table of the logic circuit diagram of FIG.

5 is a view showing a transfer time in IDLC-MUX equipped with a clock generator of the prior art,

6 is a view showing a transfer time in IDLC-MUX with a clock generator according to the present invention.

* Description of Major Symbols in Drawings *

100: clock generator

110: clock generator 120: controller

130: synchronization matching unit 140: drive signal generation unit

AON: Drive status signal OTHERON: Alternating status signal

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock generation device configured in a subscriber device of a communication network. More particularly, the present invention relates to a clock generation device capable of shortening a transfer time in the event of a failure of a subscriber device having a redundant unit.

1 is a block diagram of a general clock generator of a subscriber device in the prior art.

As illustrated in FIG. 1, the clock generator 10 according to the related art outputs a clock generator 11 for generating a system clock and a frame pulse and a driving signal of the clock generator, and is output from the clock generator. The controller 12 generates and transmits a frame pulse from a clock and a frame pulse, outputs the pulse signal, and is switched by a switching state signal input from another unit to drive the clock generator and the synchronous matching unit 13, and driven by the controller. And a synchronization matching section 13 for matching the clock with the transmission / reception frame pulses output from the control section 12 and outputting them to the respective components of the subscriber device.

In the above-described configuration, the controller 12 may be implemented as an ASIC, and performs a function of matching and converting an E1 signal into a 155M signal, or branching a received 155M signal into an E1 signal. Is operated as a working unit, when a low switching state signal (OTHERON) is input from another standby unit, a high driving unit of the clock generator 11 and the synchronous matching unit 13 is generated. A high drive state signal AON is output.

When the clock generation unit 11 receives the high driving state signal AON from the control unit 12, the clock generation unit 11 generates a system clock for driving the subscriber device to generate the system clock to synchronize the control unit 12 with the synchronization matching unit 13. ), And generates and outputs a frame pulse (FP: Frame Pulse) for performing synchronization of branching, matching, etc. of an E1 frame. Then, the controller 12 synchronizes the frame pulse FP with the system clock input from the clock generator 11, and then generates and transmits and transmits a frame pulse TX / RX FP for transmitting and receiving an E1 frame. Output to section 13.

The synchronization matching unit 13 is a kind of buffer driven by the control unit 12, receives the system clock input from the clock generation unit 11, and provides the system clock to each device of the subscriber device, and is also input from the control unit 12. After synchronizing the transmission and reception frame pulses, the signal is provided to a framer for transmitting and receiving signals such as E1.

The unit currently operating in the subscriber apparatus of the prior art having the above-described configuration becomes a working unit, and the unit which is not in operation and is in a standby state becomes a standby unit. The clock generation unit and the synchronization matching unit of the standby unit are kept in an inoperative state.

At this time, when a failure occurs in the working unit and a high transfer state signal OTHERON requesting a transfer from the working unit is input to the control unit 12 of the standby unit, The control unit 12 outputs a high driving state signal AON to the clock generation unit 11 and the synchronization matching unit 13. The clock generator 11 receiving the high driving state signal AON generated by the controller 12 generates a system clock and supplies the system clock to the controller 12 and the synchronization matching unit 13 as a buffer. Frame pulses FP are generated and supplied to the controller 12. The control unit 12 converts the input frame pulses into transmission and reception frame pulses and outputs the same to the synchronization matching unit 13. The synchronization matching unit 13 is driven by receiving a high driving state signal AON output from the control unit 12 as an output enable input terminal to supply a system clock to each component of the subscriber device. The transmitter and the receiver transmit and receive frame pulses (FP: Frame Pluse) to a framer for transmitting and receiving signals such as E1.

That is, the subscriber device having the duplication unit of the prior art provides a redundancy function for the failure by performing the switching by the above-described operation process. In this case, when a low switching state signal (OTHERON) requesting a transfer is generated, a standby unit becomes a working unit, and a working unit becomes a standby unit. .

However, the system clock and the frame pulse are always generated after receiving the high driving state signal output from the control unit receiving the low switching state signal in the switching process in the prior art as described above. There is a time delay before the clock and frame pulses are supplied to each part, which causes a delay in the changeover time, which causes errors in the output data of the unit. Has

 Accordingly, the present invention is to solve the problems of the prior art described above, the system clock by always operating the clock generation unit of the unit operated as a standby unit (standby unit) in the subscriber unit having a redundant unit for redundancy It is an object of the present invention to provide a clock generator of a subscriber station which can shorten the switching time in the duplication unit by maintaining the state of generating and outputting the frame pulse in advance.

A system clock generator of a subscriber device of the present invention for achieving the above object includes a clock generator for generating and outputting a system clock and a frame pulse; A synchronization matching unit for supplying transmission / reception frame pulses generated from the system clock and frame pulses of the clock generation unit to each component of the subscriber device; A control unit which performs switching according to a switching state signal of another unit and outputs a driving state signal to the clock generation unit and the synchronization matching unit; And a driving signal generator for generating a driving signal from the driving state signal of the controller and the switching state signal and supplying the driving signal to the clock generator.

The driving signal generator may be an exclusive OR operation gate that receives the driving state signal and the transfer state signal to an input terminal and then performs an exclusive OR operation to output the output signal to an output terminal.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

2 is a block diagram of a system clock generator of a subscriber device according to an embodiment of the present invention.

As shown in FIG. 2, the system clock generator 100 of the subscriber device supplies a system clock and transmit / receive frame pulses to the clock generator 110 for generating and outputting a system clock and frame pulses and components of the subscriber device. The control unit 120 and the control unit 120 for outputting the driving state signal AON of the synchronous matching unit 130, the clock generation unit 110, and the synchronous matching unit 130 and performing switching according to the switching state signal. And a driving signal generator 140 generating a driving signal from the driving state signal and the switching state signal OTHERON and providing the driving signal to the clock generation unit 110.

In the above-described configuration, the control unit 110 receives the switching state signal OTHERON from another redundancy unit, and supplies the driving state signal AON to the driving signal generation unit 140 and the synchronization matching unit 130. In addition, when the driving state signal AON is high, the synchronization matching unit 130 may be configured to operate.

That is, in the description of the embodiment of the present invention, the clock generation unit 110 and the synchronization matching unit 130 are operated when a high signal is input, and the working unit is a high switching state signal (OTHERON). It is assumed that the control unit of the standby unit performs the transfer when there is a transfer request when a low transfer state signal OTHERON is input from the working unit.

3 is a detailed circuit diagram of the driving signal generator 140 according to an embodiment.

As shown in FIG. 3, the driving signal generation unit 140 includes an exclusive OR gate, and the driving state signal AON is connected to the A terminal from the control unit 120 of the unit in which the driving signal generation unit 140 is mounted. It receives the input, and the transfer status signal (OTHERON) to the B terminal from another unit to perform the redundant transfer. Subsequently, the exclusive OR operation is performed on the driving state signal AON of the controller 120 and the switching state signal OTHERON input from another unit.

4 is a diagram illustrating an output signal state according to the input of the driving signal generator 140 of FIG. 3. Referring to FIG. 4, a driving signal output operation of the clock generator 110 of the driving signal generator 140 is performed. The explanation is as follows.

As shown in FIG. 4, when the unit in which the current drive signal generation unit 140 is mounted is operated as a standby unit, the control unit 120 outputs a low drive state signal AON. It is input to the A terminal of the drive signal generator 140. In this case, since the other unit for redundancy is operated as a working unit, the switching state signal OTHERON is input to the B terminal of the driving signal generator 140 as a high signal.

The driving signal generation unit 140 performs an exclusive OR operation on the driving state signal AON input from the control unit 110 as the A terminal and the switching state signal OTHERON input from the other unit through the B terminal. As shown in the signal state table of 4, a high driving signal is output from the output terminal Y of the driving signal generator 140 and input to the clock generator 110. Therefore, the clock generation unit 110 of the standby unit can always maintain the driving state.

Next, when a failure occurs in the working unit, a low switching state signal OTHERON is output to the standby unit. The low switching state signal OTHERON output from the above-described working unit is input to the B terminal of the control unit 120 and the driving signal generation unit 140 of the standby unit. The control unit 120 of the standby unit is operated by receiving a low switching state signal OTHERON and then outputs a high driving state signal AON to the synchronization matching unit 130. The synchronous matching unit 130 is driven to transfer.

Even in this case, the high driving state signal AON is input to the A terminal of the driving signal generating unit 140 and the low switching state signal OTHERON is input to the B terminal of the driving signal generator 140, thereby indicating the signal state of FIG. 4. As shown in the table, a high driving signal is output to the clock generation unit 110 through an output terminal (Y terminal) to drive the clock generation unit 110.

As described above, the working unit outputting the low transfer state signal OTHERON to request a transfer becomes a standby unit, and the low transfer state signal to request transfer. The standby unit that receives (OTHERON) is operated to become a working unit, and after being operated as a working unit, it is a high switching state signal to the standby unit. Will print

That is, the system clock and the frame are always operated regardless of whether the redundant unit of the subscriber device in the communication network such as an integrated digital loop carrier (IDLC) is operated as a working unit or a standby unit by the above-described operation process. It is possible to maintain the state of generating a pulse to supply to the control unit 120 and the synchronous matching unit 130. Therefore, for this reason, it is possible to shorten the transfer time when switching the redundant unit.

The reduction of the switching time in the duplication unit configured in the subscriber unit of the communication network according to the present invention as described above will be described in more detail with reference to FIGS. 5 and 6 as follows.

FIG. 5 is a view showing a transfer time of a redundant unit with a clock generator according to the prior art in IDLC-MUX (Integrated Digital Loop Carrier Multiplexer), and FIG. 6 is an invention of an integrated digital loop carrier multiplexer (IDLC-MUX). It is a figure which shows the switching time in the duplication unit provided with the clock generator which conforms to.

As shown in FIG. 5, in the case of a redundant unit of the related art, the control unit 120 is driven after a low switching state signal OTHERON for requesting a transfer is input, and then output to the control unit 120. Since the clock generator 110 and the synchronous matching unit 130 are driven by the high driving state signal AON, the transfer time delay of about 120 to 800us is generated.

However, in the case where the clock generation apparatus of the present invention is applied to the redundant unit of the prior art, the clock generation unit 110 of the standby unit always maintains an operating state to synchronize the system clock and frame pulses with the control unit 110. Since the supply state to the matching unit 130 is maintained, a low switching state signal (OTHERON) for requesting switching is input, and immediately after the control unit 120 is driven, the synchronous matching unit 130 is immediately clocked. It can be seen that the switching time is reduced by about 8 ns as shown in FIG. 6 by performing synchronous matching with respect to the transmission / reception frame pulses output from the control unit 120.

The present invention described above can be applied to all communication devices constituting a redundant unit for overcoming a failure such as an integrated digital loop carrier multiplexer (IDLC-MUX).

The present invention described above provides a more stable communication by shortening the switching time in the event of a failure by always keeping the clock generation unit of a standby unit waiting to be operated by performing the switching in the event of a failure in the subscriber device having the redundant unit. It provides the effect of providing a service.

Claims (2)

A clock generator which generates and outputs a system clock and a frame pulse; A synchronization matching unit for supplying transmission / reception frame pulses generated from the system clock and frame pulses of the clock generation unit to each component of the subscriber device; A control unit which performs switching according to a switching state signal of another unit and outputs a driving state signal to the clock generation unit and the synchronization matching unit; And a driving signal generator for generating a driving signal from the driving state signal of the control unit and the switching state signal and supplying the driving signal to the clock generation unit. The method of claim 1, wherein the drive signal generation unit, And an exclusive OR operation gate configured to receive an exclusive OR operation after receiving the driving state signal and the switching state signal to an input terminal and output the exclusive OR operation to an output terminal.

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