KR20120069048A - Light emitting device and method of manufacturing the same - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting device and a method for manufacturing the same. A light emitting device including a second conductive layer formed to be insulated from a first conductive layer and having a plurality of regions connected to a second semiconductor layer, and first and second contact electrodes respectively connected to the first and second conductive layers. It provides a manufacturing method.

Description

Light emitting device and method of manufacturing the same

The present invention relates to a light emitting device and a method for manufacturing the same, and more particularly, to a light emitting device and a method for manufacturing the same that can improve heat transfer and current diffusion.

In general, nitrides such as GaN, AlN, InN, and the like have excellent thermal stability and have a direct transition type energy band structure, which has recently attracted much attention as a material for optoelectronic devices. In particular, GaN can be used in high temperature high power devices because the energy bandgap is very large at 3.4 eV at room temperature.

A light emitting device using a GaN semiconductor is generally formed by stacking an N-type GaN layer, an active layer, and a P-type GaN layer on a substrate, and consisting of an N-type electrode and a P-type electrode connected to the N-type GaN layer and the P-type GaN layer, respectively. do. In the light emitting device, when a predetermined current is applied to the N-type electrode and the P-type electrode, electrons provided from the N-type GaN layer and holes provided from the P-type GaN layer are recombined in the active layer to emit light having a wavelength corresponding to the energy gap. Done.

Such light emitting devices may be classified into horizontal light emitting devices and vertical light emitting devices. In the horizontal light emitting device, an N-type GaN layer, an active layer, and a P-type GaN layer are stacked, and a predetermined region of the P-type GaN layer and the active layer is removed to expose the N-type GaN layer, and the P-type GaN layer and the N-type GaN layer are exposed. P-type electrodes and N-type electrodes are respectively formed on the substrate. That is, in the horizontal light emitting device, the N-type electrode and the P-type electrode are positioned horizontally on the same plane.

In addition, the vertical light emitting device is formed by stacking an N-type GaN layer, an active layer, and a P-type GaN layer on an insulating substrate, and then separating the insulating substrate by using a laser or chemical agent, and conducting a conductive or After bonding the semiconductor substrate, an N-type electrode and a P-type electrode are formed on the N-type GaN layer and the substrate, respectively. That is, in the vertical light emitting device, the N-type electrode and the P-type electrode are positioned vertically.

However, in the horizontal light emitting device, since the N-type GaN layer has lower electrical conductivity and greater resistance than metal, current spreading of the N-type GaN layer is difficult, and P is an etching process for exposing the N-type GaN layer. Since a large part of the type GaN layer and the active layer are removed, the area of the light emitting area is severely reduced. In addition, the luminous efficiency and reliability of the current crowding phenomenon is reduced. In addition, since heat is transferred through the sapphire substrate having poor heat transfer characteristics, thermal instability may be caused, and the yield may be lowered in the separation process because the sapphire substrate having high hardness must be cut.

In addition, the vertical light emitting device is not compatible with the measurement device and the horizontal light emitting device because the two electrodes are provided vertically, it is impossible to bond in the same terminal of the package in series connection. In addition, there is a limit to improve current spreading because a metal layer for current spreading cannot be widely disposed on an emission surface that emits light to the outside, that is, an N-type GaN layer, and a portion close to the metal layer formed on the actual N-type GaN layer. As the current is concentrated, there is a limit to increase the light output. In order to maximize heat dissipation when a package in which a vertical light emitting device is mounted is attached to a metal printed circuit board (MPCB), a heat sink of the package must be bonded directly to a metal base. Bonding is not possible because it is connected to the terminal.

The present invention provides a light emitting device and a method for manufacturing the same, which can solve the disadvantages of the horizontal type and the vertical type, and can take advantage of them.

The present invention provides a light emitting device having a first substrate and a second contact electrode horizontally, and having a support substrate having excellent heat transfer characteristics, and a method of manufacturing the same.

The present invention provides a light emitting device in which first and second conductive layers connected to a first semiconductor layer and a second semiconductor layer, respectively, are positioned under an active layer, and a method of manufacturing the same.

The present invention provides a light emitting device in which the support substrate and the first and second contact electrodes are electrically separated to separate the electrical passage and the heat transfer passage, and a method of manufacturing the same.

A light emitting device according to an aspect of the present invention includes a first semiconductor layer, an active layer and a second semiconductor layer formed laminated; A first conductive layer formed in contact with the first semiconductor layer below the active layer; A second conductive layer formed under the first conductive layer and insulated from the first conductive layer, and having a plurality of regions connected to the second semiconductor layer; And first and second contact electrodes connected to the first and second conductive layers, respectively.

The first and second conductive layers are formed on the side opposite to the exit surface.

The first conductive layer is formed in a pattern in which a plurality of regions are removed.

The semiconductor device may further include an interlayer insulating layer formed between the first conductive layer and the second conductive layer.

The second conductive layer may include a connecting portion connected to a plurality of regions of the second semiconductor layer, and the connecting portion may include a plurality of regions in which the first conductive layer has been removed from the interlayer insulating layer, the first semiconductor layer, and the active layer. It is formed through a predetermined area.

The first and second contact electrodes are formed on the same plane.

The first contact electrode is formed in a hole passing through a predetermined region of the first semiconductor layer, the active layer, and the second semiconductor to be connected to the first conductive layer, and the second contact electrode is the first conductive layer, the first conductive layer. It is formed in a hole passing through a predetermined region of the semiconductor layer, the active layer, the second semiconductor layer and the interlayer insulating film and connected to the second conductive layer.

The semiconductor device may further include sidewall spacers formed on the contact hole sidewalls.

A support substrate is formed on the second conductive layer, and the support substrate includes any one of an insulating substrate, a semiconductor substrate, and a conductive substrate having better thermal conductivity than a sapphire substrate.

In the case of the semiconductor substrate or the conductive substrate, the support substrate further includes an insulating layer formed between the support substrate and the second conductive layer.

According to another aspect of the present invention, there is provided a method of manufacturing a light emitting device, including: forming a second semiconductor layer, an active layer, a first semiconductor layer, and a first conductive layer on a dummy substrate; Forming a plurality of first holes exposing a predetermined region of a second semiconductor layer from the first conductive layer; Forming a second conductive layer on the first conductive layer so as to fill the first hole and insulate the first conductive layer; Bonding the support substrate onto the second conductive layer after removing the dummy substrate; Forming second and third holes exposing predetermined regions of the first conductive layer and the second conductive layer, respectively, from the second semiconductor layer; Forming a sidewall insulating film on sidewalls of the second and third holes; And forming first and second contact electrodes to fill the second and third holes.

The first conductive layer is patterned to remove regions where the plurality of first holes and the second contact electrode are formed.

The method may further include forming an interlayer insulating layer on the first conductive layer before forming the plurality of first holes.

In the light emitting device according to the embodiments of the present invention, a first semiconductor layer, an active layer, and a second semiconductor layer are stacked, and a first conductive layer and a plurality of connecting portions contacting the first semiconductor layer under the first semiconductor layer. The second conductive layer connected to the second semiconductor layer is provided insulated by the interlayer insulating film. In addition, the first contact electrode is connected to the first conductive layer and the second contact electrode is connected to the second conductive layer on the same plane, and the support substrate is made of a material having excellent heat transfer characteristics on the rear surface of the second conductive layer. Prepared.

According to the present invention, since the first and second contact electrodes are horizontally formed on the upper side and the support substrate is formed on the lower side, the contact electrodes and the support substrate are separated, so that the bonding is possible directly to the metal base when mounted on the printed circuit board. In addition, since the support substrate is made of a material having excellent heat transfer characteristics, heat dissipation characteristics can be improved.

In addition, since the first conductive layer is formed in contact with the first semiconductor layer and the second conductive layer is formed in contact with the second semiconductor layer in a plurality of regions, the resistance of the first and second semiconductor layers can be minimized. The current spreading characteristic can be improved.

In addition, since the second conductive layer formed under the active layer is formed using a reflective material, light emission efficiency may be improved by reflecting light emitted downward. In addition, since the conductive layer is not formed on the surface from which the light is emitted without etching the active layer and the semiconductor layer, the light extraction area can be increased to improve the light output.

On the other hand, since the first and second electrodes are formed horizontally on the same plane, the horizontal light emitting device and the measurement equipment are compatible.

1 is a plan view and a cross-sectional view of a light emitting device according to an embodiment of the present invention.
2 is a cross-sectional view of a light emitting device according to another embodiment of the present invention.
3 to 10 are cross-sectional views and perspective views sequentially shown to explain a method of manufacturing a light emitting device according to an embodiment of the present invention.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention; However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various forms, and only the embodiments are intended to complete the disclosure of the present invention and to those skilled in the art. It is provided for complete information. In the drawings, the thickness of layers, films, panels, regions, etc., may be exaggerated for clarity, and like reference numerals designate like elements. In addition, if a part such as a layer, film, area, etc. is expressed as “upper” or “on” another part, each part is different from each part as well as being “right up” or “directly above” another part. This includes the case where there is another part between parts.

1 is a plan view and a cross-sectional view of a light emitting device according to an embodiment of the present invention, Figure 1 (a) is a plan view, Figure 1 (b) is a cross-sectional view taken along the line AA 'of Figure 1 (a). 2 is a cross-sectional view of a light emitting device according to another embodiment of the present invention.

Referring to FIG. 1, a light emitting device 100 according to an exemplary embodiment may include a first semiconductor layer 110, an active layer 120, a second semiconductor layer 130, and a first semiconductor layer 110 that are stacked. The first conductive layer 140 formed in contact with the first semiconductor layer 110 below the first conductive layer 140 and the first conductive layer 140 under the first conductive layer 140, and insulated from the first conductive layer 140 by the interlayer insulating layer 150. The second conductive layer 160 connected to the second semiconductor layer 130 by the plurality of connecting portions 162, the support substrate 170 provided below the second conductive layer 160, and the first conductive layer 140. And first and second contact electrodes 180 and 190 connected to the second conductive layer 160, respectively.

The first semiconductor layer 110 may be a semiconductor layer doped with P-type impurities, thereby supplying holes to the active layer 120. For example, the first semiconductor layer 110 may use a GaN layer doped with P-type impurities, for example, Mg. However, the present invention is not limited thereto, and various semiconductor materials are possible. That is, a compound in which nitrides such as GaN, InN, AlN (Group III-V), and such nitrides are mixed at a predetermined ratio may be used. For example, various semiconductor materials including AlGaN and AlInGaN may be used. In addition, the first semiconductor layer 110 may be formed in multiple layers. Meanwhile, the first semiconductor layer 110 is formed in a pattern in which a plurality of regions are removed, and a plurality of regions through which the connecting portion 162 of the first conductive layer 160 passes and the first and second electrode pads 180, The area through which 190 is penetrated can be removed.

The active layer 120 has a predetermined band gap and is a region where quantum wells are formed to recombine electrons and holes. The active layer 120 may be formed of a single quantum well structure (SQW) or a multi quantum well structure (MQW). The multi-quantum well structure may be formed by repeatedly stacking a plurality of quantum well layers and barrier layers. For example, the active layer 120 of the multi-quantum well structure may be formed by repeatedly stacking InGaN and GaN, or may be formed by repeatedly stacking AlGaN and GaN. Here, since the emission wavelength generated by the combination of electrons and holes is changed according to the kind of material constituting the active layer 120, it is preferable to adjust the semiconductor material included in the active layer 120 according to the target wavelength. Meanwhile, the active layer 120 is formed in a pattern in which a plurality of regions are removed, and a plurality of regions through which the connection portion 162 of the second conductive layer 160 penetrates and the first and second contact electrodes 180 and 190 are formed. The penetrating area can be removed.

The second semiconductor layer 130 may be an N-type semiconductor doped with N-type impurities, thereby supplying electrons to the active layer 120. For example, the second semiconductor layer 130 may use a GaN layer doped with N-type impurities, for example, Si. However, the present invention is not limited thereto, and various semiconductor materials are possible. That is, a compound in which nitrides such as GaN, InN, AlN (Group III-V), and such nitrides are mixed at a constant ratio may be used. For example, AlGaN may be used. In addition, the second semiconductor layer 130 may be formed of a multilayer film. Meanwhile, the second semiconductor layer 130 is formed in a pattern in which a plurality of regions are removed, and regions through which the first and second contact electrodes 180 and 190 penetrate may be removed.

The first conductive layer 140 is formed in contact with the first semiconductor layer 110 under the first semiconductor layer 110, and one region is connected to the first contact electrode 180. Therefore, the first conductive layer 140 transfers the power applied through the first contact electrode 180 to the first semiconductor layer 110. In addition, the first conductive layer 140 functions to reflect that light generated in the active layer 120 is emitted downward. Therefore, the first conductive layer 140 may be formed of a conductive material, or may be formed of a conductive and high reflection efficiency material, and may be formed of a single layer or multiple layers. That is, the conductive material may be formed of a single layer using a material having high reflection efficiency, and the conductive material and the material having high reflection efficiency may be stacked to form a multilayer of at least two layers. For example, the first conductive layer 140 is a single layer or multilayer using a transparent conductive oxide such as indium tin oxide (ITO), a metal material such as Ti, Cr, Au, Al, Ni, Ag, or an alloy thereof. It can be formed as. In addition, the first conductive layer 140 is formed in a pattern in which a plurality of regions are removed, and a plurality of regions through which the connection portion 162 of the second conductive layer 160 penetrates and the second contact electrode 190 penetrates. The area can be removed.

An interlayer insulating layer 150 is provided below the first conductive layer 140 to insulate the first conductive layer 140 and the second conductive layer 160. The interlayer insulating layer 130 may be formed using an insulating material, such as a silicon oxide film (SiO ₂ ), a silicon nitride film (Si ₃ N ₄ ), and may be formed in a single layer or multiple layers. In addition, the interlayer insulating layer 150 is formed in a pattern in which a plurality of regions are removed, and a plurality of regions through which the connection portion 162 of the second conductive layer 160 penetrates and regions where the second contact electrode 190 penetrates are formed. Can be removed. That is, the interlayer insulating layer 150 may be formed in the same shape as the first conductive layer 140.

The second conductive layer 160 is formed on the support substrate 170, and a plurality of connection portions 162 are formed to be connected to the upper second semiconductor layer 130, and one region of the second contact electrode 190 is formed. Connected with The second conductive layer 160 transfers the power applied through the second contact electrode 190 to the second semiconductor layer 130, and allows the current of the second semiconductor layer 130 to diffuse rapidly. That is, when power is directly applied to the second semiconductor layer 130, current cannot be diffused by the resistance of the second semiconductor layer 130. However, in the second conductive layer 160, a plurality of connection portions 162 are formed to form a second portion. Since it is connected to the semiconductor layer 130, it is possible to accelerate the current diffusion of the second semiconductor layer 130. In the second conductive layer 160, a plurality of connection portions 162 pass through a predetermined region of the interlayer insulating layer 150, the first conductive layer 140, the first semiconductor layer 110, and the active layer 120. It is connected to the semiconductor layer 130. In addition, the second conductive layer 160 may be formed using a highly conductive material, for example, a metal material such as Ti, Cr, Au, Al, or an alloy thereof, and may be formed in a single layer or multiple layers. .

The support substrate 170 may be manufactured using an insulating material, a semiconductor material, a conductive material, or the like. In addition, it is preferable that the support substrate 170 uses a material having excellent heat transfer characteristics in order to effectively release generated heat. For example, at least one of SiC, ZnO, Si, GaAs, GaP, LiAl ₂ O ₃ , BN, AlN, GaN, and metal materials may be used. In other words, silicon (Si) (heat transfer coefficient is 140w / mK), aluminum (Al) (200w / mK), AlN (150-200w / mK), and copper (Cu) (400w / mK) may be used. ₂ O ₃₎ (40? is more preferable to use the 60w / mK). In addition, when the support substrate 170 is made of a semiconductor material or a conductive material, an insulating film 200 is formed between the support substrate 170 and the second conductive layer 160 as illustrated in FIG. 2 to support the support substrate 170. ) May be insulated from the second conductive layer 160, and the heat transfer path and the electric transfer path may be separated.

The first and second contact electrodes 180 and 190 may be formed in a single layer or multiple layers using a metal material such as Ti, Cr, Au, Al, or an alloy thereof. The first contact electrode 180 is connected to the first conductive layer 140 and the second contact electrode 190 is formed to be connected to the second conductive layer 160.

Meanwhile, sidewall insulating layers 152, 154, and 156 may be formed on sidewalls formed through the connection portion 162 of the second conductive layer 160 and through sidewalls formed by the first and second contact electrodes 180 and 190. The first semiconductor layer 110, the active layer 120, and the second semiconductor layer 130 are prevented from contacting each other at sidewalls of the connection part 162 and the first and second contact electrodes 180 and 190, respectively. . The sidewall insulating films 152, 154, and 156 may be formed using an insulating material such as a silicon oxide film or a silicon nitride film.

As described above, in the light emitting device according to the exemplary embodiment, the first semiconductor layer 110, the active layer 120, and the second semiconductor layer 130 are stacked on the lower side of the first semiconductor layer 110. The first conductive layer 140 and the second conductive layer 160 are insulated by the interlayer insulating layer 150. In addition, the first conductive layer 140 is formed in contact with the first semiconductor layer 110, and the second conductive layer 160 is formed with a plurality of connecting portions 162 to be connected to the second semiconductor layer 130. . The first contact electrode 180 is connected to the first conductive layer 140, the second contact electrode 190 is connected to the second conductive layer 160, and the first and second contact electrodes 180 and 190 are connected to each other. ) Are formed on the same plane. In the light emitting device, power applied through the first and second contact electrodes 180 and 190 is supplied through the first conductive layer 140 and the second conductive layer 160 to the first semiconductor layer 110 and the second semiconductor. Applied to layer 130. In addition, the first contact electrode 180, the first conductive layer 140, the first semiconductor layer 110, the active layer 120, the second semiconductor layer 130, the second conductive layer 160, and the second contact. Current flows to the electrode 190. Accordingly, a vertical / horizontal light emitting device having characteristics of a horizontal light emitting device having horizontally formed first and second contact electrodes 180 and 190 and a vertical light emitting device bonded to a heat transfer substrate may be realized.

3 to 10 are perspective views and cross-sectional views sequentially shown to explain a method of manufacturing a light emitting device according to an embodiment of the present invention, where (a) is a perspective view, and (b) is (a) Is a cross-sectional view taken along the AA 'line.

Referring to FIG. 3, the second semiconductor layer 130, the active layer 120, and the first semiconductor layer 110 are sequentially formed on the dummy substrate 210. The dummy substrate 210 may use a sapphire substrate. The second semiconductor layer 130 is formed of, for example, a GaN layer doped with N-type impurities. For this purpose, for example, trimethylgallium (TMGa) or triethylgallium (TEGa) as a gallium source, ammonia (NH ₃ ) as a nitrogen source, and SiH ₄ or SiH ₆ as an N-type impurity are introduced to the silicon to be doped. Formed GaN layer. Meanwhile, in order to form InN, AlN, or the like instead of GaN as an N-type semiconductor layer, indium and aluminum sources may be introduced instead of gallium sources, and gallium, indium, and aluminum sources may be introduced to form AlInGaN. The active layer 120 is formed of, for example, a multi-quantum well structure in which an InGaN layer and a GaN layer are stacked a plurality of times. To form an InGaN layer, trimethylindium (TMIn) or triethylindium (TEIn) as an indium source, TMGa or TEGa as a gallium source, and ammonia (NH ₃ ) as a nitrogen source were introduced to form an GaN layer. In order to do so, gallium and nitrogen sources are introduced. That is, the active layer 120 may be formed of a multi-quantum well structure in which an InGaN layer and a GaN layer are stacked a plurality of times by introducing a gallium source and a nitrogen source and repeating the indium source and stopping. In addition, the first semiconductor layer 110 is formed of, for example, a GaN layer doped with P-type impurities. To this end, TMGa and ammonia (NH ₃ ) are introduced as a gallium source and a nitrogen source, and biscyclopentadienylmagnesium (Cp ₂ Mg) is introduced, for example, to dope magnesium (Mg) with P-type impurities. A P-type GaN layer is formed. Meanwhile, in order to form InN and AlN instead of GaN as the P-type semiconductor layer, indium and aluminum sources may be introduced instead of gallium sources, and gallium, indium and aluminum sources may be introduced to form AlInGaN.

Referring to FIG. 4, after forming the first conductive layer 140 on the first semiconductor layer 110, the first conductive layer 140 is patterned. The first conductive layer 140 is formed in contact with the first semiconductor layer 110 to function as a reflective layer that reflects light while applying power to the first semiconductor layer 110. The first conductive layer 140 may be formed using a transparent conductive oxide or metal such as indium tin oxide (ITO), and may be formed in a single layer or a multilayer structure. For example, the first conductive layer 140 may use a transparent conductive oxide, Cu, Ti, Au, Ni, Ag, Al, and an alloy thereof. In addition, the first conductive layer 140 is formed such that a plurality of regions are removed to expose the first semiconductor layer 110. At least one first region 140a is a region through which the contact electrode penetrates. The second region 140b is then formed to allow the second conductive layer to be connected to the second semiconductor layer 130.

Referring to FIG. 5, an interlayer insulating layer 150 is formed on the entire surface including the patterned first conductive layer 140. The interlayer insulating layer 150 may be formed using an insulating material such as a silicon oxide film or a silicon nitride film, and may be formed in a single layer or multiple layers.

Referring to FIG. 6, the interlayer insulating layer 150 is etched to open the plurality of second regions 140b of the first conductive layer 140, and then the first semiconductor layer 110 and the active layer 120 are etched. As a result, a plurality of first holes 220 exposing the second semiconductor layer 130 are formed. Here, the width of the plurality of first holes 220 is formed to be equal to or narrower than the width of the second region 140b.

Referring to FIG. 7, the sidewall insulating layer 152 is formed on the sidewall of the first hole 220. The sidewall insulating layer 152 is formed by forming an insulating film having a predetermined thickness on the entire surface including the first hole 220 and then performing a front surface etching process to expose the second semiconductor layer 130 in the first hole 220. The insulating layer may be formed on the sidewall of the hole 220. Subsequently, a second conductive layer 160 is formed on the interlayer insulating layer 150. The second conductive layer 160 is formed with a first thickness 220 and a predetermined thickness on the interlayer insulating layer 150. . Here, the second conductive layer 160 buried in the first hole 220 becomes a connection portion 162 connected to the second semiconductor layer 130. Meanwhile, even when the second conductive layer 160 is embedded in the first hole 220a, the sidewall insulating layer 152 is formed on the sidewall of the first hole 220. 1 The semiconductor layer 110 and the active layer 120 do not contact. Meanwhile, the second conductive layer 160 may be formed using a metal material. For example, the second conductive layer 160 may be formed as a single layer or a multilayer using a metal single material such as Ti, Cr, Au, Al, or an alloy thereof. have.

Referring to FIG. 8, after the dummy substrate 210 is removed, the support substrate 170 is bonded on the second conductive layer 160. The dummy substrate 210 may be removed using a laser or an etching solution. In addition, the support substrate 170 may be manufactured using an insulating material, a semiconductor material, and a conductive material. In addition, it is preferable that the support substrate 170 uses a material having excellent heat transfer characteristics in order to effectively release generated heat. For example, at least one of SiC, ZnO, Si, GaAs, GaP, LiAl ₂ O ₃ , BN, AlN, GaN, and metal materials may be used. In this case, when the insulating material is used, the support substrate 170 may be directly bonded onto the second conductive layer 160, and when the conductive material or the semiconductor material is used, an insulating layer (not shown) is formed on the second conductive layer 160. ) May be bonded to the support substrate 170. The support substrate 170 may form a conductive adhesive layer (not shown) between the second conductive layer 160 and the support substrate 170, and then melt and bond the conductive adhesive layer. Here, the conductive adhesive layer has a lower melting point of about 200 to 300 ° C. lower than that of the second conductive layer 160, and a material capable of being bonded at a low temperature may be used. For example, the conductive adhesive layer may use an alloy used for flip chip bonding, and a material including at least one of Au—Sn, Sn, In, Au—Ag, and Pb—Sn may be used.

Referring to FIG. 9, the first conductive layer 140 is exposed by etching predetermined regions of the second semiconductor layer 130, the active layer 120, and the first semiconductor layer 110 to which the support substrate 170 is not bonded. A second hole 230a to be formed, and predetermined regions of the second semiconductor layer 130, the active layer 120, the first semiconductor layer 110, and the interlayer insulating layer 150 are etched to form the second conductive layer 160. A third hole 230b is formed to expose a predetermined region of the. In this case, the third hole 230b is formed to penetrate the first region 140a of the first conductive layer 140. In addition, the third hole 230b may be formed to have a width equal to or narrower than the width of the patterned first region 140a of the first conductive layer 140. In addition, the second hole 230a and the third hole 230b may have the same width. Meanwhile, before forming the second hole 230a and the third hole 230b, a passivation film (not shown) may be formed on the second semiconductor layer 130 using insulating films such as a silicon oxide film and a silicon nitride film. have.

Referring to FIG. 10, sidewall insulating layers 154 and 156 are formed on sidewalls of the second hole 230a and the third hole 230b. The sidewall insulating films 154 and 156 may be formed using an insulating film such as a silicon oxide film or a silicon nitride film. The insulating film is formed to a predetermined thickness on the entire upper side, and then formed by the second hole 230a and the third hole 230b. It may be formed on sidewalls of the second hole 230a and the third hole 230b by etching the entire surface to expose the first conductive layer 140 and the second conductive layer 160. Subsequently, a conductive layer is formed to fill the second hole 230a and the third hole 230b to form the first and second contact electrodes 180 and 190. The first and second contact electrodes 180 and 190 may be formed wider than the second and third holes 230a and 230b. Accordingly, the first contact electrode 180 is connected to the first conductive layer 140 and the second contact electrode 190 is connected to the second conductive layer 160. In addition, the first conductive layer 140 is connected to the first semiconductor layer 110, and the second conductive layer 160 is connected to the second semiconductor layer 160. As a result, the first contact electrode 180 is connected to the first semiconductor layer 110 through the first conductive layer 140, and the second contact electrode 190 is connected to the second through the second conductive layer 160. The first and second contact electrodes 180 and 190 may be connected to an external power supply terminal through a bonding wire.

In addition, the manufacturing method of the light emitting device according to the embodiment of the present invention may be variously modified. For example, in the above embodiment, after forming the interlayer insulating layer 150, a predetermined region of the interlayer insulating layer 150, the first semiconductor layer 110, and the active layer 120 is etched to form the first hole 220. After etching certain regions of the first semiconductor layer 110 and the active layer 120, an interlayer insulating layer 150 is formed, and the interlayer insulating layer 150 of the etched regions of the first semiconductor layer 110 and the active layer 120 is formed. A portion of) may be removed to form the first hole 220. In addition, after the first conductive layer 140 and the interlayer insulating layer 150 are formed without patterning the first conductive layer 140, the interlayer insulating layer 150, the first conductive layer 140, and the first semiconductor layer 110 are formed. ) And a plurality of predetermined regions of the active layer 120 may be etched to form a first hole 220 exposing the plurality of regions of the second semiconductor layer 130.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit and scope of the invention.

110: first semiconductor layer 120: active layer
130: second semiconductor layer 140: first conductive layer
150: interlayer insulating film 160: second conductive layer
170 support substrate 180 first contact electrode
190: second contact electrode

Claims (16)

A stacked first semiconductor layer, active layer and second semiconductor layer;
A first conductive layer formed in contact with the first semiconductor layer below the active layer;
A second conductive layer formed under the first conductive layer and insulated from the first conductive layer, and having a plurality of regions connected to the second semiconductor layer;
A light emitting device comprising first and second contact electrodes connected to the first and second conductive layers, respectively.
The light emitting device of claim 1, wherein the first and second conductive layers are formed on a side opposite to the emission surface.
The light emitting device of claim 2, wherein the first conductive layer has a pattern in which a plurality of regions are removed.
4. The light emitting device of claim 3, further comprising an interlayer insulating film formed between the first conductive layer and the second conductive layer. The light emitting device of claim 4, wherein the second conductive layer includes a connection portion connected to a plurality of regions of the second semiconductor layer.
The light emitting device of claim 5, wherein the connection part penetrates through a predetermined region of the interlayer insulating layer, the first semiconductor layer, and the active layer through a plurality of regions from which the first conductive layer is removed.
The light emitting device according to any one of claims 1 to 6, wherein the first and second contact electrodes are formed on the same plane.
The light emitting device of claim 7, wherein the first contact electrode is formed in a hole passing through a predetermined region of the first semiconductor layer, the active layer, and the second semiconductor, and is connected to the first conductive layer.
The semiconductor device of claim 7, wherein the second contact electrode is formed in a hole passing through a predetermined region of the first conductive layer, the first semiconductor layer, the active layer, the second semiconductor layer, and the interlayer insulating layer to be connected to the second conductive layer. Light emitting element.
The light emitting device of claim 8 or 9, further comprising sidewall spacers formed on the sidewalls of the contact hole.
The light emitting device according to claim 1 or 5, further comprising a support substrate formed on the second conductive layer.
The light emitting device of claim 11, wherein the support substrate comprises any one of an insulating substrate, a semiconductor substrate, and a conductive substrate having better thermal conductivity than a sapphire substrate.
The light emitting device of claim 12, wherein the support substrate further comprises an insulating layer formed between the support substrate and the second conductive layer in the case of the semiconductor substrate or the conductive substrate.
Stacking a second semiconductor layer, an active layer, a first semiconductor layer, and a first conductive layer on the dummy substrate;
Forming a plurality of first holes exposing a predetermined region of a second semiconductor layer from the first conductive layer;
Forming a second conductive layer on the first conductive layer so as to fill the first hole and insulate the first conductive layer;
Bonding the support substrate onto the second conductive layer after removing the dummy substrate;
Forming second and third holes exposing predetermined regions of the first conductive layer and the second conductive layer, respectively, from the second semiconductor layer;
Forming sidewall spacers on sidewalls of the second and third holes; And
And forming first and second contact electrodes filling the second and third holes.
The method of claim 14, wherein the first conductive layer is patterned such that regions where the plurality of first holes and the second contact electrode are formed are removed.
15. The method of claim 13 or 14, further comprising forming an interlayer insulating film on the first conductive layer before forming the plurality of first holes.

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