KR20200021797A - Smeiconductor device - Google Patents

Abstract

Embodiments include a substrate; A first conductive semiconductor layer disposed on the substrate, a second conductive semiconductor layer, and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer; A light emitting structure including a semiconductor layer and a recess penetrating through the active layer; A first electrode disposed on the light emitting structure and electrically connected to the first conductivity type semiconductor layer; A second electrode disposed on the light emitting structure and electrically connected to the second conductive semiconductor layer; A first pad disposed on the first electrode; And a second pad disposed on the second electrode, wherein the recess separates the second conductive semiconductor layer and the active layer into an active region and an inactive region, and the recess surrounds the active region. Extend so that
The second pad discloses a semiconductor device extending over the recess and disposed on the second electrode.

Description

Semiconductor device {SMEICONDUCTOR DEVICE}

Embodiments relate to semiconductor devices.

A semiconductor device including a compound such as GaN, AlGaN, etc. has many advantages, such as having a wide and easy-to-adjust band gap energy, and can be used in various ways as a light emitting device, a light receiving device, and various diodes.

Particularly, light emitting devices such as light emitting diodes or laser diodes using semiconductors of Group 3-5 or Group 2-6 compound semiconductors have been developed through the development of thin film growth technology and device materials. Various colors such as blue and ultraviolet light can be realized, and efficient white light can be realized by using fluorescent materials or by combining colors.Low power consumption, semi-permanent life, and quick response are compared to conventional light sources such as fluorescent and incandescent lamps. It has the advantages of speed, safety and environmental friendliness.

In addition, when a light-receiving device such as a photodetector or a solar cell is also manufactured using a group 3-5 or group 2-6 compound semiconductor material of a semiconductor, the development of device materials absorbs light in various wavelength ranges to generate a photocurrent. As a result, light in various wavelength ranges, from gamma rays to radio wavelength ranges, can be used. It also has the advantages of fast response speed, safety, environmental friendliness and easy control of device materials, making it easy to use in power control or microwave circuits or communication modules.

Accordingly, the semiconductor device may replace a light emitting diode backlight, a fluorescent lamp, or an incandescent bulb that replaces a cold cathode tube (CCFL) constituting a backlight module of an optical communication means, a backlight of a liquid crystal display (LCD) display device. Applications are expanding to include white LED lighting devices, automotive headlights and traffic lights, and sensors to detect gas or fire. In addition, the semiconductor device may be extended to high frequency application circuits, other power control devices, and communication modules.

In particular, the light emitting device that emits light in the ultraviolet wavelength range may be used for curing, medical treatment, and sterilization by curing or sterilizing.

Recently, studies on ultraviolet light emitting devices are active, but there is a problem in that ultraviolet light emitting devices are oxidized to peeling and moisture and thus the light output is lowered.

The embodiment provides a flip chip type red semiconductor device.

In addition, heat dissipation is improved to provide a semiconductor device having improved reliability.

Moreover, the semiconductor element which is excellent in the current dispersion effect is provided.

The problem to be solved in the examples is not limited thereto, and the object or effect that can be grasped from the solution means or the embodiment described below will be included.

Semiconductor device according to an embodiment of the present invention; A first conductive semiconductor layer disposed on the substrate, a second conductive semiconductor layer, and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer; A light emitting structure including a semiconductor layer and a recess penetrating through the active layer; A first electrode disposed on the light emitting structure and electrically connected to the first conductivity type semiconductor layer; A second electrode disposed on the light emitting structure and electrically connected to the second conductive semiconductor layer; A first pad disposed on the first electrode; And a second pad disposed on the second electrode, wherein the recess separates the second conductive semiconductor layer and the active layer into an active region and an inactive region, and the recess surrounds the active region. The second pad is disposed to extend over the recess on the second electrode.

The recess includes a bottom surface; An inner inclined surface connected to the bottom surface and adjacent to the active area; And an outer inclined surface which is connected to the bottom surface and faces the inner inclined surface, wherein one end of the second pad extends on the inner inclined surface of the recess.

One end of the second pad may be disposed extending on the bottom surface of the recess and the outer inclined surface of the recess.

The second pad may extend on the second conductive semiconductor layer on the inactive region, and one end of the second pad may be disposed between the recess and the outermost surface of the second conductive semiconductor layer.

The light emitting structure may include a recess in which the first conductivity type semiconductor layer is exposed, and the recess may extend outside the inactive region.

The ratio of the maximum width in the horizontal direction of the recess to the width of the second conductive semiconductor layer on the non-active area in the horizontal direction may be 1: 0.5 to 1: 5.

A first bump disposed on the first pad; And a second bump disposed on the second pad and spaced apart from the first bump.

The first electrode may be disposed on the first conductive semiconductor layer on the concave portion, and the second electrode may be disposed on the second conductive semiconductor layer on the active region.

And a first insulating layer disposed on the light emitting structure, wherein the first insulating layer is from the second conductive semiconductor layer on the active region to the first conductive semiconductor layer on the recesses and recesses. The second conductive semiconductor layer and the active layer may be disposed to cover and extend.

The first insulating layer may extend to the first electrode.

The inactive region may be disposed to surround the recess, the active region may be electrically connected to the second electrode, and the inactive region may be electrically separated from the second electrode.

According to an embodiment, the semiconductor device may be implemented in the form of a flip chip.

In addition, the heat dissipation is improved, it is possible to manufacture a light emitting device with improved reliability.

In addition, it is possible to fabricate a semiconductor device having an excellent current dispersion effect.

The various and advantageous advantages and effects of the present invention are not limited to the above description, and will be more readily understood in the course of describing specific embodiments of the present invention.

1 is a plan view of a semiconductor device according to an embodiment;
FIG. 2 is a cross-sectional view taken along line AA ′ in FIG. 1;
3A is an enlarged view of a portion K in FIG. 2,
3B is an enlarged view of a portion L in FIG. 3A,
4 is a cross-sectional view taken along line BB ′ of FIG. 1;
5 is a plan view of a semiconductor device according to another embodiment;
FIG. 6 is a cross-sectional view taken along line CC ′ in FIG. 5;
7 is a modification of FIG. 1,
8 is a conceptual diagram of a semiconductor device package according to an embodiment;
9A to 9H illustrate a method of manufacturing a semiconductor device according to example embodiments.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

However, the technical spirit of the present invention is not limited to some embodiments described, but may be implemented in various forms, and within the technical spirit of the present invention, one or more of the components between the embodiments may be selectively selected. Can be combined and substituted.

In addition, the terms (including technical and scientific terms) used in the embodiments of the present invention may be generally understood by those skilled in the art to which the present invention pertains, unless specifically defined and described. The terms commonly used, such as terms defined in advance, may be interpreted as meanings in consideration of the contextual meaning of the related art.

In addition, the terms used in the embodiments of the present invention are intended to describe the embodiments and are not intended to limit the present invention.

As used herein, the singular forms may also include the plural unless specifically stated otherwise, and may be combined as A, B, C when described as "at least one (or more than one) of A and B, C". It can include one or more of all possible combinations.

In addition, in describing the components of the embodiment of the present invention, terms such as first, second, A, B, (a), and (b) may be used.

These terms are only to distinguish the components from other components, and the terms are not limited to the nature, order, order, or the like of the components.

And when a component is described as being 'connected', 'coupled' or 'connected' to another component, the component is not only connected, coupled or connected directly to the other component, It may also include the case of 'connected', 'coupled' or 'connected' due to another component between the other components.

In addition, when described as being formed or disposed on the "top" or "bottom" of each component, the top (bottom) or the bottom (bottom) is not only when two components are in direct contact with each other, but also one. It also includes a case where the above-described further components are formed or disposed between two components. In addition, when expressed as "up (up) or down (down)" may include the meaning of the down direction as well as the up direction based on one component.

The light emitting structure according to the embodiment of the present invention may output light in the ultraviolet wavelength band. For example, the light emitting structure may output light in the near ultraviolet wavelength range (UV-A), may output light in the far ultraviolet wavelength range (UV-B), and emit light in the deep ultraviolet wavelength range (UV-C). You can print The wavelength range may be determined by the composition ratio of Al of the light emitting structure 120. In addition, the light emitting structure may output light of various wavelengths having different light intensities, and the peak wavelength of light having the strongest intensity relative to the intensity of other wavelengths among the wavelengths of light emitted is near ultraviolet, deep ultraviolet, or core. May be ultraviolet light.

For example, the light (UV-A) in the near ultraviolet wavelength band may have a wavelength in the range of 320 nm to 420 nm, the light in the far ultraviolet wavelength band (UV-B) may have a wavelength in the range of 280 nm to 320 nm, and deep ultraviolet light Light in the wavelength band (UV-C) may have a wavelength in the range of 100nm to 280nm.

1 is a plan view of a semiconductor device according to an embodiment, and FIG. 2 is a cross-sectional view taken along line AA ′ of FIG. 1.

1 and 2, a semiconductor device 10 according to an embodiment may include a substrate 110, a first conductive semiconductor layer 121, a second conductive semiconductor layer 123, and an active layer 122. And a light emitting structure 120 disposed on the substrate 110, a first insulating layer 140 partially disposed on the light emitting structure 120, and a first conductive semiconductor layer 121. The first electrode 131, the second electrode 132 electrically connected to the second conductive semiconductor layer 123, the first pad 151 and the second electrode 132 disposed on the first electrode 131. The second pad 152 is disposed on the second pad 152, and the second insulating layer 160 partially covers the first insulating layer 140, the first pad 151, and the second pad 152.

First, the substrate 110 may be disposed on one side of the semiconductor device 10. For example, the substrate 110 may be disposed below the semiconductor device 10. The substrate 110 transmits light and may be an insulating substrate 110. The substrate 110 may be made of at least one of Al, Si, O, Zn, Mg, Ga, P, and F. Specifically, the substrate 110 may include sapphire (Al ₂ O ₃ ), SiC, GaN, ZnO, Si, GaP, InP, and the like. It may be formed of a material selected from Ge, but is not particularly limited as long as it is a material that transmits light generated from the light emitting structure 110.

An uneven portion may be formed at a lower portion of the substrate 110, and the uneven portion may have a texture structure to improve light extraction efficiency. For example, the semiconductor device 10 may be flipped to emit light upward through the substrate 110, and the light emitted to the outside of the semiconductor device 10 may increase due to the uneven portion of the substrate 110. have. For example, the substrate 110 may be made of a material having a refractive index of 1 to 3.4 to minimize the total reflection at the interface in contact with the outside. However, the substrate 110 is not limited to this structure and may have various structures.

The light emitting structure 120 may include a first conductive semiconductor layer 121, an active layer 122, and a second conductive semiconductor layer 123. In this case, the first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123 may be disposed in the first direction (X direction). Hereinafter, the first direction (X direction), which is the thickness direction of each layer, is defined as the vertical direction, and the second direction (Y direction) perpendicular to the first direction (X direction) is defined as the horizontal direction. The third direction (Z direction) is a direction perpendicular to both the first direction (X direction) and the second direction (Y direction).

The first conductive semiconductor layer 121 may be formed of a compound semiconductor such as a group III-V group or a group II-VI, and may be doped with a first dopant. The first conductive semiconductor layer 121 is a semiconductor material having a composition formula of Inx1Aly1Ga1-x1-y1N (0 ≦ x1 ≦ 1, 0 ≦ y1 ≦ 1, 0 ≦ x1 + y1 ≦ 1), for example, GaN, AlGaN, InGaN, InAlGaN and the like can be selected. The first dopant may be an n-type dopant such as Si, Ge, Sn, Se, or Te. When the first dopant is an n-type dopant, the first conductive semiconductor layer 121 doped with the first dopant may be an n-type semiconductor layer.

The active layer 122 may be disposed between the first conductive semiconductor layer 121 and the second conductive semiconductor layer 123. The active layer 122 may be a layer in which electrons (or holes) injected through the first conductive semiconductor layer 121 and holes (or electrons) injected through the second conductive semiconductor layer 123 are recombined. As the electrons and the holes recombine, the active layer 122 may transition to a low energy level, and may generate light having a wavelength corresponding to the bandgap energy of the well layer to be described later included in the active layer 122. The wavelength of the light having the greatest intensity among the wavelengths of the light emitted by the semiconductor device may be ultraviolet rays, and the ultraviolet rays may be the above-described near ultraviolet rays, deep ultraviolet rays, or deep ultraviolet rays.

The active layer 122 may have any one of a single well structure, a multi well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, or a quantum line structure, and the active layer 122 The structure of is not limited to this.

The second conductive semiconductor layer 123 is formed on the active layer 122, and may be implemented as a compound semiconductor such as a group III-V group or a group II-VI. The second conductive semiconductor layer 123 may be a second semiconductor layer 123. Dopants may be doped. The second conductive semiconductor layer 123 is a semiconductor material having a composition formula of Inx5Aly2Ga1-x5-y2N (0≤x5≤1, 0≤y2≤1, 0≤x5 + y2≤1) or AlInN, AlGaAs, GaP, GaAs It may be formed of a material selected from GaAsP, AlGaInP. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, or Ba, the second conductive semiconductor layer 123 doped with the second dopant may be a p-type semiconductor layer.

In addition, an electron blocking layer (not shown) may be disposed between the active layer 122 and the second conductivity-type semiconductor layer 123. The electron blocking layer (not shown) does not emit light when the electrons supplied from the first conductive semiconductor layer 121 to the active layer 122 recombine in the active layer 122 and fall into the second conductive semiconductor layer 123. By blocking the outgoing flow, it is possible to increase the probability of recombination of electrons and holes in the active layer 122. The energy band gap of the electron blocking layer (not shown) may be larger than the energy band gap of the active layer 122 and / or the second conductivity type semiconductor layer 123.

An electron blocking layer (not shown) is a semiconductor material having a composition formula of In _x1 Al _y1 Ga _{1 -x1- y1} N (0≤x1≤1, 0≤y1≤1, 0≤x1 + y1≤1), for example For example, it may be selected from AlGaN, InGaN, InAlGaN, and the like, but is not limited thereto. The electron blocking layer (not shown) may alternately include a first layer having a high aluminum composition (not shown) and a second layer having a low aluminum composition (not shown).

The first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123 may all include aluminum. Accordingly, the first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123 may be AlGaN. However, it is not necessarily limited thereto.

In addition, when the first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123 all contain aluminum, the electron blocking layer (not shown) may have an aluminum composition of 50% to 50%. 90%. If the aluminum composition of the electron blocking layer (not shown) is less than 50%, the height of the energy barrier for blocking electrons may be insufficient and light emitted from the active layer 122 may be absorbed by the electron blocking layer (not shown). If the aluminum composition exceeds 90%, the electrical characteristics of the semiconductor device may deteriorate.

The light emitting structure 120 may include a recess 127 and a recess 128 that are concave toward the first conductive semiconductor layer 121 on the second conductive semiconductor layer 123. That is, the concave portion 127 may be disposed to penetrate the second conductive semiconductor layer 123 and the active layer 122 and expose a portion of the first conductive semiconductor layer 121. In addition, the recess 128 penetrates through the second conductivity-type semiconductor layer 123 and the active layer 122 and penetrates to a part of the first conductivity-type semiconductor layer 121 so as to penetrate the first conductivity-type semiconductor layer 121. ) May be exposed. Accordingly, the first conductivity type semiconductor layer 121 may be exposed in some regions by the recess 127 and the recess 128.

The recess 127 may be disposed to extend outside the upper surfaces 123a and 123b of the second conductive semiconductor layer 123 to the outside of the semiconductor device. For example, the recess 127 may be disposed outside the outermost side of the top surface of the second conductivity-type semiconductor layer 123. This may be disposed in the inactive region RI described later. The recess 127 may include an inclined surface 127a and a bottom surface 127b.

The inclined surface 127a extends from the outermost side of the upper surface of the second conductive semiconductor layer 123 and penetrates through the second conductive semiconductor layer 123 and the active layer 122, so that the slope of the second conductive semiconductor layer 123 The outermost side and the outermost side of the active layer 122 may be included. The outermost surface of the second conductive semiconductor layer 123 and the outermost surface of the active layer 122 may be disposed outside the outermost surface of the upper surface of the second conductive semiconductor layer 123.

The outermost surface of the second conductive semiconductor layer 123 and the outermost surface of the active layer 122 may be inclined at a predetermined angle with respect to the upper surface of the second conductive semiconductor layer 123. This angle can be changed by the process by etching.

In addition, the inclined surface 127a may further include an outer surface of the first conductive semiconductor layer 121 extending along the outermost surface of the second conductive semiconductor layer 123 and the outermost surface of the active layer 122. An outer surface of the first conductive semiconductor layer 121 may extend along a outermost surface of the active layer 122 to a predetermined height.

The recess 127 may include a bottom 127b extending from the inclined surface 127a. The bottom surface 127b may be disposed to have a predetermined angle with the inclined surface 127a, and may have a flat structure in a horizontal direction so that the first electrode 131 described later may be easily disposed. However, the present invention is not limited thereto.

The bottom surface 127b may be a portion of an upper surface of the first conductive semiconductor layer 121, and may be spaced apart from the outermost surfaces of the active layer 122 and the second conductive semiconductor layer 123.

In addition, the recess 127 may be disposed outside the recess 128 to be described later to surround the recess 128.

In addition, the recess 128 may be disposed to extend adjacent to the edge of the light emitting structure 120. In particular, the recess 128 may be disposed to extend adjacent to the edge of the active layer 122 or the second conductivity-type semiconductor layer 123. In other words, the recess 128 may be disposed to extend adjacent to the inclined surface 127a of the recess 127. In addition, the recess 128 may be spaced apart from the recess 127, and may be continuously disposed. For example, when the recesses 128 are continuously disposed, the recesses 128 on the plane (ZY plane) may be in the form of a closed loop in the light emitting structure 128. Hereinafter, the description will be based on the case of the closed loop form.

Accordingly, the light emitting structure 120 may be partitioned into the active region RA and the inactive region RI by the recess 128. Here, the active region RA may be located inside the recess 128 in the light emitting structure 120, and the inactive region RI may be located outside the recess 128 in the light emitting structure 120.

The active layer 122 of the active region RA and the active layer 122 of the inactive region RI may be spaced apart from each other. The active region RA may be a light emitting region in which an active layer 122 is disposed adjacent to the second electrode 132, where electrons and holes are combined. In contrast, the inactive region RI is spaced apart from the active layer 122 of the active region RA, and disposed adjacent to the edge of the light emitting structure 120 than the second electrode 132. It may be a non-light emitting region in which electron and hole coupling does not occur.

By such a configuration, the second insulating layer 160 covering the side surface and the upper surface of the light emitting structure 120 is peeled off due to the heat generated by the light emission of the semiconductor device, the external high temperature, high humidity, and the thermal expansion coefficient difference between the light emitting structures 120. Even if cracks or the like occur, moisture or contaminants that penetrate into the light emitting structure 120 from the outside may prevent the active layer 122 of the active region RA, which is a light emitting region, from being oxidized.

Specifically, in the semiconductor device according to an embodiment, the recess 128 may block a direct connection between the active layer 122 of the active region RA and the active layer 122 of the inactive region RI. Accordingly, when the active layer 122 of the inactive region RI adjacent to the sidewall of the light emitting structure 120 is exposed to the outside due to the aforementioned peeling, the active layer 122 of the inactive region RI may be oxidized due to the exposure. Can be.

However, since the active layer 122 is spaced apart from the active region RA and the inactive region RI by the recess 128, even if the active layer 122 of the inactive region RI is oxidized, the active layer 122 of the active region RA is oxidized. 122 may be protected from the oxidation. That is, the recess 128 may protect the oxidation of the active layer 122 of the light emitting region from the external moisture.

In particular, when the semiconductor device generates ultraviolet light, the energy band gap and the Al concentration of the active layer 122 increase in preparation for generating visible light, and thus may be more susceptible to oxidation. Accordingly, the semiconductor device described herein can greatly improve the reliability when generating ultraviolet light.

In addition, since the light emitting structure 120 has a high bandgap energy when generating ultraviolet light, the light emitting structure 120 may reduce current dispersion characteristics and reduce an effective light emitting area.

For example, when the light emitting structure 120 is composed of a GaN-based compound semiconductor, in order to emit ultraviolet light, the light emitting structure may include Al _x Ga _(1-x) N (0 ≦ _x ≦ 1) containing a large amount of Al. It may be configured as. In this case, as the x value representing the Al content increases, the resistance of the light emitting structure 120 may also increase, and current dispersion and current injection characteristics of the light emitting structure 120 may decrease.

Accordingly, current spreading in the light emitting structure 120 may be performed in the active region RA. As a result, the semiconductor device 10 described in this specification can maintain the light output even with the recess 128. In addition, as described above, the region where the recess 128 is oxidized due to moisture or the like is limited to the outer region of the recess 128 (for example, the active region RA), so that the effective light emitting region (for example, the inactive region). The active layer 122 positioned at (RI) may be protected from oxidation to maintain light output. Here, the effective light emitting area means an area having a light output of a predetermined ratio (for example, 40%) or more of the maximum light output.

In addition, an upper surface of the second conductivity-type semiconductor layer 123 may be divided into a first upper surface 123a and a second upper surface 123b by the recess 128. The first upper surface 123a may be disposed inside the recess 128, and the second upper surface 123b may be disposed outside the recess 128. The first upper surface 123a and the second upper surface 123b are spaced apart from each other, and may be electrically separated by the recess 128.

The first electrode 131 may be disposed on the first conductive semiconductor layer 121 exposed by mesa etching and may be electrically connected to the first conductive semiconductor layer 121. In particular, the recess 127 by the mesa etching may be disposed outside the recess 128 to surround the recess 128.

In addition, the first electrode 131 may be disposed on the low concentration layer of the active layer 122 to ensure a relatively smooth current injection characteristics. That is, the first electrode 131 may be disposed adjacent to the region of the low concentration layer of the first conductivity type semiconductor layer 121. This is because the high concentration layer of the first conductive semiconductor layer 121 has a high Al concentration and a relatively low current diffusion characteristic. However, it is not limited to this structure.

In addition, the first electrode 131 may be disposed on the first conductive semiconductor layer 121 outside the recess 128. For example, the first electrode 131 may be disposed on the bottom 127a of the recess 127. In addition, when a current is injected through the first electrode 131, the light emitting structure 120 may generate light.

The second electrode 132 may be disposed on the second conductivity type semiconductor layer 123 and electrically connected to the second conductivity type semiconductor layer 123. In addition, since the second electrode 132 is disposed inside the recess 128, the second electrode 132 may overlap the active region RA in the first direction.

The first electrode 131 and the second electrode 132 may be ohmic electrodes. The first electrode 131 and the second electrode 132 are indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IZAO), and indium gallium zinc oxide (IGZO). ), Indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IZO (IZO Nitride), AGZO (Al-Ga ZnO), IGZO (In-Ga) ZnO), ZnO, IrOx, RuOx, NiO, RuOx / ITO, Ni / IrOx / Au, or Ni / IrOx / Au / ITO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Sn, In, At least one of Ru, Mg, Zn, Pt, Au, and Hf may be formed, but is not limited thereto.

The first insulating layer 140 may be disposed on the light emitting structure 120 to insulate the first electrode 131 from the active layer 122, the second conductive semiconductor layer 123, and the second electrode 132. have. In addition, the first insulating layer 140 may electrically insulate the second electrode 132 from the active layer 122, the first conductivity-type semiconductor layer 121, and the first electrode 131.

In addition, the first insulating layer 140 may be partially disposed on the light emitting structure 120 to partially expose the first conductive semiconductor layer 121 and the second conductive semiconductor layer 122. As a result, the first electrode 131 and the second electrode 132 may be disposed in an area exposed to the first insulating layer 140.

In addition, the first insulating layer 140 penetrates the light emitting structure 120 from outside of the edges during the process of the semiconductor device 10 except for the region where the first electrode 131 and the second electrode 132 are disposed. Can be prevented. In particular, the first insulating layer 140 may be disposed in the recess 128 to prevent contaminants and the like from penetrating into the recess 128.

 In addition, the first insulating layer 140 may be disposed in the recess 128 to maintain insulation between the active layer 122 of the active region RA and the active layer 122 of the inactive region RI.

In addition, the first insulating layer 140 may be formed by selecting at least one selected from the group consisting of SiO ₂ , SixOy, Si ₃ N ₄ , SixNy, SiOxNy, Al ₂ O ₃ , TiO ₂ , AlN, and the like. I never do that. The first insulating layer 140 may be formed in a single layer or multiple layers. For example, the first insulating layer 140 may be a distributed Bragg reflector (DBR) having a multilayer structure including a Si oxide or a Ti compound. However, the present invention is not limited thereto, and the first insulating layer 140 may include various reflective structures.

In addition, when the first insulating layer 140 performs a reflective function, the light extraction efficiency may be improved by reflecting upward the light emitted from the active layer 122 toward the top or the side.

The first pad 151 may be disposed on the first electrode 131. In detail, the first pad 151 may be disposed to cover the top surface of the first electrode 131 and to cover a portion of the first insulating layer 140.

In addition, the first insulating layer 140 may be partially disposed on the first upper surface 123a of the second conductive semiconductor layer 123. The first insulating layer 140 extends along the first recess 128, the second upper surface 123b, and the recess 127 on the first upper surface 123a of the second conductive semiconductor layer 123. Can be. That is, the first insulating layer 140 may extend along the recess 128 in the active region RA. The first insulating layer 140 may extend to the bottom 127b of the recess 127. Accordingly, the first insulating layer 140 may partially overlap the active region RA in the vertical direction. In addition, the first insulating layer 140 may be disposed to overlap the recess 128 in the vertical direction, and may also be disposed to overlap the portion of the non-active area RI in the vertical direction. By such a configuration, it is possible to easily reflect the light generated in the active layer 122 of the active region RA even if it is emitted laterally while preventing moisture or the like from penetrating into the active layer 122 exposed by the recess 128. have. In addition, the active layer 122 of the inactive region RI is also easily protected from external moisture and the like, and passes through the active layer 122 and the first conductivity-type semiconductor layer 121 of the inactive region RI. Oxidation migration to the active layer 122 of the can be prevented.

The first pad 151 may be made of a conductive material. For example, the first pad 151 may include at least one of Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Sn, In, Ru, Mg, Zn, Pt, Au, and Hf. However, it is not limited to these materials.

In addition, the second pad 152 may be disposed on the second electrode 132. The upper surface of the first pad 151 and the upper surface of the second pad 152 may be disposed at the same position from the lower surface of the semiconductor device 10. However, it is not limited to this structure. That is, the thicknesses of the first pad 151 and the second pad 152 may be adjusted. For example, by minimizing the height difference between the top surface of the first pad 151 and the top surface of the second pad 152, the occurrence of voids is reduced when the first pad 151 and the second pad 152 are bonded. You can.

In particular, at least a portion of the second pad 152 may overlap the recess 128 in the first direction. By this configuration, the second pad 152 can easily protect the active layer 122 of the active region RA from external moisture or the like at the time of peeling. In addition, since the second pad 152 is disposed to extend to the recess 128, heat dissipation through the second pad is easy, and thus a peeling phenomenon due to heat may be easily prevented. This will be described in detail with reference to FIGS. 3A and 3B.

In addition, the second pad 152 may be partially disposed on the first insulating layer 140. The second pad 152 may be made of a conductive material like the first pad 151. For example, the second pad 152 may include at least one of Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Sn, In, Ru, Mg, Zn, Pt, Au, and Hf. However, it is not limited to these materials.

The second insulating layer 160 may be disposed on the light emitting structure 120, the first insulating layer 140, the first pad 151, and the second pad 152. By such a configuration, the second insulating layer 160 may protect the semiconductor device 10 from the outside.

In detail, the second insulating layer 160 may be disposed to partially expose the first pad 151. Accordingly, the second insulating layer 160 may be partially disposed on the first pad 151 to partially expose the first pad 151. As a result, the exposed first pad 151 may be electrically connected to the outside.

In addition, the second insulating layer 160 may be partially disposed on the second pad 152 so that the second pad 152 is partially exposed. For example, the second insulating layer 160 may include a first through hole h1. The first through hole h1 may be disposed on the second pad 152 to expose a portion of the upper surface of the second pad 152. The exposed second pad 152 may be electrically connected to the outside.

In addition, a portion of the second insulating layer 160 may overlap the recess 128 in the first direction. By such a configuration, the recess 128 is protected by the first insulating layer 140, the second pad 152, and the second insulating layer 160, so that the semiconductor device according to the embodiment is resistant to peeling and moisture. The oxidation can be prevented from lowering the light output.

In addition, the second insulating layer 160 may be made of a transparent and insulating material. For example, the second insulating layer 160 may include at least one of SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , or TiO ₂ , but is not limited thereto. no.

In addition, the second insulating layer 160 and the first insulating layer 140 may be made of the same material, or may be made of different materials. Since the second pad 152 and the second insulating layer 160 are disposed on the first insulating layer 140, defects formed in the first insulating layer 140 are difficult to propagate to the second insulating layer 160. In the second insulating layer 160, an interface between the first insulating layer 140 and the second insulating layer 160 may serve to shield propagation of defects.

In addition, the first insulating layer 140 and the second insulating layer 141 are melted by heat in the process to form a single layer, or at least in some areas, the first insulating layer 140 and the second insulating layer 141. There may be no interface between). Accordingly, even when observed using transmission electron microscopy (TEM), the interface between the first insulating layer 140 and the second insulating layer 141 may be seen as one layer in at least some regions. In addition, the first insulating layer 140 and the second insulating layer 141 may be formed in a single process.

As the optical and electrical reliability of the semiconductor device decreases or the processing time of the semiconductor device increases, the problem that the cost of the semiconductor device increases.

3A is an enlarged view of a portion K in FIG. 2, and FIG. 3B is an enlarged view of a portion L in FIG. 3A.

Referring to FIG. 3A, the recess 128 includes a bottom surface 128b positioned at the bottom, an inner inclined surface 128a disposed inside the bottom surface 128b, and an outer inclined surface 128c disposed outside the bottom surface 128b. ) May be included.

The bottom surface 128b may be located at the bottom of the edge of the active layer 122 or the second conductive semiconductor layer 123 of the exposed first conductive semiconductor layer 121.

The inner inclined surface 128a may be disposed inside the bottom surface 128b and may extend from the bottom surface 128b to the top surface of the second conductive semiconductor layer 123. For example, the inner inclined surface 128a may extend from the bottom surface 128b to the first upper surface 123a of the upper surface of the second conductive semiconductor layer 123. That is, the inner inclined surface 128a may be disposed along side surfaces of the first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123 positioned inside the bottom surface 128b.

The outer inclined surface 128c may be disposed outside the bottom surface 128b and may extend from the bottom surface 128b to the top surface of the second conductive semiconductor layer 123. For example, the outer inclined surface 128c may extend from the bottom surface 128b to the second upper surface 123b of the upper surface of the second conductive semiconductor layer 123. In addition, the outer inclined surface 128c may be disposed along side surfaces of the first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123 located outside the bottom surface 128b. The outer inclined surface 128c may be disposed symmetrically with the inner inclined surface 128a based on the bottom surface 128b. That is, the outer inclined surface 128c may face the inner inclined surface 128a and may be connected to the bottom surface 128b.

The second pad 152 may be disposed on the recess 128 to at least partially overlap the recess 128 in the first direction. In some embodiments, the second pad 152 may be disposed on the second electrode 132 to extend in the second direction, and may be disposed outside the recess 128. That is, the second pad 152 may be spaced apart from the outermost side of the second upper surface 123b of the second conductive semiconductor layer 123 while having a distance d. For example, one end of the second pad 152 may be disposed between the recess 128 and the recess 127 and the separation distance d may be 3 μm to 7 μm. If the separation distance (d) is less than 3㎛ process is difficult, if the separation distance is 7㎛ or more there is a problem that the resistance is increased and light extraction is reduced.

In this configuration, as the second pad 152 is partially extended to the outside of the recess 128, heat dissipation through the second pad is easy, and thus a peeling problem caused by thermal expansion may be solved. In addition, the second pad 152 may prevent the second pad 152 from being peeled off by heat, thereby easily protecting the active layer 122 of the active region from external moisture.

The maximum width W1 of the recess 128 may be 1.5 μm to 4.5 μm, and the second pad 152 may have a maximum width W5 of 2.5 μm to the second direction from the innermost portion of the recess 128. 7.5 μm. That is, the ratio of the width between the maximum width W1 of the recess 128 and the maximum width W5 of the second pad 152 in the second direction from the maximum side of the recess 128 is 1: 0.5 to 1: 5. Can be. When the ratio of the width is smaller than 1: 0.5, peeling occurs and there is a problem that the improvement of moisture resistance through the second pad is lowered. In addition, there is a problem that the light output is lowered by the second pad when the width ratio is larger than 1: 5.

In addition, as described above, the second pad 152 may be disposed to extend to the various positions above the recess 128. In an embodiment, the second pad 152 may extend to the inner inclined surface 128a of the recess 128. Accordingly, one end of the second pad 152 may be located on the inner inclined surface 128a. In another embodiment, the second pad 152 may extend to the bottom surface 128b of the recess 128 (see FIG. 6). Accordingly, one end of the second pad 152 may be located on the bottom surface 128b. In another embodiment, the second pad 152 may extend beyond the inner inclined surface 128a and the bottom surface 128b to the outer inclined surface 128c. Accordingly, one end of the second pad 152 may be located on the outer inclined surface 128c. In addition, in another embodiment, the second pad 152 may pass through the inner inclined surface 128a, the bottom surface 128b, and the outer inclined surface 128c to form the second conductive semiconductor layer 123 of the inactive region RI. It can extend to the top. Accordingly, one end of the second pad 152 may be located above the second conductive semiconductor layer 123 of the inactive region RI. As described above, the semiconductor device described herein may be implemented in various embodiments as described above corresponding to moisture resistance and resistance of the semiconductor device.

Referring to FIG. 3B, the first electrode 131 may be electrically connected to the first conductive semiconductor layer 121. The first electrode 131 may include a first groove 131a formed on one surface thereof. Unlike general visible light emitting devices, an ultraviolet light emitting device needs to heat-treat an electrode at high temperature for ohmic. For example, the first electrode 131 and / or the second electrode 132 may be heat treated at about 600 ° C. to 900 ° C. In this process, an oxide film OX1 may be formed on the surface of the first electrode 131. Can be. Since the oxide film OX1 may act as a resistive layer, the operating voltage may increase.

The oxide film OX1 may be formed by oxidizing a material constituting the first electrode 131. Therefore, in the process of heat-treating the first electrode 131, components such as concentration and / or mass percent of the material constituting the first electrode 131 are not constant, or components having different surfaces of the first electrode 131. When non-uniform heat is applied, the thickness of the oxide film OX1 may be nonuniformly formed.

Therefore, the first electrode 131 according to the exemplary embodiment may form the first groove 131a on one surface thereof to remove the oxide film OX1. In this process, the protrusion 131b surrounding the first groove 131a may be formed.

The side surface of the first conductivity type semiconductor layer 121, the side surface of the active layer 122, and the second conductivity exposed between the first electrode 131 and the second electrode 132 during the heat treatment of the first electrode 131. Oxidation and / or corrosion may occur in at least some regions of the side surfaces of the type semiconductor layer 123.

However, according to the embodiment, the first insulating layer 140 extends from a portion of the upper surface of the second conductive semiconductor layer 123 so that the side surface of the active layer 122 and a portion of the first conductive semiconductor layer 121 are formed. Can be placed up to. In addition, the first insulating layer 140 may have a side surface of the first conductive semiconductor layer 121, a side surface of the active layer 122, and a second conductive semiconductor layer between the first electrode 131 and the second electrode 132. It may be disposed on the side of the (123).

Accordingly, when the first electrode 131 is heat-treated, the first insulating layer 140 may have a side surface of the first conductive semiconductor layer 121, a side surface of the active layer 122, and a side surface of the second conductive semiconductor layer 123. At least some of the regions can be prevented from corroding.

In addition, the first insulating layer 140 may protect each side of the semiconductor structure 120 exposed by the recess 128 from oxidation.

In addition, when the first electrode 131 is etched as a whole, there may be a problem that the first insulating layer 140 may be etched up adjacently. Therefore, in some embodiments, the edge region may remain to form the protrusion 131b by etching only a portion of the first electrode 131. The upper surface width d3 of the protrusion 131b may be 1 μm to 10 μm. When the width d3 is greater than or equal to 1 μm, the first insulating layer 140 may be prevented from being etched. When the width d3 is less than or equal to 10 μm, the area of the first groove is increased to increase an area from which the oxide film is removed, thereby increasing resistance. Can reduce the surface area.

For example, when the first groove 131a is formed in a portion of the first electrode 131, a photoresist may be disposed and a mask formed of the photoresist may be disposed through an exposure process. The side surface of the mask may have an inclination angle with respect to the bottom surface of the substrate. Accordingly, since a partial region of the protrusion 131b of the first electrode 131 may be etched by adjusting the inclination angle of the mask, the thickness of the oxide film OX1 formed on the protrusion 131b may be unevenly disposed. In some cases, a portion of the oxide film remaining on the protrusion 131b and the side surface of the first electrode 131 may be removed.

The first pad 151 may be disposed on the first electrode 131. In this case, the first pad 151 may include a first uneven portion 151a disposed in the first groove 131a. According to this configuration, the electrical connection between the first pad 151 and the first electrode 131 may be improved, thereby lowering the operating voltage. If there is no first groove 131a in the first electrode 131, the oxide layer may not be removed, and thus the resistance between the first pad 151 and the first electrode 131 may increase.

The first pad 151 may cover the side surface of the first electrode 131. Therefore, since the contact area between the first pad 151 and the first electrode 131 becomes wider, the operating voltage may be lowered. In addition, since the first pad 151 covers the side surface of the first electrode 131, the first electrode 131 may be protected from moisture or other contaminants penetrating from the outside. Therefore, the reliability of the semiconductor device can be improved.

The first pad 151 may include a second uneven portion 151b disposed in the separation area d2 between the first insulating layer 140 and the first electrode 131. The second uneven portion 151b may directly contact the first conductive semiconductor layer 121. Therefore, the current injected into the first conductivity-type semiconductor layer 121 may be more uniformly dispersed. In this case, when the first pad 151 is in direct contact with the first conductivity-type semiconductor layer 121, the resistance between the first pad 151 and the first conductivity-type semiconductor layer 121 may be reduced by the first electrode 131 and the first electrode. It may be greater than the resistance between the one conductive semiconductor layer 121. The width of the spaced area d2 may be about 1 μm to about 10 μm.

The first pad 151 may have a first region d1 extending above the first insulating layer 140. Therefore, the total area of the first pad 151 may be increased to lower the operating voltage.

When the first pad 151 does not extend above the first insulating layer 140, an end of the first insulating layer 140 may be raised to be separated from the first conductive semiconductor layer 121. Accordingly, external moisture and / or other contaminants may enter the gaps. As a result, at least some regions of the side surface of the first conductive semiconductor layer 121, the side surface of the active layer 122, and the side surface of the second conductive semiconductor layer 123 may be corroded or oxidized.

In this case, the ratio d4: d1 of the total area of the fourth region d4 and the total area of the first region d1 may be 1: 0.15 to 1: 1. The total area of the first region d1 may be smaller than the total area of the fourth region d4. The fourth region d4 may be a region in which the first insulating layer 140 is disposed on the first conductive semiconductor layer 121 in a region between the first and second electrodes 131 and 132.

When the ratio d4: d1 of the total area is 1: 0.15 or more, the area of the first region d1 is increased to cover the upper portion of the first insulating layer 140 to prevent lifting. In addition, by being disposed between the first electrode 131 and the second electrode 132, it is possible to prevent the penetration of external moisture or contaminants.

In addition, when the ratio d1: d4 of the total area is 1: 1 or less, an area of the first insulating layer 140 that can sufficiently cover an area between the first electrode 131 and the second electrode 132 may be secured. Can be. Therefore, the semiconductor structure may be prevented from being corroded during the heat treatment of the first electrode 131 and / or the second electrode 132.

According to an embodiment, the second insulating layer 160 is disposed on the first insulating layer 140 in the region between the first electrode 131 and the second electrode 132, so that the first insulating layer 140 is defective. In this case, penetration of external moisture and / or other contaminants can be prevented. FIG. 4 is a cross-sectional view taken along line BB ′ in FIG.

Referring to FIG. 4, as described above, at least a portion of the second pad 152 is disposed in the recess 128, and the second pad 152 and the second insulating layer 160 are disposed on the recess 128. Since this overlaps in the first direction, penetration of moisture or the like into the recess 128 can be easily prevented. In addition, an interface exists between the plurality of layers on the recess 128 to shield the propagation of defects through the interface in stages.

In addition, the second insulating layer 160 may include a second through hole h2 disposed on a portion of the first pad 151. The second through hole h2 may be disposed on the first pad 151 to expose a portion of the upper surface of the first pad 151, and the exposed first pad 151 may open the second through hole h2. It can be electrically connected to the outside.

5 is a plan view of a semiconductor device according to another exemplary embodiment, and FIG. 6 is a cross-sectional view taken along line CC ′ of FIG. 5.

5 and 6, a semiconductor device 10a according to another embodiment may include a substrate, a first conductive semiconductor layer 121, a second conductive semiconductor layer 123, and an active layer 122. A light emitting structure 120 disposed thereon, a first insulating layer 140 partially disposed on the light emitting structure 120, and a first electrode 131 electrically connected to the first conductive semiconductor layer 121; And a second electrode 132 electrically connected to the second conductive semiconductor layer 123, a first pad 151 disposed on the first electrode 131, and a second electrode disposed on the second electrode 132. The second pad 152 and the second insulating layer 160 partially covering the first pad 151 and the second pad 152 are included. In addition, the light emitting structure 120 may include a recess 128 and a recess 127. As described above, the recess 127 and the recess 128 penetrate the second conductive semiconductor layer 123 and the active layer 122 and are disposed to penetrate to a part of the first conductive semiconductor layer 121. Therefore, the first conductivity type semiconductor layer 121 may be exposed in some regions by the recess 127 and the recess 128.

In addition, except for the second pad 152 and the second insulating layer 160, the semiconductor device 10a according to another embodiment may include the substrate 110, the light emitting structure 120, the first insulating layer 140, The first electrode 131, the second electrode 132, and the first pad 151 may have the same contents described above with reference to FIGS. 1 and 2.

In addition, as described above, the recess 128 includes a bottom surface 128b positioned at the bottom, an inner inclined surface 128a disposed inside the bottom surface 128b, and an outer inclined surface 128c disposed outside the bottom surface 128b. ) May be included. The recess 127 may include an inclined surface 127a and a bottom 127b as described above.

The bottom surface 128b may be located at the bottom of the edge of the active layer 122 or the second conductive semiconductor layer 123 of the exposed first conductive semiconductor layer 121. That is, the inner inclined surface 128a may be disposed along side surfaces of the first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123. The outer inclined surface 128c may be disposed outside the bottom surface 128b and may extend from the bottom surface 128b to the top surface of the second conductive semiconductor layer 123. In addition, the outer inclined surface 128c may be disposed along side surfaces of the first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123. In addition, the outer inclined surface 128c may be disposed symmetrically with the inner inclined surface 128a based on the bottom surface 128b.

In addition, the second pad 152 may be disposed on the second electrode 132 and extend onto the recess 128. That is, the outer side of the second pad 152 may be located on the recess 128. In addition, the second pad 152 may be spaced apart from the outermost side of the second upper surface 123b of the second conductive semiconductor layer 123 to have a distance d ′. By such a configuration, the second pad 152 is not only able to easily protect the active layer 122 in the active region from external moisture by heat, but also by the heat release through the second pad. Peeling phenomenon can be prevented.

7 is a modification of FIG. 1.

Referring to FIG. 7, a semiconductor device 10b according to a modification may include a first bump 171, a plurality of second bumps 172, a first metal pad 181, a second metal pad 182, and a mounting substrate. 190 further includes.

The bump may include a first bump 171 and a plurality of second bumps 172. The first bump 171 may be disposed on the first pad 151 to be electrically connected to the first pad 151. In particular, the first bump 171 may be disposed on the above-described second through hole.

The second bump 172 may be disposed on the second pad 152 to be electrically connected to the second pad 152. In addition, the second bump 172 may be disposed on the above-described first through hole, and a plurality of second bumps 172 may be provided. However, it is not limited to this number.

Similarly, the number of the first bumps 171 may be one as shown, but the embodiment does not limit the number of the first bumps 171.

In addition, the plurality of second bumps 172 may include 2-1 bumps (not shown) and 2-2 bumps (not shown) that are electrically and spaced apart from each other.

An electrode layer may be disposed between the light emitting structure 120 and the plurality of bumps. That is, the electrode layer may include a spread layer, but is not limited to this configuration.

In addition, the first metal pad 181 and the second metal pad 182 may be each made of a metal material having electrical conductivity.

In addition, the mounting substrate 190 may be disposed under the first metal pad 171 and the second metal pad 172 to support the first metal pad 171 and the second metal pad 172. The mounting substrate 190 may be disposed to face the substrate 110. That is, the mounting substrate 190 may be disposed below the substrate 110. In addition, the mounting substrate 190 may be formed of, for example, a semiconductor substrate such as AlN, BN, silicon carbide (SiC), GaN, GaAs, Si, and the like, but is not limited thereto, and may be formed of a semiconductor material or an insulating material having excellent thermal conductivity. It may be. In addition, the mounting substrate 190 may include an element for preventing electrostatic discharge (ESD) in the form of a zener diode.

8 is a conceptual diagram of a semiconductor device package according to an embodiment.

Referring to FIG. 8, a semiconductor device package 200 according to an embodiment may be installed on a body 205, a first electrode layer 211 and a second electrode layer 212 provided on a body 205, and a body 205. And a semiconductor element 10 electrically connected to the first electrode layer 211 and the second electrode layer 212, and a molding member 220 including a phosphor (not shown) to surround the semiconductor element 10. It may include.

The first electrode layer 211 and the second electrode layer 212 are electrically separated from each other, and serve to provide power to the semiconductor device 10. In addition, the first electrode layer 211 and the second electrode layer 212 may serve to increase light efficiency by reflecting light generated from the semiconductor device 10, and may be generated in the semiconductor device 10. It may also serve to release heat to the outside.

The semiconductor device 10 exemplifies a semiconductor device according to an embodiment, but is not limited thereto. The semiconductor device 10 may also be applied to the semiconductor device according to another embodiment.

The light emitting device according to the embodiment may be applied to a backlight unit, a lighting unit, a display device, an indicator device, a lamp, a street light, a vehicle lighting device, a vehicle display device, a smart watch, but is not limited thereto.

9A to 9H illustrate a method of manufacturing a semiconductor device according to example embodiments.

Referring to FIG. 9A, the light emitting structure 120 may be disposed on the substrate 110 and the substrate 110. The substrate 110 may include a light transmissive material. For example, the substrate 110 may include any one of sapphire (Al 2 O 3), SiC, Si, GaN, ZnO, GaP, InP, Ge, and Ga203. However, it is not limited to such a material.

The light emitting structure 120 is disposed on the first conductive semiconductor layer 121 disposed on the substrate 110, the active layer 122 disposed on the first conductive semiconductor layer 121, and the active layer 122. The second conductive semiconductor layer 123 may be included. That is, the first conductivity type semiconductor layer 121, the active layer 122, and the second conductivity type semiconductor layer 123 may be sequentially stacked on the substrate 110.

The light emitting structure 120 may include metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam growth (Molecular Beam). Epitaxy (MBE), hydride vapor phase epitaxy (HVPE), sputtering and the like.

Referring to FIG. 9B, the light emitting structure 120 may include a recess 127 by mesa etching. Accordingly, the inclined surface 127a of the light emitting structure 120 may be inclined with the top surface of the second conductive semiconductor layer 123 by etching. The etching may be performed by wet etching or dry etching, but is not limited thereto. In addition, the first conductive semiconductor layer 121 may be exposed by the etching. In addition, the bottom surface 127b may extend from the inclined surface 127a and may be a bottom surface on which the first conductive semiconductor layer 121 is exposed. In addition, the etching may be performed such that the inclined surface 127a and the bottom surface 127b are positioned at the edge of the light emitting structure 120.

Referring to FIG. 9C, a recess 128 may be disposed in the light emitting structure 120. The recess 128 may be formed by mesa etching. In addition, wet etching or dry etching may be performed, but is not limited thereto. The recess 128, the inclined surface 127a and the bottom surface 127b may be formed in the same process, but is not limited thereto.

In this way, the first conductivity type semiconductor layer 129 may be exposed. In addition, the recess 128 may be formed to extend adjacent to the edge of the light emitting structure 120 after the aforementioned mesa etching is performed.

9D and 9E, the first insulating layer 140 may be disposed on the light emitting structure 120. After the first insulating layer 140 is disposed, an area in which the first electrode 131 and the second electrode 132, which will be described later, are disposed may be exposed through etching. In addition, the first electrode 131 and the second electrode 132 may be formed.

That is, the first electrode 131 may be disposed on the first conductive semiconductor layer 121 exposed by etching, so that the first electrode 131 may be electrically connected to the first conductive semiconductor layer 121. . The first electrode 131 may be formed by an E-beam evaporator, a thermal evaporator, a metal organic chemical vapor deposition (MOCVD), a sputtering, and a pulsed laser deposition (PLD) method. However, the present invention is not limited thereto.

The second electrode 132 may be disposed on the second conductive semiconductor layer 132 and electrically connected to the second conductive semiconductor layer 132. The second electrode 132 is likewise formed by an E-beam evaporator, a thermal evaporator, a metal organic chemical vapor deposition (MOCVD), a sputtering and a pulsed laser deposition (PLD) method. But it is not limited thereto. However, the forming order of the first insulating layer 140, the first electrode 131, and the second electrode 132 may be changed. In addition, the first electrode 131 and the second electrode 132 may be formed by the same process, but the present invention is not limited thereto and the arrangement order may be variously changed.

Referring to FIG. 9F, the first pad 151 may be disposed on the first electrode 131. A portion of the first pad 151 may be disposed on the first insulating layer 140. The first pad 151 may be electrically connected to the first electrode 131 to form an electrical path with the first electrode 131 and the first conductive semiconductor layer 121.

In addition, the second electrode 132 may be disposed on the second electrode 132 to cover the second electrode 132 such that the second pad 152 is at least partially disposed in the recess 128. In addition, it may be disposed on a portion of the first insulating layer 140. In addition, the second pad 152 may be electrically connected to the second electrode 132 to form an electrical path with the second electrode 132 and the second conductive semiconductor layer 123.

Referring to FIG. 9G, the second insulating layer 160 may be disposed on the first insulating layer 140, the first pad 151, and the second pad 152. In particular, the second through hole h2 may be formed by etching so that the connection electrode 135 of the second insulating layer 160 is partially exposed. In addition, the second insulating layer 160 may be disposed on a portion of the first pad 151 and the second pad 152 so that the first pad 151 and the second pad 152 may be partially exposed. . The first and second bumps and the mounting substrate may be additionally disposed on the exposed portion as described with reference to FIG. 7. In addition, after the first pad 151 and the second pad 152 are disposed, a dicing process may be performed to manufacture a plurality of semiconductor devices.

The semiconductor device may be used as a light source of an illumination system, or may be used as a light source of an image display device or a light source of an illumination device. That is, the semiconductor element may be applied to various electronic devices disposed in a case and providing light. For example, when the semiconductor device and the RGB phosphor are mixed and used, white light having excellent color rendering (CRI) may be realized.

The above-described semiconductor device may be configured as a light emitting device package and used as a light source of an illumination system. For example, the semiconductor device may be used as a light source of an image display device or a light source of an illumination device.

When used as a backlight unit of an image display device, it can be used as an edge type backlight unit or a direct type backlight unit, when used as a light source of a lighting device can be used as a luminaire or bulb type, and also used as a light source of a mobile terminal. It may be.

The light emitting element includes a laser diode in addition to the light emitting diode described above.

Like the light emitting device, the laser diode may include the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer having the above-described structure. In addition, although the p-type first conductive semiconductor and the n-type second conductive semiconductor are bonded to each other, an electro-luminescence phenomenon in which light is emitted when an electric current flows is used, but the direction of emitted light is used. There is a difference in and phase. That is, a laser diode may emit light having a specific wavelength (monochromatic beam) in the same direction by using a phenomenon called excited emission and a constructive interference phenomenon. Therefore, it can be used for optical communication, medical equipment and semiconductor processing equipment.

For example, a photodetector may be a photodetector, which is a type of transducer that detects light and converts its intensity into an electrical signal. Such photodetectors include photovoltaic cells (silicon, selenium), photoelectric devices (cadmium sulfide, cadmium selenide), photodiodes (eg PDs with peak wavelengths in visible blind or true blind spectral regions) Transistors, optoelectronic multipliers, phototubes (vacuum, gas encapsulation), infrared (Infra-Red) detectors, and the like, but embodiments are not limited thereto.

In addition, a semiconductor device such as a photodetector may generally be manufactured using a direct bandgap semiconductor having excellent light conversion efficiency. Alternatively, the photodetector has various structures, and the most common structures include a pin photodetector using a pn junction, a Schottky photodetector using a Schottky junction, a metal semiconductor metal (MSM) photodetector, and the like. have.

Like a light emitting device, a photodiode may include a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer having the above-described structure, and have a pn junction or pin structure. The photodiode operates by applying a reverse bias or zero bias. When light is incident on the photodiode, electrons and holes are generated and current flows. In this case, the magnitude of the current may be approximately proportional to the intensity of light incident on the photodiode.

Photovoltaic cells or solar cells are a type of photodiodes that can convert light into electrical current. The solar cell may include the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer having the above-described structure, similarly to the light emitting device.

In addition, through the rectification characteristics of a general diode using a p-n junction it can be used as a rectifier of an electronic circuit, it can be applied to an ultra-high frequency circuit and an oscillation circuit.

In addition, the semiconductor device described above is not necessarily implemented as a semiconductor and may further include a metal material in some cases. For example, a semiconductor device such as a light receiving device may be implemented using at least one of Ag, Al, Au, In, Ga, N, Zn, Se, P, or As, and may be implemented by a p-type or n-type dopant. It may be implemented using a doped semiconductor material or an intrinsic semiconductor material.

Claims (11)

Board;
A first conductive semiconductor layer disposed on the substrate, a second conductive semiconductor layer, and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer; A light emitting structure including a semiconductor layer and a recess penetrating through the active layer;
A first electrode disposed on the light emitting structure and electrically connected to the first conductivity type semiconductor layer;
A second electrode disposed on the light emitting structure and electrically connected to the second conductive semiconductor layer;
A first pad disposed on the first electrode; And
A second pad disposed on the second electrode;
The recess separates the second conductivity type semiconductor layer and the active layer into an active region and an inactive region,
The recess extends to surround the active region,
The second pad extends over the recess on the second electrode.
The method of claim 1,
The recess is,
Bottom surface;
An inner inclined surface connected to the bottom surface and adjacent to the active area; And
And an outer inclined surface connected to the bottom surface and facing the inner inclined surface.
One end of the second pad extends on the inner inclined surface of the recess.
The method of claim 2,
One end of the second pad extends on the bottom surface of the recess and the outer inclined surface of the recess.
The method of claim 3,
The second pad extends onto the second conductivity-type semiconductor layer on the inactive region,
One end of the second pad is disposed between the recess and the outermost side of the second conductive semiconductor layer.
The method of claim 1,
The light emitting structure includes a recess in which the first conductivity type semiconductor layer is exposed,
And the recess is disposed to extend outside the inactive region.
The method of claim 1,
And a ratio of the maximum width and the width in the horizontal direction of the recess in the horizontal direction of the second conductive type semiconductor layer on the inactive region is 1: 0.5 to 1: 5.
The method of claim 1,
A first bump disposed on the first pad; And
And a second bump disposed on the second pad and spaced apart from the first bump.
The method of claim 5,
The first electrode is disposed on the first conductivity type semiconductor layer on the recess,
The second electrode is disposed on the second conductive semiconductor layer on the active region.
The method according to any one of claims 5 or 8,
Further comprising a first insulating layer disposed on the light emitting structure,
The first insulating layer covers the second conductive semiconductor layer and the active layer, which extend from the second conductive semiconductor layer on the active region to the first conductive semiconductor layer on the recess and the concave portion. And disposed semiconductor device.
The method of claim 9,
The first insulating layer extends to the first electrode.
The method of claim 1,
The inactive region is disposed to surround the recess,
The active region is electrically connected to the second electrode,
And the inactive region is electrically separated from the second electrode.

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