KR20250028738A - Micro light emitting device - Google Patents

Abstract

The embodiment discloses a micro light-emitting device including a first conductive semiconductor layer; an active layer disposed on the first conductive semiconductor layer; and a second conductive semiconductor layer disposed on the active layer, wherein the active layer includes a plurality of barrier layers and well layers, and the well layer includes a first alignment region in which an energy bandgap is smaller than an average energy bandgap of the well layer.

Description

MICRO LIGHT EMITTING DEVICE

The embodiment relates to a micro light-emitting device.

Light-emitting diodes (LEDs) are one of the light-emitting elements that emit light when current is applied. Light-emitting diodes can emit high-efficiency light at low voltages, so they have excellent energy-saving effects. Recently, the brightness problem of light-emitting diodes has been greatly improved, and they are being applied to various devices such as backlight units of display devices, electronic boards, indicators, and home appliances.

Light-emitting devices containing compounds such as AlGaInP, AlGaN, AlGaInN, AlGaAs, AlInGaAs, and InGaAsP have many advantages such as having easily tunable band gap energy, and can be used in various ways such as light-emitting devices, light-receiving devices, and various diodes.

In particular, light-emitting devices such as light-emitting diodes (LEDs) or laser diodes using semiconductor materials of groups III-V or II-VI can implement various colors such as near-infrared, red, green, blue, and ultraviolet through the development of thin film growth technology and device materials, and blue and ultraviolet light can also implement efficient white light by using fluorescent substances or combining colors, and have the advantages of low power consumption, semi-permanent lifespan, fast response speed, safety, and environmental friendliness compared to existing light sources such as fluorescent lamps and incandescent lamps.

Recently, research is being conducted on technology to manufacture light-emitting diodes that emit visible light in micro sizes and use them as pixels in high-resolution displays.

Micro light-emitting devices developed to date have difficulty in commercialization due to the problem of reduced light-emitting efficiency caused by leakage current from the side, and much effort is being put into developing technology to overcome this problem.

The embodiment can provide a micro light-emitting device with improved light-emitting efficiency.

The problem to be solved in the embodiment is not limited to this, and it can be said that the purpose or effect that can be understood from the solution or embodiment of the problem described below is also included.

A micro light-emitting device according to one feature of the present invention comprises: a first conductive semiconductor layer; an active layer disposed on the first conductive semiconductor layer; and a second conductive semiconductor layer disposed on the active layer, wherein the active layer comprises a plurality of barrier layers and well layers.

The above well layer includes a first aligned region in which an energy band gap is smaller than an average energy band gap of the well layer.

The first conductive semiconductor layer may include a second alignment region in which an energy band gap is smaller than an average energy band gap of the first conductive semiconductor layer, and the second conductive semiconductor layer may include a third alignment region in which an energy band gap is smaller than an average energy band gap of the second conductive semiconductor layer.

The ratio of the first alignment region formed in the total area of the well layer may be higher than the ratio of the second alignment region formed in the total area of the first conductive semiconductor layer.

The ratio of the first alignment region formed in the total area of the well layer may be higher than the ratio of the third alignment region formed in the total area of the second conductive semiconductor layer.

The above well layer contains AlGaInP and can emit light in the red wavelength range.

In the above first alignment region, AlGa and In can be alternately arranged in the [111] direction.

The area where the first alignment region is formed may be 20% or more of the total area of 100% of the above well layer.

The area where the second alignment region is formed may be less than 20% of the total area of 100% of the first challenge type semiconductor layer.

The above active layer can be grown at a temperature lower than the growth temperatures of the first conductive semiconductor layer and the second conductive semiconductor layer.

According to an embodiment, the efficiency of the micro light-emitting device can be improved. In addition, the light extraction efficiency can be improved.

The various advantageous and beneficial effects of the present invention are not limited to the above-described contents, and will be more easily understood in the course of explaining specific embodiments of the present invention.

FIG. 1 is a cross-sectional view of a micro light-emitting device according to one embodiment of the present invention.
Figure 2 is a graph showing changes in luminous efficiency according to changes in the size of micro light-emitting elements.
Figure 3 shows simulation results showing the lateral current density and effective current density during current injection.
Figure 4 is a simulation result showing the change in lateral leakage current according to the change in the size of the micro light-emitting device.
Figure 5 is a diagram showing the flow of carriers when current is injected into a typical micro light-emitting device.
FIG. 6 is a drawing showing the flow of carriers when current is injected into a micro light-emitting device according to one embodiment of the present invention.
FIG. 7 is a drawing showing an energy band diagram of a micro light-emitting device according to one embodiment of the present invention.
Figure 8 is a diagram for explaining the ordering phenomenon in an InGaP semiconductor.
Figure 9 is a diagram showing the process in which injected carriers participate in luminescence in the alignment region of the well layer.
FIG. 10 is a drawing showing an alignment region formed in an active layer of a micro light-emitting device according to one embodiment of the present invention.
FIG. 11 is a drawing of a display device according to one embodiment of the present invention.

The present invention can have various modifications and various embodiments, and specific embodiments are illustrated and described in the drawings. However, this is not intended to limit the present invention to specific embodiments, but should be understood to include all modifications, equivalents, or substitutes included in the spirit and technical scope of the present invention.

Terms including ordinal numbers such as second, first, etc. may be used to describe various components, but the components are not limited by the terms. The terms are only used to distinguish one component from another. For example, without departing from the scope of the present invention, the second component may be referred to as the first component, and similarly, the first component may also be referred to as the second component. The term and/or includes any combination of a plurality of related described items or any item among a plurality of related described items.

When it is said that a component is "connected" or "connected" to another component, it should be understood that it may be directly connected or connected to that other component, but that there may be other components in between. On the other hand, when it is said that a component is "directly connected" or "directly connected" to another component, it should be understood that there are no other components in between.

The terminology used in this application is only used to describe specific embodiments and is not intended to limit the present invention. The singular expression includes the plural expression unless the context clearly indicates otherwise. In this application, it should be understood that the terms "comprises" or "has" and the like are intended to specify the presence of a feature, number, step, operation, component, part or combination thereof described in the specification, but do not exclude in advance the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts or combinations thereof.

Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms defined in commonly used dictionaries, such as those defined in common usage, should be interpreted as having a meaning consistent with the meaning they have in the context of the relevant art, and will not be interpreted in an idealized or overly formal sense unless expressly defined in this application.

Hereinafter, embodiments will be described in detail with reference to the attached drawings. Regardless of the drawing symbols, identical or corresponding components are given the same reference numerals and redundant descriptions thereof will be omitted.

In addition, the micro light-emitting device according to the present embodiment may be a light-emitting device having a micro size or a nano size. The micro light-emitting device may have a side size of 1 ㎛ to 100 ㎛, but is not necessarily limited thereto.

FIG. 1 is a cross-sectional view of a micro light-emitting device according to one embodiment of the present invention.

Referring to FIG. 1, a micro light-emitting device according to an embodiment may include a light-emitting structure (CS1) and electrodes (71, 72). The light-emitting structure may include a first conductive semiconductor layer (30), an active layer (40), and a second conductive semiconductor layer (60).

The light-emitting structure may have a structure in which a first conductive semiconductor layer (30), an active layer (40), and a second conductive semiconductor layer (60) are sequentially laminated. In addition, a substrate (10) and a buffer layer (20) may be formed at the bottom of the light-emitting structure.

The substrate (10) may be formed of a material suitable for semiconductor material growth or a carrier wafer, may be formed of a material having excellent thermal conductivity, and may include a conductive substrate or an insulating substrate. For example, at least one of sapphire (Al ₂ O ₃ ), SiO ₂ , SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, and Ga ₂ 0 ₃ may be used.

The buffer layer (20) may be arranged between the substrate (10) and the light-emitting structure (ES1). When the light-emitting structure (ES1) is arranged on the substrate (10), dislocations, melt-back, cracks, pits, and surface morphology defects that deteriorate crystallinity may be prevented. The buffer layer (20) may be at least one of InP, InGaAsP, InGaAs, AlInGaAs, GaAs, AlGaAs, GaAsSb, AlGaAsSb, GaAsP, AlGaAsP, GaInP, AlGaInP, InAlGaAsP, InGaAsSb, GaN, AlN, AlGaN, and AlGaInN.

The light-emitting structure (ES1) can be formed using a method such as Metal Organic Chemical Vapor Deposition (MOCVD), Chemical Vapor Deposition (CVD), Plasma-Enhanced Chemical Vapor Deposition (PECVD), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), or sputtering.

The first conductive semiconductor layer (30) can be implemented with a compound semiconductor of group III-V, group II-VI, etc., and a first dopant can be doped into the first conductive semiconductor layer (30). The first conductive semiconductor layer (30) can be a semiconductor material having a composition formula of A _x B _y C _(1-xy) D _z E _(1-z) (0≤x≤1, 0≤y≤1, 0≤x+y≤1, 0≤z≤1). Here, A, B, and C can be one of Al, Ga, and In, and D and E can be one of As, P, N, and Sb.

For example, the first conductive semiconductor layer (30) may be formed of one or more of InP, InGaAsP, InGaAs, AlInGaAs, GaAs, AlGaAs, GaAsSb,AlGaAsSb, GaAsP, AlGaAsP, GaInP, AlGaInP, InAlGaAsP, InGaAsSb, GaN, AlN, AlGaN, AlGaInN, but is not limited thereto. When the first dopant is an n-type dopant such as Si, Ge, Sn, Se, Te, or the like, the first conductive semiconductor layer (30) may be an n-type semiconductor layer. In addition, an alignment region (not shown) in which the energy band gap is locally reduced may be formed in the first conductive semiconductor layer (30).

The active layer (40) is a layer where electrons (or holes) injected through the first conductive semiconductor layer (30) and holes (or electrons) injected through the second conductive semiconductor layer (60) meet. The active layer (40) transitions to a lower energy level as electrons and holes recombine, and can generate light having a corresponding wavelength.

The active layer (40) may have any one of a single well structure, a multi-well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, or a quantum wire structure, and the structure of the active layer (40) is not limited thereto. For example, the active layer (40) may have a structure in which well layers (42) and barrier layers (41) are alternately arranged.

The active layer (40) can generate light in the visible wavelength range. For example, the active layer (40) can output light in any one of the wavelengths of blue, green, and red. However, it is not necessarily limited thereto, and the active layer (40) can also generate light in the ultraviolet wavelength range or light in the infrared wavelength range.

The active layer (40) may be formed of one or more of InP, InGaAsP, InGaAs, AlInGaAs, GaAs, AlGaAs, GaAsSb, AlGaAsSb, GaAsP, AlGaAsP, GaInP, AlGaInP, InAlGaAsP, InGaAsSb, GaN, AlN, AlGaN, AlGaInN, but is not limited thereto. In addition, an alignment region (not shown) in which the energy band gap is locally reduced may be formed in the active layer (40).

The second conductive semiconductor layer (60) may be disposed on the active layer (40). The second conductive semiconductor layer (60) may be implemented with a compound semiconductor of group III-V, group II-VI, etc., and a second dopant may be doped into the second conductive semiconductor layer (60). The second conductive semiconductor layer (60) may be formed of a semiconductor material having a composition formula of A _x B _y C _(1-xy) D _z E _(1-z) (0≤x≤1, 0≤y≤1, 0≤x+y≤1, 0≤z≤1). Here, A, B, and C may be one of Al, Ga, and In, and D and E may be one of As, P, N, and Sb.

For example, the second conductive semiconductor layer (60) may be formed of one or more of InP, InGaAsP, InGaAs, AlInGaAs, GaAs, AlGaAs, GaAsSb,AlGaAsSb, GaAsP, AlGaAsP, GaInP, AlGaInP, InAlGaAsP, InGaAsSb, GaN, AlN, AlGaN, AlGaInN. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, Ba, or the like, the second conductive semiconductor layer (60) doped with the second dopant may be a p-type semiconductor layer. An alignment region (not shown) in which the energy band gap is locally reduced may be formed in the second conductive semiconductor layer (60).

The first electrode (71) can be electrically connected to the first conductive semiconductor layer (30). The first electrode (71) is illustrated as being placed on the lower portion of the substrate, but is not necessarily limited thereto, and the first electrode (71) may be placed on the first conductive semiconductor layer (30) exposed by etching.

The second electrode (72) is disposed on the second conductive semiconductor layer (60) and can be electrically connected to the second conductive semiconductor layer (60).

The first electrode (71) and the second electrode (72) can be formed by including at least one of ITO (indium tin oxide), IZO (indium zinc oxide), IZTO (indium zinc tin oxide), IAZO (indium aluminum zinc oxide), IGZO (indium gallium zinc oxide), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON (IZO Nitride), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx/ITO, Ni/IrOx/Au, Ni/AuGe/Au, Ti/Pt/Au AuBe/Au, Cr/Au, and Al/Au, but are not limited to these materials. For example, the first electrode (71) and the second electrode (72) may be Ni/AuGe/Au, Ti/Pt/Au, but are not limited thereto.

Fig. 2 is a graph showing changes in luminous efficiency according to changes in the size of a micro light-emitting device, Fig. 3 is a simulation result showing lateral current density and effective current density when current is injected, and Fig. 4 is a simulation result showing changes in lateral leakage current according to changes in the size of a micro light-emitting device.

Referring to Fig. 2, in the case of a micro light-emitting device with a side length of 262 μm, the luminous efficiency is approximately 5% when the injected current density is 50 A/cm ² or higher, whereas in the case of a micro light-emitting device with a side length of 32 μm, the luminous efficiency is approximately 2% even when the injected current density increases. In other words, it can be seen that the luminous efficiency decreases as the size of the micro light-emitting device decreases.

The simulation results of Figs. 3 and 4 are simulation results based on the semiconductor stack structure summarized in [Table 1]. This semiconductor stack structure can be a red light-emitting element, but blue light-emitting elements and green light-emitting elements can also have the same results.

Layer ID substance Thickness (㎛) Number of repetitions p-contact layer p-GaAs 0.02 1 p-cladding layer p-AlGaAs 1~10 1 10 MQW i-GaAs/i-InGaAs/i-GaAs 0.015/0.008/0.015 10/10/10 n-cladding layer n-AlGaAs 1~10 1 n-buffer n-GaAs 0.3 1 n-substrate n-GaAs 100~500 1

Referring to Fig. 3, when current is injected into a micro light-emitting element having a side length of 30 μm, it can be seen that there is a current leaking to the side of the micro light-emitting element (hereinafter referred to as a side leakage current) and a current injected into the interior of the micro light-emitting element and participating in light emission (hereinafter referred to as an effective injection current). The sum of the side leakage current and the effective injection current may be the total amount of current applied to the micro light-emitting element.

The lateral leakage current may be a current in which the applied current is not injected into the interior of the micro light-emitting device but flows along the side of the micro light-emitting device and thus does not participate in light emission. Accordingly, since a significant portion of the applied current leaks out, the light emission efficiency may decrease as the size of the micro light-emitting device decreases.

Referring to Fig. 4, it can be seen that as the size of the micro light-emitting device decreases, the ratio of the lateral leakage current among the applied current increases. When the size of the micro light-emitting device is 200 μm, the ratio of the lateral leakage current is only about 10%, but when the size of the micro light-emitting device is 100 μm, the ratio of the lateral leakage current increases by nearly two times to about 20%.

Furthermore, when the size of the micro light-emitting device is 50 μm, the ratio of the lateral leakage current increases to approximately 35%, and when the size of the micro light-emitting device is 20 μm, the ratio of the lateral leakage current increases rapidly to approximately 85%.

In order to increase the resolution of the display device, the size of the micro light-emitting element needs to be reduced. In order to use the micro light-emitting element as a pixel light source of a high-resolution display, it may be advantageous to manufacture the micro light-emitting element with a size of 50㎛ or less. Therefore, it is very important to prevent the luminous efficiency from decreasing as the size of the micro light-emitting element decreases.

In the embodiment, as described above, the light emitting efficiency of the micro light emitting device can be effectively improved by forming an optical layer inside the micro light emitting device to reduce the lateral leakage current.

FIG. 5 is a drawing showing the flow of carriers when current is injected into a general micro light-emitting device, and FIG. 6 is a drawing showing the flow of carriers when current is injected into a micro light-emitting device according to one embodiment of the present invention.

Referring to FIG. 5, the injected carriers can be distributed into a radiative recombination (RR) region and a non-radiative recombination (NRR) region. In the micro light-emitting device, when voltage is applied, some of the carriers (electrons or holes) may move along the side of the light-emitting device to the non-radiative recombination region (NRR), thereby not participating in light emission. As the size of the light-emitting device decreases, the density of carriers moving along the side may increase. Therefore, as the size of the light-emitting device decreases, there is a problem that the side leakage current increases and the light emission efficiency decreases.

In contrast, referring to FIG. 6, it can be seen that in the micro light-emitting device according to the embodiment, the phenomenon in which carriers (electrons or holes) move along the side of the light-emitting device when voltage is applied is reduced. Therefore, according to the embodiment, most of the carriers participate in light emission in the effective light-emitting region (RR), so that the light emission efficiency can be improved.

FIG. 7 is a diagram showing an energy band diagram of a quantum well structure active layer of a micro light-emitting device according to an embodiment of the present invention. FIG. 8 is a diagram for explaining an ordering phenomenon in an InGaP semiconductor. FIG. 9 is a diagram showing a process in which injected carriers participate in light emission in an alignment region of a well layer. FIG. 10 is a diagram showing an alignment region formed in an active layer of a micro light-emitting device according to an embodiment of the present invention.

Referring to FIG. 7, the active layer (40) is composed of a plurality of barrier layers (41) and well layers (42), and the well layers (42) may include a first alignment region (ORA11) whose energy band gap is smaller than the average energy band gap of the well layers (42). The barrier layer (41) may also include an alignment region (ORA12) whose energy band gap is smaller than the average energy band gap of the barrier layer (41). Accordingly, the alignment region (ORA1) may be formed in the entire area of the active layer.

In general, the energy band gap is maintained constant in the thickness direction of the light-emitting structure in the barrier layer and well layer, but the active layer (40) according to the embodiment includes a section in which the energy band gap is reduced by forming a plurality of aligned regions (ORA11, ORA12).

The alignment region can be defined as a region in which the energy band gap is 10% or more smaller than the average energy band gap of the corresponding layer. For example, the first alignment region (ORA11) can be a region in which the energy band gap is 10% or more smaller than the average energy band gap of the well layer (42), and the second alignment region (ORA2) can be a region in which the energy band gap is 10% or more smaller than the average energy band gap of the first conductive semiconductor layer.

The area where the first alignment region (ORA11) is formed among 100% of the total area of the well layer (42) may be 20% to 50%. The area must be formed at 20% or more so that a region with a low energy level is sufficiently formed to allow carriers attempting to move laterally to participate in light emission. In addition, if the area exceeds 50%, the light emission wavelength becomes too long, making it difficult to control the wavelength only by reducing the quantum well thickness, and there is a problem that the properties of the thin film deteriorate.

The first conductive semiconductor layer (30) may include a second alignment region (ORA2) whose energy band gap is smaller than the average energy band gap of the first conductive semiconductor layer (30), and the second conductive semiconductor layer (60) may include a third alignment region (ORA3) whose energy band gap is smaller than the average energy band gap of the second conductive semiconductor layer (60).

The area where the second alignment region (ORA2) is formed among the total area of 100% of the first challenge-type semiconductor layer (30) may be less than 20%. In general, the operating temperature environment of the light-emitting elements applied to the display device may increase to 50°C to 60°C. Accordingly, the efficiency of the micro light-emitting element should be maintained even at 50 to 60°C. If the area of the second alignment region (ORA2) is 20% or more, carriers may be trapped in a large portion of the clad layer, increasing carrier loss and reducing carrier injection efficiency, which may reduce light efficiency. In addition, there is a problem that the average energy band gap may be reduced, which may lower the light efficiency of the micro light-emitting element at high temperatures.

The area where the third alignment region (ORA3) is formed among the total area of 100% of the second challenge type semiconductor layer (60) may also be less than 20% for the same reason as above.

Accordingly, in the embodiment, the ratio of the first alignment region (ORA11) formed in the entire area of the well layer (42) is higher than the ratio of the second alignment region (ORA2) formed in the entire area of the first conductive semiconductor layer (30). According to this configuration, the region where the energy band gap is reduced in the well layer (42) increases, thereby increasing the probability that carriers participate in light emission.

Referring to Fig. 8, an alignment region in which atoms are automatically expressed in a specific direction due to an ordering phenomenon can be formed in a well layer (42) composed of AlGaInP in which AlGa and In are uniformly and alternately arranged in the [111] direction. In an unaligned GaAs region, AlGa and In are not uniformly and alternately arranged in the [111] direction.

In a well layer composed of AlGaInP, when Ga and In are uniformly aligned alternately in the [111] direction, the crystal lattices undergo distortion in the tetragonal direction, which causes renormalization of the original energy band. Therefore, the state aligned by the ordering phenomenon has a relatively low energy band gap. According to an embodiment, the energy band gap can be lowered by intentionally forming an aligned region in the well layer (42).

The method of forming an alignment region can be achieved by lowering the growth temperature during the growth of the active layer (40). For example, when growing an AlGaInP thin film by the MOCVD method, if the growth temperature is maintained low at 610°C to 670°C and the molar flow rate of PH3, which is the source of the injected group V element, is maintained to be 50 to 400 times higher than the sum of the molar flows of TMAl, TMGa, and TMIn, which are the sources of the group III elements, the atomic structure can be rearranged to form an alignment region.

That is, when the above temperature conditions and molar flow rate conditions are satisfied, the (AlGa) atoms and In atoms on the (100) surface can automatically be positioned on the AlGa atoms and the In atoms can automatically be positioned on the In atoms in order to minimize the strain energy of the tetrahedron cell in the [111] direction, thereby enabling epitaxial growth. Accordingly, the (AlGa) atoms and In atoms can automatically align in an alternating arrangement in the [111] direction.

The first conductive semiconductor layer (30) and the second conductive semiconductor layer (60) are grown at a higher temperature of about 680°C to 720°C, so that relatively smaller alignment regions can be formed. Since the first conductive semiconductor layer (30) and the second conductive semiconductor layer (60) must have a larger energy band gap than the active layer (40), it is necessary to grow them at a relatively higher temperature.

Referring to FIG. 9, carriers injected through the first conductive semiconductor layer (30) and the second conductive semiconductor layer (60) participate in light emission in the first alignment region (ORA11) having a relatively low band gap before moving to the side of the active layer (40). That is, since most of the injected carriers participate in light emission in the first alignment region (ORA11) before moving to the side and being lost as leakage current, light emission efficiency can be improved.

According to an embodiment, the well layer (42) includes AlGaInP and can emit light in a red wavelength band of about 620 to 630 nm, but is not necessarily limited thereto.

Referring to Fig. 10, the first alignment area (ORA11) may be partially formed within the well layer (42). The first alignment area (ORA11) formed in the well layer (42) may be observed by TEM (Transmission Electron Microscope) photography.

FIG. 11 is a drawing of a display device according to one embodiment of the present invention.

Referring to FIG. 11, a display device including a light-emitting element as an embodiment may include a panel substrate (410), a driving thin film transistor (T2), a planarization layer (430), a common electrode (CE), a pixel electrode (AE), and a micro light-emitting element (10).

The driving thin film transistor (T2) may include a gate electrode (GE), a semiconductor layer (SCL), an ohmic contact layer (OCL), a source electrode (SE), and a drain electrode (DE).

The driving thin film transistor (T2) is a driving element that is electrically connected to the light-emitting element and can drive the light-emitting element.

A gate electrode (GE) may be formed together with a gate line. The gate electrode (GE) may be covered with a gate insulating layer (440).

The gate insulating layer (440) may be composed of a single layer or multiple layers made of an inorganic material, and may be made of silicon oxide (SiOx), silicon nitride (SiNx), or the like.

The semiconductor layer (SCL) may be arranged in a preset pattern (or island) shape on the gate insulating layer (440) so as to overlap with the gate electrode (GE). The semiconductor layer (SCL) may be composed of a semiconductor material made of any one of amorphous silicon, polycrystalline silicon, oxide, and organic material, but is not limited thereto.

The ohmic contact layer (OCL) can be arranged in a preset pattern (or island) shape on the semiconductor layer (SCL). The ohmic contact layer (PCL) can be for ohmic contact between the semiconductor layer (SCL) and the source/drain electrodes (SE, DE).

The source electrode (SE) is formed on the other side of the ohmic contact layer (OCL) so as to overlap with one side of the semiconductor layer (SCL).

The drain electrode (DE) may be formed on the other side of the ohmic contact layer (OCL) so as to overlap with the other side of the semiconductor layer (SCL) and be spaced apart from the source electrode (SE). The drain electrode (DE) may be formed together with the source electrode (SE).

The planarization film may be placed on the second panel substrate (410). A driving thin film transistor (T2) may be placed inside the planarization film. According to an example, the planarization film may include an organic material such as benzocyclobutene or photo acryl, but is not limited thereto.

The groove (450) is a predetermined light-emitting area, in which a light-emitting element can be placed. Here, the light-emitting area can be defined as the remaining area excluding the circuit area in the display device.

The groove (450) may be formed concavely in the flattening layer (430), but is not limited thereto.

The micro light-emitting element (10) can be placed in the groove (450). The first electrode and the second electrode of the micro light-emitting element (10) can be connected to a circuit (not shown) of the display device.

The second electrode of the micro light-emitting element (10) can be electrically connected to the source electrode (SE) of the driving thin film transistor (T2) through the pixel electrode (AE). And the first electrode of the light-emitting element can be connected to a common power line (CL) through the common electrode (CE).

The pixel electrode (AE) can electrically connect the source electrode (SE) of the driving thin film transistor (T2) and the second electrode of the light-emitting element.

A common electrode (CE) can electrically connect a common power line (CL) and the first electrode of the light-emitting element.

The pixel electrode (AE) and the common electrode (CE) may each include a transparent conductive material. The transparent conductive material may include, but is not limited to, a material such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide).

A display device according to an embodiment of the present invention may be implemented with a resolution of SD (Standard Definition) level (760×480), HD (High definition) level (1180×720), FHD (Full HD) level (1920×1080), UH (Ultra HD) level (3480×2160), or a resolution higher than UHD level (e.g., 4K (K=1000), 8K, etc.). In this case, light-emitting elements according to the embodiment may be arranged and connected in multiple numbers according to the resolution.

In addition, the display device may be a billboard or TV with a diagonal size of 100 inches or more, and pixels may be implemented with light-emitting diodes (LEDs). Accordingly, power consumption may be reduced, and a long lifespan may be provided with low maintenance costs, and a high-brightness self-luminous display may be provided.

The light-emitting element according to the embodiment may further include optical members such as a light guide plate, a prism sheet, and a diffusion sheet, and may function as a backlight unit. In addition, the light-emitting element of the embodiment may be further applied to a display device, a lighting device, and an indicator device.

At this time, the display device may include a bottom cover, a reflector, a light-emitting module, a light guide plate, an optical sheet, a display panel, an image signal output circuit, and a color filter. The bottom cover, the reflector, the light-emitting module, the light guide plate, and the optical sheet may form a backlight unit.

A reflector is arranged on the bottom cover, and a light-emitting module emits light. A light guide plate is arranged in front of the reflector to guide light emitted from the light-emitting module forward, and an optical sheet, including a prism sheet or the like, is arranged in front of the light guide plate. A display panel is arranged in front of the optical sheet, an image signal output circuit supplies an image signal to the display panel, and a color filter is arranged in front of the display panel.

And, the lighting device may include a light source module including a substrate and a light-emitting element of the embodiment, a heat dissipation unit that dissipates heat from the light source module, and a power supply unit that processes or converts an electrical signal provided from the outside and provides it to the light source module. Furthermore, the lighting device may include a lamp, a head lamp, or a streetlight.

Additionally, the camera flash of the mobile terminal may include a light source module including a light emitting element of the embodiment.

Although the above has been described with reference to examples, these are merely examples and do not limit the present invention. Those skilled in the art will appreciate that various modifications and applications not exemplified above are possible without departing from the essential characteristics of the present invention. For example, each component specifically shown in the examples can be modified and implemented. In addition, differences related to such modifications and applications should be interpreted as being included in the scope of the present invention defined in the appended claims.

Claims (9)

First challenge type semiconductor layer;
An active layer disposed on the first challenge type semiconductor layer; and
A second conductive semiconductor layer is disposed on the active layer,
The above active layer comprises a plurality of barrier layers and well layers,
A micro light-emitting device, wherein the well layer includes a first alignment region having an energy band gap smaller than an average energy band gap of the well layer.
In the first paragraph,
The first conductive semiconductor layer includes a second aligned region having an energy band gap smaller than an average energy band gap of the first conductive semiconductor layer,
A micro light-emitting device, wherein the second conductive semiconductor layer includes a third alignment region having an energy band gap smaller than an average energy band gap of the second conductive semiconductor layer.
In the second paragraph,
A micro light-emitting device, wherein the ratio of the first alignment region formed in the total area of the well layer is higher than the ratio of the second alignment region formed in the total area of the first conductive semiconductor layer.
In the third paragraph,
A micro light-emitting device, wherein the ratio of the first alignment region formed in the total area of the well layer is higher than the ratio of the third alignment region formed in the total area of the second conductive semiconductor layer.
In the first paragraph,
The above well layer is a micro light-emitting device containing AlGaInP and emitting light in the red wavelength range.
In paragraph 5,
The above first alignment region is a micro light-emitting device in which AlGa and In are alternately arranged in the [111] direction.
In the second paragraph,
A micro light-emitting element, wherein the area in which the first alignment region is formed is 20% or more of the total area of the well layer of 100%.
In the second paragraph,
A micro light-emitting device, wherein the area in which the second alignment region is formed is less than 20% of the total area of 100% of the first challenge-type semiconductor layer.
In the first paragraph,
A micro light-emitting device, wherein the active layer is grown at a temperature lower than the growth temperatures of the first conductive semiconductor layer and the second conductive semiconductor layer.

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