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KR930011182A - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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Publication number
KR930011182A
KR930011182A KR1019910020150A KR910020150A KR930011182A KR 930011182 A KR930011182 A KR 930011182A KR 1019910020150 A KR1019910020150 A KR 1019910020150A KR 910020150 A KR910020150 A KR 910020150A KR 930011182 A KR930011182 A KR 930011182A
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KR
South Korea
Prior art keywords
wire
semiconductor device
insulator
manufacturing
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1019910020150A
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Korean (ko)
Inventor
윤진현
권오식
Original Assignee
김광호
삼성전자 주식회사
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Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019910020150A priority Critical patent/KR930011182A/en
Publication of KR930011182A publication Critical patent/KR930011182A/en
Ceased legal-status Critical Current

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Abstract

반도체 팩키지 어셈블리 공정의 와이어 본딩 공정에 있어서 핀 수가 많아지고 와이어 길이가 길어지며 패키지 두께가 작아짐에 따라 와이어 루프 또한 낮아지게 되어 와이어 간 단선 문제가 야기됨과 동시에 칩 가장자리와의 접촉으로 전기적 단선을 초래하게 된다.In the wire bonding process of the semiconductor package assembly process, the number of pins, the length of the wire, and the thickness of the package decrease, so that the wire loop also becomes low, causing disconnection between wires and electrical disconnection due to contact with the chip edges. do.

따라서 칩과 리이드 와의 와이어 접합 후 절연체를 와이어 및 접합부에 도포함으로써 단선 문제를 해결할 수있다.Therefore, the problem of disconnection can be solved by applying an insulator to the wire and the junction after the wire is bonded between the chip and the lead.

또한, Al 전극과 접합부를 절연막으로 보호함으로써 Al 부식 및 Al 이동현상을 방지할 수 있다.In addition, Al corrosion and Al migration can be prevented by protecting the Al electrode and the junction with an insulating film.

Description

반도체 장치 및 그 제조방법Semiconductor device and manufacturing method thereof

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따르는 와이어를 접속시킨 단면도.2 is a cross-sectional view connecting the wire according to the present invention.

제3도는 본 발명에 따르는 와이어 본더(bonder)시스팀의 흐름도.3 is a flow diagram of a wire bonder system according to the present invention.

Claims (9)

훼브리케이션이 완료된 실리콘 칩을 리이드 프레임으로 이송하는 단계와 와이어를 전극 패드와 안쪽 리이드에 접속시키는 와이어 본딩 공정과 절연체로 칩 및 와이어를 도포하여 주는 도포 공정으로 이루어지는 것을 특징으로 하는 반도체 장치의 제조방법.Manufacturing a semiconductor device comprising the steps of transferring a silicon chip completed with fabrication to a lead frame, a wire bonding process for connecting the wire to the electrode pad and the inner lead, and an application process for applying the chip and the wire with an insulator Way. 제1항에 있어서, 와이어 본딩 공정은 칩 전극과 리이드 프레임의 안쪽 리이드와 열－음파, 초음파, 열압착방법 중의 하나로 접합 되는 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the wire bonding step is bonded to one of the chip electrodes, the inner lead of the lead frame, and one of thermo-acoustic, ultrasonic, and thermocompression bonding methods. 제1항에 있어서, 와이어 본딩 공정이 완료된 후 절연체를 스프레이방식으로 와이어 및 칩 접합면 그리고 안쪽 리이드 접합면을 도포하여 주는 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein after the wire bonding process is completed, the insulator is sprayed to apply a wire and chip bonding surface and an inner lead bonding surface. 제1항에 있어서, 도포공정이 완료된 후 절연체를 큐어(cure)하는 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the insulator is cured after the coating step is completed. 제3항에 있어서, 절연체를 스프레이 방식으로 도포할 때 마스크가 설치되고 도포하려고 하는 부분만 도포될수 있도록 하는 것을 특징으로 하는 반도체 장치의 제조방법.4. The method of manufacturing a semiconductor device according to claim 3, wherein when applying the insulator by a spray method, only a portion of the mask to be installed and to be applied can be applied. 제3항에 있어서, 절연체의 도포 두께는 100㎛이하로 형성시키는 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 3, wherein the coating thickness of the insulator is formed to be 100 µm or less. 훼브리케이션이 완료된 실리콘 칩을 리이드 프레임으로 이송한 후, 와이어를 전극 패드와 안쪽 리이드에 접속시켜 본딩을 하고 절연체로 칩 및 와이어를 도포하여 이루어지는 것을 특징으로 하는 반도체 장치.A semiconductor device comprising: transferring a silicon chip after fabrication to a lead frame, connecting the wire to an electrode pad and an inner lead for bonding, and then applying the chip and the wire to an insulator. 제7항에 있어서, 상기한 와이어로는 Au, Al, Cu중의 하나로 이루어지는 것을 특징으로 하는 반도체 장치.8. The semiconductor device according to claim 7, wherein said wire comprises one of Au, Al, and Cu. 제7항에 있어서, 상기한 절연체는 폴리 우레판 수지, 폴리 에스테르 수지, 폴리이미드 수지, 에스테르 아미드 수지 중의 하나로 이루어지는 것을 특징으로 하는 반도체 장치.8. The semiconductor device according to claim 7, wherein the insulator is made of one of polyurethane resin, polyester resin, polyimide resin, and ester amide resin. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910020150A 1991-11-13 1991-11-13 Semiconductor device and manufacturing method thereof Ceased KR930011182A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910020150A KR930011182A (en) 1991-11-13 1991-11-13 Semiconductor device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910020150A KR930011182A (en) 1991-11-13 1991-11-13 Semiconductor device and manufacturing method thereof

Publications (1)

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KR930011182A true KR930011182A (en) 1993-06-23

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KR1019910020150A Ceased KR930011182A (en) 1991-11-13 1991-11-13 Semiconductor device and manufacturing method thereof

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100394775B1 (en) * 2000-12-14 2003-08-19 앰코 테크놀로지 코리아 주식회사 wire bonding method and semiconductor package using it
KR100521819B1 (en) * 2002-04-05 2005-10-17 가부시키가이샤 히타치세이사쿠쇼 Contrast regulation circuit and video display apparatus using the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100394775B1 (en) * 2000-12-14 2003-08-19 앰코 테크놀로지 코리아 주식회사 wire bonding method and semiconductor package using it
KR100521819B1 (en) * 2002-04-05 2005-10-17 가부시키가이샤 히타치세이사쿠쇼 Contrast regulation circuit and video display apparatus using the same
US6982704B2 (en) 2002-04-05 2006-01-03 Hitachi, Ltd. Contrast adjusting circuitry and video display apparatus using same
US7151535B2 (en) 2002-04-05 2006-12-19 Hitachi, Ltd. Contrast adjusting circuitry and video display apparatus using same

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