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KR970013263A - Ball Grid Array Package with Substrate with Through Hole for Recognition - Google Patents

Ball Grid Array Package with Substrate with Through Hole for Recognition Download PDF

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Publication number
KR970013263A
KR970013263A KR1019950027661A KR19950027661A KR970013263A KR 970013263 A KR970013263 A KR 970013263A KR 1019950027661 A KR1019950027661 A KR 1019950027661A KR 19950027661 A KR19950027661 A KR 19950027661A KR 970013263 A KR970013263 A KR 970013263A
Authority
KR
South Korea
Prior art keywords
circuit board
printed circuit
grid array
semiconductor chip
ball grid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1019950027661A
Other languages
Korean (ko)
Inventor
윤진현
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950027661A priority Critical patent/KR970013263A/en
Publication of KR970013263A publication Critical patent/KR970013263A/en
Withdrawn legal-status Critical Current

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Abstract

본 발명은 반도체 칩과, 상기 반도체 칩이 탑재되며 복수의 회로패턴층이 형성된 사각형상의 인쇄회로기판과, 상기 반도체 칩을 보호하기 위한 성형수지와, 상기 소정의 전도성 회로 패턴을 통해 상기 반도체 칩과 전기적으로 연결을 이루며, 상기 인쇄회로기판의 하부면에 부착되는 복수의 솔더 볼을 구비하는 볼 그리드 어레이(BGA) 반도체 패키지에 있어서, 상기 인쇄회로기판이 적어도 하나의 코너부위에 소정의 형태로 그 인쇄회로기판을 관통하는 인식을 위한 관통홀이 형성되어 있는 것을 특징으로 하는 볼 그리드 어레이 반도체 패키지를 제공함으로써, 카메라의 위치 인식용 패턴 마아크 및 기 홈으로도 사용할 수 있으며 또는 고정 핀의 삽입에 의해 정렬을 정확히 해주는 효과를 얻을 수 있을 뿐만 아니라, 주위에 형성시킨 구리패턴이 각 반도체 칩의 접지단자와 연결되어 반도체 칩 제품의 실장 및 전지적 검사 또는 햄들링시 발생하는 정전기 손상을 방지할 수 있는 효과를 나타내는 것을 특징으로 한다.The present invention provides a semiconductor chip, a rectangular printed circuit board on which the semiconductor chip is mounted and formed with a plurality of circuit pattern layers, a molding resin for protecting the semiconductor chip, and the semiconductor chip through the predetermined conductive circuit pattern. A ball grid array (BGA) semiconductor package having a plurality of solder balls electrically connected to each other and attached to a lower surface of the printed circuit board, wherein the printed circuit board is formed in a predetermined shape on at least one corner portion thereof. By providing a ball grid array semiconductor package characterized in that a through hole for recognizing through the printed circuit board is formed, it can be used as a pattern mark and groove for recognizing the position of the camera or by inserting a fixing pin. Not only can the effect be precisely aligned, but the copper pattern formed around each peninsula Is connected to the ground terminal of the chip is characterized in that indicating the effect capable of preventing the mounting and inspection or omniscient haemdeul ring electrostatic damage in the semiconductor chip product.

Description

인식을 위한 관통홀이 형성된 기판을 갖는 볼 그리드 어레이 패키지Ball Grid Array Package with Substrate with Through Hole for Recognition

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

Claims (6)

반도체 칩과, 상기 반도체 칩이 탑재되며 복수의 회로패턴층이 형성된 사각형상의 인쇄회로기판과, 상기 반도체 칩을 보호하기 위한 성형수지와, 상기 소정의 전도성 회로 패턴을 통해 상기 반도체 칩과 전기적으로 연결되며 상기 인쇄회로기판의 하부면에 부착되는 복수의 솔더 볼을 구비하는 볼 그리드 어레이 반도체 패키지에 있어서, 상기 인쇄회로기판이 적어도 하나의 코너부위에 소정의 형태로 그 인쇄회로기판을 관통하는 관통홀을 갖는 것을 특징으로 하는 인식을 위한 관통홀이 형성된 기판을 갖는 볼 그리드 어레이 패키지.A semiconductor chip, a rectangular printed circuit board on which the semiconductor chip is mounted and formed with a plurality of circuit pattern layers, a molding resin for protecting the semiconductor chip, and an electrical connection with the semiconductor chip through the predetermined conductive circuit pattern. And a ball grid array semiconductor package having a plurality of solder balls attached to a lower surface of the printed circuit board, wherein the printed circuit board penetrates the printed circuit board in a predetermined shape in at least one corner portion. Ball grid array package having a substrate with a through-hole for the recognition, characterized in that having a. 제1항에 있어서, 상기 인쇄회로기판의 관통홀 내측표면과 인쇄회로기판의 상·하표면의 관통홀 주위에 구리패턴이 일체로 형성되어 있는 것을 특징으로 하는 인식을 위한 관통홀이 형성된 기판을 갖는 볼 그리드 어레이 패키지.The substrate having a through hole for recognition according to claim 1, wherein a copper pattern is integrally formed around the inner surface of the through hole of the printed circuit board and the upper and lower surfaces of the printed circuit board. Having a ball grid array package. 제2항에 있어서, 상기 인쇄회로기판의 상·하표면에 형성된 구리패턴이 일정한 형상을 갖는 것을 특징으로 하는 인식을 위한 관통홀이 형성된 기판을 갖는 볼 그리드 어레이 패키지.The ball grid array package of claim 2, wherein the copper patterns formed on the upper and lower surfaces of the printed circuit board have a predetermined shape. 제1항 또는 제2항에 있어서, 상기 인쇄회로기판의 상면에 상기 구리패턴과 연결되어 접지를 위한 접속단자가 형성되어 있는 것을 특징으로 하는 인식을 위한 관통홀이 형성된 기판을 갖는 볼 그리드 어레이 패키지.The ball grid array package of claim 1 or 2, wherein a connection terminal for grounding is formed on the upper surface of the printed circuit board by connecting with the copper pattern. . 제4항에 있어서, 상기 접속단자가 반도체 칩의 접지단자와 전기적으로 연결되어 있는 것을 특징으로 하는 인식을 위한 관통홀이 형성된 기판을 갖는 볼 그리드 어레이 패키지.The ball grid array package of claim 4, wherein the connection terminal is electrically connected to a ground terminal of the semiconductor chip. 제1항에 있어서, 상기 관통홀의 몰드 수지가 유입되는 코너 부분을 제외하고 세 개의 코너에 형성되어 있는 것을 특징으로 하는 인식을 위한 관통홀이 형성된 기판을 갖는 볼 그리드 어레이 패키지.The ball grid array package according to claim 1, wherein three corners are formed except for corner portions into which the mold resin of the through hole is introduced.
KR1019950027661A 1995-08-30 1995-08-30 Ball Grid Array Package with Substrate with Through Hole for Recognition Withdrawn KR970013263A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950027661A KR970013263A (en) 1995-08-30 1995-08-30 Ball Grid Array Package with Substrate with Through Hole for Recognition

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950027661A KR970013263A (en) 1995-08-30 1995-08-30 Ball Grid Array Package with Substrate with Through Hole for Recognition

Publications (1)

Publication Number Publication Date
KR970013263A true KR970013263A (en) 1997-03-29

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Application Number Title Priority Date Filing Date
KR1019950027661A Withdrawn KR970013263A (en) 1995-08-30 1995-08-30 Ball Grid Array Package with Substrate with Through Hole for Recognition

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KR (1) KR970013263A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990062959A (en) * 1997-12-10 1999-07-26 오히라 아끼라 Semiconductor plastic package and manufacturing method thereof
KR20030034382A (en) * 2001-10-23 2003-05-09 동부전자 주식회사 Pcb for the semiconductor device including an esd pattern

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990062959A (en) * 1997-12-10 1999-07-26 오히라 아끼라 Semiconductor plastic package and manufacturing method thereof
KR20030034382A (en) * 2001-10-23 2003-05-09 동부전자 주식회사 Pcb for the semiconductor device including an esd pattern

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Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19950830

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid