RU198664U1 - TEST ELEMENT FOR QUALITY CONTROL OF FILLING WITH POLY-SILICON OF SILICON CAPACITORS WELLS - Google Patents

Abstract

The field of application of the proposed utility model is microelectronics, namely, a device for operational control of the quality of filling with polysilicon wells in a semiconductor in the production of silicon capacitors. The technical result of the proposed utility model is to improve the quality and efficiency of control. the proposed test element for quality control of filling the wells of silicon capacitors with polysilicon, containing a semiconductor plate, a relief formed on it from etched wells, the surface of which is covered with a dielectric layer and filled with polysilicon, the test wells are made in the form of grooves located in two mutually perpendicular directions, and the width of the grooves A is taken equal to the diameter of the well of the working silicon capacitor, and the length of the grooves D is chosen from the formula 4H / tgα≥D≥2H / tgα, where H is the greatest depth of the grooves, α is the grinding angle of the test element ...

Description

The field of application of the proposed utility model is microelectronics, namely, a device for operational control of the quality of filling with polysilicon wells in a semiconductor, in the production of silicon capacitors.

Quality control of filling the wells of silicon capacitors with polysilicon is carried out by performing an oblique section (see the book R. Burger, R. Donovan. Fundamentals of technology of silicon integrated circuits. Oxidation, diffusion epitaxy. - M .: Mir, 1969. - 298-299 p.) ...

The oblique section method is a destructive testing method and is used in electronic engineering, in particular in microelectronics, in the analysis of defects in crystals of semiconductor devices and microcircuits, to determine the depths of pn junctions, the thickness of epitaxial structures, the thickness of the oxide, as well as the depths of wells etched into the semiconductor. ... When making an oblique section, the surface of the grinding makes a small angle with the surface of the semiconductor crystal, which leads to the "expansion" of the cross section of the semiconductor crystal. In such a case, depths and thicknesses can be measured relatively easily. "Expansion" of the section is proportional to the tangent of the angle of inclination of the grinding surface to the surface of the semiconductor crystal. The angle is formed by grinding a semiconductor crystal previously placed on an inclined surface of a specially prepared holder. The semiconductor crystal is glued to the holder with wax during grinding. After finishing the grinding, the semiconductor crystal holder is heated and the semiconductor crystal is separated from the holder for further analysis.

The closest to the proposed one is a test element for quality control of filling the wells of silicon capacitors with polysilicon, containing a semiconductor plate, a relief formed on it from etched wells, the surface of which is covered with a dielectric layer and filled with polysilicon (see, for example, "High-Density, Low-Loss MOS Capacitors for Integrated RF Decoupling from The International Journal of Microcircuits and Electronic Packaging, Volume 24, Number 3, 2001, pp. 182-196).

The disadvantage of this test element is the complexity of aligning the vertical section with the wells filled with polysilicon, as well as the uninformativeness of the obtained section, since the section may not fall in the center of the wells, but cut off its segment far from the center, which will not allow controlling the filling of the well with polysilicon throughout the depth.

The technical result of the proposed utility model is to improve the quality and efficiency of control.

This result is achieved by the fact that, in contrast to the known one, in the proposed test element for quality control of filling the wells of silicon capacitors with polysilicon, containing a semiconductor plate, a relief formed on it from etched wells, the surface of which is covered with a dielectric layer and filled with polysilicon, the test wells are made in the form grooves located in two mutually perpendicular directions, and the width of the grooves A is taken equal to the diameter of the well of the working silicon capacitor, and the length of the grooves D is chosen from the formula: 4H / tgα≥D≥2H / tgα, where H is the greatest depth of the grooves, α is the grinding angle test item.

This configuration makes it easier to align the oblique section with the test element, as well as to obtain a clear profile of the groove filled with polysilicon throughout the entire depth.

The choice of the groove width A equal to the diameter of the well of the working silicon capacitor makes it possible to evaluate the quality of filling the groove with polysilicon as close as possible to the well of the working silicon capacitor.

The length of the grooves D is chosen more than 2H / tgα for easy alignment of the oblique section with the test element, and also for the section to cover the test groove throughout its depth. The limitation of 4H / tgα was chosen in order to save the area occupied by the test element.

The essence of the proposed utility model is illustrated by the figures. FIG. 1 shows a test element (top view), and FIG. 2 shows a test piece after making an oblique section. FIG. 3 shows an isometric view of an enlarged fragment of a test element after performing an oblique section.

The positions in FIG. 1-3 are indicated:

1 - semiconductor plate;

2 - test grooves;

3 - layer of insulating dielectric;

4 - polysilicon layer;

A is the width of the grooves;

D is the length of the grooves;

H is the depth of the grooves.

The specified test element can be produced as follows: on a silicon wafer 1 of orientation (111), a configuration of test grooves 2 is formed by photolithography in a photoresist mask; then, anisotropic etching in inductively coupled plasma of SF ₆ and freon 318 is carried out on the SI 500 unit (etching depth is 35 μm with a groove width A = 3 μm); then a layer of insulating dielectric 3 is grown in the form of thermal silicon oxide 0.2 μm thick and pyrolytic silicon nitride 0.2 μm thick; then a layer of polysilicon 4, 3 μm thick, is applied by the pyrolysis of monosilane at reduced pressure and a temperature of 650 ° C (see Fig. 2, 3).

Determination of the quality of filling the grooves with polysilicon is carried out under a digital microscope, for example, VHX-1000 from Keyence (Japan), visually. A digital microscope allows you to obtain an image with a depth of field from 3 μm to 3 mm. If an electron microscope is used as in a prototype, then it is necessary to make several attempts at a vertical section until it hits the center of the wells, and the use of an electron microscope itself is more laborious, since it is necessary to pump out the vacuum and adjust the sample.

Claims (1)

A test element for quality control of filling the wells of silicon capacitors with polysilicon, containing a semiconductor plate, a relief formed on it from etched wells, the surface of which is covered with a dielectric layer and filled with polysilicon, characterized in that the test wells are made in the form of grooves located in two mutually perpendicular directions, and the width of the grooves A is taken equal to the diameter of the well of the working silicon capacitor, and the length of the grooves D is selected from the formula: 4H / tgα≥D≥2H / tgα, where H is the greatest depth of the grooves, α is the grinding angle of the test element.

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