TW200423290A - IC structure to protect dielectric in laser process - Google Patents

Abstract

An integrated circuit structure is disclosed. A dummy-protecting layer is added at the surface of a low K dielectric layer located under a fuse surrounded with an oxide layer, wherein the vertical width of the dummy-protecting layer is wider than the fuse. Therefore, while a laser process to remove the fuse is performed, the dummy-protecting layer could relieve stress therefrom and improve the damage and collapse of the low K dielectric layer.

Description

2004232 90. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to an integrated circuit structure and a method for manufacturing the same, and more particularly, it relates to a 'protective dielectric layer when a laser process for removing fuses is performed. Integrated circuit structure free from damage and collapse and manufacturing method thereof. [Previous technology] Due to the high cost of wafers and integrated circuit components, in the process of manufacturing integrated circuit 7C pieces, 'usually several spare circuits and fusible wires or fuses are made in the integrated circuit component at the same time. In order to rewire the integrated circuit. For example, in Electrically Erasable and Programmable Read Only Memories (EEPROM), Dynamic Random Access Memories (DRAM), and Static Random Access Memory Memories, SRAM) In a semi-memory such as this, once a defective memory cell is found, the fuse connected to the defective memory cell can be cut off and then replaced with a spare memory cell to increase the semiconductor memory cell. Yield and reduce production costs. Similarly, the logic circuit can be repaired or rewired by cutting the wire. For example, in logic chips, a large number of connection logic gates are initially made, and in the final process stage, the fuses between unnecessary circuit connections are cut according to customer requirements to form a chip with the desired logic function. The material of the metal fuse generally used for making semiconductor elements includes metals such as aluminum, copper or tungsten. The metal fuse structure is usually at the same time as the top metal wire

Page 5 2004232 90 V. Description of Invention (2) Formation. Figure 1 shows a schematic cross-sectional view of a general fuse connection structure. : Please refer to FIG. 1, there are several layers of metal interconnects 20 on the substrate 10, and a dielectric layer 12 is used as insulation between these metal links 20. The top layer of the metal connection structure 20: is a dissolving wire 18 ', and the other end is connected to a backup circuit or other components. The perimeter of fuse 18 is generally covered with an oxide layer 丨 4. Because… fuse 18 may be removed by laser fusing in the subsequent steps, the thickness of the partial oxide layer 丨 4 covering fuse 18 will be greater than Thin, otherwise it will cause the fuse 丨 8 is not easy to fuse or consume laser energy and other shortcomings. Therefore, another protective layer 16 that is additionally covered on the integrated circuit is only used to protect other components on the substrate 10, and is not covered above the fuse 18. The use of the laser 22 to perform the melting step of the fuse 8 causes the fuse 18 to absorb the energy of the laser 22 and melt. In addition to disintegrating the fuse 8, it will also damage part of the oxide layer 14 around the fuse structure 18. . In addition, one of the recent developments in integrated circuit technology is to use low-dielectric-constant materials to form the above-mentioned inter-dielectric materials, which can reduce the capacitance between multilayer wires. However, when the low-dielectric constant material should be in the above structure to form a dielectric layer, because of the low-dielectric constant material's porous and soft characteristics, after removing the fuse 18 with the laser 22, it is located in you ,, The part of the dielectric layer under 糸 18 may be damaged or collapsed as a result. Such an unexpected damage or collapse of the dielectric layer 12 may easily cause a line failure of the integrated circuit element ⑩ and affect the quality of the conducting circuit or the startup of the standby circuit. [Summary of the invention] The purpose of this invention is to provide a integrated circuit structure, so that the dielectric exhibition 2004232 90 V. Description of the invention (3) There is a protective layer between the fuse and the fuse, so that it can resist the stress and protect the underlying dielectric layer . Yet another object of the present invention is to provide a method for manufacturing an integrated circuit, and when forming the (N 1) th metal layer, at the same time, a protective layer is formed at a position of the same layer structure between the dielectric layer and the molten wire.

According to the above-mentioned object, the integrated circuit structure of the present invention is located on a substrate and includes: at least a dielectric layer on the substrate; a first metal interconnect and a first metal interconnect in the dielectric layer; Two metal interconnects; at least one wire is bridged between the first metal interconnect and the second metal interconnect and is located above the dielectric layer; and is located below the fuse and on the dielectric layer, but A protective layer that is not in contact with the fuse. The protective layer is not connected to the first metal interconnect and the second metal interconnect at the same time, which is suitable for protecting the dielectric layer when a fuse is blown by a laser process. In a preferred embodiment of the present invention, the protective layer is formed in the first dielectric layer on the same plane as the (N-0th metal layer). Therefore, when the (N-1) th metal layer is formed, At the same time, a protective layer is formed, and then another dielectric layer such as an oxide layer is covered thereon and fuses and other integrated circuits are formed therein. With the integrated circuit structure of the present invention, the protective layer can effectively slow down the material The stress on the fragile dielectric layer reduces the circuit density of the integrated circuit and improves its conductive quality. Moreover, the manufacturing method of the present invention can form a protective layer while forming metal interconnects. No additional process is required for manufacturing.

2004 232 90

The country narrative is more detailed and complete, you can refer to the following description and V. Description of the invention (4) m to the diagrams in Figure 6. Figures 2 to 4 are schematic cross-sectional views of the integrated circuit structure shown in several comparative embodiments according to the present invention, and Figures 5 and 6 are several preferred embodiments according to the present invention. Top view of the circuit structure of the repair body. Please refer to FIG. 2 '. The substrate 100 is made of a low dielectric constant material.

m, and there are several metal interconnect structures in the dielectric layer 102, such as metal interconnects 122 and metal interconnects 124. These metal interconnect structures may be composed of multiple metal layers connected to each other and connected to each other. Different circuit components (not shown). For example, as shown in Figure 2, the Phnom Penh interconnect 122 and the metal interconnect 丨 24 are respectively composed of the (N_3) th metal layer 108, the (N-2) th metal layer 110, and the (B 1) is composed of metal layer 112, and between (N-3) th metal layer 108, (N_2) th metal layer 11 (), and (N-1) th metal layer 112, metal insertion can be used Plug structure to connect. Among them, N value represents the total number of metal layers, and can be selected by a positive integer greater than 丨. Above the dielectric layer 102, 'having another dielectric layer 104 composed of an oxidizing material or other non-low dielectric constant material' may be a single layer, a structure, or a multilayer structure, and 'having in the " electrical layer 104 A fuse 116 composed of a conductive material. Wherein, the position of the fuse 116 mentioned above is the same layer as the N-th metal layer (not shown) of other metal interconnection structure, and may be made of the same material as the metal interconnection. The fuse 116 is connected to the metal interconnection 122 and the metal interconnection 124 via a metal plug structure. When the melt wire 116 is in a complete state and can be connected between the metal interconnect 122 and the metal interconnect 124, the standby will not be activated.

2004232 90 V. Description of the invention (5) Circuit. However, if it is necessary to activate the backup circuit, the fuse 116 may be blown by using the laser 120, and the backup circuit may be activated to re-connect the integrated circuit. Part of the dielectric layer 104 above the fuse 116 is thinner, which is beneficial to the laser removal step. Otherwise, if the thickness of the dielectric layer above the fuse 丨 丨 6 is too thick, the fuse 116 will be caused. Not easy to fuse or dielectric layer damage ^. = Yes ^ The dielectric layer above the fuse, the dielectric layer covering other circuits and components is thicker, and is protected by the protective layer 10 on the dielectric layer 104. Generally, a protective layer is formed using a nitride material. In addition to the above structure, the present invention further provides a 118 below the fuse 116. This protective layer 118 is made of a harder material, so as to protect the bottom of the fuse 116 when the laser step of the fuse 116 is performed. The dielectric layer 102 is made of a softer material. In consideration of the convenience of the manufacturing process, the protective layer 118 is referred to as the same plane as the layer 112, and the protective layer 118 formed by the same or different conductive materials can be formed in the second layer (18). ; I 上 ί 5Metal interconnect structure and the use of the same material to form a guarantee ;! Habit :: formed by lithography, engraving and deposition processes, or when = wire material 'can use a special metal inlay process to In addition to copper metal, Ming metal or Ming copper alloy can also be used. Inner wiring and dielectric layer are praised. And the above metals are not limited to the materials exemplified above. It is not clear that in the embodiments of the present invention, The above protective layer can be selected with metal inside 2004232 90

One of the wires is connected, as shown in Figure 3. Please refer to FIG. 3, wherein the protective layer 118 can cover the lower dielectric layer 102 with such a large area with the metal interconnect 122 or the metal interconnect 124 on both sides, which can provide better protection. If the protective layer 118 is connected to multiple metal interconnects, such as the gold f interconnect 122 and the metal interconnect 124, and the protective layer U8 is made of a conductive material, this will invalidate the function of the fuse 116, Rather, the present invention does not recommend the shutdown or activation of the circuit. In addition to the integrated circuit structure of the fuse 116 directly located in the metal sound of the ruler layer in the second and third figures above, the integrated circuit structure of the present invention has another form, as shown in FIG. 4. Please refer to FIG. 4, wherein the metal 'interconnect and the metal interconnect 124 each have its N-th metal layer 114, and the fuse 6 is directly connected and located on the N-th metal layer 114. Generally, when copper metal is used as the metal interconnect material, this structure can be used and aluminum metal can be used to form the fuse therein. When the protective layer 18 of the present invention is applied to this integrated electrical structure, whether or not it is connected to one of the metal interconnect structures, it can have the same dielectric layer protective effect as the structure of FIG. 2 and FIG. 3. . Eight

The protective layer 118 of the present invention has a preferred upper view width that is greater than the upper view width of the fuse 116, as shown in Figs. 5 and 6, which can have better protection effects. Please refer to FIG. 5 first. The general fuse is located in a fuse box 202 in the chip 200, and a single fuse box 200 may have a plurality of fuses 116. When the circuit is to be turned on or off, the laser can be rewired by hitting a laser on one of the dissolving wires 11 6 ′. Therefore, it is possible to form a plurality of protective layers that are paired with each other under the dissolved silk 116, and these protective layers are independent and not connected to each other. The section view along the section line A — A is

2004232 90 V. Description of the invention (7) For example, it can be shown in Figure 2, Figure 3, or Figure 4. Or, please refer to the sixth. In the preferred embodiment of the sun and the moon, form a whole or a whole protective layer that can cover the lower dielectric layer under the silk, so that it can have a "dense protection" effect. It is worth noting that the shapes of the protective layers and fuses shown in Figure 5 and Figure ^ A above are just examples, and other shapes of protective layers and fuses can be used in the present invention, and the invention is not limited to this. . The characteristics of this month's structure are the above-mentioned protective layer 118, which is located below the fuse. Since the protective layer 118 is made of a harder material than the dielectric layer 102, when the laser 120 hits the fuse On 116, when the fuse 116 and a portion of the surrounding dielectric layer are disintegrated, the protective layer 118 can resist the generated stress, so that the underlying dielectric layer 102 is not easily collapsed. The protective layer of the present invention is preferably made of the same conductive material as the metal interconnect, and has the convenience of manufacturing process, but this is only an example. Other hard conductive or non-conductive materials can withstand the stress generated by the laser step. Both can be applied to the present invention, and the present invention is not limited thereto. In addition, the position of the protective layer 8 needs to support the dielectric layer 102 located below the fuse 116, whether it has a plane ^ with the dielectric layer 102, or protrudes from the surface of the dielectric layer 102, or even The dielectric layer 102 may have a protective effect on the surface, and is not limited to being in the same layer as the (N-1) th metal layer. As the integrated circuit technology of today tends to use low dielectric constant materials to form the dielectric layer between the wires, the use of the integrated circuit structure and the manufacturing method of the present invention can effectively slow down the laser melting process Dielectric layer collapse phenomenon helps to stabilize the circuit's conductive quality and makes integrated circuit technology known as

2004232 90 V. Description of the invention (8) As understood by those familiar with this technology, the above description is only a preferred embodiment of the present invention and is not intended to limit the scope of the patent application for the present invention; Equivalent changes or modifications made under the spirit of the disclosure should be included in the scope of patent application described below.

2004232 90 Brief description of the drawings In order to make the above and other objects, features, advantages, and preferred embodiments of the present invention more comprehensible, please supplement the drawings, in which: Figure 1 shows a general fuse Schematic cross-sectional view of the wiring structure; FIG. 2 illustrates the cross-section of the integrated circuit structure of the present invention according to an embodiment, and FIG. 3 illustrates the integrated circuit structure of the present invention according to another embodiment. Sectional schematic diagram; FIG. 4 shows the cross-section of the integrated circuit structure of the present invention according to another embodiment, and FIG. 5 shows the cross-section of the integrated circuit structure of the present invention according to an embodiment. , And FIG. 6 is a schematic top view of the integrated circuit structure of the present invention according to another embodiment. Simple description of component representative symbols 10 substrate 12 dielectric layer 14 oxide layer 16 protective layer 18 fuse 20 metal interconnect 22 laser 100 substrate 102 dielectric layer

Page 13 2004232 90 Brief description of the drawings 1 0 4 Oxide layer 1 0 6 Protective layer < 1 108th (N-3) th metal layer 110th (N-2) th metal layer 112th (N-1) th layer Metal layer 114 Nth metal layer 11 6 Fuse 11 8 Protective layer 120 Laser 20 0 Chip 2 0 2 Fuse box AA 'Section line ❿

Page 14

Claims (1)

2004232 90 6. Scope of patent application 1. A integrated circuit structure located on a substrate, at least one first dielectric layer on the substrate; at least one first metal interconnect and at least one second metal An interconnect is located in the first dielectric layer; at least one fuse is connected across the first metal interconnect and the second metal interconnect and is located above the first dielectric layer; and a protection A layer is located below the fuse and on the first dielectric layer, but does not contact the fuse, and does not connect the first metal interconnect and the ^ at the same time. The two metal interconnects are suitable for protecting the dielectric layer when a fuse is blown by a laser process. 2. The integrated circuit structure according to item 1 of the scope of patent application, wherein the apparent width above the protective layer is greater than the apparent width of the fuse. 3. The integrated circuit structure according to item 丨 in the scope of the patent application, wherein the protective layer is connected to one of the first metal interconnect and the second metal interconnect. 〃 4. The integrated circuit structure as described in item 1 of the scope of patent application, wherein the material of the above protective layer is selected from the group consisting of conductive materials and non-conductive materials 5. As described in item 1 of the scope of patent application The integrated circuit structure, wherein the upper protective layer is the same as the first metal interconnect and the second metal interconnect. Section 15] --- 2004232 90 VI. Patented conductive materials. 6. According to item 丨 of the scope of patent application, wherein the first dielectric layer is composed of a low-density integrated circuit structure and a permittivity material. 7 · If the first and second dielectric layers are covered by the integrated circuit structure of the first and second dielectric layers, the material of the second dielectric layer is written as follows: = 2, and surround the I Silk, of which materials and their combinations constitute the "ethnic group." Oxidation materials, non-low dielectric constants 8. As described in item 丨 of the scope of patent application No .: Electrical circuit quality of metal interconnects and second metal interconnects. A group consisting of a gold layer, an aluminum metal, and an alloy thereof, which is composed of γ, is selected from the integrated circuit structure made of copper 9 as described in item i of the patent application scope, and the material of the fuse. It is selected from the group consisting of steel, metal, and medium. Tin scrap metal aluminum alloy and its alloy ❿ 10 · — a kind of integrated circuit structure, located on a substrate, at least: a first dielectric layer on the substrate; a second dielectric layer on the first On a dielectric layer; at least one first metal interconnect and at least one second metal interconnect are located in the first dielectric layer and the second dielectric layer; at least one fuse is located in the second dielectric layer In the first metal Page 16 2004 232 90 Between the connection and the second metal interconnect; and a protective layer located under the fuse and on the first dielectric layer, between the first metal interconnect and the second metal interconnect between. 11. The integrated circuit structure according to item 10 of the scope of the patent application, wherein the protective layer is connected to the first metal interconnect and the second metal interconnect. 1 2 · The integrated circuit structure described in item 10 of the scope of patent application, wherein the above-mentioned protective layer is not connected to the first metal interconnect and is not connected to the second metal interconnect. 1 3. The integrated circuit structure as described in the item No. of claim 0, wherein the above-mentioned apparent width of the protective layer is greater than the apparent width of the fuse. 1 4. The integrated circuit structure according to item 10 of the scope of patent application, wherein the material of the protective layer is selected from the group consisting of conductive materials and non-conductive materials. , 15. The integrated circuit structure according to item 10 of the scope of the patent application, wherein the protective layer, the first metal interconnect and the second metal interconnect are made of the same conductive material. 1 6 · The integrated circuit structure described in item 10 of the scope of patent application, wherein the above Page 17 2004232 90 6. Scope of patent application The materials of the first metal interconnect and the second metal interconnect are selected from the group consisting of copper metal, Ming metal and its alloys. 17 · The integrated circuit structure as described in Item No. 0 of the patent application scope, wherein the material of the fuse is selected from the group consisting of copper metal, aluminum metal and its alloy. 18. The integrated circuit structure as described in item 10 of the scope of patent application, wherein the first dielectric layer is made of a low-dielectric-constant material. 19. The integrated circuit structure as described in item 10 of the scope of patent application, wherein the material of the first dielectric layer is selected from the group consisting of an oxide material, a non-low dielectric constant material, and a combination thereof. Ethnic group. 20. —A method for manufacturing an integrated circuit, comprising forming a plurality of metal layers on a substrate, including at least: forming a first dielectric layer on the substrate; and simultaneously forming a (N-1) layer metal Layer and a protective layer in the first dielectric layer and expose the surface of the protective layer, wherein the protective layer is located in a first part and a second part of the (N-1) th metal layer And is suitable for protecting a portion of the first dielectric layer located below; forming a second dielectric layer on the first dielectric layer; forming an N-th metal layer on the second dielectric layer And are interconnected with the first part and the second part of the first (N-1) metal layer. Page 18 2004 232 90 6. Scope of patent application 2/1 · The manufacturing method described in item 20 of the scope of patent application, wherein the protective layer is selected from the first part and the second part of the (N-1) th metal layer. One 9 then. . 22. The manufacturing method as described in item 20 of the scope of the patent application, wherein the above-mentioned N-th metal layer system includes a dissolving wire above the retaining layer, and one end of the fuse is connected to the (N-1 The first part of the metal layer) is connected, and the other end of the skein is connected to the second part of the (N -1) th metal layer. 23. The manufacturing method according to item 22 of the scope of patent application, wherein the above-mentioned apparent width of the compliance layer is larger than the above-mentioned apparent width of the dissolving silk. '24. The manufacturing method as described in item 20 of the scope of the patent application, wherein the protective layer is located between a first part and a second part of the Nth metal layer. 25. The manufacturing method as described in item 24 of the scope of patent application, further comprising forming a fuse directly above the protective layer, and connecting the first part and the second part of the N-th metal layer . 2 6. The manufacturing method according to item 25 of the scope of patent application, wherein the apparent width above the protective layer is greater than the apparent width of the fuse. 2004232 90 VI. Scope of patent application _____ 2J. According to the manufacturing method described in item 20 of the patent application scope, the material of the layers is selected from the group consisting of conductive materials and non-conducting materials. Issued by the inch — 22: The manufacturing method described in item 20 of the scope of patent application, where = the first metal interconnect and the second metal interconnect are protected by the second Made up. 29 of 29. The manufacturing method as described in item 20 of the scope of the patent application, basing on Yi Jinggong, Ding Shangmi's clothes; 1 The electrical layer is composed of a low dielectric constant material. 30. The manufacturing method as described in item 20 of the scope of patent application, wherein: the material of the second layer is selected from the group consisting of an oxidizing material, a non-low dielectric constant, and a combination thereof. Dingye 3 belongs to 1. The manufacturing method described in item 20 of the scope of patent application, wherein the material of the above-mentioned gold layer is selected from the group consisting of copper metal, aluminum metal and alloys thereof. , Φ Page 20