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Application filed by Vanguard Int Semiconduct CorpfiledCriticalVanguard Int Semiconduct Corp
Priority to TW85102761ApriorityCriticalpatent/TW283788B/en
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Insulated Gate Type Field-Effect Transistor
(AREA)
Abstract
A method of forming semiconductor shallow junction comprises: forming field oxide isolation region on one semiconductor substrate; forming one silicon oxide layer on the substrate; forming one polysilicon layer on the silicon oxide layer; patterning one gate region with photoresist on the polysilicon layer; etching the polysilicon layer and the silicon oxide layer which are not pattern by the photoresist to form the gate; using at least one implant source and nitrogen to co-implant the substrate where is not covered by the gate, to form one shallow junction.
TW85102761A1996-03-061996-03-06Method of forming semiconductor shallow junction
TW283788B
(en)
Local oxidation method employing polycide/silicon nitride clearance wall by controlling the width of pad oxide and silicon nitride to optimize the forming of isolation area