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TWI871627B - Rectifier circuit and power supply using the same - Google Patents

Rectifier circuit and power supply using the same Download PDF

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Publication number
TWI871627B
TWI871627B TW112117493A TW112117493A TWI871627B TW I871627 B TWI871627 B TW I871627B TW 112117493 A TW112117493 A TW 112117493A TW 112117493 A TW112117493 A TW 112117493A TW I871627 B TWI871627 B TW I871627B
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Taiwan
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terminal
switching element
voltage
capacitor
mosfet
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TW112117493A
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Chinese (zh)
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TW202414984A (en
Inventor
三輪明寛
庄司浩幸
坂野順一
内海智之
樋口孝裕
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日商日立功率半導體股份有限公司
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/02Conversion of AC power input into DC power output without possibility of reversal
    • H02M7/04Conversion of AC power input into DC power output without possibility of reversal by static converters
    • H02M7/12Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/02Conversion of AC power input into DC power output without possibility of reversal
    • H02M7/04Conversion of AC power input into DC power output without possibility of reversal by static converters
    • H02M7/12Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)

Abstract

本發明提供一種使用整流用之開關元件之整流電路,其能夠削減對用以驅動整流用之開關元件之驅動電路供給電力的電容器之必要電容。 The present invention provides a rectifier circuit using a rectifier switching element, which can reduce the necessary capacitance of a capacitor for supplying power to a driving circuit for driving the rectifier switching element.

本發明係具有陽極A及陰極K之整流電路2,具備整流用之開關元件(MOSFET Q1)、二極體(內接二極體DQ1)、驅動整流用之開關元件(MOSFET Q1)之驅動電路1、及對驅動電路1供給電力之電容器C1,電容器C1於整流用之開關元件(MOSFET Q1)斷開後至下一次接通為止之期間,具有:電容器C1被充電之第1充電期間及第2充電期間;及設置於第1充電期間與第2充電期間之間且停止對電容器C1充電之充電停止期間。 The present invention is a rectifier circuit 2 having an anode A and a cathode K, a rectifier switching element (MOSFET Q1), a diode (internal diode DQ1), a driving circuit 1 for driving the rectifier switching element (MOSFET Q1), and a capacitor C1 for supplying power to the driving circuit 1. The capacitor C1 has a first charging period and a second charging period during which the capacitor C1 is charged, and a charging stop period which is set between the first charging period and the second charging period and stops charging the capacitor C1.

Description

整流電路及使用其之電源 Rectifier circuit and power supply using the same

本發明係關於一種整流電路及使用其之電源。 The present invention relates to a rectifier circuit and a power supply using the same.

作為將交流整流為直流之整流電路,已知有使用二極體者、或代替二極體而使用MOSFET(Metal-Oxide-Semiconductor Field Effect Transistor,金屬氧化物半導體場效應電晶體)等開關元件進行同步整流者。 As a rectifier circuit for rectifying AC to DC, there are known ones that use a diode or use a switching element such as MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) instead of a diode for synchronous rectification.

於使用二極體進行整流之情形時,有如下問題:由於存在因二極體之內置電位引起之電壓降,故損耗較大。與此相對,例如使用MOSFET之同步整流有如下優點:由於無MOSFET之內置電位且正向電流自0V上升,故損耗較低。因此,尤其是對於前端電源等效率規制嚴格之開關電源,為了更低損耗地進行整流而主要採用使用MOSFET之同步整流。 When using a diode for rectification, there are the following problems: the voltage drop caused by the built-in potential of the diode causes large losses. In contrast, synchronous rectification using MOSFET has the following advantages: since there is no built-in potential of the MOSFET and the forward current rises from 0V, the losses are lower. Therefore, especially for switching power supplies with strict efficiency regulations such as front-end power supplies, synchronous rectification using MOSFET is mainly used in order to perform rectification with lower losses.

作為實現同步整流之整流電路,例如有專利文獻1、專利文獻2等。 As a rectifier circuit for realizing synchronous rectification, there are, for example, Patent Document 1 and Patent Document 2.

進行同步整流之整流電路一般而言具有:作為同步整流用之第1開關元件之MOSFET、其驅動電路、對驅動電路供給電力之電容器、用以控制 電容器之電壓之第2開關元件、及第2開關元件之控制電路。驅動電路基於預定之閾值電壓、及所檢測出之MOSFET之汲極-源極間電壓,控制MOSFET之接通斷開。 Generally speaking, a rectifier circuit for synchronous rectification has: a MOSFET as the first switching element for synchronous rectification, its driving circuit, a capacitor for supplying power to the driving circuit, a second switching element for controlling the voltage of the capacitor, and a control circuit for the second switching element. The driving circuit controls the on/off of the MOSFET based on a predetermined threshold voltage and the detected drain-source voltage of the MOSFET.

圖9係表示先前之整流電路之動作波形之圖。圖9中,縱軸表示電壓或電流,橫軸表示時刻t。 Figure 9 is a diagram showing the operating waveform of the previous rectifier circuit. In Figure 9, the vertical axis represents voltage or current, and the horizontal axis represents time t.

對驅動電路供給電力之電容器係於時刻t0,MOSFET之閘極-源極間電壓Vgs1成為0而MOSFET關斷之後,在時刻t1至時刻t2之間,由流經MOSFET之汲極端子、第2開關元件、電容器、MOSFET之源極端子這一路徑之電流充電。當電容器之充電開始時,電容器之電壓Vc1增加以追隨MOSFET之汲極-源極間電壓Vds1。 The capacitor that supplies power to the driving circuit is charged by a current flowing through the drain terminal of the MOSFET, the second switching element, the capacitor, and the source terminal of the MOSFET between time t1 and time t2 after the gate-source voltage Vgs1 of the MOSFET becomes 0 and the MOSFET is turned off at time t0. When the charging of the capacitor starts, the voltage Vc1 of the capacitor increases to follow the drain-source voltage Vds1 of the MOSFET.

於該整流電路中,當電容器之電壓Vc1在時刻t2達到目標電壓Vcref1之後,將插入至MOSFET之汲極端子與電容器之正極端子之間之第2開關元件關斷,藉此阻斷電容器之充電電流Ic。藉此,電容器之電壓Vc1被控制為目標電壓Vcref1以下。 In the rectifier circuit, when the capacitor voltage Vc1 reaches the target voltage Vcref1 at time t2, the second switch element inserted between the drain terminal of the MOSFET and the positive terminal of the capacitor is turned off, thereby blocking the charging current Ic of the capacitor. In this way, the capacitor voltage Vc1 is controlled to be below the target voltage Vcref1.

[先前技術文獻] [Prior Art Literature] [專利文獻] [Patent Literature]

[專利文獻1]日本專利特開2001-251861號公報 [Patent document 1] Japanese Patent Publication No. 2001-251861

[專利文獻2]美國專利第10756645號說明書 [Patent Document 2] U.S. Patent No. 10756645 Specification

此處,於先前之整流電路中,如圖9所示,在時刻t2至時刻t5之間,電容器中儲存之電力作為驅動電路之待機電力被消耗,故電容器之電壓Vc1減少。進而,其後經過自時刻t5開始之MOSFET之接通期間,至下一時刻t0時MOSFET再次關斷且於時刻t1時開始電容器之充電之前,電容器中儲存之電力被用於產生驅動電路之消耗電力、或MOSFET之閘極-源極間電壓,故電容器之電壓持續減少。 Here, in the previous rectifier circuit, as shown in Figure 9, between time t2 and time t5, the power stored in the capacitor is consumed as standby power for the drive circuit, so the capacitor voltage Vc1 decreases. Furthermore, after the MOSFET is turned on from time t5, until the MOSFET is turned off again at the next time t0 and before the capacitor charging starts at time t1, the power stored in the capacitor is used to generate the consumption power of the drive circuit or the gate-source voltage of the MOSFET, so the capacitor voltage continues to decrease.

因此,必須於從時刻t2電容器充電完成至下一時刻t1再次開始電容器之充電為止的期間,電容器之電壓Vc1例如成為驅動電路之動作保證電壓、或者MOSFET之閘極閾值電壓以上的方式,設定電容器之電壓下限值Vcref2,並選定電容器之電容以滿足這一點。 Therefore, the capacitor voltage Vc1 must be set to a lower limit value Vcref2 of the capacitor voltage, and the capacitor capacitance must be selected to meet this requirement, such as the action guarantee voltage of the drive circuit or the gate threshold voltage of the MOSFET, from the moment when the capacitor charging is completed to the next moment when the capacitor charging starts again at t1.

然而,於先前之整流電路中,如上所述,由於必須確保對同步整流用之MOSFET之驅動電路供給電力之電容器的電容,故在減小電容器之體積方面存在極限,妨礙了整流電路之小型化、低成本化。 However, in the previous rectifier circuit, as mentioned above, since the capacitance of the capacitor that supplies power to the MOSFET driving circuit for synchronous rectification must be ensured, there is a limit in reducing the size of the capacitor, which hinders the miniaturization and cost reduction of the rectifier circuit.

本發明所欲解決之問題在於提供一種整流電路及使用其之電源,上述整流電路使用有整流用之開關元件,且能夠削減對用以驅動整流用之開關元件之驅動電路供給電力之電容器之必要電容,藉此能夠削減電容器之體積而實現小型化、低成本化。 The problem that the present invention aims to solve is to provide a rectifier circuit and a power source using the same. The rectifier circuit uses a switching element for rectification and can reduce the necessary capacitance of the capacitor for supplying power to the driving circuit for driving the switching element for rectification, thereby reducing the volume of the capacitor and achieving miniaturization and low cost.

為了解決上述問題,本發明之整流電路例如具有陽極及陰極,其特徵在於具備:第1開關元件,其第1端子連接於上述整流電路之上述陰極,第2端子連接於上述整流電路之上述陽極;第1二極體,其陰極連接於上述第1端子,陽極連接於上述第2端子;驅動電路,其驅動上述第1開關元件;及第1電容器,其對上述驅動電路供給電力;且上述第1電容器於上述第1開關元件斷開後至下一次接通為止之期間,具有:上述第1電容器被充電之第1充電期間及第2充電期間;及設置於上述第1充電期間與上述第2充電期間之間且停止對上述第1電容器之充電之充電停止期間。 In order to solve the above problem, the rectifier circuit of the present invention has an anode and a cathode, and is characterized by having: a first switching element, whose first terminal is connected to the cathode of the rectifier circuit, and whose second terminal is connected to the anode of the rectifier circuit; a first diode, whose cathode is connected to the first terminal, and whose anode is connected to the second terminal; a driving circuit, which drives the first switching element Component; and a first capacitor, which supplies power to the above-mentioned drive circuit; and the above-mentioned first capacitor has: a first charging period and a second charging period in which the above-mentioned first capacitor is charged; and a charging stop period set between the above-mentioned first charging period and the above-mentioned second charging period and stopping the charging of the above-mentioned first capacitor during the period from the above-mentioned first switching element being disconnected to the next time it is connected.

又,本發明之電源之特徵在於,例如具有上述整流電路。 Furthermore, the power supply of the present invention is characterized in that, for example, it has the above-mentioned rectifier circuit.

根據本發明之整流電路及電源,能夠分第1充電期間與第2充電期間兩次對電容器進行充電,且於第2充電期間補足在第1充電期間之後之充電停止期間被放電之至少一部分,故能夠削減電容器之必要電容,其結果,能夠削減電容器之體積而實現整流電路及電源之小型化、低成本化。 According to the rectifier circuit and power supply of the present invention, the capacitor can be charged twice, in the first charging period and the second charging period, and at least a portion of the discharged power during the charging stop period after the first charging period can be replenished in the second charging period, so the necessary capacitance of the capacitor can be reduced. As a result, the volume of the capacitor can be reduced to achieve miniaturization and cost reduction of the rectifier circuit and power supply.

1:驅動電路 1: Driving circuit

2:整流電路 2: Rectifier circuit

3:半導體封裝 3:Semiconductor packaging

4:半導體封裝 4:Semiconductor packaging

A:陽極 A: Anode

BPD:防逆流二極體 BPD: Backflow prevention diode

C1:電容器 C1: Capacitor

C2:電容器 C2: Capacitor

Co1:比較器 Co1: Comparator

Co2:比較器 Co2: Comparator

CRD1~CRD4:商用整流用二極體 CRD1~CRD4: Commercial rectifier diodes

CTR:控制電路 CTR: Control circuit

D:二極體 D:Diode

DQ1:內接二極體 DQ1: Internal diode

DQ2:內接二極體 DQ2: Internal diode

FWD:回流二極體 FWD: Reflux Diode

GD1:閘極驅動器 GD1: Gate driver

GD2:閘極驅動器 GD2: Gate driver

Ic:充電電流 Ic: Charging current

K:陰極 K: cathode

Q1:MOSFET Q1: MOSFET

Q2:MOSFET Q2: MOSFET

R1:電阻 R1: resistor

R2:電阻 R2: resistor

R3:電阻 R3: resistor

SSD1~SSD2:二次側整流二極體 SSD1~SSD2: Secondary side rectifier diode

t:時刻 t: time

t0~t5:時刻 t0~t5: time

T1~T4:端子 T1~T4: Terminals

Vc1:電容器之電壓 Vc1: Capacitor voltage

Vcref1:電容器C1之目標電壓 Vcref1: Target voltage of capacitor C1

Vcref2:電容器C1之電壓下限值 Vcref2: The lower voltage limit of capacitor C1

Vds1:MOSFET Q1之汲極-源極間電壓 Vds1: Drain-source voltage of MOSFET Q1

Vds2:MOSFET Q2之汲極-源極間電壓 Vds2: Drain-source voltage of MOSFET Q2

Vf:二極體D之正向電壓 Vf: forward voltage of diode D

Vgs1:MOSFET Q1之閘極-源極間電壓 Vgs1: Gate-source voltage of MOSFET Q1

Vgs2:MOSFET Q2之閘極-源極間電壓 Vgs2: Gate-source voltage of MOSFET Q2

Vgth1:MOSFET Q1之閘極閾值電壓 Vgth1: Gate threshold voltage of MOSFET Q1

Vgth2:MOSFET Q2之閘極閾值電壓 Vgth2: Gate threshold voltage of MOSFET Q2

Vref1:閾值電壓 Vref1: Threshold voltage

Vref2:閾值電壓 Vref2: Threshold voltage

圖1係實施例1之整流電路之電路圖。 Figure 1 is a circuit diagram of the rectifier circuit of Example 1.

圖2係表示實施例1之整流電路之動作波形之圖。 Figure 2 is a diagram showing the operating waveform of the rectifier circuit of Example 1.

圖3係實施例2之整流電路之電路圖。 Figure 3 is a circuit diagram of the rectifier circuit of Example 2.

圖4係實施例3之整流電路之電路圖。 Figure 4 is a circuit diagram of the rectifier circuit of Example 3.

圖5係實施例4之整流電路之電路圖。 Figure 5 is a circuit diagram of the rectifier circuit of Example 4.

圖6係表示實施例5之整流電路之構成之一例的圖。 FIG6 is a diagram showing an example of the configuration of the rectifier circuit of Example 5.

圖7係表示實施例5之整流電路之構成之另一例的圖。 FIG. 7 is a diagram showing another example of the configuration of the rectifier circuit of Example 5.

圖8係實施例6之電源之電路圖。 Figure 8 is a circuit diagram of the power supply of Example 6.

圖9係表示先前之整流電路之動作波形之圖。 Figure 9 shows the operation waveform of the previous rectifier circuit.

以下,使用圖式來說明本發明之實施例。於各圖、各實施例中,對相同或類似之構成要素標註相同符號,省略重複之說明。 The following uses drawings to illustrate the embodiments of the present invention. In each drawing and each embodiment, the same or similar components are marked with the same symbols, and repeated descriptions are omitted.

[實施例1] [Implementation Example 1]

首先,說明實施例1之基本原理。 First, the basic principle of Example 1 is explained.

圖1係實施例1之整流電路之電路圖。 Figure 1 is a circuit diagram of the rectifier circuit of Example 1.

如圖1所示,實施例1之整流電路2具有陽極A、陰極K、作為整流用之第1開關元件之MOSFET Q1、MOSFET Q1之內接二極體DQ1、驅動MOSFET Q1之驅動電路1、及對驅動電路1供給電力之電容器C1。進而,實施例1之整流電路2具有:作為用以控制電容器C1之電壓Vc1之第2開關元件的MOSFET Q2、MOSFET Q2之內接二極體DQ2、控制MOSFET Q2之控制電路CTR、及二極體D。驅動電路1具有比較器Co1及閘極驅動器GD1。 As shown in FIG1 , the rectifier circuit 2 of the embodiment 1 has an anode A, a cathode K, a MOSFET Q1 as a first switching element for rectification, an internal diode DQ1 of the MOSFET Q1, a driving circuit 1 for driving the MOSFET Q1, and a capacitor C1 for supplying power to the driving circuit 1. Furthermore, the rectifier circuit 2 of the embodiment 1 has: a MOSFET Q2 as a second switching element for controlling the voltage Vc1 of the capacitor C1, an internal diode DQ2 of the MOSFET Q2, a control circuit CTR for controlling the MOSFET Q2, and a diode D. The driving circuit 1 has a comparator Co1 and a gate driver GD1.

圖1中,記載了使用n通道增強型MOSFET作為MOSFET Q1,使用n通道空乏型MOSFET作為MOSFET Q2,但不限於此,亦可使用其他開關元件。又,關於內接二極體DQ1及內接二極體DQ2,亦不限於MOSFET中內置之內接二極體,亦可使用例如外部安裝之二極體等其他二極體。 FIG1 shows that an n-channel enhancement MOSFET is used as MOSFET Q1 and an n-channel depletion MOSFET is used as MOSFET Q2, but the present invention is not limited thereto and other switching elements may be used. In addition, regarding the internal diode DQ1 and the internal diode DQ2, the internal diodes are not limited to the internal diodes built into the MOSFET and other diodes such as externally mounted diodes may be used.

MOSFET Q1具有作為控制端子之閘極端子、作為一主端子之汲極端子及作為另一主端子之源極端子。MOSFET Q1係整流用之開關元件,汲極端子連接於整流電路2之陰極K,源極端子連接於整流電路2之陽極A,閘極端子連接於驅動電路1。 MOSFET Q1 has a gate terminal as a control terminal, a drain terminal as a main terminal, and a source terminal as another main terminal. MOSFET Q1 is a switching element for rectification, the drain terminal is connected to the cathode K of the rectification circuit 2, the source terminal is connected to the anode A of the rectification circuit 2, and the gate terminal is connected to the driving circuit 1.

內接二極體DQ1之陰極連接於MOSFET Q1之汲極端子,陽極連接於MOSFET Q1之源極端子。 The cathode of the internal diode DQ1 is connected to the drain terminal of the MOSFET Q1, and the anode is connected to the source terminal of the MOSFET Q1.

圖2係表示實施例1之整流電路之動作波形之圖。 Figure 2 is a diagram showing the operating waveform of the rectifier circuit of Example 1.

圖2係與圖9對應之圖,係將電阻負載連接於使用4個圖1所示之整流電路2而構成之橋接電路,並輸入正弦波電壓之情形時的動作波形。圖2中,縱軸表示MOSFET Q1之汲極-源極間電壓Vds1、MOSFET Q1之閘極-源極間電壓Vgs1、電容器C1之充電電流Ic、電容器C1之電壓Vc1,橫軸表示時刻t。又,Vgth1係MOSFET Q1之閘極閾值電壓。再者,關於MOSFET Q2之汲極-源極間電壓Vds2、MOSFET Q2之閘極-源極間電壓Vgs2、MOSFET Q2之閘極閾值電壓Vgth2,省略圖示及詳細之說明。 FIG2 is a diagram corresponding to FIG9, and is an operation waveform when a resistive load is connected to a bridge circuit formed by using four rectifier circuits 2 shown in FIG1, and a sine wave voltage is input. In FIG2, the vertical axis represents the drain-source voltage Vds1 of MOSFET Q1, the gate-source voltage Vgs1 of MOSFET Q1, the charging current Ic of capacitor C1, and the voltage Vc1 of capacitor C1, and the horizontal axis represents the time t. In addition, Vgth1 is the gate threshold voltage of MOSFET Q1. Furthermore, regarding the drain-source voltage Vds2 of MOSFET Q2, the gate-source voltage Vgs2 of MOSFET Q2, and the gate threshold voltage Vgth2 of MOSFET Q2, the illustration and detailed description are omitted.

如圖2所示,於實施例1之整流電路2中,對驅動電路1供給電力之電容器C1於MOSFET Q1在時刻t0斷開後至接下來在時刻t5接通為止之期間,具有:第1電容器C1被充電之第1充電期間(時刻t1至時刻t2)及第2充電期間(時刻t3至時刻t4);及設置於第1充電期間與第2充電期間之間且停止對電容器C1之充電之充電停止期間(時刻t2至時刻t3);就此點而言,與先前之圖9之動作波形不同。 As shown in FIG2 , in the rectifier circuit 2 of the embodiment 1, the capacitor C1 that supplies power to the driving circuit 1 has: a first charging period (from moment t1 to moment t2) and a second charging period (from moment t3 to moment t4) in which the first capacitor C1 is charged; and a charging stop period (from moment t2 to moment t3) in which the charging of the capacitor C1 is stopped, after the MOSFET Q1 is turned off at moment t0 and then turned on at moment t5; in this respect, it is different from the action waveform of the previous FIG9 .

於先前之圖9中,電容器之充電期間僅為時刻t1至時刻t2這一次,其後,必須選定電容器之電容,以使得能夠將電容器之電壓Vc1維持於電壓下限值Vcref2以上,直至下一充電期間即時刻t1為止。與此相對,根據實施例1之整流電路2,能夠分第1充電期間與第2充電期間兩次對電容器C1進行充電,且於第2充電期間補足在第1充電期間之後之充電停止期間被放電之至少一部分,故能夠削減電容器C1之必要電容,其結果,能夠削減電容器C1之體積而實現整流電路2及使用其之電源之小型化、低成本化。又,可使用MOSFET之斷開期間之消耗電力較大之驅動電路或控制IC。 In the previous FIG. 9, the charging period of the capacitor is only from time t1 to time t2. After that, the capacitance of the capacitor must be selected so that the voltage Vc1 of the capacitor can be maintained above the voltage lower limit Vcref2 until the next charging period, i.e., time t1. In contrast, according to the rectifier circuit 2 of the embodiment 1, the capacitor C1 can be charged twice, i.e., the first charging period and the second charging period, and at least a part of the discharged voltage during the charging stop period after the first charging period is replenished during the second charging period. Therefore, the necessary capacitance of the capacitor C1 can be reduced. As a result, the volume of the capacitor C1 can be reduced, thereby realizing the miniaturization and cost reduction of the rectifier circuit 2 and the power supply using the same. In addition, a driver circuit or control IC that consumes more power during the MOSFET's off period can be used.

圖2中,作為一例,第1充電期間及第2充電期間係MOSFET Q1之汲極-源極間電壓Vds1為規定之閾值電壓Vref1以下之期間,充電停止期間係設為MOSFET Q1之汲極-源極間電壓Vds1大於規定之閾值電壓Vref1之期間。藉此,第1充電期間係MOSFET Q1之汲極-源極間電壓Vds1處於增加中之期間,第2充電期間係MOSFET Q1之汲極-源極間電壓Vds1處於減少中之期間。圖2中,閾值電壓Vref1被設定為電容器C1之目標電壓Vcref1與二極體D之正向電壓Vf之合計電壓。 In FIG. 2 , as an example, the first charging period and the second charging period are periods when the drain-source voltage Vds1 of the MOSFET Q1 is less than the predetermined threshold voltage Vref1, and the charging stop period is a period when the drain-source voltage Vds1 of the MOSFET Q1 is greater than the predetermined threshold voltage Vref1. Thus, the first charging period is a period when the drain-source voltage Vds1 of the MOSFET Q1 is increasing, and the second charging period is a period when the drain-source voltage Vds1 of the MOSFET Q1 is decreasing. In Figure 2, the threshold voltage Vref1 is set to the sum of the target voltage Vcref1 of capacitor C1 and the forward voltage Vf of diode D.

當於MOSFET Q1之汲極-源極間電壓Vds1較大之期間將電容器C1進行充電時,位於路徑中途之MOSFET Q2之汲極-源極間電壓Vds2亦變大,MOSFET Q2所產生之損耗(Vds2×Ic)亦變大。因此,於實施例1之整流電路2中,藉由將MOSFET Q1之汲極-源極間電壓Vds1大於規定之閾值電壓Vref1之期間設為充電停止期間而抑制損耗之產生,提高充電效率。進而,第2充電期間由於為MOSFET Q1之汲極-源極間電壓Vds1處於減少中之期間,故能夠縮短至下一個第1充電期間為止之期間,能夠有效削減電容器C1之必要電容。 When the capacitor C1 is charged during the period when the drain-source voltage Vds1 of the MOSFET Q1 is large, the drain-source voltage Vds2 of the MOSFET Q2 located in the middle of the path also increases, and the loss (Vds2×Ic) generated by the MOSFET Q2 also increases. Therefore, in the rectifier circuit 2 of the embodiment 1, the period when the drain-source voltage Vds1 of the MOSFET Q1 is greater than the specified threshold voltage Vref1 is set as the charging stop period to suppress the generation of loss and improve the charging efficiency. Furthermore, since the second charging period is the period when the drain-source voltage Vds1 of MOSFET Q1 is decreasing, it can be shortened to the period until the next first charging period, which can effectively reduce the required capacitance of capacitor C1.

其次,使用圖1及圖2,對實施例1之詳細之構成與動作進行說明。 Next, the detailed structure and operation of Example 1 are described using Figures 1 and 2.

MOSFET Q2具有:作為控制端子之閘極端子、作為一主端子之汲極端子及作為另一主端子之源極端子。MOSFET Q2係用以控制電容器C1之電壓Vc1之開關元件,汲極端子連接於MOSFET Q1之汲極端子,源極端子經由二極體D連接於電容器C1,閘極端子連接於控制電路CTR。 MOSFET Q2 has: a gate terminal as a control terminal, a drain terminal as a main terminal, and a source terminal as another main terminal. MOSFET Q2 is a switching element for controlling the voltage Vc1 of capacitor C1. The drain terminal is connected to the drain terminal of MOSFET Q1, the source terminal is connected to capacitor C1 via diode D, and the gate terminal is connected to the control circuit CTR.

內接二極體DQ2之陰極連接於MOSFET Q2之汲極端子,陽極連接於MOSFET Q2之源極端子。 The cathode of the internal diode DQ2 is connected to the drain terminal of MOSFET Q2, and the anode is connected to the source terminal of MOSFET Q2.

二極體D之陽極連接於MOSFET Q2之源極端子,陰極連接於電容器C1之正極端子。 The anode of diode D is connected to the source terminal of MOSFET Q2, and the cathode is connected to the positive terminal of capacitor C1.

電容器C1之正極端子連接於二極體D之陰極,負極端子連接於MOSFET Q1之源極端子。 The positive terminal of capacitor C1 is connected to the cathode of diode D, and the negative terminal is connected to the source terminal of MOSFET Q1.

驅動電路1具有:比較器Co1,其由電容器C1供給電力,檢測MOSFET Q2之源極端子與MOSFET Q1之源極端子之間之電壓;及閘極驅動器GD1,其輸入端子連接於比較器Co1之輸出端子,輸出端子連接於MOSFET Q1之閘極端子,由電容器C1供給電力,基於比較器Co1之輸出信號而控制MOSFET Q1。 The driver circuit 1 has: a comparator Co1, which is supplied with power by a capacitor C1 and detects the voltage between the source terminal of the MOSFET Q2 and the source terminal of the MOSFET Q1; and a gate driver GD1, whose input terminal is connected to the output terminal of the comparator Co1 and whose output terminal is connected to the gate terminal of the MOSFET Q1, which is supplied with power by the capacitor C1 and controls the MOSFET Q1 based on the output signal of the comparator Co1.

控制電路CTR將控制MOSFET Q2之信號輸入至MOSFET Q2之控制端子。而且,控制電路CTR於MOSFET Q1之汲極-源極間電壓Vds1為電容器C1之目標電壓Vcref1與二極體D之正向電壓Vf之合計電壓(閾值電壓Vref1)以下之期間,將MOSFET Q2控制為接通狀態,於MOSFET Q1之汲極-源極間電壓Vds1較電容器C1之目標電壓Vcref1與二極體D之正向電壓Vf之合計電壓(閾值電壓Vref1)大之期間,將MOSFET Q2控制為斷開狀態,藉此控制向電容器C1流動之充電電流Ic。 The control circuit CTR inputs a signal for controlling MOSFET Q2 to the control terminal of MOSFET Q2. Furthermore, the control circuit CTR controls MOSFET Q2 to be turned on when the drain-source voltage Vds1 of MOSFET Q1 is less than the total voltage (threshold voltage Vref1) of the target voltage Vcref1 of capacitor C1 and the forward voltage Vf of diode D, and controls MOSFET Q2 to be turned off when the drain-source voltage Vds1 of MOSFET Q1 is greater than the total voltage (threshold voltage Vref1) of the target voltage Vcref1 of capacitor C1 and the forward voltage Vf of diode D, thereby controlling the charging current Ic flowing to capacitor C1.

此處,電容器C1之目標電壓Vcref1被設定為充分大於MOSFET Q1之閘極閾值電壓Vgth1,以便驅動電路1能夠驅動MOSFET Q1。又,電容器C1之目標電壓Vcref1被設定為比較器Co1之最大額定電壓、閘極驅動器GD1之最大額定電壓、MOSFET Q1之閘極-源極間電壓Vgs1之最大額定電壓中之最小者以下。藉此,能夠防止驅動電路1或MOSFET Q1損壞 Here, the target voltage Vcref1 of capacitor C1 is set to be sufficiently greater than the gate threshold voltage Vgth1 of MOSFET Q1 so that the driver circuit 1 can drive MOSFET Q1. In addition, the target voltage Vcref1 of capacitor C1 is set to be less than the minimum of the maximum rated voltage of comparator Co1, the maximum rated voltage of gate driver GD1, and the maximum rated voltage of gate-source voltage Vgs1 of MOSFET Q1. In this way, damage to the driver circuit 1 or MOSFET Q1 can be prevented.

再者,控制電路CTR亦可設為具有用以決定控制MOSFET Q2之時序之微分電路的構成。例如,能夠基於MOSFET Q1之汲極-源極間電壓Vds1之斜率決定充電時序。 Furthermore, the control circuit CTR can also be configured to have a differential circuit for determining the timing of controlling the MOSFET Q2. For example, the charging timing can be determined based on the slope of the drain-source voltage Vds1 of the MOSFET Q1.

作為一例,於圖2中,藉由檢測MOSFET Q1之汲極-源極間電壓Vds1之斜率處於規定之範圍、例如較時刻t3之斜率大且較時刻t2之斜率小之期間,能夠檢測出該期間係MOSFET Q1之汲極-源極間電壓Vds1較閾值電壓Vref1大之期間(時刻t2至時刻t3),能夠基於此來控制MOSFET Q2。再者,不限於此,亦可藉由檢測MOSFET Q1之汲極-源極間電壓Vds1之斜率處於規定之範圍、例如與時刻t0至時刻t2或時刻t1至時刻t2之斜率對應之規定之範圍、與時刻t3至時刻t5或時刻t3至時刻t4之斜率對應之規定之範圍之某一者,而檢測出該期間為第1充電期間或第2充電期間,基於此來控制MOSFET Q2。 As an example, in FIG. 2 , by detecting that the slope of the drain-source voltage Vds1 of the MOSFET Q1 is within a specified range, for example, a period when the slope is larger than the slope at time t3 and smaller than the slope at time t2, it is possible to detect that the period is a period when the drain-source voltage Vds1 of the MOSFET Q1 is larger than the threshold voltage Vref1 (from time t2 to time t3), and the MOSFET Q2 can be controlled based on this. Furthermore, without limitation to this, the slope of the drain-source voltage Vds1 of the MOSFET Q1 can be detected to be within a specified range, such as a specified range corresponding to the slope from time t0 to time t2 or from time t1 to time t2, or a specified range corresponding to the slope from time t3 to time t5 or from time t3 to time t4, and the period can be detected to be the first charging period or the second charging period, and the MOSFET Q2 can be controlled based on this.

又,作為另一例,亦可以如下方式進行控制,即,檢測MOSFET Q1之汲極-源極間電壓Vds1之大小,並且利用微分電路亦檢測其斜率,當MOSFET Q1之汲極-源極間電壓Vds1為閾值電壓Vref1以下,且其斜率處於不太陡峭之規定斜率之範圍內時,將電容器C1充電。例如當MOSFET Q1之汲極-源極間電壓Vds1並非完整之正弦波而混有雜訊時,可能僅一瞬間低於閾值電壓Vref1,且立即恢復原狀。於此種情形時,若不考慮斜率,則會在將MOSFET Q2接通後立即將其斷開,而產生損耗。該情形時,斜率較通常更為陡峭,故藉由利用微分電路亦檢測其斜率並用於控制,能夠防止由雜訊引起之誤動作。 As another example, control can also be performed in the following manner, that is, the magnitude of the drain-source voltage Vds1 of the MOSFET Q1 is detected, and its slope is also detected by a differential circuit. When the drain-source voltage Vds1 of the MOSFET Q1 is below the threshold voltage Vref1 and its slope is within a range of a prescribed slope that is not too steep, the capacitor C1 is charged. For example, when the drain-source voltage Vds1 of the MOSFET Q1 is not a complete sine wave but is mixed with noise, it may be lower than the threshold voltage Vref1 for only a moment and immediately return to its original state. In this case, if the slope is not considered, the MOSFET Q2 will be turned off immediately after it is turned on, resulting in loss. In this case, the slope is steeper than usual, so by using a differential circuit to detect the slope and use it for control, it is possible to prevent false actions caused by noise.

其次,基於圖2來說明實施例1之整流電路2之動作。 Next, the operation of the rectifier circuit 2 of Embodiment 1 is explained based on FIG. 2 .

於時刻t0,整流期間結束,非整流期間開始。 At time t0, the rectification period ends and the non-rectification period begins.

時刻t0至時刻t1之期間係非整流期間,MOSFET Q1斷開。又,隨著輸入至橋接電路之正弦波電壓之增加,MOSFET Q1之汲極-源極間電壓Vds1增加。又,於本期間,MOSFET Q1之汲極-源極間電壓Vds1小於閾值電壓Vref1,故控制電路CTR將MOSFET Q2控制為接通。此時,雖然MOSFET Q1之汲極-源極間電壓Vds1小於電容器C1之電壓Vc1,但二極體D防止了自電容器C1之正極端子向MOSFET Q1之汲極端子之電流之逆流。 The period from time t0 to time t1 is a non-rectification period, and MOSFET Q1 is turned off. Also, as the sine wave voltage input to the bridge circuit increases, the drain-source voltage Vds1 of MOSFET Q1 increases. Also, during this period, the drain-source voltage Vds1 of MOSFET Q1 is less than the threshold voltage Vref1, so the control circuit CTR controls MOSFET Q2 to be turned on. At this time, although the drain-source voltage Vds1 of MOSFET Q1 is less than the voltage Vc1 of capacitor C1, the diode D prevents the current from the positive terminal of capacitor C1 from flowing back to the drain terminal of MOSFET Q1.

於時刻t1至時刻t2之期間,MOSFET Q1之汲極-源極間電壓Vds1小於閾值電壓Vref1,故控制電路CTR隨後將MOSFET Q2控制為接通。又,MOSFET Q1之汲極-源極間電壓Vds1大於電容器C1之電壓Vc1與二極體D之正向電壓Vf之合計。其結果,向電容器C1之充電開始,電容器C1之電壓Vc1增加。電容器C1之充電電流Ic於MOSFET Q1之汲極端子、MOSFET Q2、二極體D、電容器C1、MOSFET Q1之源極端子之路徑中流通。 During the period from time t1 to time t2, the drain-source voltage Vds1 of MOSFET Q1 is less than the threshold voltage Vref1, so the control circuit CTR then controls MOSFET Q2 to be turned on. In addition, the drain-source voltage Vds1 of MOSFET Q1 is greater than the sum of the voltage Vc1 of capacitor C1 and the forward voltage Vf of diode D. As a result, charging of capacitor C1 starts, and the voltage Vc1 of capacitor C1 increases. The charging current Ic of capacitor C1 flows through the path of the drain terminal of MOSFET Q1, MOSFET Q2, diode D, capacitor C1, and the source terminal of MOSFET Q1.

於時刻t2,MOSFET Q1之汲極-源極間電壓Vds1與閾值電壓Vref1相等。 At time t2, the drain-source voltage Vds1 of MOSFET Q1 is equal to the threshold voltage Vref1.

於時刻t2至時刻t3之期間,MOSFET Q1之汲極-源極間電壓Vds1大於閾值電壓Vref1,故控制電路CTR將MOSFET Q2控制為斷開,從而成為充電停止期間。其結果,電容器C1之充電電流Ic被阻斷。本期間,電容器C1中儲存之電力作為驅動電路1之待機電力被消耗,且電容器C1未被充電,故電容器之電壓Vc1減少。又,本期間,輸入至橋接電路之正弦波電壓係前半部分增加,後半部分減少。伴隨於此,MOSFET Q1之汲極-源極間電壓Vds1亦係前半部分增加,後半部分轉為減少。 During the period from time t2 to time t3, the drain-source voltage Vds1 of MOSFET Q1 is greater than the threshold voltage Vref1, so the control circuit CTR controls MOSFET Q2 to be disconnected, thereby becoming a charging stop period. As a result, the charging current Ic of capacitor C1 is blocked. During this period, the power stored in capacitor C1 is consumed as standby power for driving circuit 1, and capacitor C1 is not charged, so the capacitor voltage Vc1 decreases. In addition, during this period, the sine wave voltage input to the bridge circuit increases in the first half and decreases in the second half. Along with this, the drain-source voltage Vds1 of MOSFET Q1 also increases in the first half and decreases in the second half.

於時刻t3,MOSFET Q1之汲極-源極間電壓Vds1與閾值電壓Vref1相等。 At time t3, the drain-source voltage Vds1 of MOSFET Q1 is equal to the threshold voltage Vref1.

於時刻t3至時刻t4之期間,MOSFET Q1之汲極-源極間電壓Vds1小於閾值電壓Vref1,故控制電路CTR將MOSFET Q2控制為接通。又,於時刻t2至時刻t3之期間,電容器C1之電壓Vc1減少,故MOSFET Q1之汲極-源極間電壓Vds1大於電容器C1之電壓Vc1與二極體D之正向電壓Vf之合計。其結果,電容器C1之充電電流Ic於MOSFET Q1之汲極端子、MOSFET Q2、二極體D、電容器C1、MOSFET Q1之源極端子之路徑中流通,電容器C1之電壓Vc1增加。於此期間亦進行電容器C1之充電之方面與先前之圖9不同。 During the period from time t3 to time t4, the drain-source voltage Vds1 of MOSFET Q1 is less than the threshold voltage Vref1, so the control circuit CTR controls MOSFET Q2 to be turned on. In addition, during the period from time t2 to time t3, the voltage Vc1 of capacitor C1 decreases, so the drain-source voltage Vds1 of MOSFET Q1 is greater than the sum of the voltage Vc1 of capacitor C1 and the forward voltage Vf of diode D. As a result, the charging current Ic of capacitor C1 flows through the path of the drain terminal of MOSFET Q1, MOSFET Q2, diode D, capacitor C1, and the source terminal of MOSFET Q1, and the voltage Vc1 of capacitor C1 increases. The capacitor C1 is also charged during this period, which is different from the previous Figure 9.

時刻t4係MOSFET Q1之電壓和電容器C1之電壓Vc1與二極體D之正向電壓Vf之合計不相等之時刻。 The moment t4 is the moment when the sum of the voltage of MOSFET Q1, the voltage Vc1 of capacitor C1, and the forward voltage Vf of diode D are not equal.

於時刻t4至時刻t5之期間,MOSFET Q1之汲極-源極間電壓Vds1小於閾值電壓Vref1,故控制電路CTR隨後將MOSFET Q2控制為接通。此時,二極體D防止電荷自電容器C1之正極端子向MOSFET Q1之汲極端子流出。 During the period from time t4 to time t5, the drain-source voltage Vds1 of MOSFET Q1 is less than the threshold voltage Vref1, so the control circuit CTR then controls MOSFET Q2 to be turned on. At this time, the diode D prevents the charge from flowing from the positive terminal of the capacitor C1 to the drain terminal of the MOSFET Q1.

最後,於時刻t5至時刻t0之期間,再次成為整流期間,驅動電路1使MOSFET Q1接通,從陽極A向陰極K流通整流電流。 Finally, during the period from moment t5 to moment t0, it becomes a rectification period again, and the driving circuit 1 turns on MOSFET Q1, and the rectified current flows from the anode A to the cathode K.

此處,對驅動電路1之動作與MOSFET Q1之控制方法進行說明。 Here, the operation of the driver circuit 1 and the control method of the MOSFET Q1 are explained.

驅動電路1之比較器Co1自MOSFET Q2之源極端子與MOSFET Q1之源極端子檢測MOSFET Q1之汲極-源極間電壓Vds1。基於所檢測出之電壓,驅動電路1使MOSFET Q1導通、關斷。 The comparator Co1 of the driver circuit 1 detects the drain-source voltage Vds1 of the MOSFET Q1 from the source terminal of the MOSFET Q2 and the source terminal of the MOSFET Q1. Based on the detected voltage, the driver circuit 1 turns the MOSFET Q1 on and off.

自陽極A向陰極K流動之整流電流首先流經MOSFET Q1之內接二極體DQ1。因內接二極體DQ1之電壓降,MOSFET Q1之汲極-源極間電壓Vds1成為負值。 The rectified current flowing from anode A to cathode K first flows through the internal diode DQ1 of MOSFET Q1. Due to the voltage drop of the internal diode DQ1, the drain-source voltage Vds1 of MOSFET Q1 becomes negative.

當比較器Co1所檢測出之電壓小於比較器Co1所具有之第1閾值電壓時,比較器Co1輸出接通信號,閘極驅動器GD1將MOSFET Q1之閘極-源極間電壓Vgs1上拉至電容器C1之電壓Vc1,藉此MOSFET Q1導通。 When the voltage detected by comparator Co1 is less than the first threshold voltage of comparator Co1, comparator Co1 outputs a connection signal, and gate driver GD1 pulls up the gate-source voltage Vgs1 of MOSFET Q1 to the voltage Vc1 of capacitor C1, thereby turning on MOSFET Q1.

其後,MOSFET Q1之汲極-源極間電壓Vds1成為由整流電流與MOSFET Q1之接通電阻決定之電壓。 Thereafter, the drain-source voltage Vds1 of MOSFET Q1 becomes a voltage determined by the rectified current and the on-resistance of MOSFET Q1.

隨著時間經過,整流電流減少。隨著整流電流之減少,MOSFET Q1之汲極-源極間電壓Vds1增加。當比較器Co1所檢測出之電壓大於比較器Co1所具有之第2閾值電壓時,比較器Co1輸出斷開信號,閘極驅動器GD1將MOSFET Q1之閘極-源極間電壓Vgs1下拉至0V,藉此,MOSFET Q1關斷。 As time goes by, the rectified current decreases. As the rectified current decreases, the drain-source voltage Vds1 of MOSFET Q1 increases. When the voltage detected by comparator Co1 is greater than the second threshold voltage of comparator Co1, comparator Co1 outputs a disconnection signal, and gate driver GD1 pulls down the gate-source voltage Vgs1 of MOSFET Q1 to 0V, thereby turning off MOSFET Q1.

比較器Co1所具有之第1閾值電壓與第2閾值電壓可為相同值,亦可為第1閾值電壓小於第2閾值電壓。當第1閾值電壓小於第2閾值電壓時,能夠抑制MOSFET在短週期內反覆接通與斷開之振動。 The first threshold voltage and the second threshold voltage of the comparator Co1 can be the same value, or the first threshold voltage can be smaller than the second threshold voltage. When the first threshold voltage is smaller than the second threshold voltage, the vibration of the MOSFET repeatedly turning on and off in a short period of time can be suppressed.

再次回到圖2之說明。 Let’s go back to the description of Figure 2.

於時刻t5至時刻t0之期間,MOSFET Q1之汲極-源極間電壓Vds1小於閾值電壓Vref1,故控制電路CTR隨後將MOSFET Q2控制為接通。另一方面,MOSFET Q1之汲極-源極間電壓Vds1小於電容器C1之電壓Vc1與二極體D之正向電壓Vf之合計,故電容器C1未被充電。此時,MOSFET Q1之汲極-源極間電壓Vds1小於電容器C1之電壓Vc1,但二極體D防止了電流自電容器C1之正極端子向MOSFET Q1之汲極端子之逆流。 During the period from time t5 to time t0, the drain-source voltage Vds1 of MOSFET Q1 is less than the threshold voltage Vref1, so the control circuit CTR then controls MOSFET Q2 to be turned on. On the other hand, the drain-source voltage Vds1 of MOSFET Q1 is less than the sum of the voltage Vc1 of capacitor C1 and the forward voltage Vf of diode D, so capacitor C1 is not charged. At this time, the drain-source voltage Vds1 of MOSFET Q1 is less than the voltage Vc1 of capacitor C1, but diode D prevents the current from flowing back from the positive terminal of capacitor C1 to the drain terminal of MOSFET Q1.

其結果,本期間,電容器C1中儲存之電力被用於產生驅動電路1之消 耗電力與MOSFET Q1之閘極-源極間電壓Vgs1,故電容器C1之電壓Vc1減少。 As a result, during this period, the power stored in capacitor C1 is used to generate the power consumption of driving circuit 1 and the gate-source voltage Vgs1 of MOSFET Q1, so the voltage Vc1 of capacitor C1 decreases.

藉由反覆進行上述控制,實施例1之整流電路2實現同步整流。 By repeatedly performing the above control, the rectifier circuit 2 of Example 1 realizes synchronous rectification.

上述控制中,於時刻t2至時刻t3之期間與時刻t4至下一時刻t1之期間,電容器C1未被充電,故電容器C1之電壓Vc1減少。必須選定電容器C1之電容,以使得任一期間之電容器C1之電壓Vc1之最小值均為電容器C1之電壓下限值Vcref2以上。電容器C1之電壓下限值Vcref2例如為如下值,即,大於驅動電路1之最低動作電壓,且大於如MOSFET Q1之接通電阻充分小之MOSFET Q1之閘極閾值電壓Vgth1。 In the above control, capacitor C1 is not charged during the period from moment t2 to moment t3 and from moment t4 to the next moment t1, so the voltage Vc1 of capacitor C1 decreases. The capacitance of capacitor C1 must be selected so that the minimum value of the voltage Vc1 of capacitor C1 in any period is greater than the lower limit value Vcref2 of the voltage of capacitor C1. The lower limit value Vcref2 of the voltage of capacitor C1 is, for example, a value greater than the minimum operating voltage of the drive circuit 1 and greater than the gate threshold voltage Vgth1 of MOSFET Q1 when the on-resistance of MOSFET Q1 is sufficiently small.

如以上所作說明,根據實施例1之整流電路2,能夠削減電容器C1之必要電容,其結果,能夠削減電容器C1之體積而實現整流電路2及電源之小型化、低成本化。 As described above, according to the rectifier circuit 2 of embodiment 1, the necessary capacitance of the capacitor C1 can be reduced, and as a result, the volume of the capacitor C1 can be reduced to achieve miniaturization and low cost of the rectifier circuit 2 and the power supply.

[實施例2] [Example 2]

圖3係實施例2之整流電路之電路圖。 Figure 3 is a circuit diagram of the rectifier circuit of Example 2.

實施例2係實施例1之變化例。實施例2示出了控制電路CTR之具體構成之一例,此點與實施例1不同,其他構成之效果基本上與實施例1相同。因此,實施例2中,以與實施例1之不同點為中心進行說明,省略與實施例1重複之說明。 Embodiment 2 is a variation of Embodiment 1. Embodiment 2 shows an example of a specific structure of the control circuit CTR, which is different from Embodiment 1. The effects of other structures are basically the same as those of Embodiment 1. Therefore, in Embodiment 2, the explanation is centered on the differences from Embodiment 1, and the explanations repeated in Embodiment 1 are omitted.

實施例2之整流電路2之控制電路CTR具有:電阻R1及電阻R2,其等將MOSFET Q1之汲極-源極間電壓Vds1進行分壓;比較器Co2,其由電容器C1供給電力,檢測電阻R2之電壓;及閘極驅動器GD2,其輸入端子連接於比較器Co2之輸出端子,輸出端子連接於MOSFET Q2之閘極端子,由電容器C1供給電力,基於比較器Co2之輸出信號而控制MOSFET Q2。 The control circuit CTR of the rectifier circuit 2 of the embodiment 2 has: resistors R1 and R2, which divide the drain-source voltage Vds1 of the MOSFET Q1; a comparator Co2, which is supplied with power by the capacitor C1 and detects the voltage of the resistor R2; and a gate driver GD2, whose input terminal is connected to the output terminal of the comparator Co2, whose output terminal is connected to the gate terminal of the MOSFET Q2, and which is supplied with power by the capacitor C1 and controls the MOSFET Q2 based on the output signal of the comparator Co2.

此處,電阻R1及電阻R2被設定為,電阻R2之電壓為比較器Co2之額定電壓以下。比較器Co2將所檢測出之電阻R2之電壓與閾值電壓Vref2加以比較,將信號輸出至閘極驅動器GD2。此時,當MOSFET Q1之汲極-源極間電壓Vds1與閾值電壓Vref1不相等時,以使電阻R2之電壓與閾值電壓Vref2相等之方式選定閾值電壓Vref2。 Here, resistors R1 and R2 are set so that the voltage of resistor R2 is lower than the rated voltage of comparator Co2. Comparator Co2 compares the detected voltage of resistor R2 with the threshold voltage Vref2 and outputs the signal to gate driver GD2. At this time, when the drain-source voltage Vds1 of MOSFET Q1 is not equal to the threshold voltage Vref1, the threshold voltage Vref2 is selected so that the voltage of resistor R2 is equal to the threshold voltage Vref2.

根據實施例2之整流電路2,能夠實現實施例1之圖2中所說明之動作。 According to the rectifier circuit 2 of embodiment 2, the action described in FIG. 2 of embodiment 1 can be realized.

[實施例3] [Implementation Example 3]

圖4係實施例3之整流電路之電路圖。 Figure 4 is a circuit diagram of the rectifier circuit of Example 3.

實施例3係實施例1之變化例。實施例3具有電阻R3,此點與實施例1不同,其他構成之效果基本上與實施例1相同。因此,實施例3中,以與實施例1之不同點為中心進行說明,省略與實施例1重複之說明。再者,實施例3亦可應用於實施例2。 Embodiment 3 is a variation of Embodiment 1. Embodiment 3 has a resistor R3, which is different from Embodiment 1. The effects of other components are basically the same as those of Embodiment 1. Therefore, in Embodiment 3, the explanation is centered on the differences from Embodiment 1, and the explanations repeated with Embodiment 1 are omitted. Furthermore, Embodiment 3 can also be applied to Embodiment 2.

實施例3之整流電路2具有一端子連接於MOSFET Q1之汲極端子,另一端子連接於MOSFET Q2之汲極端子的電阻R3。換言之,具有插入至MOSFET Q1之汲極端子與MOSFET Q2之汲極端子之間的電阻R3。 The rectifier circuit 2 of Embodiment 3 has a resistor R3 having one terminal connected to the drain terminal of MOSFET Q1 and the other terminal connected to the drain terminal of MOSFET Q2. In other words, the resistor R3 is inserted between the drain terminal of MOSFET Q1 and the drain terminal of MOSFET Q2.

實施例1至實施例2之整流電路2中,在電容器C1充電時,電容器C1之充電電流Ic於MOSFET Q1之汲極端子、MOSFET Q2、二極體D、電容器C1、MOSFET Q1之源極端子之路徑中流通。尤其是在電容器C1之充電剛開始後,充電電流Ic急遽增加。其結果,可能會產生因充電電流Ic之路徑中之損耗增加所致的整流電路2之效率降低、或者超過MOSFET Q2或二極體D之額定溫度之溫度上升。 In the rectifier circuit 2 of Examples 1 to 2, when the capacitor C1 is charged, the charging current Ic of the capacitor C1 flows in the path of the drain terminal of the MOSFET Q1, the MOSFET Q2, the diode D, the capacitor C1, and the source terminal of the MOSFET Q1. In particular, the charging current Ic increases rapidly after the charging of the capacitor C1 begins. As a result, the efficiency of the rectifier circuit 2 may decrease due to the increase in the loss in the path of the charging current Ic, or the temperature may rise beyond the rated temperature of the MOSFET Q2 or the diode D.

根據實施例3之整流電路2,藉由於充電電流Ic之路徑上串聯地插入電阻R3,能夠抑制電容器C1之充電電流Ic之急遽增加。即,電阻R3作為防突波電流電阻發揮功能。藉此,能夠抑制因充電電流Ic之路徑中之損耗增加所致的整流電路2之效率降低、及MOSFET Q2或二極體D之溫度上升。 According to the rectifier circuit 2 of the embodiment 3, by inserting the resistor R3 in series in the path of the charging current Ic, the rapid increase of the charging current Ic of the capacitor C1 can be suppressed. That is, the resistor R3 functions as a surge current prevention resistor. In this way, the efficiency reduction of the rectifier circuit 2 caused by the increase of the loss in the path of the charging current Ic and the temperature increase of the MOSFET Q2 or the diode D can be suppressed.

[實施例4] [Implementation Example 4]

圖5係實施例4之整流電路之電路圖。 Figure 5 is a circuit diagram of the rectifier circuit of Example 4.

實施例4係實施例3之變化例。實施例4具有電容器C2,此點與實施例3不同,其他構成、效果基本上與實施例3相同。因此,於實施例4中,以 與實施例3之不同點為中心進行說明,省略與實施例3重複之說明。再者,實施例4亦可應用於實施例1至實施例2。 Embodiment 4 is a variation of Embodiment 3. Embodiment 4 has a capacitor C2, which is different from Embodiment 3. The other structures and effects are basically the same as those of Embodiment 3. Therefore, in Embodiment 4, the explanation is centered on the differences from Embodiment 3, and the explanations repeated with Embodiment 3 are omitted. Furthermore, Embodiment 4 can also be applied to Embodiments 1 to 2.

實施例4之整流電路2具有正極端子連接於MOSFET Q2之源極端子,負極端子連接於MOSFET Q1之源極端子的電容器C2。 The rectifier circuit 2 of Embodiment 4 has a capacitor C2 whose positive terminal is connected to the source terminal of MOSFET Q2 and whose negative terminal is connected to the source terminal of MOSFET Q1.

實施例1至實施例3之整流電路中,有因比較器Co1所檢測之電壓中包含之高頻雜訊而導致比較器Co1誤動作之情形。其結果,例如有MOSFET Q1於整流期間關斷而損及同步整流所致之損耗減少效果。 In the rectifier circuits of Examples 1 to 3, there is a situation where the comparator Co1 malfunctions due to the high-frequency noise contained in the voltage detected by the comparator Co1. As a result, for example, the MOSFET Q1 is turned off during the rectification period, which reduces the loss caused by the synchronous rectification.

根據實施例4之整流電路2,藉由利用MOSFET Q2之接通電阻、電阻R3、電容器C2構成低通濾波器,能夠抑制比較器Co1所檢測之電壓中包含之高頻雜訊。再者,即便於未插入電阻R3之情形時,由於利用MOSFET Q2之接通電阻與電容器C2構成低通濾波器,故同樣能夠抑制比較器Co1所檢測之電壓中包含之高頻雜訊。藉此,能夠抑制比較器Co1之誤動作、MOSFET Q1之非預期之導通與關斷,不會損及同步整流所致之損耗減少效果。 According to the rectifier circuit 2 of Embodiment 4, by using the on-resistance of MOSFET Q2, resistor R3, and capacitor C2 to form a low-pass filter, the high-frequency noise contained in the voltage detected by the comparator Co1 can be suppressed. Furthermore, even when the resistor R3 is not inserted, the high-frequency noise contained in the voltage detected by the comparator Co1 can be suppressed by using the on-resistance of MOSFET Q2 and capacitor C2 to form a low-pass filter. In this way, the malfunction of the comparator Co1 and the unexpected conduction and shutdown of the MOSFET Q1 can be suppressed without affecting the loss reduction effect caused by synchronous rectification.

[實施例5] [Implementation Example 5]

圖6係表示實施例5之整流電路之構成之一例的圖。圖7係表示實施例5之整流電路之構成之另一例的圖。 FIG. 6 is a diagram showing an example of the configuration of the rectifier circuit of Example 5. FIG. 7 is a diagram showing another example of the configuration of the rectifier circuit of Example 5.

實施例5係實施例1之變化例。實施例5將整流電路2內置於半導體封 裝,此點與實施例1不同,其他構成之效果基本上與實施例1相同。因此,實施例5中,以與實施例1之不同點為中心進行說明,省略與實施例1重複之說明。再者,實施例5之圖6及圖7中,以應用於實施例1之圖1為例進行說明,但亦可應用於實施例1中所說明之各種變化例、或實施例2至實施例4。 Embodiment 5 is a variation of Embodiment 1. Embodiment 5 places the rectifier circuit 2 inside the semiconductor package, which is different from Embodiment 1. The effects of other components are basically the same as those of Embodiment 1. Therefore, in Embodiment 5, the explanation is centered on the differences from Embodiment 1, and the explanations repeated with Embodiment 1 are omitted. Furthermore, in FIG. 6 and FIG. 7 of Embodiment 5, the explanation is based on FIG. 1 applied to Embodiment 1, but it can also be applied to various variations described in Embodiment 1, or Embodiments 2 to 4.

圖6係表示將整流電路2內置於半導體封裝3所得之構成。半導體封裝3具有陰極K及陽極A作為外部端子。 FIG6 shows a structure in which the rectifier circuit 2 is built into the semiconductor package 3. The semiconductor package 3 has a cathode K and an anode A as external terminals.

圖7表示例如將使用4個整流電路2而構成之橋接電路等複數個整流電路2內置於1個半導體封裝4所得之構成。半導體封裝4具有端子T1~T4作為外部端子。 FIG. 7 shows a structure in which a plurality of rectifier circuits 2, such as a bridge circuit formed by using four rectifier circuits 2, are built into a semiconductor package 4. The semiconductor package 4 has terminals T1 to T4 as external terminals.

根據實施例5,於設計、製造使用整流電路之製品時,只要購買並組裝如本實施例之內置有驅動電路與電容器之整流電路即可,省去了驅動電路與電容器之設計及安裝之步驟數,故有能夠削減整體之設計及安裝之步驟數的效果。 According to Example 5, when designing and manufacturing products using rectifier circuits, it is sufficient to purchase and assemble rectifier circuits with built-in drive circuits and capacitors as in this example, thereby eliminating the steps of designing and installing the drive circuits and capacitors, thereby having the effect of reducing the number of overall design and installation steps.

[實施例6] [Implementation Example 6]

圖8係實施例6之電源之電路圖。 Figure 8 is a circuit diagram of the power supply of Example 6.

實施例6係作為實施例1至實施例5中所說明之整流電路2之應用對象之電源的實施例。 Embodiment 6 is an embodiment of a power source as an application object of the rectifier circuit 2 described in Embodiments 1 to 5.

實施例1至實施例5之整流電路2之應用範圍為電源所使用之整流電路全部。例如,於如圖8所示之前端電源中,可應用實施例1至實施例5之整流電路2作為商用整流用二極體CRD1~CRD4、回流二極體FWD、二次側整流二極體SSD1~SSD2、防逆流二極體BPD。 The application scope of the rectifier circuit 2 of Examples 1 to 5 is all rectifier circuits used in power supplies. For example, in the front-end power supply shown in FIG8 , the rectifier circuit 2 of Examples 1 to 5 can be used as commercial rectifier diodes CRD1 to CRD4, return diodes FWD, secondary side rectifier diodes SSD1 to SSD2, and backflow prevention diodes BPD.

藉由將實施例1至實施例5之整流電路2應用於前端電源等電源,能有助於電源之小型化及成本削減。 By applying the rectifier circuit 2 of Examples 1 to 5 to a power source such as a front-end power source, it can help to miniaturize the power source and reduce costs.

以上,說明了本發明之實施例,但本發明不限於實施例所記載之構成,可於本發明之技術思想範圍內進行各種變更。又,亦可將各實施例中所說明之構成之一部分或全部組合而應用。 The above describes the embodiments of the present invention, but the present invention is not limited to the structures described in the embodiments, and various changes can be made within the technical scope of the present invention. In addition, part or all of the structures described in each embodiment can also be combined and applied.

Ic:充電電流 Ic: Charging current

t:時刻 t: time

t0~t5:時刻 t0~t5: time

Vc1:電容器之電壓 Vc1: Capacitor voltage

Vcref1:電容器C1之目標電壓 Vcref1: Target voltage of capacitor C1

Vcref2:電容器C1之電壓下限值 Vcref2: The lower voltage limit of capacitor C1

Vds1:MOSFET Q1之汲極-源極間電壓 Vds1: Drain-source voltage of MOSFET Q1

Vf:二極體D之正向電壓 Vf: forward voltage of diode D

Vgs1:MOSFET Q1之閘極-源極間電壓 Vgs1: Gate-source voltage of MOSFET Q1

Vgth1:MOSFET Q1之閘極閾值電壓 Vgth1: Gate threshold voltage of MOSFET Q1

Vref1:閾值電壓 Vref1: Threshold voltage

Claims (16)

一種整流電路,其具有陽極及陰極,其特徵在於具備: 第1開關元件,其第1端子連接於上述整流電路之上述陰極,第2端子連接於上述整流電路之上述陽極; 第1二極體,其陰極連接於上述第1端子,陽極連接於上述第2端子; 驅動電路,其驅動上述第1開關元件;及 第1電容器,其對上述驅動電路供給電力;且 上述第1電容器於上述第1開關元件斷開後至下一次接通為止之期間,具有:上述第1電容器被充電之第1充電期間及第2充電期間;及設置於上述第1充電期間與上述第2充電期間之間且停止對上述第1電容器充電之充電停止期間。 A rectifier circuit having an anode and a cathode, characterized by comprising: a first switching element, whose first terminal is connected to the cathode of the rectifier circuit, and whose second terminal is connected to the anode of the rectifier circuit; a first diode, whose cathode is connected to the first terminal, and whose anode is connected to the second terminal; a driving circuit, which drives the first switching element; and a first capacitor, which supplies power to the driving circuit; and The first capacitor has a first charging period and a second charging period during which the first capacitor is charged, and a charging stop period which is set between the first charging period and the second charging period and stops charging the first capacitor, during the period from when the first switching element is turned off to when the first switching element is turned on next. 如請求項1之整流電路,其中 上述第1充電期間及上述第2充電期間係上述第1開關元件之上述第1端子與上述第2端子之間之電壓為規定電壓以下之期間, 上述充電停止期間係上述第1開關元件之上述第1端子與上述第2端子之間之電壓大於上述規定電壓之期間。 The rectifier circuit of claim 1, wherein the first charging period and the second charging period are periods during which the voltage between the first terminal and the second terminal of the first switching element is below a specified voltage, and the charging stop period is a period during which the voltage between the first terminal and the second terminal of the first switching element is greater than the specified voltage. 如請求項2之整流電路,其中 上述第1充電期間係上述第1開關元件之上述第1端子與上述第2端子之間之電壓處於增加中之期間, 上述第2充電期間係上述第1開關元件之上述第1端子與上述第2端子之間之電壓處於減少中之期間。 The rectifier circuit of claim 2, wherein the first charging period is a period during which the voltage between the first terminal and the second terminal of the first switching element is increasing, and the second charging period is a period during which the voltage between the first terminal and the second terminal of the first switching element is decreasing. 如請求項2之整流電路,其具備: 第2開關元件,其第3端子連接於上述第1開關元件之上述第1端子; 第2二極體,其陽極連接於上述第2開關元件之第4端子,陰極連接於上述第2開關元件之上述第3端子; 第3二極體,其陽極連接於上述第2開關元件之上述第4端子; 上述第1電容器,其正極端子連接於上述第3二極體之陰極,負極端子連接於上述第1開關元件之上述第2端子;及 控制電路,其將控制上述第2開關元件之信號輸入至上述第2開關元件之控制端子;且 上述驅動電路具有:第1比較器,其由上述第1電容器供給電力,檢測上述第2開關元件之上述第4端子與上述第1開關元件之上述第2端子之間之電壓;及第1閘極驅動器,其輸入端子連接於上述第1比較器之輸出端子,輸出端子連接於上述第1開關元件之控制端子,由上述第1電容器供給電力,基於上述第1比較器之輸出信號而控制上述第1開關元件; 上述控制電路於上述第1開關元件之上述第1端子與上述第2端子之間之電壓為上述第1電容器之目標電壓與上述第3二極體之正向電壓之合計電壓以下之期間,將上述第2開關元件控制為接通狀態;於上述第1開關元件之上述第1端子與上述第2端子之間之電壓大於上述第1電容器之目標電壓與上述二極體之正向電壓之合計電壓之期間,將上述第2開關元件控制為斷開狀態,藉此控制向上述第1電容器流動之充電電流。 The rectifier circuit of claim 2 comprises: a second switching element, whose third terminal is connected to the first terminal of the first switching element; a second diode, whose anode is connected to the fourth terminal of the second switching element and whose cathode is connected to the third terminal of the second switching element; a third diode, whose anode is connected to the fourth terminal of the second switching element; the first capacitor, whose positive terminal is connected to the cathode of the third diode and whose negative terminal is connected to the second terminal of the first switching element; and a control circuit, which inputs a signal for controlling the second switching element to the control terminal of the second switching element; and The driving circuit comprises: a first comparator, which is supplied with power by the first capacitor and detects the voltage between the fourth terminal of the second switching element and the second terminal of the first switching element; and a first gate driver, whose input terminal is connected to the output terminal of the first comparator, whose output terminal is connected to the control terminal of the first switching element, and which is supplied with power by the first capacitor and controls the first switching element based on the output signal of the first comparator; The control circuit controls the second switching element to be in the on state when the voltage between the first terminal and the second terminal of the first switching element is less than the total voltage of the target voltage of the first capacitor and the forward voltage of the third diode; and controls the second switching element to be in the off state when the voltage between the first terminal and the second terminal of the first switching element is greater than the total voltage of the target voltage of the first capacitor and the forward voltage of the diode, thereby controlling the charging current flowing into the first capacitor. 如請求項4之整流電路,其中 上述第1開關元件係上述第1端子為汲極端子,上述第2端子為源極端子,上述控制端子為閘極端子之第1 MOSFET, 上述第1二極體係上述第1 MOSFET之內接二極體。 The rectifier circuit of claim 4, wherein the first switching element is a first MOSFET in which the first terminal is a drain terminal, the second terminal is a source terminal, and the control terminal is a gate terminal, and the first diode is an internal diode of the first MOSFET. 如請求項4之整流電路,其中 上述第2開關元件係上述第3端子為汲極端子,上述第4端子為源極端子,上述控制端子為閘極端子之第2 MOSFET。 The rectifier circuit of claim 4, wherein the second switching element is a second MOSFET in which the third terminal is a drain terminal, the fourth terminal is a source terminal, and the control terminal is a gate terminal. 如請求項6之整流電路,其中 上述第2 MOSFET係n通道空乏型MOSFET。 As in the rectifier circuit of claim 6, wherein the second MOSFET is an n-channel depletion MOSFET. 如請求項4之整流電路,其中 上述第1電容器之上述目標電壓為上述第1比較器之最大額定電壓、上述第1閘極驅動器之最大額定電壓、上述第1開關元件之上述控制端子與上述第2端子之間之最大額定電壓中的最小者以下。 A rectifier circuit as claimed in claim 4, wherein the target voltage of the first capacitor is less than the minimum of the maximum rated voltage of the first comparator, the maximum rated voltage of the first gate driver, and the maximum rated voltage between the control terminal and the second terminal of the first switching element. 如請求項4之整流電路,其中 上述控制電路具有微分電路,該微分電路用於決定控制上述第2開關元件之時序。 A rectifier circuit as claimed in claim 4, wherein the control circuit has a differential circuit, which is used to determine the timing of controlling the second switching element. 如請求項4之整流電路,其中 上述第1比較器具有第1閾值電壓及第2閾值電壓,於所檢測出之上述第2開關元件之上述第4端子與上述第1開關元件之上述第2端子之間之電壓小於上述第1閾值電壓之情形時產生接通信號,於大於上述第2閾值電壓之情形時產生斷開信號,上述第1閾值電壓為上述第2閾值電壓以下。 The rectifier circuit of claim 4, wherein the first comparator has a first threshold voltage and a second threshold voltage, and generates a connection signal when the voltage detected between the fourth terminal of the second switching element and the second terminal of the first switching element is less than the first threshold voltage, and generates a disconnection signal when the voltage is greater than the second threshold voltage, and the first threshold voltage is less than the second threshold voltage. 如請求項4之整流電路,其中 上述控制電路具有:第1電阻及第2電阻,其等將上述第1開關元件之上述第1端子與上述第2端子之間之電壓進行分壓;第2比較器,其由上述第1電容器供給電力,檢測上述第2電阻之電壓;及第2閘極驅動器,其輸入端子連接於上述第2比較器之輸出端子,輸出端子連接於上述第2開關元件之上述控制端子,由上述第1電容器供給電力,基於上述第2比較器之輸出信號控制上述第2開關元件。 A rectifier circuit as claimed in claim 4, wherein the control circuit comprises: a first resistor and a second resistor, which divide the voltage between the first terminal and the second terminal of the first switching element; a second comparator, which is supplied with power by the first capacitor and detects the voltage of the second resistor; and a second gate driver, whose input terminal is connected to the output terminal of the second comparator, whose output terminal is connected to the control terminal of the second switching element, which is supplied with power by the first capacitor and controls the second switching element based on the output signal of the second comparator. 如請求項4之整流電路,其 具有第3電阻,該第3電阻之第5端子連接於上述第1開關元件之上述第1端子,第6端子連接於上述第2開關元件之上述第3端子。 The rectifier circuit of claim 4 has a third resistor, the fifth terminal of the third resistor is connected to the first terminal of the first switching element, and the sixth terminal is connected to the third terminal of the second switching element. 如請求項4之整流電路,其 具有第2電容器,該第2電容器之正極端子連接於上述第2開關元件之上述第4端子,負極端子連接於上述第1開關元件之上述第2端子。 The rectifier circuit of claim 4 has a second capacitor, the positive terminal of the second capacitor is connected to the fourth terminal of the second switching element, and the negative terminal is connected to the second terminal of the first switching element. 如請求項1至13中任一項之整流電路,其中 上述整流電路內置於半導體封裝,上述整流電路之上述陽極與上述陰極為上述半導體封裝之外部端子。 A rectifier circuit as claimed in any one of claims 1 to 13, wherein the rectifier circuit is built into a semiconductor package, and the anode and cathode of the rectifier circuit are external terminals of the semiconductor package. 如請求項1至13中任一項之整流電路,其中 於1個半導體封裝中內置有複數個上述整流電路。 A rectifier circuit as claimed in any one of claims 1 to 13, wherein a plurality of the rectifier circuits are built into a semiconductor package. 一種電源,其具有如請求項1至13中任一項之整流電路。A power supply having a rectifier circuit as described in any one of claims 1 to 13.
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