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WO1996036037A1 - Systeme d'affichage video a modification par ligne ou par pixel - Google Patents

Systeme d'affichage video a modification par ligne ou par pixel Download PDF

Info

Publication number
WO1996036037A1
WO1996036037A1 PCT/US1996/006438 US9606438W WO9636037A1 WO 1996036037 A1 WO1996036037 A1 WO 1996036037A1 US 9606438 W US9606438 W US 9606438W WO 9636037 A1 WO9636037 A1 WO 9636037A1
Authority
WO
WIPO (PCT)
Prior art keywords
bit
pixel
line
clut
bits
Prior art date
Application number
PCT/US1996/006438
Other languages
English (en)
Inventor
Richard W. Thaik
Robert Joseph Mical
Stephen Harland Landrum
Steve C. Wasserman
David Lewis Needle
Tina L. Carroll
Original Assignee
Cagent Technologies, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cagent Technologies, Inc. filed Critical Cagent Technologies, Inc.
Priority to AU57312/96A priority Critical patent/AU5731296A/en
Publication of WO1996036037A1 publication Critical patent/WO1996036037A1/fr

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
    • G09G5/026—Control of mixing and/or overlay of colours in general
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
    • G09G5/06—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using colour palettes, e.g. look-up tables
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/391—Resolution modifying circuits, e.g. variable screen formats
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/399—Control of the bit-mapped memory using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/121—Frame memory handling using a cache memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/126—The frame memory having additional data ports, not inclusive of standard details of the output serial port of a VRAM
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/128—Frame memory using a Synchronous Dynamic RAM [SDRAM]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2044—Display of intermediate tones using dithering
    • G09G3/2051—Display of intermediate tones using dithering with use of a spatial dither pattern
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/001—Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor

Definitions

  • a methodology is needed for simultaneously satisfying the needs of multiple, time-critical processes such as those of a real-time video display subsystem and those of a real-time animation subsystem.
  • the illustrated embodiment of the image processing and display system 100 uses a PowerPCTM 602 CPU 110 such as made by International Business Machines (IBM) of New York. Other CPU's may of course be used.
  • IBM International Business Machines
  • Instructions and/or image data are loadable into the memory units 130-131 from a variety of sources (not shown) , including but not limited to magnetic or optical floppy or hard disk drives, a CD-ROM drive, a silicon ROM (rea -only-memory) device, a cable headend, a wireless broadcast receiver, a telephone modem, etc.
  • sources including but not limited to magnetic or optical floppy or hard disk drives, a CD-ROM drive, a silicon ROM (rea -only-memory) device, a cable headend, a wireless broadcast receiver, a telephone modem, etc.
  • Control data from an 'active' control list 142/143 is downloaded by way of data buses 122/123 into a control-storing portion of the VPP 150.
  • the control- storing portion of the VPP 150 includes a set of video display list DMA control registers 210, a set of video display path control registers 240 and a so-called 'next-CLUT' 235.
  • FIG. 3A Column 340 of Fig. 3A lists three different image formats which may be selected on a line-by-line basis for processing by VPP 150. They are: (a) Opera_LR16 format; (b) M2_16-bit format; and (c) M2_32-bit format. Although these three specific formats are shown, it is within the scope of the invention to accommodate other image-defining formats.
  • the LL-FIFO output D-bit will modulate the output of multiplexer 435 accordingly. If the contents of current control registers BSQ and BSi are the same, then the setting of the D-bit will have no effect on the output of multiplexer 435. It will be fixed to the common control code stored in BSQ and BSi.
  • Vertical pixel doubling is active.
  • a logic "1" here indicates that vertical pixel doubling is turned on such that two active vertical video pixels are produced for every frame buffer pixel.
  • the first mandatory word in the VDL entry header is the frame buffer DMA control word.
  • the structure of this control word is as follows:
  • VDLCW Video Display List Control Word

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

Procédé et appareil (150) permettant de gérer la modification des couleurs d'une image basée sur une trame en temps réel, ligne par ligne ou pixel par pixel, en réponse à une information (140/141) relative aux pixels et à une information de commande (142/143) stockée en mémoire (130/131).
PCT/US1996/006438 1995-05-10 1996-05-08 Systeme d'affichage video a modification par ligne ou par pixel WO1996036037A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU57312/96A AU5731296A (en) 1995-05-10 1996-05-08 Video display system having by-the-line and by-the-pixel modification

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US43863095A 1995-05-10 1995-05-10
US08/438,630 1995-05-10

Publications (1)

Publication Number Publication Date
WO1996036037A1 true WO1996036037A1 (fr) 1996-11-14

Family

ID=23741380

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1996/006438 WO1996036037A1 (fr) 1995-05-10 1996-05-08 Systeme d'affichage video a modification par ligne ou par pixel

Country Status (2)

Country Link
AU (1) AU5731296A (fr)
WO (1) WO1996036037A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999000785A1 (fr) * 1997-06-27 1999-01-07 Cirrus Logic, Inc. Systeme et procede de conversion d'images progressives balayees en formats d'entree de television
EP0806028A4 (fr) * 1994-09-23 2002-08-07 Cagent Technologies Inc Decompression et manipulations posterieures a cette decompression, en temps reel
EP1324305A4 (fr) * 2000-10-03 2006-10-11 Seiko Epson Corp Proc d de traitement d'image, appareil de traitement d'image, dispositif lectronique, programme de traitement d'image, et support enregistr sur lequel est enregistr le programme
US7697790B2 (en) 2002-12-26 2010-04-13 Samsung Electronics Co., Ltd. Apparatus and method for enhancing quality of reproduced image

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4467322A (en) * 1982-08-30 1984-08-21 Sperry Corporation Digital shade control for color CRT background and cursors
US4862150A (en) * 1983-12-26 1989-08-29 Hitachi, Ltd. Graphic pattern processing apparatus

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4467322A (en) * 1982-08-30 1984-08-21 Sperry Corporation Digital shade control for color CRT background and cursors
US4862150A (en) * 1983-12-26 1989-08-29 Hitachi, Ltd. Graphic pattern processing apparatus

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0806028A4 (fr) * 1994-09-23 2002-08-07 Cagent Technologies Inc Decompression et manipulations posterieures a cette decompression, en temps reel
WO1999000785A1 (fr) * 1997-06-27 1999-01-07 Cirrus Logic, Inc. Systeme et procede de conversion d'images progressives balayees en formats d'entree de television
US5963262A (en) * 1997-06-30 1999-10-05 Cirrus Logic, Inc. System and method for scaling images and reducing flicker in interlaced television images converted from non-interlaced computer graphics data
US6094226A (en) * 1997-06-30 2000-07-25 Cirrus Logic, Inc. System and method for utilizing a two-dimensional adaptive filter for reducing flicker in interlaced television images converted from non-interlaced computer graphics data
EP1324305A4 (fr) * 2000-10-03 2006-10-11 Seiko Epson Corp Proc d de traitement d'image, appareil de traitement d'image, dispositif lectronique, programme de traitement d'image, et support enregistr sur lequel est enregistr le programme
US7202879B2 (en) 2000-10-03 2007-04-10 Seiko Epson Corporation Image processing method, image processing apparatus, electronic device, image processing program, and recording medium on which the same program is recorded
US7697790B2 (en) 2002-12-26 2010-04-13 Samsung Electronics Co., Ltd. Apparatus and method for enhancing quality of reproduced image

Also Published As

Publication number Publication date
AU5731296A (en) 1996-11-29

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