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WO1997016843A1 - Dispositif d'affichage a deux porteurs de charges et procede de fabrication - Google Patents

Dispositif d'affichage a deux porteurs de charges et procede de fabrication Download PDF

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Publication number
WO1997016843A1
WO1997016843A1 PCT/US1996/017289 US9617289W WO9716843A1 WO 1997016843 A1 WO1997016843 A1 WO 1997016843A1 US 9617289 W US9617289 W US 9617289W WO 9716843 A1 WO9716843 A1 WO 9716843A1
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WO
WIPO (PCT)
Prior art keywords
electrode
phosphor
contact
recited
electrodes
Prior art date
Application number
PCT/US1996/017289
Other languages
English (en)
Inventor
Michael D. Potter
Original Assignee
Advanced Vision Technologies, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/550,391 external-priority patent/US5831384A/en
Priority claimed from US08/549,929 external-priority patent/US5669802A/en
Application filed by Advanced Vision Technologies, Inc. filed Critical Advanced Vision Technologies, Inc.
Priority to AU74807/96A priority Critical patent/AU7480796A/en
Publication of WO1997016843A1 publication Critical patent/WO1997016843A1/fr

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00—Electroluminescent light sources
    • H05B33/12—Light sources with substantially two-dimensional radiating surfaces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J61/00—Gas-discharge or vapour-discharge lamps

Definitions

  • This invention relates in general to light-emitting devices and relates more particularly to microelectronic electroluminescent display devices having dual carrier emitters and to methods of fabricating such display devices.
  • a number of light-emitting devices that employ phosphors have been used heretofore, including conventional fluorescent lamps, vacuum fluorescent displays (VFD's), electroluminescent lamps and displays, cathode ray tubes, and field-emission displays
  • VFD's vacuum fluorescent displays
  • electroluminescent devices has been used most frequently in reference to AC-excited or DC- excited devices employing electroluminescent phosphors
  • Cathode ray tubes, VFD's, and field- emission display devices generally employ cathodoluminescent phosphors
  • emitter is used throughout this specification to mean an electrode for emitting or injecting electric charge carriers of either sign, such as electrons and holes
  • Ohmic contact is used in its conventional meaning to denote an electrical contact that is non-rectifying Phosphor is used in this specification to mean any material characterized by luminescence excited by charge carriers.
  • phosphor as used herein is intended to include those crystalline semiconductor materials exhibiting electroluminescence and commonly used in light-emitting diodes (LED's).
  • a conventional notation wherein the chemical formula for a host or matrix compound is given first, followed by a colon and the formula for an activator (an impurity that activates the host crystal to luminesce), as in "ZnS Mn," where zinc sulfide is the host and manganese is the activator.
  • ZnS Mn an impurity that activates the host crystal to luminesce
  • Some phosphors may also have co-activators such as halogens which affect the activation, denoted in the conventional scheme after a comma, as in “ZnS: Mn, Cl " The abbreviation "EL" is used herein to denote
  • Conventional electroluminescent light sources commonly employ extra insulating layers or insulating binders or matrices which isolate the electroluminescent phosphor from the device electrodes
  • the present invention eliminates such insulating layers or matrices, thus reducing the cost and complexity of both the light-emitting device and the fabrication process used to make it
  • Conventional field-emission display devices have either a Spindt-type field emission cathode which emits electrons substantially pe ⁇ endicular to a substrate across a gap to an anode, or else a lateral emitter which emits electrons substantially parallel to a substrate laterally across a gap to an anode that is spaced laterally from its emitting edge
  • the gap is conventionally occupied by a vacuum or low-pressure gas and its width must be precisely controlled
  • the present invention eliminates the vacuum or low- pressure gas requirement and has no gap requiring precise control
  • the present invention provides a very simple, easy-to-manufacture light-emitting device PURPOSES,
  • One object ofthe invention is a light-emitting device that is extremely simple in structure and operation Another object is a light-emitting device that can be operated with low power input Yet another object is a light-emitting device with low inter-electrode capacitance and thus improved high-frequency operation Another object is a light-emitting device with relatively high phosphor area fraction Another related object is a light-emitting device that can be fabricated very economically by a simple process specially adapted to its simple structure Another related object is a fabrication process providing automatic alignment of the device elements. Another important object ofthe invention is a process using existing microelectronic fabrication techniques and apparatus for making integrated display device cell structures with economical yield and with precise control and reproducibility of device dimensions and alignments.
  • Another object ofthe invention is a fabrication process which uses only a few masks, thus reducing fabrication time and cost.
  • Another object is a light-emitting device that is readily adaptable to fabrication in very small sizes to produce microelectronic devices.
  • a related object is a light-emitting device suitable for displays composed of arrays of microelectronic display devices.
  • Another related object is a device readily adaptable for use in a matrix-controlled display.
  • Another object is a display device also adaptable for use in segmented character displays.
  • Yet another object is a light-emitting device adaptable for emitting various colors of light.
  • An object related to that is a set of display devices emitting various colors of light, to be used together in a color display.
  • Another object is a display device that may be fabricated from substantially transparent materials to provide a display adaptable for "heads up" displays and/or augmented reality displays
  • a light-emitting device is made with dual lateral emitters substantially parallel to a substrate.
  • the device has two thin-film emitter electrodes which have a thickness of not more than several hundred angstroms.
  • Each of the two emitters has an emitting blade edge or tip having a small radius of curvature
  • opposed emitters for two opposite-sign carriers are provided in the same device and both are shaped to provide very high electric field intensity at their emitting tips.
  • a region containing phosphor extends between the two emitters and contacts them. When a suitable bias voltage is applied, electrons are emitted from the blade edge or tip of one emitter into the phosphor and holes are injected from the other emitter.
  • the sum of diffusion lengths ofthe two carrier types should be equal to or greater than the shortest distance between the two emitters. If secondary carriers are created within the phosphor, then the sum of diffusion lengths ofthe primary and secondary carriers should be equal to or greater than the distance between emitters. Either DC or AC bias voltage or pulsed or other voltage waveform can be applied. Light emission is excited from the phosphor by carrier recombination.
  • a number of devices may be combined in an array to form a matrix display, and/or a number of devices may be combined to form a super-pixel. Alternatively, a number of devices may be combined to form segments of a character display.
  • a novel fabrication process using process steps similar to those of semiconductor integrated circuit fabrication is used to produce the novel light- emitting devices and/or arrays of light-emitting devices.
  • Various embodiments ofthe fabrication process allow the use of conductive or insulating base or starting substrates
  • the following steps are performed an insulating substrate is provided, an ultra-thin conductive emitter film is deposited over the insulating substrate and patterned, an insulating layer is deposited over the emitter film, conductive contacts are made through the insulating layer to the emitter film, a trench opening is etched through the insulating layer and emitter film, thus forming and automatically aligning two emitting edges of two emitters, a phosphor is deposited into the trench opening, and means are provided for applying an electrical bias to the two emitter contacts, sufficient to cause injection of carriers from the emitting edges ofthe emitters into the phosphor
  • Fig 1 shows a side elevation cross-sectional view of an embodiment of a light-emitting device made in accordance with the invention
  • Fig 2 shows a plan view of an embodiment of a light-emitting device made in accordance with the invention
  • FIG. 3 shows a flow diagram of an embodiment of a fab ⁇ cation process performed in accordance with the invention
  • Figs 4a and 4b together show a series of side elevation cross-sectional views corresponding to results ofthe process steps of Fig 3
  • Fig 5 shows a plan view of a portion of an array of light-emitting devices made in accordance with the invention
  • Fig 6 shows a side elevation cross-sectional view of the array of Fig 5
  • Fig 1 shows a side elevation cross-sectional view
  • Fig 2 shows a plan view of an embodiment of a microelectronic light-emitting device made in accordance with the invention
  • the device denoted generally by 10
  • a ultra-thin layer 30 of conductive material provides an emitter layer parallel to the substrate and is patterned to form two emitters 35 and 40
  • emitters 35 and 40 may lie on the top surface ofthe substrate as shown in Fig 1, or may be made by depositing conductive material for emitters 35 and 40 into recesses formed in insulating substrate 20 and by planarizing the resulting surface
  • a single emitter layer 30 is deposited and patterned, and only later is formed into two distinct lateral emitters 35 and 40
  • a region of phosphor 50 extends between the two lateral emitters 35 and 40 and makes contact with the emitters
  • Conductive contacts 60 and 70 make electrical contact (preferably ohmic contact) to emitters 35 and 40 respectively
  • an insulating material such as silicon oxide may be deposited on the base substrate 90 to provide an insulating substrate 20
  • the thickness ofthe insulating material may be about 1,000 nanometers, for example
  • a planar silicon wafer is suitable for a starting or base substrate 90, but the base substrate may be a flat insulator material such as glass, AI2O3 (especially in the form of sapphire), silicon nitride, etc
  • Each of emitters 35 and 40 has a blade edge or tip (110 and 115 respectively)
  • Each blade edge or tip 110 and 115 has a very small radius of curvature, limited by half the thickness ofthe ultra-thin lateral-emitter layer
  • Preferred thicknesses of lateral-emitter film are less than about 30 nanometers, which limit the radius of curvature of lateral-emitter blade edges or tips 110 and 115 to be less than about 15 nanometers
  • the radius of curvature is a significant factor in producing an electric field sufficient to cause carrier injection at a low applied bias voltage, and that the radius of curvature may be somewhat less than half of the film thickness
  • Emitters 35 and 40 are preferably formed by depositing an ultra-thin film of a conductor, preferably 10 - 30 nanometers in thickness
  • Emitters 35 and 40 need not necessarily be the same materials and thickness, but for simplest fabrication are preferably the same material, deposited simultaneously in one operation
  • Preferred emitter materials are chromium, indium, tantalum, titanium, tin oxide, indium tin oxide (ITO), molybdenum, tungsten, and mixtures, solid solutions, and alloys thereof
  • ITO indium tin oxide
  • conductive carbon aluminum, copper, copper-doped aluminum, gold, silver, platinum, palladium, rhodium, polycrystalline silicon, and mixtures, solid solutions, and alloys thereof
  • transparent thin film conductors such as tin oxide or indium tin oxide (ITO) are especially useful
  • the entire device may be made of substantially transparent materials
  • Such a construction can be employed, for example, in a display used to augment a visual field viewed through
  • Insulating layer 80 should preferably be a dielectric with low reflectivity for best contrast It may have an anti-reflective coating to enhance contrast Its electric permittivity is not critical. Suitable insulating materials, for example, are aluminum oxide (AJ2O3), silicon nitride (Si3N4), and silicon dioxide (Si ⁇ 2) Insulating layer 80 may be omitted entirely for some applications of the device Also, it is not essential for operation ofthe device that the insulating layer 80 over emitter 35 be ofthe same material or thickness as the insulating material over emitter 40.
  • those insulating materials may be made the same and may be deposited simultaneously in one operation
  • phosphor 50 covering the emitters that is the phosphor 50 and insulator 80 may be composed ofthe same material In such a device structure, spacing of conductive contacts 60 and 70 from phosphor 50 is not necessary
  • Preferred materials for phosphor 50 are electroluminescent (EL) phosphors selected to have electrical resistivity preferably greater than about 10 ⁇ ohm-cm at the use temperature, and electric permittivity preferably less than about 20
  • the phosphor selected should have carrier diffusion lengths such that the sum of electron and hole diffusion lengths is greater than or equal to the width of phosphor region 50 in the device (i e the shortest distance between emitting edges 110 and 115) Or, expressed another way, the average ofthe two diffusion lengths should be greater than one-half the shortest spacing between emitting edges 110 and 115 of emitters 35 and 40 (If secondary carriers are generated within phosphor 50 by energetic primary carriers, then the sum of primary and secondary carrier diffusion lengths may meet this criterion.) Phosphors conventionally used for AC or DC EL display devices are generally suitable.
  • suitable phosphors are zinc oxide; zinc sulfide activated with manganese, copper, silver, a rare-earth element such as europium, (with or without co-activators such as chlorine or other halogen, or aluminum), yttrium or lanthanum oxides, double oxides, or oxysulfides, with or without rare-earth activators; and strontium sulfide activated with cerium fluoride Organic phosphors may also be used.
  • the microelectronic light-emitting device of this invention is especially well suited for integration into an array, such as a two-dimensional matrix array of microelectronic display devices, each device being addressable by selective application of bias voltages to excite light emission.
  • the devices may be arranged in pairs such that a first or second emitter electrode of one of the devices is in electrical contact with a first or second emitter electrode ofthe other device of the pair, respectively.
  • a number of adjacent devices of a display may be combined with common driving connections to form a super-pixel.
  • the devices may also be combined in sets forming a segment display, such as the conventional seven- segment type of character display, or character displays with more or fewer segments.
  • the array of devices may be fabricated entirely from substantially transparent materials
  • Fig. 5 shows a plan view of a portion of an array of light-emitting devices made in accordance with the invention
  • Fig. 6 shows a side elevation cross-sectional view of the array of Fig. 5. It will be recognized by those skilled in the art that the arrangement depicted in Fig. 5 and 6 may be extended along both vertical and horizontal axes of Fig. 5 to form a larger array having many more devices addressable in a matrix. The arrangement shown in Fig.
  • FIG. 6 has a set of buried conductors 150 extending under emitters 35 and connected electrically to emitters 35 by conductive contacts 160 similar to conductive contacts 60 and 70 described hereinabove. Buried conductors 150 extend in the horizontal direction of Fig 5, as shown in Fig. 6. Thus the emitters 35 are interconnected horizontally Emitters 40 are interconnected along the vertical direction of Fig. 5. When a suitable bias voltage is applied to a pair of emitters 35 and 40, two sites along two adjacent stripes of phosphor 50 are excited to emit light. In Figure 5, application of a negative voltage at 130 and a positive voltage at 135 causes light emission from phosphor 50 at both sites designated by reference numerals 140 and 145.
  • the pair of emitting sites 140 and 145 may be considered a single pixel ofthe array display. For this and other reasons, it is preferable to make phosphor stripes 50 as close as possible together. If an array with uniform pixel pitch is desired, the dimensions ofthe various elements are adjusted accordingly, taking into account the fact that each pixel consists of two emitting sites for the array arrangement of Figs. 5 and 6.
  • a display array as in Figs. 5 and 6 may be made using as few as five lithography mask levels. It will be apparent to those skilled in the art that array configurations other than the arrangement of Figs. 5 and 6 are possible.
  • Fig. 3 shows a flow diagram of an embodiment of a fabrication process performed in accordance with the invention, with step numbers indicated by references Sl, etc.
  • the process steps Sl - S10 are listed in TABLE 1.
  • Figs. 4a and 4b together show a sequence of side elevation cross-sectional views corresponding to results ofthe process steps of Fig. 3.
  • Each sectional view of Figs. 4a and 4b shows the result ofthe process step indicated next to the sectional view.
  • the identities and functions of individual elements in the sectional views of Fig. 4a and 4b will be apparent by comparison with Figs. 1 and 2.
  • the drawings are not drawn to scale.
  • the vertical scale of cross-section views of Fig. 4a and 4b is exaggerated for clarity, and thicknesses of various elements ofthe structures are not drawn to a uniform scale
  • step Sl the preferred fabrication process begins (illustrated at the top of Fig. 4a) with step Sl of providing a base substrate 90 If base substrate 90 is composed of an insulating material, step S2 is not necessary If base substrate 90 is a conductor or semiconductor, step S2 is performed to deposit an insulating material on the base substrate to provide an insulating substrate 20
  • base substrate 90 may be a single-crystal silicon wafer, and insulating material composed of silicon oxide may be grown or deposited on the silicon wafer to provide a silicon oxide insulating substrate 20 The thickness of silicon oxide may be about 1,000 nanometers, for example
  • step S3 an ultra-thin conductive film is deposited on insulating substrate 20 and patterned to provide an emitter film 30.
  • Suitable compositions and thickness for emitter film 30 are described hereinabove under the heading Device Structure
  • Emitter film 30 may be composed of about 15 nanometers of chromium, for example
  • the pattern of emitter film 30 may be recessed into the surface of insulating substrate 20 if desired
  • step S3 may be performed by patterning and etching recesses about 15 nanometers deep into the top surface of insulating substrate 20, filling the recesses with conductive material and planarizing the surface to leave conductive material only in the recesses.
  • an insulating layer 80 may be deposited over conductive emitter film 30 This step may be performed by depositing about 200 nanometers of silicon oxide by chemical vapor deposition, or by depositing about 200 nanometers of spun-on glass, for example.
  • Insulating layer 80 may be a composite layer composed of successive layers of different materials. For some applications, polyimide may be used for insulating layer 80.
  • contact openings are formed through insulating layer 80, aligned to the patterned emitter film 30. This completes the portion ofthe process that is illustrated in Fig. 4a.
  • step S6 illustrated at the top of Fig. 4b
  • the contact holes are filled with conductive material such as aluminum to make electrical contact with emitter film 30, and may be planarized. Chemical- mechanical polishing may be used to planarize the surface.
  • the conductive contacts formed in step S6 are to be used to apply electrical bias to the light-emitting device when it is used.
  • an opening for phosphor is formed through insulating layer 80 and at least through emitter film 30.
  • This opening may be formed by directionally etching, e.g. by ion milling or by reactive-ion-etching, to a depth of about 300 nanometers for the examples of film thicknesses described above.
  • the opening may extend beyond emitter layer 30 partly into the surface of insulating substrate 20, as it does in this example. Forming this trench-like opening through emitter film 30 divides emitter film into two opposed lateral emitters 35 and 40 and automatically forms emitting blade edges 110 and 115 on emitter 35 and 40 respectively.
  • step S8 phosphor material 50 is deposited into the opening, at least until the phosphor contacts emitting edges 110 and 115 of lateral emitters 35 and 40 If the phosphor region 50 is filled as illustrated in Fig. 4b, the device may be planarized in step S9, for example by chemical-mechanical polishing.
  • Step S10 represents the step of providing means of applying bias voltages, represented in the illustration at the bottom of Fig. 4b by plus (+) and minus (-) signs on conductive contacts 60 and 70. It will be apparent that any conductive means of connecting DC or AC bias voltages or pulsed or other voltage waveform from batteries, generators, mains-operated power supplies, etc. may be employed, depending on the applications ofthe light-emitting device 10.
  • the means for applying bias voltages can include means for selectively applying the biases to individual light-emitting devices, such as matrix display pixels or character display segments, or to groups of light-emitting devices, such as the elements of a super-pixel.
  • the bias voltage application means can of course include any type of switch, relay, transistor, integrated circuit, etc., especially when the voltage application is made selectively.
  • the light-emitting device of this invention has many uses such as a light source for nearly any purpose and such as a component of displays including flat panel displays
  • the individual devices may be microelectronic devices, and may be combined in arrays of integrated devices fabricated together on the same substrate. Microelectronic devices may have sub- micrometer dimensions or may be somewhat larger.
  • the devices may be combined in a matrix display used for virtual reality applications or for a computer output display. Suitably shaped devices may be combined in a segmented character display such as a seven-segment display for alphanumeric characters.
  • a number of small display devices may be spatially and electrically grouped together to form a larger display element or "super pixel" in a matrix array Such grouping may be extended to large-screen displays and to very large displays such as billboards.
  • Displays made entirely of substantially transparent materials, as described hereinabove, may be used for "heads up" displays and augmented reality applications

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  • Cathode-Ray Tubes And Fluorescent Screens For Display (AREA)

Abstract

L'invention concerne un dispositif micro-électronique (10) émettant de la lumière, réalisé avec deux minces films émetteurs latéraux (35, 40) parallèles à un substrat (20). Chaque émetteur a un bord mince émetteur (110, 115). Le dispositif fonctionne avec deux porteurs de charges, de signes opposés. La région phosphorescente (50) s'étend entre les deux émetteurs et vient en contact avec ceux-ci. Quand on applique une tension de polarisation, des électrons sont injectés dans le composé phosphorescent depuis un émetteur et des trous sont injectés depuis l'autre émetteur. La fabrication comprend les étapes consistant à fournir un substrat isolant (E1, E2); à déposer un film émetteur conducteur ultra-fin et à constituer un motif avec celui-ci (E3); à déposer une couche isolante sur le film émetteur (E4); à réaliser des contacts conducteurs à travers la couche isolante jusqu'au film émetteur (E5, E6); à ouvrir par attaque chimique une tranchée à travers la couche isolante et le film émetteur, en formant ainsi deux bords émetteurs de deux émetteurs (E7); à déposer le composé phosphorescent dans la tranchée ouverte et à l'aplanir (E8, E9); et à appliquer une polarisation électrique aux deux contacts émetteurs (E10), à l'aide de moyens correspondants.
PCT/US1996/017289 1995-10-30 1996-10-28 Dispositif d'affichage a deux porteurs de charges et procede de fabrication WO1997016843A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU74807/96A AU7480796A (en) 1995-10-30 1996-10-28 Dual carrier display device and fabrication process

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US08/549,929 1995-10-30
US08/550,391 US5831384A (en) 1995-10-30 1995-10-30 Dual carrier display device
US08/549,929 US5669802A (en) 1995-10-30 1995-10-30 Fabrication process for dual carrier display device
US08/550,391 1995-10-30

Publications (1)

Publication Number Publication Date
WO1997016843A1 true WO1997016843A1 (fr) 1997-05-09

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PCT/US1996/017289 WO1997016843A1 (fr) 1995-10-30 1996-10-28 Dispositif d'affichage a deux porteurs de charges et procede de fabrication

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WO (1) WO1997016843A1 (fr)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4482841A (en) * 1982-03-02 1984-11-13 Texas Instruments Incorporated Composite dielectrics for low voltage electroluminescent displays
US5131877A (en) * 1989-10-12 1992-07-21 Alps Electric Co., Ltd. Electroluminescent device
US5172028A (en) * 1989-09-14 1992-12-15 Futaba Denshi Kogyo K.K. Fluorescent display device
US5233263A (en) * 1991-06-27 1993-08-03 International Business Machines Corporation Lateral field emission devices
US5280221A (en) * 1991-04-10 1994-01-18 Nippon Hoso Kyokai Thin-film cold cathode structure and device using the same
US5445550A (en) * 1993-12-22 1995-08-29 Xie; Chenggang Lateral field emitter device and method of manufacturing same
US5552613A (en) * 1993-09-24 1996-09-03 Sumitomo Electric Industries, Ltd. Electron device
US5585695A (en) * 1995-06-02 1996-12-17 Adrian Kitai Thin film electroluminescent display module

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4482841A (en) * 1982-03-02 1984-11-13 Texas Instruments Incorporated Composite dielectrics for low voltage electroluminescent displays
US5172028A (en) * 1989-09-14 1992-12-15 Futaba Denshi Kogyo K.K. Fluorescent display device
US5131877A (en) * 1989-10-12 1992-07-21 Alps Electric Co., Ltd. Electroluminescent device
US5280221A (en) * 1991-04-10 1994-01-18 Nippon Hoso Kyokai Thin-film cold cathode structure and device using the same
US5233263A (en) * 1991-06-27 1993-08-03 International Business Machines Corporation Lateral field emission devices
US5552613A (en) * 1993-09-24 1996-09-03 Sumitomo Electric Industries, Ltd. Electron device
US5445550A (en) * 1993-12-22 1995-08-29 Xie; Chenggang Lateral field emitter device and method of manufacturing same
US5585695A (en) * 1995-06-02 1996-12-17 Adrian Kitai Thin film electroluminescent display module

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