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WO1997037374A3 - Method of packaging multiple integrated circuit chips in a standard semiconductor device package - Google Patents

Method of packaging multiple integrated circuit chips in a standard semiconductor device package

Info

Publication number
WO1997037374A3
WO1997037374A3 PCT/US1997/005050 US9705050W WO9737374A3 WO 1997037374 A3 WO1997037374 A3 WO 1997037374A3 US 9705050 W US9705050 W US 9705050W WO 9737374 A3 WO9737374 A3 WO 9737374A3
Authority
WO
WIPO (PCT)
Prior art keywords
chip
bonding pads
semiconductor device
device package
top surface
Prior art date
Application number
PCT/US1997/005050
Other languages
French (fr)
Other versions
WO1997037374A2 (en
Inventor
Dennis J Herrell
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of WO1997037374A2 publication Critical patent/WO1997037374A2/en
Publication of WO1997037374A3 publication Critical patent/WO1997037374A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/18—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of the types provided for in two or more different main groups of the same subclass of H10B, H10D, H10F, H10H, H10K or H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06506—Wire or wire-like electrical connections between devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/0651—Wire or wire-like electrical connections from device to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06572—Auxiliary carrier between devices, the carrier having an electrical connection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06582—Housing for the assembly, e.g. chip scale package [CSP]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

Provided is a method of packaging multiple integrated circuit chips in a standard semiconductor device package intended for a single chip. In one embodiment, a bottom surface of a larger first chip (14) is attached to a die attach area (18) of a standard semiconductor device package. A bottom surface of a smaller second chip (12) is then attached to a top surface of the first chip. Bonding pads (24a, 24b) on a top surface of the second chip are electrically coupled (28a, 28b) to bonding pads (26a, 26b) on the top surface of the first chip. Bonding pads on the top surface of the first chip are then electrically coupled to bonding pads (32a, 32b) of the semiconductor device package. A heat spreader (82) may also be positioned between the two chips in order to spread the heat energy generated by the second chip during operation over a wider surface area of the first chip. In a second embodiment, a decal (46) including conductive traces is positioned between the two chips and used to route electrical signals from the bonding pads of one chip to the bonding pads of the other chip. In a third embodiment, bonding pads of a smaller second chip are electrically coupled to a first set of bonding pads on a top surface of a larger first chip using a flip-chip soldering technique.
PCT/US1997/005050 1996-03-26 1997-03-26 Method of packaging multiple integrated circuit chips in a standard semiconductor device package WO1997037374A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US62067096A 1996-03-26 1996-03-26
US08/620,670 1996-03-26

Publications (2)

Publication Number Publication Date
WO1997037374A2 WO1997037374A2 (en) 1997-10-09
WO1997037374A3 true WO1997037374A3 (en) 1997-11-20

Family

ID=24486880

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1997/005050 WO1997037374A2 (en) 1996-03-26 1997-03-26 Method of packaging multiple integrated circuit chips in a standard semiconductor device package

Country Status (1)

Country Link
WO (1) WO1997037374A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7419852B2 (en) 2004-08-27 2008-09-02 Micron Technology, Inc. Low temperature methods of forming back side redistribution layers in association with through wafer interconnects, semiconductor devices including same, and assemblies

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6169329B1 (en) 1996-04-02 2001-01-02 Micron Technology, Inc. Semiconductor devices having interconnections using standardized bonding locations and methods of designing
JP2000164796A (en) * 1998-11-27 2000-06-16 Nec Corp Multichip module
JP2000243876A (en) * 1999-02-23 2000-09-08 Fujitsu Ltd Semiconductor device and manufacturing method thereof
JP3304921B2 (en) * 1999-06-18 2002-07-22 日本電気株式会社 Semiconductor storage device
SG100635A1 (en) 2001-03-09 2003-12-26 Micron Technology Inc Die support structure
US6798055B2 (en) 2001-03-12 2004-09-28 Micron Technology Die support structure
SG95637A1 (en) 2001-03-15 2003-04-23 Micron Technology Inc Semiconductor/printed circuit board assembly, and computer system
US6441483B1 (en) 2001-03-30 2002-08-27 Micron Technology, Inc. Die stacking scheme
US7217597B2 (en) 2004-06-22 2007-05-15 Micron Technology, Inc. Die stacking scheme
CN112788222B (en) * 2021-02-07 2022-07-29 维沃移动通信有限公司 Camera module and electronic equipment

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61287133A (en) * 1985-06-13 1986-12-17 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS62261166A (en) * 1986-05-08 1987-11-13 Matsushita Electronics Corp Semiconductor device
EP0348972A2 (en) * 1988-07-01 1990-01-03 Sharp Kabushiki Kaisha A semiconductor device and a process for manufacturing thereof
US5019946A (en) * 1988-09-27 1991-05-28 General Electric Company High density interconnect with high volumetric efficiency
JPH03165550A (en) * 1989-11-24 1991-07-17 Hitachi Cable Ltd High mounting density type semiconductor device
EP0486829A2 (en) * 1990-10-22 1992-05-27 Seiko Epson Corporation Semiconductor device and semiconductor device packaging system
EP0575051A1 (en) * 1992-05-22 1993-12-22 National Semiconductor Corporation Stacked multi-chip modules and method of manufacturing

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61287133A (en) * 1985-06-13 1986-12-17 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPS62261166A (en) * 1986-05-08 1987-11-13 Matsushita Electronics Corp Semiconductor device
EP0348972A2 (en) * 1988-07-01 1990-01-03 Sharp Kabushiki Kaisha A semiconductor device and a process for manufacturing thereof
US5019946A (en) * 1988-09-27 1991-05-28 General Electric Company High density interconnect with high volumetric efficiency
JPH03165550A (en) * 1989-11-24 1991-07-17 Hitachi Cable Ltd High mounting density type semiconductor device
EP0486829A2 (en) * 1990-10-22 1992-05-27 Seiko Epson Corporation Semiconductor device and semiconductor device packaging system
EP0575051A1 (en) * 1992-05-22 1993-12-22 National Semiconductor Corporation Stacked multi-chip modules and method of manufacturing

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
"HIGH-PERFORMANCE PROCESSOR", IBM TECHNICAL DISCLOSURE BULLETIN, vol. 31, no. 10, 1 March 1989 (1989-03-01), pages 229 - 231, XP000120401 *
CICONE R A ET AL: "SILICON INTEGRATED HIGH PERFORMANCE PACKAGE", IBM TECHNICAL DISCLOSURE BULLETIN, vol. 27, no. 7B, 1 December 1984 (1984-12-01), pages 4226, XP002010996 *
PATENT ABSTRACTS OF JAPAN vol. 011, no. 148 (E - 506) 14 May 1987 (1987-05-14) *
PATENT ABSTRACTS OF JAPAN vol. 012, no. 135 (E - 604) 23 April 1988 (1988-04-23) *
PATENT ABSTRACTS OF JAPAN vol. 015, no. 405 (E - 1122) 16 October 1991 (1991-10-16) *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7419852B2 (en) 2004-08-27 2008-09-02 Micron Technology, Inc. Low temperature methods of forming back side redistribution layers in association with through wafer interconnects, semiconductor devices including same, and assemblies

Also Published As

Publication number Publication date
WO1997037374A2 (en) 1997-10-09

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