WO1998023019A1

WO1998023019A1 - Surge protector for power feed line

Info

Publication number: WO1998023019A1
Application number: PCT/GB1997/003161
Authority: WO
Inventors: Anthony John Farrar; Basil Bernard Foster
Original assignee: Alcatel Alsthom Compagnie Generale D'electricite
Priority date: 1996-11-18
Filing date: 1997-11-18
Publication date: 1998-05-28
Also published as: GB9623912D0

Abstract

A surge protector has a predetermined threshold detector (15) which is arranged to provide a compensating voltage drop in opposition to a current surge in a power feed line. The compensator is suitable for connection in series with the output of a power feed equipment, such as is employed for powering equipment employed in undersea optical communication systems.

Description

SURGE PROTECTOR FOR POWER FEED LINE

This invention relates to a surge protector for a power feed line and more particularly to such a protector in which an interference pulse is prevented from increasing line current above a predetermined threshold value.

This invention has resulted from the consideration of requirements for a unit suitable for connection in series with the output of a power feed equipment (PFE) , normally to drop low voltage .

According to one aspect of the invention there is provided a surge protector in which a predetermined threshold detector is arranged to provide a compensating voltage drop in opposition to a current surge on a power feed line. The voltage drop may be applied by a power FET. The unit may be arranged to be self protecting by arranging that the voltage drop is limited to a value safe for the voltage drop controlling device. Further protection may be arranged to limit the duration of the drop safe for a particular device. The duration for one specific application may be lOmS at 200V progressively increasing for lower drop voltages .

The surge protector may be self powered and a two terminal device control circuit may be powered from a DC/DC converter itself powered from across a diode string which is in series with the line before it is connected to the FET. Such an arrangement avoids any requirement for an auxiliary supply which is difficult to arrange with a Unit in the high-voltage PFE line. The use of threshold current detection rather than rate-of rise of a current surge is particularly advantageous.

In order that the invention and its various other preferred features may be understood more easily, an embodiment thereof will now be described, by way of example only, with reference to the drawing the single Figure of which is a circuit diagram of a surge protector constructed in accordance with the invention.

This 2 -terminal self-powered Compensator is designed to be connected in series with the output of a PFE, such as is employed for powering equipment employed in undersea optical communication systems, and is connected in the high-voltage line. Normally it drops only about 5V at a nominal 1.6A PFE output current employed in such a system. If an external interference pulse attempts to increase the current beyond a pre-set threshold above the nominal current, then the circuit increases its resistance to keep the current at the threshold for the duration of the pulse.

The circuit is self-protecting in that it has a maximum drop of nominal 200V, and it caters for a maximum pulse duration of nominal lOmS before reverting to a low drop.

If for an overriding reason it is essential to connect the compensator in the earthy side, the configuration must be such that the 30V Zener chain in the PFE Earth Isolation Shelf connected between System Earth and Station Earth does not bridge the possible 200V dropped by the compensator. The same applied to the 50V Earth Fail alarms connected from the PFE earthy line to cubicle framework.

Normal Conduction

Normally with nominal 1.6A flowing, the conventional current path is from supply terminal TP1, through a diode chain 10 comprising diodes Dl, D2, D3 , D4 , a power field effect transistor TR1, resistor R4 and out from negative supply terminal TP2. A nominal and reasonably constant 3V dropped across the diode chain powers a DC-DC converter 11 formed by transistors TR2 , TR3 , ferrite transformer Tl and associated components. The transformer output is rectified by diodes D5 and D6, giving nominal 9V DC across C4.

This 9V feeds a zener diode ZD1 via a resistor R5 to provide an accurate 2.45V source, and powers a threshold detector 15 and operational amplifier circuit 16 including integrated circuit amplifier IC2. A non-inverting input of IC2 is a reference voltage derived via a potentiometer chain 12 comprising resistor R7, potentiometer RV1 and resistor R8 from the accurate 2.45V source ZD1. The reference may be adjusted with RV1 from nominal 1.50 to 1.80V. An inverting input to IC2 is taken from the voltage drop across a 1 Ohm current sensing resistor R4 through which substantially all of the line current passes excepting several mA in IC2, reference circuit and the later-described protection circuits. Note that there is an offset due to resistor R9 so that the aforementioned reference voltage would balance a voltage drop range in R4 of about 1.37 to 1.70V.

At normal PFE current the (offset) voltage drop from R4 is less than the reference, so IC2 output is high and biasses-on the FET TR1 which acts as a gate. Hence the FET drain to source resistance is low, so that the voltage drop in the main current path is principally that due to the diode chain and R4.

Note that on initial startup, the FET TR1 has to conduct to allow a voltage to be developed across the diode chain and operate the DC-DC converter. Therefore a start up circuit 13 is employed which provides a start-up path for the IC2 circuit. This is R13 from the input terminal TP1, voltage-limited by zener diode ZDll, and passed to IC2 by diode D9. About 17V is needed across the entire circuit to start. Once the DC=DC converter starts, it produces more voltage than D10 (starved of current by the now reduced FET drop), so D9 blocks. Current Pulse Causing Less than 200V Dro : -

If the PFE current results in the development of a voltage across R4 which reaches the threshold reference set by the potentiometer chain 12, then the voltage drop across R4 (after offset) reaches the reference from RV1, and IC2 output falls. Hence IC2 reduces the gate voltage on the FET, whose conduction is reduced.

By control loop action, the circuit keeps the current near the threshold by adjusting FET conduction, i.e. by increasing FET voltage drop to compensate for the interference pulse which is attempting to increase the current from the PFE into the Cable System. Loop stabilisation is provided by resistor RIO and capacitor C5 and the gate capacitance (several nF) of FET TR1. Loop gain is limited by resistor R9. When the interference pulse ceases, the current is again the normal current from the PFE and the circuit reverts to the Normal Conduction condition already described.

Note that any extra conduction during the response time of IC2 and the stabilisation components (resulting from a sudden additional voltage application) , is reduced by a diode D8 and capacitance C6. A sudden increase in gate to -ve line voltage is caught by conduction of D8 into C6 which has previously been held by D8 under normal conditions. Hence any sudden increase in R4 voltage is alleviated by the resultant sudden reduction in FET gate to source voltage. Resistance R12 in parallel with the capacitor C6 allows recovery after such a pulse.

Self Protection: - If an interfering pulse is severe enough to cause the control loop to make the FET attempt to drop more than nominal 200V, then the FET has to be protected. A Zener chain 14 comprising four zener diodes ZD13, ZD14, ZD15, ZD16 each defining a 51 volt drop starts to conduct at nominal 200V, causing a transistor TR5 to conduct and clamp down the feedback signal at the inverting input to IC2. Hence control is taken away from the current control loop, thereby causing IC2 to turn on the FET further. This action is in itself a control loop which causes the circuit to act as a large approximately 200V Zener diode, limiting the drop to this value. Diodes D17 and D18 safely conduct a sudden pulse during the response time of IC2 etc.

Such a voltage drop causes resistor R13 to bias Zener diodes ZDll to 10V so that a resistor R14 and diode Dll conduct to turn on a light emitting diode LED 12 which glows brightly. This is useful in setting-up and diagnosis where a pulse of 200V is indicated by a bright flash.

If in any transient condition the external system reverses the voltage on the Compensator, then diode D19 conducts into the Zener chain 14 which acts as a simple diode chain, conducting safely at low voltage.

Protection can be required against prolonged high voltage drop caused by the current control loop threshold being less than the PFE current. Such may occur during setting-up of RVI or even of the PFE on site. The FET TR1 junction dissipates over 300W at 200V, so there is a further circuit to limit the duration.

With 200V drop, resistor R15 charges a capacitor C7, taking nominal lOmS to reach 0.65V at which point a transistor TR4 conducts and takes over control of the FET TR1 in the same way as described for TR5. Hence the voltage drop is reduced, and values are such that the steady voltage drop remains at nominal 12V until the external circuit no longer maintains this voltage and TR4 lets go and current falls below the threshold and the current control loop again takes control. With this nominal 12V drop, R13 passes sufficient current to illuminate D12 dimly, indicating control via TR4.

Note that a pulse causing less than 200V drop will operate TR4 protection after a progressively longer period, the time will be approximately inversely proportional to vo)l.tage. The pulse will cause the LED to flash brightly.

Although the embodiment described employs a Power Field effect transistor which is controlled to protect against current surge it will be appreciated that alternative current devices capable of current control e.g. silicone controlled rectifiers could be employed in suitable applications .

Claims

CLAIMS :

1. A surge protector, characterised in that a predetermined threshold detector (15) is arranged to provide a compensating voltage drop in opposition to a current surge on a power feed line.

2. A surge protector as claimed in claim 1, characterised in that the power feed line includes an resistance (R4) and the voltage developed across the resistance provides one input to a comparator (IC2) of the threshold detector (15) which comparator has another input for a predetermined reference voltage and an output for providing the compensating voltage.

3. A surge protector as claimed in claim 2, characterised in that the threshold detector has a potentiometer device (RVl) permitting adjustment of the predetermined reference voltage.

4. A surge protector as claimed in claim 1, 2 or 3 , characterised in that the power feed line includes a current control device (TR1) which is responsive to the compensating voltage.

5. A surge protector as claimed in claim 4, characterised in that the current control device is a Power field effect transistor.

6. A surge protector as claimed in claims 4 or 5, powered by current derived from the current feed line.

7. A surge protector as claimed in claim 6, characterised in that the current feed line includes forward biased diode means (10) across which a voltage is developed to provide a source of power for the protector.

8. A surge protector as claimed in claim 7, characterised in that the diode means (10) comprises a chain of series connected'diodes (Dl - D4) .

9. A surge protector as claimed in claim 7 or 8, characterised in a DC - DC converter (11) , wherein the voltage developed across the diode means is supplied to the converter to provide a supply for the threshold detector (15) .

10. A surge protector as claimed in claim 9, characterised in a start up circuit (13) connected in parallel with the power feed line and effective to provide a substantially immediate voltage to ensure conduction of the current control device (TR1) until an output voltage is developed by the DC - DC converter (11) .

11. A surge protector and claimed in claim 10, characterised in that the start up circuit includes a series connected resister (R13) and zener diode (ZDll).

12. A surge protector as claimed in claim 11, characterised in that an over voltage indicator circuit (R14, Dll, R14) is provided which provides an indication when a voltage pulse on the line exceeds a predetermined level .

13. A surge protector as claimed in claim 12, characterised in that the indicator circuit comprised a light emitting diode (12) connected in series with a zener diode (Dll) and resistor (R14) .

14. A surge protector as claimed in any one of claims 6 to 13, characterised in that there is provided a protection circuit (14, TR4 , TR5) which is arranged to limit to a predetermined value the voltage drop over the line.

15. A surge protector as claimed in claim 14, characterised in that the protection circuit includes zener diode means (14) and a control circuit (TR4, TR5) for providing an input voltage to the inverting input of the comparator (IC2) of the threshold detector.