WO1999035554A3 - Method and apparatus for protection of data on an integrated circuit by using memory cells to detect tampering - Google Patents
Method and apparatus for protection of data on an integrated circuit by using memory cells to detect tampering Download PDFInfo
- Publication number
- WO1999035554A3 WO1999035554A3 PCT/IB1998/001969 IB9801969W WO9935554A3 WO 1999035554 A3 WO1999035554 A3 WO 1999035554A3 IB 9801969 W IB9801969 W IB 9801969W WO 9935554 A3 WO9935554 A3 WO 9935554A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- protection
- data
- integrated circuit
- memory cells
- detect tampering
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07F—COIN-FREED OR LIKE APPARATUS
- G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
- G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
- G07F7/10—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means together with a coded signal, e.g. in the form of personal identification information, like personal identification number [PIN] or biometric data
- G07F7/1008—Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/86—Secure or tamper-resistant housings
- G06F21/87—Secure or tamper-resistant housings by means of encapsulation, e.g. for integrated circuits
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
- G06Q20/00—Payment architectures, schemes or protocols
- G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
- G06Q20/34—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
- G06Q20/341—Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07F—COIN-FREED OR LIKE APPARATUS
- G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
- G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
- G07F7/0806—Details of the card
- G07F7/0813—Specific details related to card security
- G07F7/082—Features insuring the integrity of the data on or in the card
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computer Security & Cryptography (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Business, Economics & Management (AREA)
- General Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Software Systems (AREA)
- Accounting & Taxation (AREA)
- Strategic Management (AREA)
- General Business, Economics & Management (AREA)
- Storage Device Security (AREA)
Abstract
Memory elements are physically distributed throughout a smart card. Each of these memory elements has a preset value or preset programmable value. Before release of information, the preset value of each memory element is checked to determine if the smart card has been tampered with by such methods as radiating or microwaving the card. If tampering is detected, information is barred from being released.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US66897A | 1997-12-30 | 1997-12-30 | |
US09/000,668 | 1997-12-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO1999035554A2 WO1999035554A2 (en) | 1999-07-15 |
WO1999035554A3 true WO1999035554A3 (en) | 1999-09-16 |
Family
ID=21692522
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB1998/001969 WO1999035554A2 (en) | 1997-12-30 | 1998-12-07 | Method and apparatus for protection of data on an integrated circuit by using memory cells to detect tampering |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO1999035554A2 (en) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10221790A1 (en) * | 2002-05-15 | 2003-11-27 | Giesecke & Devrient Gmbh | Security system for use with the memory content of a smart integrated circuit data card uses specific cells with data used to detect any change |
IL165468A0 (en) | 2002-06-04 | 2006-01-15 | Nds Ltd | Prevention of tampering in electronic devices |
US7685438B2 (en) * | 2003-01-14 | 2010-03-23 | Nxp B.V. | Tamper-resistant packaging and approach using magnetically-set data |
EP1450232A1 (en) * | 2003-02-18 | 2004-08-25 | SCHLUMBERGER Systèmes | Method for code secure execution against attacks |
CN1886804B (en) * | 2003-11-24 | 2010-05-26 | Nxp股份有限公司 | Data retention indicator for magnetic memories |
DE102004008180A1 (en) * | 2004-02-19 | 2005-09-01 | Giesecke & Devrient Gmbh | Secure operating method for a portable data carrier, especially a chip card, in which operating parameter values are checked during a memory access or data output process to see if their values have been changed |
FR2884330A1 (en) * | 2005-04-11 | 2006-10-13 | St Microelectronics Sa | Integrated circuit protecting method for chip card, involves comparing data word before exiting circuit with respect to value stored in circuit, and generating error signal in case of identity between value and data in output standby |
DE102005036738A1 (en) * | 2005-08-04 | 2007-02-08 | Giesecke & Devrient Gmbh | Securing memory contents of a data carrier |
EP2294526B1 (en) | 2008-05-15 | 2015-05-27 | Nxp B.V. | A method for secure data reading and a data handling system |
DE102016200850A1 (en) * | 2016-01-21 | 2017-07-27 | Siemens Aktiengesellschaft | Method for operating a safety-relevant device and device |
DE102016200907A1 (en) * | 2016-01-22 | 2017-07-27 | Siemens Aktiengesellschaft | Method for operating a safety-relevant device and device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5185717A (en) * | 1988-08-05 | 1993-02-09 | Ryoichi Mori | Tamper resistant module having logical elements arranged in multiple layers on the outer surface of a substrate to protect stored information |
US5237609A (en) * | 1989-03-31 | 1993-08-17 | Mitsubishi Denki Kabushiki Kaisha | Portable secure semiconductor memory device |
-
1998
- 1998-12-07 WO PCT/IB1998/001969 patent/WO1999035554A2/en active Application Filing
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5185717A (en) * | 1988-08-05 | 1993-02-09 | Ryoichi Mori | Tamper resistant module having logical elements arranged in multiple layers on the outer surface of a substrate to protect stored information |
US5237609A (en) * | 1989-03-31 | 1993-08-17 | Mitsubishi Denki Kabushiki Kaisha | Portable secure semiconductor memory device |
Also Published As
Publication number | Publication date |
---|---|
WO1999035554A2 (en) | 1999-07-15 |
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