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WO2002006979A3 - Systeme de materiel informatique configurable - Google Patents

Systeme de materiel informatique configurable Download PDF

Info

Publication number
WO2002006979A3
WO2002006979A3 PCT/IL2001/000513 IL0100513W WO0206979A3 WO 2002006979 A3 WO2002006979 A3 WO 2002006979A3 IL 0100513 W IL0100513 W IL 0100513W WO 0206979 A3 WO0206979 A3 WO 0206979A3
Authority
WO
WIPO (PCT)
Prior art keywords
hardware device
configurable hardware
configurable
communication network
user
Prior art date
Application number
PCT/IL2001/000513
Other languages
English (en)
Other versions
WO2002006979A2 (fr
Inventor
Doron Handelman
Shlomo Kipnis
Gershon Bar-On
Daniel Ratner
Original Assignee
Nds Ltd
Doron Handelman
Shlomo Kipnis
Gershon Bar-On
Daniel Ratner
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from IL137296A external-priority patent/IL137296A/en
Application filed by Nds Ltd, Doron Handelman, Shlomo Kipnis, Gershon Bar-On, Daniel Ratner filed Critical Nds Ltd
Priority to GB0300114A priority Critical patent/GB2382445B/en
Priority to US10/332,868 priority patent/US20040016002A1/en
Priority to AU2001264205A priority patent/AU2001264205A1/en
Publication of WO2002006979A2 publication Critical patent/WO2002006979A2/fr
Publication of WO2002006979A3 publication Critical patent/WO2002006979A3/fr
Priority to US12/586,154 priority patent/US20100121748A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)

Abstract

Procédé pour modifier une configuration de circuit d'un périphérique configurable par le biais d'un réseau de communication. Le procédé consiste à transmettre par le réseau de communication, depuis un fournisseur à matériel configurable à destination du périphérique configurable, une reconfiguration de circuit du périphérique configurable en réponse à une requête adressée par un utilisateur du périphérique configurable, effectuer la reconfiguration de circuit du périphérique configurable et reconfigurer ainsi le périphérique configurable et fournir un périphérique reconfiguré; on facture ensuite l'utilisateur après détermination du fonctionnement correct du périphérique reconfiguré. L'invention concerne aussi une unité utilisateur dans un réseau de communication.
PCT/IL2001/000513 2000-07-13 2001-06-03 Systeme de materiel informatique configurable WO2002006979A2 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
GB0300114A GB2382445B (en) 2000-07-13 2001-06-03 Configurable hardware system
US10/332,868 US20040016002A1 (en) 2000-07-13 2001-06-03 Configurable hardware system
AU2001264205A AU2001264205A1 (en) 2000-07-13 2001-06-03 Configurable hardware system
US12/586,154 US20100121748A1 (en) 2000-07-13 2009-09-16 Configuring field programmable devices

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
IL137296A IL137296A (en) 2000-07-13 2000-07-13 Configurable hardware system
IL137296 2000-07-13
US27553301P 2001-03-12 2001-03-12
US60/275,533 2001-03-12

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/586,154 Continuation US20100121748A1 (en) 2000-07-13 2009-09-16 Configuring field programmable devices

Publications (2)

Publication Number Publication Date
WO2002006979A2 WO2002006979A2 (fr) 2002-01-24
WO2002006979A3 true WO2002006979A3 (fr) 2002-12-12

Family

ID=26323960

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IL2001/000513 WO2002006979A2 (fr) 2000-07-13 2001-06-03 Systeme de materiel informatique configurable

Country Status (3)

Country Link
AU (1) AU2001264205A1 (fr)
GB (1) GB2382445B (fr)
WO (1) WO2002006979A2 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2381709A (en) * 2001-10-30 2003-05-07 Graeme Roy Smith Programmable set-top box and home gateway
US7786996B2 (en) 2006-10-24 2010-08-31 Sony Corporation System and method for object oriented hardware including cross-point switch interconnecting modules with I/O
GB2484931B (en) 2010-10-26 2014-04-30 Nds Ltd Efficient delivery of structured data items

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0275510A2 (fr) * 1987-01-20 1988-07-27 International Business Machines Corporation Carte à circuit intégré ayant la possibilité d'une programmation externe et sa méthode de fabrication
US5181107A (en) * 1989-10-19 1993-01-19 Interactive Television Systems, Inc. Telephone access information service distribution system
US5666293A (en) * 1994-05-27 1997-09-09 Bell Atlantic Network Services, Inc. Downloading operating system software through a broadcast channel
EP0806737A2 (fr) * 1996-05-08 1997-11-12 Lattice Semiconductor Corporation Programmation à l'intérieur d'un système avec une interface à deux fils
EP0813133A2 (fr) * 1996-06-11 1997-12-17 International Business Machines Corporation Mécanisme uniforme pour l'utilisation de contenus signés
US5995744A (en) * 1997-11-24 1999-11-30 Xilinx, Inc. Network configuration of programmable circuits
US6023570A (en) * 1998-02-13 2000-02-08 Lattice Semiconductor Corp. Sequential and simultaneous manufacturing programming of multiple in-system programmable systems through a data network

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0275510A2 (fr) * 1987-01-20 1988-07-27 International Business Machines Corporation Carte à circuit intégré ayant la possibilité d'une programmation externe et sa méthode de fabrication
US5181107A (en) * 1989-10-19 1993-01-19 Interactive Television Systems, Inc. Telephone access information service distribution system
US5666293A (en) * 1994-05-27 1997-09-09 Bell Atlantic Network Services, Inc. Downloading operating system software through a broadcast channel
EP0806737A2 (fr) * 1996-05-08 1997-11-12 Lattice Semiconductor Corporation Programmation à l'intérieur d'un système avec une interface à deux fils
EP0813133A2 (fr) * 1996-06-11 1997-12-17 International Business Machines Corporation Mécanisme uniforme pour l'utilisation de contenus signés
US5995744A (en) * 1997-11-24 1999-11-30 Xilinx, Inc. Network configuration of programmable circuits
US6023570A (en) * 1998-02-13 2000-02-08 Lattice Semiconductor Corp. Sequential and simultaneous manufacturing programming of multiple in-system programmable systems through a data network

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
BROWN S ET AL: "FPGA AND CPLD ARCHITECTURES: A TUTORIAL", IEEE DESIGN & TEST OF COMPUTERS, IEEE COMPUTERS SOCIETY. LOS ALAMITOS, US, vol. 13, no. 2, 1 June 1996 (1996-06-01), pages 42 - 57, XP000596695, ISSN: 0740-7475 *

Also Published As

Publication number Publication date
WO2002006979A2 (fr) 2002-01-24
AU2001264205A1 (en) 2002-01-30
GB2382445A (en) 2003-05-28
GB2382445B (en) 2004-10-27
GB0300114D0 (en) 2003-02-05

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