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WO2003010549A1 - Timing generator and semiconductor test apparatus - Google Patents

Timing generator and semiconductor test apparatus Download PDF

Info

Publication number
WO2003010549A1
WO2003010549A1 PCT/JP2002/007606 JP0207606W WO03010549A1 WO 2003010549 A1 WO2003010549 A1 WO 2003010549A1 JP 0207606 W JP0207606 W JP 0207606W WO 03010549 A1 WO03010549 A1 WO 03010549A1
Authority
WO
WIPO (PCT)
Prior art keywords
bit
timing generator
delay
test apparatus
path data
Prior art date
Application number
PCT/JP2002/007606
Other languages
English (en)
French (fr)
Inventor
Kazuhiro Yamamoto
Original Assignee
Advantest Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corporation filed Critical Advantest Corporation
Priority to US10/484,980 priority Critical patent/US7034518B2/en
Priority to JP2003515866A priority patent/JP4133814B2/ja
Publication of WO2003010549A1 publication Critical patent/WO2003010549A1/ja

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31922—Timing generation or clock distribution
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/131—Digitally controlled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019—Variable delay
    • H03K2005/00058—Variable delay controlled by a digital setting
    • H03K2005/00071—Variable delay controlled by a digital setting by adding capacitance as a load
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00078—Fixed delay
    • H03K2005/00084—Fixed delay by trimming or adjusting the delay

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Pulse Circuits (AREA)
PCT/JP2002/007606 2001-07-27 2002-07-26 Timing generator and semiconductor test apparatus WO2003010549A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US10/484,980 US7034518B2 (en) 2001-07-27 2002-07-26 Timing generator and semiconductor test apparatus
JP2003515866A JP4133814B2 (ja) 2001-07-27 2002-07-26 タイミング発生器及び半導体試験装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001227745 2001-07-27
JP2001-227745 2001-07-27

Publications (1)

Publication Number Publication Date
WO2003010549A1 true WO2003010549A1 (en) 2003-02-06

Family

ID=19060358

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2002/007606 WO2003010549A1 (en) 2001-07-27 2002-07-26 Timing generator and semiconductor test apparatus

Country Status (3)

Country Link
US (1) US7034518B2 (ja)
JP (1) JP4133814B2 (ja)
WO (1) WO2003010549A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005159963A (ja) * 2003-11-28 2005-06-16 Advantest Corp 高周波遅延回路、及び試験装置
CN100514946C (zh) * 2003-08-04 2009-07-15 爱德万测试株式会社 测试方法、通信元件及测试系统

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005060098A1 (ja) * 2003-12-18 2005-06-30 Advantest Corporation 遅延回路、及び試験装置
JP4669258B2 (ja) * 2004-10-13 2011-04-13 株式会社アドバンテスト タイミング発生器、及び試験装置
US7886271B2 (en) * 2005-05-16 2011-02-08 Texas Instruments Incorporated Embedding event information in the timing stream
JP4704184B2 (ja) * 2005-10-27 2011-06-15 株式会社アドバンテスト 試験装置及び試験方法
JP4849996B2 (ja) * 2006-08-23 2012-01-11 株式会社アドバンテスト 遅延回路、試験装置、プログラム、半導体チップ、イニシャライズ方法、および、イニシャライズ回路
DE102018104401B3 (de) 2018-02-27 2019-05-23 Schaeffler Technologies AG & Co. KG Hydraulischer Nockenwellenversteller und Verfahren zu dessen Verriegelung

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6193711A (ja) * 1984-10-12 1986-05-12 Nec Ic Microcomput Syst Ltd 遅延回路
JPH0545418A (ja) * 1991-08-09 1993-02-23 Advantest Corp タイミング校正装置
JPH05240919A (ja) * 1992-02-28 1993-09-21 Advantest Corp タイミング制御装置
JPH06196958A (ja) * 1992-08-28 1994-07-15 Sony Tektronix Corp プログラマブル可変長遅延回路
JP2000131401A (ja) * 1998-10-26 2000-05-12 Ando Electric Co Ltd タイミング発生回路
JP2000332583A (ja) * 1999-05-17 2000-11-30 Advantest Corp 遅延信号生成装置および半導体試験装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6005408A (en) * 1997-07-31 1999-12-21 Credence Systems Corporation System for compensating for temperature induced delay variation in an integrated circuit
JP4118463B2 (ja) * 1999-07-23 2008-07-16 株式会社アドバンテスト タイミング保持機能を搭載したｉｃ試験装置
US6377065B1 (en) * 2000-04-13 2002-04-23 Advantest Corp. Glitch detection for semiconductor test system

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6193711A (ja) * 1984-10-12 1986-05-12 Nec Ic Microcomput Syst Ltd 遅延回路
JPH0545418A (ja) * 1991-08-09 1993-02-23 Advantest Corp タイミング校正装置
JPH05240919A (ja) * 1992-02-28 1993-09-21 Advantest Corp タイミング制御装置
JPH06196958A (ja) * 1992-08-28 1994-07-15 Sony Tektronix Corp プログラマブル可変長遅延回路
JP2000131401A (ja) * 1998-10-26 2000-05-12 Ando Electric Co Ltd タイミング発生回路
JP2000332583A (ja) * 1999-05-17 2000-11-30 Advantest Corp 遅延信号生成装置および半導体試験装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100514946C (zh) * 2003-08-04 2009-07-15 爱德万测试株式会社 测试方法、通信元件及测试系统
JP2005159963A (ja) * 2003-11-28 2005-06-16 Advantest Corp 高周波遅延回路、及び試験装置

Also Published As

Publication number Publication date
JPWO2003010549A1 (ja) 2004-11-18
JP4133814B2 (ja) 2008-08-13
US20050001648A1 (en) 2005-01-06
US7034518B2 (en) 2006-04-25

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