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WO2007018052A1 - Planar electronic display device and process for producing the same - Google Patents

Planar electronic display device and process for producing the same Download PDF

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Publication number
WO2007018052A1
WO2007018052A1 PCT/JP2006/314968 JP2006314968W WO2007018052A1 WO 2007018052 A1 WO2007018052 A1 WO 2007018052A1 JP 2006314968 W JP2006314968 W JP 2006314968W WO 2007018052 A1 WO2007018052 A1 WO 2007018052A1
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WO
WIPO (PCT)
Prior art keywords
electrode
display device
liquid crystal
layer
additive element
Prior art date
Application number
PCT/JP2006/314968
Other languages
French (fr)
Japanese (ja)
Inventor
Junichi Koike
Original Assignee
Advanced Interconnect Materials, Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Interconnect Materials, Llc filed Critical Advanced Interconnect Materials, Llc
Publication of WO2007018052A1 publication Critical patent/WO2007018052A1/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C9/00Alloys based on copper
    • C22C9/02Alloys based on copper with tin as the next major constituent
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C9/00Alloys based on copper
    • C22C9/04Alloys based on copper with zinc as the next major constituent
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C9/00Alloys based on copper
    • C22C9/05Alloys based on copper with manganese as the next major constituent
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/13439Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76888By rendering at least a portion of the conductor non conductive, e.g. oxidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441Interconnections, e.g. scanning lines
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals
    • H10K59/1315Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • G02F1/136295Materials; Compositions; Manufacture processes

Definitions

  • the present invention relates to a flat electronic display device and a manufacturing method thereof, and in particular, a liquid crystal display device (LCD) that displays an image on a flat screen, a plasma display device (PDP), an organic EL display device (O LED), a field
  • LCD liquid crystal display device
  • PDP plasma display device
  • O LED organic EL display device
  • FED emission display device
  • liquid crystal display devices that are thin and lightweight, can be driven at low voltage, and consume less power are widely used as flat display devices (flat panel displays).
  • the liquid crystal display device normally has a structure in which liquid crystal is sealed between two transparent glass substrates.
  • a black matrix, a color filter, a common electrode, an alignment film, etc. are provided on the inner surface of one substrate, and a thin film transistor (TFT), gate wiring, signal wiring, pixel electrode, alignment film, etc. are provided on the inner surface of the other substrate.
  • TFT thin film transistor
  • a flat color display device is formed by arranging three pixel electrodes aligned with a power filter of three primary colors, defining one pixel unit, and arranging them in a matrix of many pixel units. Is done.
  • pixel rows are sequentially selected by applying a gate voltage pulse as a scanning signal to the gate wiring, and the signal wiring force image signal is simultaneously supplied to the pixel electrodes in the same row, so that the three primary colors of each pixel An image is formed by operating the pixel electrodes.
  • a thin film transistor (TFT) used for a liquid crystal display device is formed as follows, for example. That is, a gate wiring is first formed on a substrate, and a gate insulating film, an amorphous silicon layer that is a thin film semiconductor, and an n-type amorphous silicon layer are formed on the gate wiring. After forming the TFT structure by a photoetching process, a channel protective layer is formed on the channel region of the amorphous silicon layer, and then a high impurity concentration amorphous silicon layer for contact and source on the source Z drain region on both sides of the channel region After forming and patterning a metal layer to be a Z drain electrode and signal wiring, it is covered with an insulating protective layer.
  • the gate wiring In the liquid crystal display device, several thousand pixels are arranged in one row.
  • a gate voltage noise is applied to the end of the wiring to simultaneously excite multiple TFTs arranged in one row.
  • the gate voltage pulse also propagates to the TFT gate electrode of each pixel.
  • the propagation speed decreases as the resistance value of the gate wiring and the capacitance parasitic on the gate wiring increase. This is called the propagation delay of the gate voltage pulse.
  • this propagation delay increases, the brightness of each pixel becomes more conspicuous. Therefore, by reducing the resistance value of the gate wiring, the propagation delay of the gate voltage pulse is reduced. As a result, uneven brightness is suppressed.
  • the gate wiring material was changed from molybdenum alloy to aluminum alloy or aluminum cladding.
  • Aluminum (A1) has problems such as hillock and electo port migration.
  • Patent Document 1 a wiring material made of an Al—Nd alloy has been proposed, and anodized Al, Al that has been gradated or double-layered with a Mo alloy, has come to be used. It was.
  • copper has attracted attention as a material having a lower electrical resistance than these gate electrode materials, but copper has poor adhesion to glass, which is the substrate of a liquid crystal display device. There is a problem that it is easily oxidized by the process gas when forming the insulating layer.
  • Patent Document 2 discloses that 0.3 to 10% by weight of Ag is added to Cu to improve the acid resistance, but the adhesion to the glass substrate is improved. In addition, there is a problem that sufficient oxidation resistance that can withstand the liquid crystal process cannot be obtained.
  • Patent Document 3 discloses a copper alloy in which at least one element of Ti, Mo, Ni, Al, and Ag is added to Cu in an amount of 0.5 to 5% by weight in order to improve adhesion. Proposed help There is a problem that the electrical resistance of the wiring increases due to the added element.
  • Patent Document 4 discloses a technique for forming a Mo film between Cu and a substrate, thereby ensuring adhesion and barrier properties with the substrate.
  • the effective resistance of the wiring increases as the number of steps for forming Mo increases.
  • Patent Document 5 discloses that adhesion and acid resistance are improved by adding one or more elements of Mg, Ti, and Cr to Cu. There is a problem that the wiring resistance increases as a result. There is also a problem that the additive element reduces the oxides of the substrate, and the reduced element diffuses into the wiring to increase the wiring resistance.
  • Patent Document 6 proposes a technique for forming high melting point nitrides such as TaN, TIN, and WN around Cu in order to solve these problems related to Cu wiring.
  • the technology requires a material and an additional process for forming the barrier layer compared to the conventional wiring material, and the effective resistance of the wiring increases because the high-resistance noria layer is formed thick. There is a problem.
  • Patent Document 7 proposes that 0.1 to 3. Owt% of Mo is added to Cu, and that Mo is segregated to the grain boundary to suppress acidification due to grain boundary diffusion.
  • this technology can improve the acid resistance of Cu, there is a problem that the wiring resistance increases.
  • Patent Document 8 discloses a composite oxide containing 0.5 to 8 parts by mass of a glass component, Zn, Mg and Ti as main components with respect to 100 parts by mass of copper powder.
  • a copper metallized composition containing 0.05 to 3 parts by mass of copper is disclosed, thereby improving the adhesive strength, suppressing warping of the wiring board, and having excellent solder wettability. It is hoped that a composition and a ceramic wiring board using the composition will be provided.
  • Patent Documents 9 and 10 Au and / or Co used for the wiring board and Cu alloy which is powerful with Cu, the composition ratio of Cu is 80 to 99.5 wt%, the composition ratio of Au and C A wiring material having a Cu alloy strength in which the sum of the composition ratios of o is 0.5 to 20 wt% is disclosed. This means that an alloy with improved adhesion to a glass substrate or silicon film can be provided.
  • the wiring layer is mainly composed of at least one first metal selected from the group consisting of Ag, Au, Cu, A1, and Pt, and Ti, Zr, Hf, Ta, Nb, Si, B, La, Nd, Sm, Eu, Gd, Dy, Y, Yb, Ce, Mg, Th, and a conductive layer made of a material containing at least one second metal selected from the group consisting of Cr And a liquid crystal display device having an oxide layer made of a material mainly composed of a second metal that covers the surface of the conductive layer.
  • a flat display device other than a liquid crystal display device for example, a plasma display (PDP) which is a display device using gas discharge, a display device using organic substances such as diamines which emit light when a current is passed Field emission display (FED), which is a self-luminous display based on the same principle as the organic EL display (OLED) and cathode ray tube (CRT), which basically emits light based on the same principle as the CRT.
  • PDP plasma display
  • FED Field emission display
  • OLED organic EL display
  • CRT cathode ray tube
  • the plasma display device has discharge cells separated by barrier ribs (ribs) and is covered with a phosphor, and the discharge cells discharge fluorescence accumulated between the address electrodes and the scan electrodes. Lights the body.
  • ribs barrier ribs
  • a pixel circuit composed of TFTs similar to a liquid crystal display device is arranged for each pixel.
  • the field emission display device a voltage is applied between the emitter electrode and the anode electrode connected to the force sword electrode, and the emitted electrons controlled by the gate voltage cause the phosphor to emit light.
  • Patent Document 1 JP 2000-199054 A Patent Document 2: Japanese Patent Laid-Open No. 2002-69550
  • Patent Document 3 Japanese Patent Laid-Open No. 2005-158887
  • Patent Document 4 Japanese Unexamined Patent Application Publication No. 2004-163901
  • Patent Document 5 Japanese Unexamined Patent Application Publication No. 2005-166757
  • Patent Document 6 Japanese Unexamined Patent Application Publication No. 2004-139057
  • Patent Document 7 Japanese Unexamined Patent Application Publication No. 2004-91907
  • Patent Document 8 Japanese Patent Laid-Open No. 2003-277852
  • Patent Document 9 Japanese Patent Laid-Open No. 2003-332262
  • Patent Document 10 Japanese Patent Laid-Open No. 2003-342653
  • Patent Document 11 Japanese Patent Laid-Open No. 10-153788
  • An object of the present invention is to provide a flat electronic display device having a high conductivity V wiring, electrode or terminal electrode, and a method for manufacturing the same.
  • a flat electronic display device includes a pixel unit in which a plurality of pixels as a minimum unit for forming an image are arranged in a matrix on a substrate.
  • a wiring material for at least one of a signal electrode, a scan electrode, and a terminal electrode that connects the signal electrode or the scan electrode and an external circuit Cu as a main component, its surface or A copper alloy for forming an oxide layer of the additive element added with Cu is applied to the interface with the substrate.
  • the additive element has an oxide free formation energy smaller than that of Cu.
  • the diffusion coefficient force in Cu is greater than the self-diffusion coefficient of Cu.
  • the rate of increase in electrical resistance per lat.% In Cu is 5 ⁇ 'cm or less, and the activity coefficient ⁇ in Cu is the activity coefficient.
  • the relationship of ⁇ > 1 is satisfied, and the amount added in the copper alloy is preferably 0.5 to 25 at.%.
  • the electrode to which the copper alloy is applied is an electrode that drives and controls at least one of a liquid crystal pixel, a gas discharge cell, an organic EL element, and a field emission display display pixel.
  • a liquid crystal display device, a plasma display device, an organic EL display device, or a field emission display device can be used.
  • a liquid crystal display device includes an electrode line crossing in a matrix on a substrate, a pair of substrates, a liquid crystal layer sandwiched between the substrates, a liquid crystal layer sandwiched between the substrates, A number of liquid crystal pixels each having an electrode formed on the surface on the liquid crystal layer side, a wiring layer electrically connected to the electrode and disposed on the surface of the substrate, and connected to an external driving circuit. And at least one of the electrode wire, the electrode, the wiring layer, and the terminal electrode, the copper being a main component, and the copper at the interface with the substrate. It is characterized by being a copper alloy that forms an oxide layer of an additive element added to the above.
  • the oxide layer is preferably formed by a reaction between oxygen contained in the substrate and the additive element.
  • At least one of the electrode wire, the electrode, the wiring layer, and the terminal electrode includes an oxide layer of the additive element at the interface with the insulating layer.
  • At least one of the electrode wire, the electrode, the wiring layer, and the terminal electrode includes an oxide layer in which the additive element and a constituent element of the insulating layer are reacted at an interface with the insulating layer containing oxygen. You can do it.
  • At least one of the electrode wire, the electrode, the wiring layer, and the terminal electrode may have an oxide layer in which the additive element and oxygen in the atmosphere gas react on the surface. Good.
  • the additive element has an oxide formation free energy smaller than that of Cu and a diffusion coefficient in Cu larger than that of Cu. Furthermore, the additive element preferably has an electrical resistance increase rate per lat.% In Cu of 5 ⁇ ⁇ cm or less.
  • the additive element preferably satisfies the relationship of activity coefficient ⁇ force activity coefficient ⁇ > 1 in Cu.
  • the copper alloy is preferably a copper alloy in which an additive element diffuses on the surface of the copper alloy to form an oxide film layer of the additive element.
  • the additive element may be at least one metal selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr and Nd. .
  • the additive element is preferably Mn.
  • the amount of Mn added can be 0.5 to 25 at.%.
  • a method of manufacturing a liquid crystal display device includes an electrode line intersecting in a matrix on a substrate, a pair of substrates disposed at an intersection of the electrode lines, and a liquid crystal layer sandwiched between the substrates, A plurality of liquid crystal pixels each having an electrode formed on the surface of the substrate on the liquid crystal layer side, and a wiring layer electrically connected to the electrode and disposed on the surface of the substrate; and an external drive circuit
  • Cu is a main component on the substrate, and an additive element added to the Cu is added to the surface or the interface with the substrate.
  • the copper alloy is at least one metal in which the additive element is selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr and Nd. It is preferable that it exists.
  • the method may further include a step of forming an oxide layer on at least one surface of the formed electrode wire, electrode, wiring layer, and terminal electrode.
  • the oxygen concentration in the atmospheric gas in the oxide layer forming step is ⁇ ! It is preferably ⁇ 1%.
  • the oxide layer forming step includes few electrode wires, electrodes, wiring layers, and terminal electrodes. After forming at least one, heat at 150 to 400 ° C. for 5 minutes to 50 hours to form an acid solution of the additive element in the copper alloy on at least one surface of the electrode wire, electrode, wiring layer, and terminal electrode. It can be a step of forming a material layer.
  • a plasma display device includes an address electrode wiring formed inside a back glass substrate, a display electrode wiring formed inside the front glass substrate, the address electrode wiring, and the display electrode wiring.
  • the address electrode wiring, display electrode wiring, terminal At least one of the electrodes is made of a copper alloy containing copper as a main component and forming an oxide layer of an additive element added to the copper at the interface with the substrate.
  • the oxide layer is preferably formed by a reaction between oxygen contained in the substrate and the additive element.
  • At least one of the address electrode wiring, the display electrode wiring, and the terminal electrode reacts with oxygen in the atmospheric gas or oxygen contained in the insulating layer and the additive element at the surface or the interface with the insulating layer. It may be provided with an oxide layer formed in this way.
  • the additive element preferably has an oxide formation free energy smaller than that of Cu, and the diffusion coefficient of the additive element in Cu is larger than the self-diffusion coefficient of Cu.
  • the additive element preferably has an electrical resistance increase rate per lat.% In Cu of 5 ⁇ ⁇ cm or less.
  • the additive element preferably satisfies the relationship of activity coefficient ⁇ force activity coefficient ⁇ > 1 in Cu.
  • the copper alloy may be a copper alloy in which an additive element diffuses on the surface of the copper alloy to form an oxide film layer of the additive element.
  • the additive element is at least one metal selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr and Nd. be able to. Furthermore, it is preferable that the additive element is Mn.
  • the amount of Mn added can be 0.5 to 25 at.%.
  • a back glass substrate Address electrode wiring formed on the side, display electrode wiring formed on the inner side of the front glass substrate, and a plurality of electric discharges arranged at each intersection where the address electrode wiring and display electrode wiring intersect in a matrix
  • cu is a main component on the substrate
  • Cu is added to the surface or the interface with the substrate.
  • the process of forming the copper alloy forming the oxide layer of the additive element by physical vapor deposition or chemical vapor deposition, and etching the obtained copper alloy film to address electrode wiring, display electrode wiring, terminal electrode And a step of forming at least one of the following. In this case, a step of forming a dielectric layer on the formed address electrode wiring, display electrode wiring, and Z or terminal electrode may be included.
  • the address electrode wiring, the display electrode wiring, and the terminal electrode After forming at least one of the address electrode wiring, the display electrode wiring, and the terminal electrode, it is heated at 150 to 400 ° C. for 5 minutes to 50 hours to at least the address electrode wiring, the display electrode wiring, and the terminal electrode. You may further have the process of forming the oxide layer of the additive element contained in the said copper alloy on one surface.
  • the oxygen concentration in the atmospheric gas in the oxide layer formation step is 1 ⁇ ! ⁇ 1% preferred!
  • the organic EL display device is arranged at the intersection of the electrode lines intersecting in a matrix on the substrate and the electrode lines, and the glass substrate, and the positive electrode and the hole transport sequentially stacked on the glass substrate.
  • a plurality of organic EL elements each having a layer, an organic light emitting layer, an electron transport layer, and a cathode, wherein the anode and the cathode are electrically connected to electrode lines intersecting in a matrix through a TFT circuit;
  • an active matrix type organic EL display device having terminal electrodes connected to an external driving circuit, at least one of the electrode lines, wirings, and terminal electrodes is mainly composed of copper and has an interface with the substrate. Further, it is characterized by comprising a copper alloy that forms an oxide layer of an additive element added to the copper.
  • the oxide layer is preferably formed by a reaction between oxygen contained in the substrate and the additive element.
  • At least one of the electrode wire, the wiring, and the terminal electrode has a reaction between oxygen in the atmospheric gas or oxygen contained in the insulating layer and the additive element on the surface or the interface with the insulating layer. It may be provided with an acid oxide layer.
  • the additive element preferably has an oxide formation free energy smaller than that of Cu, and the diffusion coefficient of the additive element in Cu is larger than the self-diffusion coefficient of Cu.
  • the additive element preferably has an electrical resistance increase rate per lat.% In Cu of 5 ⁇ ′ cm or less.
  • the additive element preferably satisfies the relationship of activity coefficient ⁇ force activity coefficient ⁇ > 1 in Cu.
  • the copper alloy may be a copper alloy in which an additive element diffuses on the surface of the copper alloy to form an oxide film layer of the additive element.
  • the additive element may be at least one metal selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr and Nd. .
  • the additive element is Mn.
  • the amount of Mn added can be 0.5 to 25 at.%.
  • an organic EL display device for example, electrode lines that intersect in a matrix on a substrate, and are arranged at intersections of the electrode lines, and are sequentially laminated on the glass substrate.
  • a plurality of organic layers each having an anode, a hole transport layer, an organic light emitting layer, an electron transport layer, and a cathode, wherein the anode and the cathode are electrically connected to electrode lines that intersect in a matrix through a TFT circuit.
  • Cu is a main component on the substrate, and the surface thereof or the substrate Forming a copper alloy that forms an oxide layer of the additive element added to Cu at the interface with the substrate by physical vapor deposition or chemical vapor deposition, and etching the obtained copper alloy film to form the electrode wire , Wiring, end Forming at least one electrode, and a method that features have a.
  • heating at 150 to 400 ° C. for 5 minutes to 50 hours to at least one surface of the electrode wire and wiring terminal electrode And a step of forming an oxide layer of an additive element contained in the copper alloy.
  • a field emission display device includes a force sword side glass substrate and the cathode.
  • a plurality of anode side glass substrates provided opposite to the glass side glass substrate, an anode electrode and a phosphor film provided on the inner surface of the anode side glass substrate, and a matrix on the inner surface of the force sword side glass substrate.
  • a force sword electrode disposed; a gate electrode disposed in a vacuum space between the anode electrode and the force sword electrode; an electrode wire connecting the force sword electrode and the anode electrode; and the force
  • a field emission display device having an electrode line connecting a sword electrode and a gate electrode and a terminal electrode connected to an external drive circuit, at least one of the electrode, electrode line, and terminal electrode is made of copper.
  • the main component is made of a copper alloy that forms an oxide layer of an additive element added to the copper at the interface with the substrate.
  • the oxide layer is preferably formed by a reaction between oxygen contained in the substrate and the additive element.
  • At least one of the electrode, the electrode wire, and the terminal electrode is formed on the surface or the interface with the insulating layer, in which oxygen in the atmosphere gas or oxygen contained in the insulating layer reacts with the additive element. It may have a physical layer.
  • the additive element preferably has an oxide formation free energy smaller than that of Cu, and the diffusion coefficient of the additive element in Cu is larger than the self-diffusion coefficient of Cu.
  • the additive element preferably has an electrical resistance increase rate per lat.% In Cu of 5 ⁇ ⁇ cm or less.
  • the additive element preferably satisfies the relationship of activity coefficient ⁇ force activity coefficient ⁇ > 1 in Cu.
  • the copper alloy may be a copper alloy in which an additive element diffuses on the surface of the copper alloy to form an oxide film layer of the additive element.
  • the additive element may be at least one metal selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr and Nd. .
  • the additive element is Mn.
  • the amount of Mn added can be 0.5 to 25 at.%.
  • the field emission display device for example, a force sword side glass substrate, an anode side glass substrate provided opposite to the force sword side glass substrate, The anode electrode and phosphor film provided on the inner surface of the anode side glass substrate, a plurality of force sword electrodes arranged in a matrix on the inner surface of the cathode side glass substrate, the anode electrode and the A gate electrode disposed in a vacuum space between the force sword electrode, an electrode line connecting the force sword electrode and the anode electrode, an electrode line connecting the force sword electrode and the gate electrode, and an external drive
  • the substrate surface is mainly composed of Cu, and oxidation of an additive element added to the Cu on the surface or the interface with the substrate is performed.
  • heating at 150 to 400 ° C. for 5 minutes to 50 hours to at least one of the electrode, electrode wire, and terminal electrode It may have a step of forming an oxide layer of an additive element contained in the copper alloy on the surface.
  • a liquid crystal display device having a wiring in which an oxide film layer having high adhesion to the substrate is formed on the surface of the wiring without lowering the electrical conductivity while preventing oxidation of Cu.
  • flat electronic display devices such as plasma display devices, organic EL display devices, and field emission display devices.
  • FIG. 1 is a schematic diagram showing a configuration of a liquid crystal display device as a first embodiment of the present invention.
  • This liquid crystal display is a reverse stagger type TFT type.
  • the copper alloy wiring applied in the present invention is not limited to this etching stopper Z reverse stagger type, back channel Z reverse stagger type The same applies to stagger type TFT and planar type TFT Can be applied to.
  • the copper alloy wiring can be used not only for gate lines but also for signal lines, source / drain electrodes, electrode terminals, and the like.
  • the TFT semiconductor film is not limited to the a-Si film but may be a polysilicon film.
  • the liquid crystal display device includes a pair of substrates 11 and 12, a liquid crystal layer 15 sandwiched between the substrates, an electrode formed on the surface of the substrate 12 on the liquid crystal layer side, and an electrode electrically And a wiring layer disposed on the surface of the substrate. That is, the liquid crystal display device of FIG. 1 includes a glass transparent substrate 11 having an ITO (indium stannate) film transparent common electrode 13 formed on one surface, and an ITO film pixel electrode on one surface.
  • the transparent substrate 12 on which 14 is formed is arranged so that the electrode surfaces face each other.
  • the pixel electrode 14 formed on the transparent substrate 12 includes a TFT 16 as a switch and a storage capacitor 19. Hundreds of thousands of such pixel electrodes 14 are arranged on the transparent substrate 12.
  • the substrates 11 and 12 are arranged with a gap of several meters by a substrate gap agent (spacer), the periphery thereof is sealed, and the liquid crystal layer 15 is filled in the inner gap. That is, the liquid crystal layer 15 is sandwiched between a pair of substrates.
  • a substrate gap agent spacer
  • FIG. 2 is a schematic diagram showing a configuration of a pixel of the liquid crystal display device of FIG.
  • a pixel electrode 14, a TFT switching element 16, a gate wiring 17, a source wiring 18, and a storage capacitor line 19 are arranged on a transparent substrate in a secondary plane arrangement that is planarly equivalent to the circuit.
  • the intersection of the gate wiring 17 and the source wiring 18 is insulated by an insulating film 24.
  • the gate wiring 17 extended in the row direction on the screen display and the source wiring 18 extended in the column direction are arranged in a matrix, and the storage capacitor line 19 is arranged in parallel with each gate wiring 17. Yes.
  • the TFT switching element 16 and the pixel electrode 14 are formed in the region unit surrounded by the gate wiring 17 and the source wiring 18, and the TFT switching element 16 is electrically connected to the gate wiring 17 and the source wiring 18 at the intersection of the region unit. . That is, the TFT source electrode 22 is connected to the source wiring 18, the drain electrode 23 is connected to the pixel electrode 14, and the gate electrode 21 is connected to the gate line 17.
  • FIG. 3 is an enlarged cross-sectional view showing a main part of the pixel configuration in FIG. 2, and shows a cross section (1) of the TFT transistor element portion and a cross section (2) of the storage capacitor line portion.
  • a TFT switching element 16 and a gate line 17 are formed on a transparent substrate 12 made of glass.
  • a gate electrode 21 and a storage capacitor line 19 connected to are connected.
  • the gate electrode 21 is composed of a conductive layer 211 of a metal portion made of a Cu alloy and oxide film layers 212 and 213 covering the conductive layer 211.
  • the acid coating layer 213 is interposed between the conductive layer 211 and the substrate 12.
  • the storage capacitor line 19 includes a conductive layer 191 having a Cu alloy force and oxide film layers 192 and 193 covering the conductive layer 191.
  • An insulating film 24 composed of a plurality of layers 241 and 242 is deposited on the transparent substrate 12 on which the gate electrode 21, the storage capacitor line 19 and the like are formed, and an a-Si layer 25 is formed in the TFT region on the upper surface.
  • a source electrode 22 and a drain electrode 23 are formed thereon.
  • the source electrode layer 22 is electrically connected to the source wiring 18 (FIG. 3 (1)).
  • a pixel electrode 14 having ITO force is formed in the pixel region on the insulating film 24 composed of the storage capacitor line 19 and a plurality of layers 241 and 242 provided thereon, and is electrically connected to the drain electrode 23. ( Figure 3 (2)).
  • FIG. 4 is a diagram showing an equivalent circuit of a TFT liquid crystal panel in which a large number of liquid crystal pixels (hereinafter also referred to as TFT elements) 20 configured as described above are arranged.
  • TFT elements liquid crystal pixels
  • a TFT liquid crystal panel is shown as a 3 ⁇ 3 pixel for the sake of convenience in FIG. 4, for example, as a force consisting of 640 ⁇ 3 ⁇ 480 TFT elements.
  • the gate wiring 17 and the source wiring 18 are shared by the respective rows and columns. When a certain gate wiring 17 and source wiring 18 are selected, the combination is determined.
  • a plurality of scanning lines are scanned line-sequentially using the gate wiring 17 as a scanning line.
  • the gate lines 17 are sequentially scanned, and the necessary liquid crystal pixels 20 are applied by applying voltages according to the driving states of the respective pixels to all the source lines 18 at the same timing. Is displayed, and one frame is displayed. This is repeated to display a movie.
  • a Cu alloy is sputtered on the glass transparent substrate 12 and etched to form a Cu alloy layer pattern of the gate wiring 17, the gate electrode 21, and the storage capacitor line 19. Next, this contains a trace amount of oxygen. Heat treatment is performed in an oxidizing atmosphere to oxidize the surface of the gate electrode wire 211 made of Cu alloy (see Fig. 3 (1)) to form oxide film layers 212 and 213. Let The acid coating layer 213 is formed between the conductive layer 211 and the substrate 12.
  • a SiOx insulating layer 241 and a SiNx film 242 are laminated as the insulating film 24 by sputtering or CVD, and an undoped a-Si layer 25 is further formed thereon.
  • a metal layer to be the source electrode 22 and the drain electrode 23 is formed on the surface, and then the source electrode 22 and the drain electrode 23 are formed with an etching solution.
  • the a-Si layer 25 was etched by CDE to form a SiNx protective film, and an opening was formed in the contact portion to form a TFT switching element 16.
  • the gate electrode 21, the source electrode 22, the drain electrode 23 of the TFT switching element 16, and the gate wiring 17, the source wiring 18, and the heat storage capacity line 19 connected to these are the same using the same copper alloy. It is formed by the procedure. As an additive element in a copper alloy, the free energy of formation of oxides is smaller than that of Cu, and the diffusion coefficient of the additive element in Cu (hereinafter simply referred to as the diffusion coefficient unless otherwise specified) A metal greater than the self diffusion coefficient is applied.
  • the free energy (A G: kjZmol) for forming an oxide is higher in reactivity with oxygen (O 2) as the negative value increases. Therefore, in order to form an oxide film layer on the surface of the Cu alloy, an additive element having a larger absolute value of the oxide formation free energy than Cu, in other words, an additive element having a lower oxide formation free energy.
  • the diffusion coefficient of the additive element is larger than the self-diffusion coefficient of Cu, it is possible to quickly reach the Cu surface and to preferentially form an acid-oxide film layer with the additive element on the Cu alloy surface. . If the diffusion coefficient of the additive element is smaller than the self-diffusion coefficient of Cu, a considerable amount of time is required for the additive element to reach the surface of the Cu alloy. Therefore, a Cu oxide film such as CuO or Cu20 is formed on the surface of the Cu alloy. Form a layer. Since this Cu oxide film layer is not strong, oxygen penetrates from the surface of the Cu oxide film layer and forms an oxide with an additive element inside the Cu alloy. Furthermore, as Cu oxidation progresses, there is a problem that Cu in the metal state gradually decreases, and when it is used for wiring of a liquid crystal display device, the electrical resistance gradually increases.
  • a metal element having a diffusion coefficient larger than the self-diffusion coefficient of Cu is used as an additive element.
  • an additive element that is a metal element that has a larger absolute value than that of Cu and has a higher absolute value than that of Cu is used as an additive element.
  • the oxide layer and the Cu alloy are used.
  • An oxide film layer containing an additive element is formed at the interface with the substrate.
  • the oxide forming the oxide layer is reduced by reducing the oxide forming the oxide layer by setting the additive element to have an oxide formation free energy larger than that of the oxide layer element.
  • an oxide coating layer can be formed without reducing the oxide. Note that an oxide film layer can be formed at the interface even in contact with another metal layer in an oxidizing atmosphere.
  • the Cu alloy when a Cu alloy applied as a wiring material or the like is brought into contact with an insulating layer containing oxygen, the Cu alloy diffuses at the interface, and the additive element is oxidized and an oxide film is formed. Form a layer.
  • the metal element contained in the insulating layer, Cu in the Cu alloy, and the additive element may each form an oxide to form a composite oxide film layer.
  • the substrate of the liquid crystal display device includes an oxide such as Si02
  • a Cu alloy gate wiring is provided on the substrate, and when this is heat-treated, the additive element in the Cu alloy that forms the gate wiring is not in contact with the substrate.
  • a gate insulating film 24 made of SiNO or the like is provided on the gate electrode 21.
  • the gate electrode 21 and the gate insulating film 24 made of Cu alloy are provided.
  • Oxide oxide layer expressed by Ox is formed at the interface. In this manner, an oxide layer can be provided on the surface of a Cu alloy as a wiring material or the like for a liquid crystal display device.
  • an additive element that is solid-solved in an amount of additive in the Cu alloy in the range of 0.1 to 25 at.% Is preferably used. This is because the additive element is difficult to diffuse unless it is in a solid solution state in the Cu alloy. In particular, when an intermetallic compound is formed with Cu, the additive element is hardly diffused. Furthermore, the additive amount of the additive element in the Cu alloy is 0. lat.% If it is less than this, the formed oxide film layer becomes too thin to prevent the progress of Cu oxidation. On the other hand, if the amount of the additive element exceeds 25 at.%, The ⁇ element of the additive element may precipitate near room temperature.
  • an additive element whose electrical resistance increase rate per lat.% In Cu is 5 ⁇ ′ cm or less is applied.
  • the rate of increase in electrical resistance of the additive element is determined, for example, by the relationship between the atomic radius of the element applied as the additive element, the electronic state, and the Cu atom. If the rate of increase in electrical resistance per lat.% In Cu exceeds 5 ⁇ 'cm, the electrical resistance is equivalent to that of the aluminum alloy currently used, and the advantage of using a copper alloy is lost.
  • the Cu alloy as the wiring and electrode material applied to the present embodiment contains an additive element having an activity coefficient exceeding 1.0 in Cu.
  • This activity coefficient is also called activity and is defined by the following formula (1).
  • the activity coefficient represents the interaction in Cu.
  • the activity coefficient ⁇ ⁇ > 1 of the i component repels in Cu and separates from Cu.
  • the activity coefficient of the i component is ⁇ ⁇ ⁇ 1
  • the additive element added to the Cu alloy has an activity coefficient of more than 1 with respect to Cu, so that Cu nuclear energy is released and diffusion is made. In addition, it reaches the surface of the Cu alloy and is more easily oxidized than Cu, thereby forming an oxide film layer on the surface of the Cu alloy. If the activity coefficient is less than 1, the formation of an oxide film layer that hardly reaches the surface of the Cu alloy is delayed due to a strong tendency to remain in Cu, and the oxidation of Cu proceeds.
  • the activity coefficient was measured as follows, for example. That is, the copper alloy was dissolved in a Knudsen cell, the composition dependence of the ionic current value was measured with a mass spectrometer, and the obtained results were analyzed using Belton and Fruehan integral formulas to obtain activity coefficients.
  • the additive element in the Cu alloy is specifically at least one selected from the group consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr, and Nd. so is there. These may be used alone or a plurality of additive elements may be applied simultaneously. Each of these additive elements has an absolute value of the free energy of formation of oxides larger than that of Cu, and the diffusion coefficient of the additive element in Cu is larger than the self-diffusion coefficient of Cu. The rate of increase in electrical resistance per lat.% is 5 ⁇ 'cm or less. Further, these additive elements satisfy the relationship of activity coefficient ⁇ force activity coefficient ⁇ > 1 in Cu.
  • these metals added to the Cu alloy diffuse in the Cu and reach the surface of the Cu alloy to form a strong and highly adherent oxide film layer ahead of the Cu.
  • the Cu alloy is inevitably mixed with impurities such as S, Se, Te, Pb, Sb, Bi, etc. These may cause a decrease in the electrical conductivity, tensile strength, etc. of the copper alloy. As long as it is not.
  • the method of applying the Cu alloy is not particularly limited.
  • a plating method such as an electric field plating method or a melting plating method, or a physical vapor deposition method such as a vacuum deposition method or a sputtering method can be used.
  • the additive elements diffuse and reach the surface of the Cu alloy, and are oxidized preferentially over Cu to form an oxide film layer.
  • the additive element used in the copper alloy is at least one selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr and Nd.
  • manganese (Mn) is preferable.
  • the heat treatment temperature is, for example, 150 to 400 ° C.
  • the heat treatment period is, for example, in the range of 5 minutes to 5 hours.
  • the heat treatment temperature is less than 150 ° C, it takes time to form an oxide film, and productivity is lowered.
  • the temperature exceeds 400 ° C Cu additive elements diffuse and reach the surface, causing Cu to oxidize and form an acid film layer.
  • the heat treatment time is less than 5 minutes, it takes too much time to form the acid film, whereas if it exceeds 5 hours, the acid film layer is sufficiently formed, so that there is no need for heat treatment.
  • a Cu-2at.% Mn alloy thin film is formed on a cleaned glass substrate using a Cu-2at.% Mn alloy consisting of 99.9999% pure Cu and 99.98% pure Mn as a target material.
  • the film was then heat-treated at a temperature of 150 ° C or higher and 400 ° C or lower. After that The composition distribution in the depth direction of the thin film surface was analyzed by spectroscopy. Furthermore, cross-sectional samples were prepared, and microstructure observation and composition analysis were performed using a transmission electron microscope and an X-ray energy dispersive spectrometer (XEDS).
  • XEDS X-ray energy dispersive spectrometer
  • FIG. 5 is a diagram schematically showing a cross-sectional structure after heat treatment at 400 ° C. for 30 minutes.
  • a stable oxide layer containing Mn as a main element is formed near the interface between the Cu-Mn alloy and the glass substrate and near the Cu-Mn alloy surface.
  • a p-Si film was deposited on the cleaned glass substrate by plasma enhanced chemical vapor deposition (PECVD), and then the entire surface was laser-annealed. After p-Si film was patterned, Si02 gate insulating film was formed by CVD method. Thereafter, a Cu-2at.% Mn alloy was formed by sputtering, and a gate electrode was formed by etching. Next, heat treatment was performed at 400 ° C. for 30 minutes in a vacuum. Further, impurities were implanted by an ion doping method, the source electrode and the drain electrode were formed in a self-aligned manner, and an interlayer insulating film was formed. Thereafter, heat treatment was performed at 400 ° C. for 30 minutes. FIG.
  • PECVD plasma enhanced chemical vapor deposition
  • FIG. 6 is a schematic cross-sectional view of a planar type polysilicon (p-Si) type TFT liquid crystal display device switching element portion formed by the above process.
  • a noria layer made of Mn oxide was formed in the vicinity of the interface between the gate insulating film and the interlayer insulating film and the gate electrode 21 which is the Cu—Mn alloy wiring portion.
  • FIG. 7 is a schematic diagram showing the structure of a gas discharge cell (hereinafter, simply referred to as a discharge cell) of the plasma display device.
  • the discharge cell 105 includes an address (data) electrode 103 formed inside the rear glass substrate 101 and a transparent electrode 104 formed inside the front glass substrate 102 in a matrix form on the substrate.
  • Discharge cells arranged at each crossing point which are a back glass substrate 101, a protective layer 106 that protects the transparent electrode 104 formed on the surface of the front glass substrate 102, and a predetermined gap therebetween. It has a discharge space surrounded by the arranged barrier ribs 107.
  • the discharge space is filled with, for example, a mixed gas of neon (Ne) and xenon (Xn) or a mixed gas of helium (He) and xenon (Xn).
  • the inner wall of the discharge cell 105 has three light sources. A phosphor corresponding to the color (R, G, B) is applied. When a voltage is applied between the address electrode 103 and the transparent electrode 104, a discharge is generated, and the generated ultraviolet light hits the phosphor and emits visible light. .
  • the three colors of light mix delicately to create various colors.
  • FIG. 8 is an explanatory view showing a plasma display panel in which a large number of discharge cells are arranged.
  • a total of nine discharge cells 111 are arranged in a matrix form with three pixels in each of the horizontal and vertical directions.
  • the same Cu alloy as that used in the first embodiment for example, Cu-Mn, is used as the wiring material for the address electrode wiring 113, the display electrode wiring 114, and the terminal electrode 115 of the switch portion. Applies.
  • a Cu-Mn alloy is formed on the surface of a glass substrate by a physical vapor deposition method such as a sputtering method or an electron beam method or a chemical vapor deposition method, and is then etched by, for example, a photolithography method to form an address electrode wiring. At least one of 113, display electrode wiring 114, and terminal electrode 115 is formed. Thereafter, if necessary, a dielectric layer is formed on the upper surface, and heated at 150 ° C. to 400 ° C. for 5 minutes to 50 hours, for example, in the constituent elements of the glass substrate and the copper alloy.
  • Mn which is an additive element of the above, is reacted to form an oxide layer containing Mn as a main element at the interface between the glass substrate and the Cu alloy material. Improve interfacial adhesion and increase oxidation resistance of electrodes and wiring parts.
  • the above-described heat treatment step can be omitted.
  • the copper oxide is prevented from being oxidized on the surface of the wiring without lowering the electrical conductivity, and the brazing having the wiring in which the oxide film layer is formed with high adhesion to the substrate.
  • a horra display device can be provided.
  • FIG. 9 is a schematic diagram showing the structure of an organic EL element.
  • the organic EL device includes a glass substrate 201, an anode (ITO) 202, a hole transport layer (HTL) 203, a light emitting layer (EML) 204, and an electron transport layer sequentially stacked on the glass substrate 201.
  • ETL light emitting layer
  • ETL electron transport layer
  • As a light emitting layer For example, organic substances such as diamines are used.
  • the anode 22 and the cathode 206 are electrically connected by an electrode line through a power source.
  • the thickness of each layer is, for example, about several tens of nm.
  • FIG. 10 is an explanatory view showing an organic EL display panel in which a large number of organic EL elements are arranged in a matrix.
  • Each organic EL element is provided with a transistor as an active element, and the active organic EL element is turned on and off by this active element.
  • the transistor for example, an amorphous silicon or polysilicon thin film transistor (TFT) is used.
  • TFT amorphous silicon or polysilicon thin film transistor
  • a Cu-Mn alloy is formed on the surface of a glass substrate by a physical vapor deposition method such as a sputtering method or an electron beam method or a chemical vapor deposition method, and then etched by, for example, a photolithography method to form an X electrode wire. 212, Y electrode wire 213, etc. are formed, and then, if necessary, for example, by heating at 150 ° C to 400 ° C for 5 minutes to 50 hours, the organic EL elements are arranged in a matrix. A display panel is formed.
  • a physical vapor deposition method such as a sputtering method or an electron beam method or a chemical vapor deposition method
  • a photolithography method to form an X electrode wire.
  • 212, Y electrode wire 213, etc. are formed, and then, if necessary, for example, by heating at 150 ° C to 400 ° C for 5 minutes to 50 hours, the organic EL elements are arranged in a matrix.
  • a display panel is formed.
  • a constituent element of the glass substrate reacts with Mn which is an additive element in the copper alloy to form an oxide layer containing Mn as a main element at the interface between the glass substrate and the Cu alloy material.
  • Mn is an additive element in the copper alloy to form an oxide layer containing Mn as a main element at the interface between the glass substrate and the Cu alloy material.
  • it also increases the acid resistance of the electrode and wiring parts, and also prevents the wiring material from increasing in electrical resistance.
  • the organic EL display panel having such a configuration, when a voltage is applied between the anode 202 and the negative electrode 206 of the organic EL element, holes injected from the anode and electrons injected from the cathode cover emit light. The organic material recombined in the body 204 and excited by the energy emits light. By repeating such light emission under predetermined conditions in each organic EL element, an image is formed on the organic EL display panel.
  • FIG. 11 is a schematic diagram showing the structure of a field emission display (hereinafter referred to as FED).
  • this FED uses carbon nanotubes as a force sword electrode, and includes a force sword side glass substrate 301 and an anode side glass substrate 302 provided to face the force sword side glass substrate 301.
  • An anode electrode film 304 provided on the inner surface of the anode side glass substrate 302, a phosphor film 306 applied to the surface of the anode electrode film 304, and a matrix on the inner side surface of the force sword side glass substrate 301.
  • a plurality of force sword electrodes 303 arranged in a shape, and a gate electrode 307 disposed in a vacuum space between the phosphor film 306 and the force sword electrode.
  • a plurality of cathode electrodes arranged in a matrix, for example, on the surface of the force sword side glass substrate 301 are electrically connected by electrode wires, and the gate electrode 307 and the force sword electrode 301 are electrode wires to which a gate voltage is applied. Connected by.
  • the anode electrode film 304 is connected by an electrode line through a power source. Further, terminal electrodes (not shown) are provided at the connection portions with the external power supply circuit and the signal circuit.
  • At least one wiring member such as an electrode wire or an electrode terminal
  • copper similar to the alloy used in the first embodiment, the second embodiment, and the third embodiment described above is used. Alloys such as Cu-Mn alloys are applied.
  • a Cu-Mn alloy is formed on a glass substrate surface by, for example, a physical vapor deposition method such as a sputtering method or an electron beam method or a chemical vapor deposition method, and then etched by, for example, a photolithography method to form an electrode wire, At least one of the terminal electrodes is formed, and then the wiring portion of the FED display device is formed by heating, for example, at 150 ° C. to 400 ° C. for 5 minutes to 50 hours as necessary.
  • the constituent element of the glass substrate reacts with the additive element Mn in the copper alloy to form an oxide layer containing Mn as a main element at the interface between the glass substrate and the Cu alloy material.
  • it also increases the oxidation resistance of the electrodes and wiring parts.
  • the FED display device having such a configuration, when a predetermined voltage is applied between the force sword electrode 301 and the anode electrode 302, electrons are emitted from the force sword electrode 301 by field emission. It is. At this time, the current of the emitted electron beam is controlled by the voltage difference between the force sword electrode 301 and the gate electrode 307. Electrons emitted into the vacuum traveled toward the anode electrode 302 and emitted visible light as a set of three phosphors of R (red), G (green), and B (blue). An image is formed on the display screen by visible light.
  • FIG. 1 is a schematic view showing a configuration of a liquid crystal display device of the present invention.
  • FIG. 2 is a schematic diagram showing a configuration of a pixel of a liquid crystal display device of the present invention.
  • FIG. 3 is a schematic cross-sectional view showing a configuration of a pixel of the liquid crystal display device of the present invention.
  • (1) is a TFT transistor element portion
  • (2) is a storage capacitor line portion.
  • FIG. 4 is a diagram showing an equivalent circuit of a TFT liquid crystal panel.
  • FIG. 5 is a schematic view showing a state in which an oxide is formed in the vicinity of the interface between the Cu—Mn alloy surface and the glass substrate.
  • FIG. 6 is a schematic diagram of a planar type p-Si TFT.
  • FIG. 7 is a schematic diagram showing the structure of a gas discharge element.
  • FIG. 8 is an explanatory diagram showing a PDP.
  • FIG. 9 is a schematic diagram showing the structure of an organic EL device.
  • FIG. 10 is an explanatory diagram of an organic EL display.
  • FIG. 11 is an explanatory diagram showing FED.

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Abstract

This invention provides a planar electronic display device comprising a wiring with high electric conductivity, an electrode and the like in which an element added to Cu can be preferentially reacted with oxygen contained in a gas atmosphere or a solid, which comes into contact with a Cu member, to form an oxide film which can suppress the oxidation of Cu. In an active matrix-type liquid crystal display device comprising a plate, electrode wires (17, 18) which cross each other in a matrix form on the plate, liquid crystal pixels (20) disposed at the intersection points, and a terminal electrode connected to an external drive circuit, at least one of the electrode wires (17, 18), the electrode, the wiring layer, and the terminal electrode is formed of a copper alloy that is composed mainly of copper and forms an oxide layer of an addition element added to copper at the interface thereof with the substrate. The addition element is such that the oxide forming free energy is smaller than Cu, the diffusion coefficient in Cu is larger than the self-diffusion coefficient of Cu, the percentage increase in electric resistance based on 1 at.% in Cu is not more than 5 μΩ·cm, and the activity coefficient Ϝ in Cu satisfies a relationship represented by activity coefficient Ϝ > 1.

Description

明 細 書  Specification

平面電子表示装置及びその製造方法  Planar electronic display device and manufacturing method thereof

技術分野  Technical field

[0001] 本発明は、平面電子表示装置及びその製造方法に関し、特に、平面画面に画像 を表示する液晶表示装置 (LCD)、プラズマ表示装置 (PDP)、有機 EL表示装置 (O LED)、フィールドェミッション表示装置 (FED)等の平面電子表示装置及びその製 造方法に関する。  TECHNICAL FIELD [0001] The present invention relates to a flat electronic display device and a manufacturing method thereof, and in particular, a liquid crystal display device (LCD) that displays an image on a flat screen, a plasma display device (PDP), an organic EL display device (O LED), a field The present invention relates to a flat-panel electronic display device such as an emission display device (FED) and a manufacturing method thereof.

背景技術  Background art

[0002] 近年、平面表示装置 (フラットパネルディスプレイ)として、薄くて軽量であり、し力も 低電圧で駆動でき、消費電力が少ない液晶表示装置 (LCD)が広く使用されるように なった。液晶表示装置は、通常の形態としては、 2枚の透明ガラス基板の間に液晶を 封入した構造を有する。一方の基板の内面上には、ブラックマトリクス、カラーフィルタ 一、共通電極、配向膜等を設け、他方の基板の内面上に、薄膜トランジスタ (TFT)、 ゲート配線、信号配線、画素電極、配向膜等が設けられている。例えば、 3原色の力 ラーフィルターと位置合わせした 3つの画素電極を配置し、 1画素単位を画定し、そ れを多数の画素単位の行列状に配置することによって平面状のカラー表示装置が 形成される。実際の画像は、ゲート配線に走査信号であるゲート電圧パルスを加える ことによって画素行が順次選択され、同一行の画素電極に同時に信号配線力 画像 信号が供給されることで、各画素の 3原色の画素電極を動作させて、画像が形成され る。  In recent years, liquid crystal display devices (LCDs) that are thin and lightweight, can be driven at low voltage, and consume less power are widely used as flat display devices (flat panel displays). The liquid crystal display device normally has a structure in which liquid crystal is sealed between two transparent glass substrates. A black matrix, a color filter, a common electrode, an alignment film, etc. are provided on the inner surface of one substrate, and a thin film transistor (TFT), gate wiring, signal wiring, pixel electrode, alignment film, etc. are provided on the inner surface of the other substrate. Is provided. For example, a flat color display device is formed by arranging three pixel electrodes aligned with a power filter of three primary colors, defining one pixel unit, and arranging them in a matrix of many pixel units. Is done. In the actual image, pixel rows are sequentially selected by applying a gate voltage pulse as a scanning signal to the gate wiring, and the signal wiring force image signal is simultaneously supplied to the pixel electrodes in the same row, so that the three primary colors of each pixel An image is formed by operating the pixel electrodes.

[0003] 液晶表示装置に用いる薄膜トランジスタ (TFT)は、例えば、以下のように形成され る。即ち、基板上に先ずゲート配線を形成し、該ゲート配線上にゲート絶縁膜、薄膜 半導体であるアモルファスシリコン層、 n型アモルファスシリコン層を成膜する。ホトェ ツチング工程によって TFT構造を形成した後、アモルファスシリコン層のチャネル領 域上にチャネル保護層を形成し、次いで、チャネル領域両側のソース Zドレイン領域 上にコンタクト用の高不純物濃度アモルファスシリコン層、ソース Zドレイン電極及び 信号配線となる金属層を成膜してパターユングした後、絶縁保護層で被覆する。 液晶表示装置においては、一つの行に数 1000個の画素が配置されている。ゲート 配線には、配線の端部にゲート電圧ノ ルスを印加して、一つの行に配置された複数 の TFTを同時に励起する。ゲート電圧パルスは、端部力も各画素の TFTのゲート電 極に伝播する。その伝播する速度は、ゲート配線の抵抗値とゲート配線に寄生する 電気容量が増大すると遅くなる。これをゲート電圧パルスの伝播遅延と言う。この伝 播遅延が大きくなると各画素の明るさにムラが目立つ。このためゲート配線の抵抗値 を小さくすることによって、ゲート電圧パルスの伝播遅延を小さくする。その結果として 明るさのムラが抑えられる。 A thin film transistor (TFT) used for a liquid crystal display device is formed as follows, for example. That is, a gate wiring is first formed on a substrate, and a gate insulating film, an amorphous silicon layer that is a thin film semiconductor, and an n-type amorphous silicon layer are formed on the gate wiring. After forming the TFT structure by a photoetching process, a channel protective layer is formed on the channel region of the amorphous silicon layer, and then a high impurity concentration amorphous silicon layer for contact and source on the source Z drain region on both sides of the channel region After forming and patterning a metal layer to be a Z drain electrode and signal wiring, it is covered with an insulating protective layer. In the liquid crystal display device, several thousand pixels are arranged in one row. For the gate wiring, a gate voltage noise is applied to the end of the wiring to simultaneously excite multiple TFTs arranged in one row. The gate voltage pulse also propagates to the TFT gate electrode of each pixel. The propagation speed decreases as the resistance value of the gate wiring and the capacitance parasitic on the gate wiring increase. This is called the propagation delay of the gate voltage pulse. When this propagation delay increases, the brightness of each pixel becomes more conspicuous. Therefore, by reducing the resistance value of the gate wiring, the propagation delay of the gate voltage pulse is reduced. As a result, uneven brightness is suppressed.

液晶表示装置の画面の大型化に伴って、ゲート配線材料は、モリブデン合金から アルミニウム合金又はアルミニウムクラッドなどへと変還した。アルミニウム (A1)には、 ヒロック、エレクト口マイグレーション等の問題がある。その後、例えば、特許文献 1に 開示されるように、 Al—Nd合金からなる配線材料が提案され、陽極酸ィ匕した Al、 Mo 合金でグラッド又は二層化した Alも使用されるようになった。また、これらのゲート電 極材料よりも低い電気抵抗を有する材料として銅が注目されるようになつたが、銅は、 液晶表示装置の基板であるガラスとの密着性が悪 、ことに加え、絶縁層を形成する 際のプロセスガスによって酸ィ匕され易 、と 、う問題がある。  With the increase in the screen size of liquid crystal display devices, the gate wiring material was changed from molybdenum alloy to aluminum alloy or aluminum cladding. Aluminum (A1) has problems such as hillock and electo port migration. Thereafter, as disclosed in Patent Document 1, for example, a wiring material made of an Al—Nd alloy has been proposed, and anodized Al, Al that has been gradated or double-layered with a Mo alloy, has come to be used. It was. In addition, copper has attracted attention as a material having a lower electrical resistance than these gate electrode materials, but copper has poor adhesion to glass, which is the substrate of a liquid crystal display device. There is a problem that it is easily oxidized by the process gas when forming the insulating layer.

そこで、このような問題を解決するため、合金化した銅配線を用いる技術が試みられ ている。この技術は、合金元素が基板と反応生成物を形成することによって基板との 密着性を確保し、同時に、添加元素が Cu表面で酸ィ匕物を形成することによって Cu の耐酸ィ匕性膜として作用することを狙ったものである。 Therefore, in order to solve such a problem, a technique using an alloyed copper wiring has been attempted. This technology ensures the adhesion between the alloy element and the substrate by forming a reaction product with the substrate, and at the same time, the additive element forms an oxide on the Cu surface, thereby forming an acid-resistant Cu film. It aims to act as.

しかし、従来提案された技術では、狙った特性が十分に発現されず、 Cu中に合金 元素が残留することによって Cuの電気的抵抗が高くなり、 A1又は A1合金を用いた配 線材料に対する優位性がなかった。  However, with the conventionally proposed technology, the targeted characteristics are not sufficiently developed, and the alloy element remains in Cu, resulting in an increase in the electrical resistance of Cu, which is superior to the wiring material using A1 or A1 alloy. There was no sex.

即ち、特許文献 2には、 Cuに 0. 3〜10重量%の Agを添カ卩して耐酸ィ匕性の向上を図 ることが開示されているが、ガラス基板との密着性が改善されておらず、また、液晶プ 口セスに耐え得る十分な耐酸化性が得られな ヽと ヽぅ問題がある。 That is, Patent Document 2 discloses that 0.3 to 10% by weight of Ag is added to Cu to improve the acid resistance, but the adhesion to the glass substrate is improved. In addition, there is a problem that sufficient oxidation resistance that can withstand the liquid crystal process cannot be obtained.

また、特許文献 3には、密着性を向上させるために、 Cuに 0. 5〜5重量%の Ti、 M o、 Ni、 Al、 Agのうち少なくとも 1種の元素を添カロした銅合金が提案されている力 添 加元素によって配線の電気抵抗が上昇するという問題がある。 Patent Document 3 discloses a copper alloy in which at least one element of Ti, Mo, Ni, Al, and Ag is added to Cu in an amount of 0.5 to 5% by weight in order to improve adhesion. Proposed help There is a problem that the electrical resistance of the wiring increases due to the added element.

更に、特許文献 4には、 Cuと基板との間に Mo膜を形成し、これによつて基板との密 着性及びバリア性を確保する技術が開示されている。しかし、 Moを製膜する工程が 増加すると共に、配線の実効抵抗が増加するという問題がある。 Further, Patent Document 4 discloses a technique for forming a Mo film between Cu and a substrate, thereby ensuring adhesion and barrier properties with the substrate. However, there is a problem that the effective resistance of the wiring increases as the number of steps for forming Mo increases.

更にまた、特許文献 5には、 Cuに Mg、 Ti、 Crのうち一種以上の元素を添加すること によって密着性と耐酸ィ匕性を向上させることが開示されているが、添加元素が配線中 に残存して配線抵抗が増加するという問題がある。また、添加元素が基板の酸ィ匕物 を還元し、還元された元素が配線中に拡散して配線抵抗が増大するという問題もあ る。 Furthermore, Patent Document 5 discloses that adhesion and acid resistance are improved by adding one or more elements of Mg, Ti, and Cr to Cu. There is a problem that the wiring resistance increases as a result. There is also a problem that the additive element reduces the oxides of the substrate, and the reduced element diffuses into the wiring to increase the wiring resistance.

更にまた、特許文献 6には、 Cu配線に関するこれらの問題点を解決するために、 C uの周りに TaN, TIN, WNなどの高融点窒化物を形成する技術が提案されているが 、この技術は、従来の配線材料に比べるとバリア層を形成するための材料と付加的な プロセスが必要であること、及び高抵抗のノリア層を厚く成膜するため、配線の実効 抵抗が上昇すると 、う問題がある。  Furthermore, Patent Document 6 proposes a technique for forming high melting point nitrides such as TaN, TIN, and WN around Cu in order to solve these problems related to Cu wiring. The technology requires a material and an additional process for forming the barrier layer compared to the conventional wiring material, and the effective resistance of the wiring increases because the high-resistance noria layer is formed thick. There is a problem.

更にまた、特許文献 7には、 Cuに 0. 1〜3. Owt%の Moを添カ卩し、 Moを粒界に偏 祈させることで粒界拡散による酸ィ匕を抑制することが提案されているが、この技術は、 Cuの耐酸ィ匕性を向上させることはできるものの、配線抵抗が上昇するという問題があ る。 Furthermore, Patent Document 7 proposes that 0.1 to 3. Owt% of Mo is added to Cu, and that Mo is segregated to the grain boundary to suppress acidification due to grain boundary diffusion. However, although this technology can improve the acid resistance of Cu, there is a problem that the wiring resistance increases.

一方、配線基板組成物としては、例えば特許文献 8に、銅粉末 100質量部に対し て、ガラス成分を 0. 5〜8質量部、 Zn、 Mgおよび Tiを主成分とする複合酸ィ匕物を 0. 05〜3質量部含有する銅メタライズ組成物が開示されており、これによつて、接着強 度を向上させ、且つ配線基板の反りを抑制し、半田濡れ性にも優れた銅メタライズ組 成物およびこれを用いたセラミック配線基板が提供されると ヽうことである。  On the other hand, as a wiring board composition, for example, Patent Document 8 discloses a composite oxide containing 0.5 to 8 parts by mass of a glass component, Zn, Mg and Ti as main components with respect to 100 parts by mass of copper powder. A copper metallized composition containing 0.05 to 3 parts by mass of copper is disclosed, thereby improving the adhesive strength, suppressing warping of the wiring board, and having excellent solder wettability. It is hoped that a composition and a ceramic wiring board using the composition will be provided.

また、特許文献 9及び 10では、配線基板に用いる Au及び/又は Coと、 Cuと力 なる Cu合金であって、 Cuの組成比率が 80〜99. 5wt%であり、 Auの組成比率と C oの組成比率の和が 0. 5〜20wt%である Cu合金力 なる配線材料が開示されて!ヽ る。これによつて、ガラス基板やシリコン膜との密着性が改善される合金が提供できる ということである。 更に、特許文献 11では、配線層が、 Ag、 Au、 Cu、 A1及び Ptからなる群より選ばれ た少なくとも一種の第 1の金属を主体とし、 Ti、 Zr、 Hf、 Ta、 Nb、 Si、 B、 La、 Nd、 S m、 Eu、 Gd、 Dy、 Y、 Yb、 Ce、 Mg、 Th及び Crからなる群より選ばれた少なくとも一 種の第 2の金属を含む材料で構成された導電層と、この導電層の表面を被覆する第 2の金属を主体とする材料で構成された酸化物層とを有する液晶表示装置が開示さ れている。これによつて、製造工程における薬品処理に対する高耐性及び基板との 良密着性が得られ、配線層の断線を抑えることができるということである。 Further, in Patent Documents 9 and 10, Au and / or Co used for the wiring board and Cu alloy which is powerful with Cu, the composition ratio of Cu is 80 to 99.5 wt%, the composition ratio of Au and C A wiring material having a Cu alloy strength in which the sum of the composition ratios of o is 0.5 to 20 wt% is disclosed. This means that an alloy with improved adhesion to a glass substrate or silicon film can be provided. Furthermore, in Patent Document 11, the wiring layer is mainly composed of at least one first metal selected from the group consisting of Ag, Au, Cu, A1, and Pt, and Ti, Zr, Hf, Ta, Nb, Si, B, La, Nd, Sm, Eu, Gd, Dy, Y, Yb, Ce, Mg, Th, and a conductive layer made of a material containing at least one second metal selected from the group consisting of Cr And a liquid crystal display device having an oxide layer made of a material mainly composed of a second metal that covers the surface of the conductive layer. This means that high resistance to chemical treatment in the manufacturing process and good adhesion to the substrate can be obtained, and disconnection of the wiring layer can be suppressed.

[0006] し力しながら、上記従来技術における Cu酸ィ匕物は酸素を容易に透過するために酸 化抑止機能がなぐ保護被膜とはならないという問題がある。特に、特許文献 11に開 示された技術では、 Cuに適当な添加元素を添加して合金化することにより、添加元 素が保護被膜を形成し、これによつて Cuの酸ィ匕を抑止できる可能性はあるが、銅合 金中における添加元素の拡散が不十分で強固な酸ィ匕膜の形成は困難である。  [0006] However, there is a problem that the Cu oxide in the above-mentioned prior art does not form a protective film without an oxidation inhibiting function because it easily permeates oxygen. In particular, in the technique disclosed in Patent Document 11, the additive element forms a protective film by adding an appropriate additive element to Cu and alloying it, thereby suppressing Cu oxidation. Although there is a possibility, it is difficult to form a strong oxide film due to insufficient diffusion of additive elements in the copper alloy.

[0007] 液晶表示装置 (LCD)以外の平面表示装置としては、例えば気体放電を用いた表 示デバイスであるプラズマディスプレイ (PDP)、電流を流すと発光するジァミン類な どの有機物を利用した表示デバイスである有機 EL表示装置 (OLED)、ブラウン管( CRT)と同じ原理での自発発光型ディスプレイであり、基本的に CRTと同じ原理によ つて発光するディスプレイであるフィールドェミッションディスプレイ(FED)などが挙 げられる。  [0007] As a flat display device other than a liquid crystal display device (LCD), for example, a plasma display (PDP) which is a display device using gas discharge, a display device using organic substances such as diamines which emit light when a current is passed Field emission display (FED), which is a self-luminous display based on the same principle as the organic EL display (OLED) and cathode ray tube (CRT), which basically emits light based on the same principle as the CRT. Can be mentioned.

ここで、プラズマディスプレイ装置は、隔壁(リブ)で隔てられた放電セルがあり、蛍光 体で覆われており、放電セルはアドレス電極と走査電極の間に蓄積された電荷が放 電して蛍光体を発光させる。また、有機 EL表示装置においては、液晶表示装置と同 様の TFTからなる画素回路が画素毎に配置される。一方、フィールドェミッションディ スプレイ装置は、力ソード電極に接続されたェミッタ一電極とアノード電極間に電圧が 付加され、ゲート電圧によって制御されて放出された電子が蛍光体を発光させる。 これらの平面電子表示装置においても、上述した液晶表示装置の TFT用の電極配 線と同様に、ガラス基板と配線の密着性を高め、配線抵抗を低減し、耐酸化性を高 め、更に端子部の形成工程を簡略ィ匕する必要がある。  Here, the plasma display device has discharge cells separated by barrier ribs (ribs) and is covered with a phosphor, and the discharge cells discharge fluorescence accumulated between the address electrodes and the scan electrodes. Lights the body. In addition, in an organic EL display device, a pixel circuit composed of TFTs similar to a liquid crystal display device is arranged for each pixel. On the other hand, in the field emission display device, a voltage is applied between the emitter electrode and the anode electrode connected to the force sword electrode, and the emitted electrons controlled by the gate voltage cause the phosphor to emit light. In these flat electronic display devices as well as the electrode wiring for TFT of the liquid crystal display device described above, the adhesion between the glass substrate and the wiring is increased, the wiring resistance is reduced, the oxidation resistance is increased, and the terminal is further improved. It is necessary to simplify the process of forming the part.

[0008] 特許文献 1:特開 2000— 199054号公報 特許文献 2 :特開 2002— 69550号公報 [0008] Patent Document 1: JP 2000-199054 A Patent Document 2: Japanese Patent Laid-Open No. 2002-69550

特許文献 3 :特開 2005— 158887号公報  Patent Document 3: Japanese Patent Laid-Open No. 2005-158887

特許文献 4:特開 2004— 163901号公報  Patent Document 4: Japanese Unexamined Patent Application Publication No. 2004-163901

特許文献 5 :特開 2005— 166757号公報  Patent Document 5: Japanese Unexamined Patent Application Publication No. 2005-166757

特許文献 6:特開 2004— 139057号公報  Patent Document 6: Japanese Unexamined Patent Application Publication No. 2004-139057

特許文献 7:特開 2004 - 91907号公報  Patent Document 7: Japanese Unexamined Patent Application Publication No. 2004-91907

特許文献 8:特開 2003 - 277852号公報  Patent Document 8: Japanese Patent Laid-Open No. 2003-277852

特許文献 9:特開 2003 - 332262号公報  Patent Document 9: Japanese Patent Laid-Open No. 2003-332262

特許文献 10:特開 2003 - 342653号公報  Patent Document 10: Japanese Patent Laid-Open No. 2003-342653

特許文献 11 :特開平 10— 153788号公報  Patent Document 11: Japanese Patent Laid-Open No. 10-153788

発明の開示  Disclosure of the invention

発明が解決しょうとする課題  Problems to be solved by the invention

[0009] 上述したように、上記従来技術では、 Cuに合金添加元素を添加して基板との密着 性及び耐酸化性を確保する試みがなされたが、 Vヽずれの場合も十分な結果が得ら れていない。また、添加元素が Cu中に残留することによって配線の電気抵抗が上昇 すると 、う問題も未解決のままである。 [0009] As described above, in the above prior art, an attempt was made to ensure adhesion and oxidation resistance with a substrate by adding an alloy additive element to Cu. However, sufficient results were obtained even in the case of V deviation. Not obtained. In addition, if the electrical resistance of the wiring increases due to the additive elements remaining in Cu, the problem remains unresolved.

本発明は、カゝかる状況に鑑みてなされたものであって、その課題は、基板との密着 性が高 、酸ィ匕被膜を形成して配線材料等の酸ィ匕を防止できると共に、導電率が高 Vヽ配線、電極又は端子電極を備えた平面電子表示装置及びその製造方法を提供 することにある。  The present invention has been made in view of the situation to be covered, and the problem is that the adhesion to the substrate is high, and an acid film can be formed to prevent the acid such as the wiring material. An object of the present invention is to provide a flat electronic display device having a high conductivity V wiring, electrode or terminal electrode, and a method for manufacturing the same.

課題を解決するための手段  Means for solving the problem

[0010] 上記課題を解決するため本発明の平面電子表示装置は、基板上に、画像を形成 する最小単位としての画素をマトリックス状に複数配列した画素部を有する平面電子 表示装置において、前記画素部で交叉する信号電極と、走査電極と、前記信号電極 又は前記走査電極と外部回路とを接続する端子電極とのうちの少なくとも一つ電極 の配線材料として、 Cuを主成分とし、その表面又は前記基板との界面に前記 Cu〖こ 添加した添加元素の酸化物層を形成する銅合金を適用したことを特徴とする。 この場合において、前記添加元素は、酸ィ匕物形成自由エネルギーが Cuより小さぐ Cu中における拡散係数力Cuの自己拡散係数より大きぐ Cu中における lat. %当 たりの電気抵抗上昇率が 5 Ω 'cm以下であり、且つ、 Cu中における活量係数 γが 、活量係数 γ > 1の関係を満足するものであり、前記銅合金における添加量は、 0. 5 〜25at. %であることが好ましい。 [0010] In order to solve the above problems, a flat electronic display device according to the present invention includes a pixel unit in which a plurality of pixels as a minimum unit for forming an image are arranged in a matrix on a substrate. As a wiring material for at least one of a signal electrode, a scan electrode, and a terminal electrode that connects the signal electrode or the scan electrode and an external circuit, Cu as a main component, its surface or A copper alloy for forming an oxide layer of the additive element added with Cu is applied to the interface with the substrate. In this case, the additive element has an oxide free formation energy smaller than that of Cu. The diffusion coefficient force in Cu is greater than the self-diffusion coefficient of Cu. The rate of increase in electrical resistance per lat.% In Cu is 5 Ω'cm or less, and the activity coefficient γ in Cu is the activity coefficient. The relationship of γ> 1 is satisfied, and the amount added in the copper alloy is preferably 0.5 to 25 at.%.

また、前記銅合金を適用した電極は、液晶画素、気体放電セル、有機 EL素子、フィ ールドエミッションディスプレイ用表示画素のうち少なくとも一つを駆動し制御する電 極であり、平面電子表示装置を、液晶表示装置、プラズマディスプレイ装置、有機 EL 表示装置又はフィールドェミッションディスプレイ装置とすることができる。 The electrode to which the copper alloy is applied is an electrode that drives and controls at least one of a liquid crystal pixel, a gas discharge cell, an organic EL element, and a field emission display display pixel. A liquid crystal display device, a plasma display device, an organic EL display device, or a field emission display device can be used.

本発明に係る液晶表示装置は、基板上でマトリックス状に交叉する電極線と、前記電 極線の交点に配置され、一対の基板と、これら基板間に挟持された液晶層と、前記 基板の前記液晶層側の表面に形成された電極と、前記電極に電気的に接続され前 記基板の前記表面に配設された配線層とを有する多数の液晶画素と、外部の駆動 回路に接続された端子電極と、を有するアクティブマトリックス方式の液晶表示装置 において、前記電極線、電極、配線層、端子電極のうち少なくとも一つは、銅を主成 分とし、前記基板との界面に、前記銅に添加した添加元素の酸ィ匕物層を形成する銅 合金カゝらなることを特徴とする。 A liquid crystal display device according to the present invention includes an electrode line crossing in a matrix on a substrate, a pair of substrates, a liquid crystal layer sandwiched between the substrates, a liquid crystal layer sandwiched between the substrates, A number of liquid crystal pixels each having an electrode formed on the surface on the liquid crystal layer side, a wiring layer electrically connected to the electrode and disposed on the surface of the substrate, and connected to an external driving circuit. And at least one of the electrode wire, the electrode, the wiring layer, and the terminal electrode, the copper being a main component, and the copper at the interface with the substrate. It is characterized by being a copper alloy that forms an oxide layer of an additive element added to the above.

この場合において、前記酸化物層は、前記基板に含まれる酸素と前記添加元素との 反応によって形成されたものであることが好ましい。 In this case, the oxide layer is preferably formed by a reaction between oxygen contained in the substrate and the additive element.

また、前記電極線、電極、配線層、端子電極の少なくとも一つは、絶縁層との界面に 、前記添加元素の酸ィ匕物層を具備するものであることが好まし 、。 In addition, it is preferable that at least one of the electrode wire, the electrode, the wiring layer, and the terminal electrode includes an oxide layer of the additive element at the interface with the insulating layer.

更にまた、前記電極線、電極、配線層、端子電極の少なくとも一つは、酸素を含有す る絶縁層との界面に前記添加元素と前記絶縁層の構成元素とが反応した酸化物層 を具備するものであってもよ 、。 Furthermore, at least one of the electrode wire, the electrode, the wiring layer, and the terminal electrode includes an oxide layer in which the additive element and a constituent element of the insulating layer are reacted at an interface with the insulating layer containing oxygen. You can do it.

更にまた、前記電極線、電極、配線層、端子電極の少なくとも一つは、その表面に前 記添加元素と雰囲気ガス中の酸素とが反応した酸ィ匕物層を具備するものであっても よい。 Furthermore, at least one of the electrode wire, the electrode, the wiring layer, and the terminal electrode may have an oxide layer in which the additive element and oxygen in the atmosphere gas react on the surface. Good.

更にまた、前記添加元素は、酸ィ匕物形成自由エネルギーが Cuより小さぐかつ、 Cu 中における拡散係数が Cuの自己拡散係数より大きいことが好ましい。 更にまた、前記添加元素は、 Cu中における lat. %当たりの電気抵抗上昇率が、 5 μ Ω · cm以下であることが好ましい。 Furthermore, it is preferable that the additive element has an oxide formation free energy smaller than that of Cu and a diffusion coefficient in Cu larger than that of Cu. Furthermore, the additive element preferably has an electrical resistance increase rate per lat.% In Cu of 5 μΩ · cm or less.

更にまた、前記添加元素は、 Cu中における活量係数 γ力 活量係数 γ > 1の関係 を満足することが好ましい。  Furthermore, the additive element preferably satisfies the relationship of activity coefficient γ force activity coefficient γ> 1 in Cu.

更にまた、前記銅合金は、添加元素が銅合金表面に拡散して、前記添加元素の酸 化被膜層が形成される銅合金であることが好ましい。 Furthermore, the copper alloy is preferably a copper alloy in which an additive element diffuses on the surface of the copper alloy to form an oxide film layer of the additive element.

更にまた、前記添加元素は、 Mn、 Zn、 Ga、 Li、 Ge、 Sr、 Ag、 In、 Sn、 Ba、 Prおよ び Ndからなる群力 選択される少なくとも 1種の金属とすることができる。  Furthermore, the additive element may be at least one metal selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr and Nd. .

更にまた、前記添加元素は、 Mnであることが好ましい。 Furthermore, the additive element is preferably Mn.

更にまた、前記 Mnの添加量は、 0. 5〜25at. %とすることができる。 Furthermore, the amount of Mn added can be 0.5 to 25 at.%.

本発明に係る液晶表示装置の製造方法は、基板上でマトリックス状に交叉する電極 線と、前記電極線の交点に配置され、一対の基板と、これら基板間に挟持された液 晶層と、前記基板の前記液晶層側の表面に形成された電極と、前記電極に電気的 に接続され前記基板の前記表面に配設された配線層とを有する複数の液晶画素と、 外部の駆動回路に接続された端子電極と、を有するアクティブマトリックス方式の液 晶表示装置の製造方法において、前記基板上に、 Cuを主成分とし、その表面又は 前記基板との界面に前記 Cuに添加した添加元素の酸ィ匕物層を形成する銅合金を 物理蒸着法又は化学気相成長法によって製膜する工程と、得られた銅合金膜をエツ チングして電極線、電極、配線層、端子電極のうちの少なくとも一つを形成する工程 と、を有することを特徴とする。 A method of manufacturing a liquid crystal display device according to the present invention includes an electrode line intersecting in a matrix on a substrate, a pair of substrates disposed at an intersection of the electrode lines, and a liquid crystal layer sandwiched between the substrates, A plurality of liquid crystal pixels each having an electrode formed on the surface of the substrate on the liquid crystal layer side, and a wiring layer electrically connected to the electrode and disposed on the surface of the substrate; and an external drive circuit In the manufacturing method of an active matrix type liquid crystal display device having connected terminal electrodes, Cu is a main component on the substrate, and an additive element added to the Cu is added to the surface or the interface with the substrate. A step of forming a copper alloy for forming an oxide layer by physical vapor deposition or chemical vapor deposition, and etching the obtained copper alloy film to form an electrode wire, an electrode, a wiring layer, or a terminal electrode. Form at least one of And having a degree, the.

この場合において、前記銅合金は、前記添加元素が Mn、 Zn、 Ga、 Li、 Ge、 Sr、 A g、 In、 Sn、 Ba、 Prおよび Ndからなる群力も選択される少なくとも 1種の金属であるこ とが好ましい。  In this case, the copper alloy is at least one metal in which the additive element is selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr and Nd. It is preferable that it exists.

また、この場合において、前記形成された電極線、電極、配線層、端子電極のうち 少なくとも一つの表面に、酸ィ匕物層を形成する工程を有するものとすることができる。 また、前記酸ィ匕物層形成工程における雰囲気ガス中の酸素濃度は、 ΙΟρρπ!〜 1% であることが好ましい。  In this case, the method may further include a step of forming an oxide layer on at least one surface of the formed electrode wire, electrode, wiring layer, and terminal electrode. In addition, the oxygen concentration in the atmospheric gas in the oxide layer forming step is ΙΟρρπ! It is preferably ~ 1%.

更にまた、前記酸化物層形成工程は、前記電極線、電極、配線層、端子電極の少な くとも一つを形成した後、 150〜400°Cで、 5分〜 50時間加熱して前記電極線、電極 、配線層、端子電極の少なくとも一つの表面に前記銅合金における添加元素の酸ィ匕 物層を形成する工程とすることができる。 Furthermore, the oxide layer forming step includes few electrode wires, electrodes, wiring layers, and terminal electrodes. After forming at least one, heat at 150 to 400 ° C. for 5 minutes to 50 hours to form an acid solution of the additive element in the copper alloy on at least one surface of the electrode wire, electrode, wiring layer, and terminal electrode. It can be a step of forming a material layer.

[0013] 本発明におけるプラズマディスプレイ装置は、背面ガラス基板の内側に形成されたァ ドレス電極配線と、前面ガラス基板の内側に形成された表示電極配線と、前記アドレ ス電極配線と表示電極配線とがマトリックス状に交叉する各交点にそれぞれ配置され た複数の電気放電セルと、外部の駆動回路に接続された端子電極と、を有するブラ ズマディスプレイ装置において、前記アドレス電極配線、表示電極配線、端子電極の 少なくとも一つは、銅を主成分とし、前記基板との界面に、前記銅に添加した添加元 素の酸化物層を形成する銅合金からなることを特徴とする。 [0013] A plasma display device according to the present invention includes an address electrode wiring formed inside a back glass substrate, a display electrode wiring formed inside the front glass substrate, the address electrode wiring, and the display electrode wiring. In a plasma display device having a plurality of electric discharge cells respectively arranged at intersections intersecting in a matrix and terminal electrodes connected to an external drive circuit, the address electrode wiring, display electrode wiring, terminal At least one of the electrodes is made of a copper alloy containing copper as a main component and forming an oxide layer of an additive element added to the copper at the interface with the substrate.

この場合において、前記酸化物層は、前記基板に含まれる酸素と前記添加元素との 反応によって形成されたものであることが好ましい。  In this case, the oxide layer is preferably formed by a reaction between oxygen contained in the substrate and the additive element.

また、前記アドレス電極配線、表示電極配線、端子電極の少なくとも一つは、その表 面又は絶縁層との界面に、雰囲気ガス中の酸素又は前記絶縁層に含まれる酸素と 前記添加元素が反応して形成された酸ィ匕物層を具備するものであってもよい。  In addition, at least one of the address electrode wiring, the display electrode wiring, and the terminal electrode reacts with oxygen in the atmospheric gas or oxygen contained in the insulating layer and the additive element at the surface or the interface with the insulating layer. It may be provided with an oxide layer formed in this way.

更に、前記添加元素は、酸ィ匕物形成自由エネルギーが Cuより小さぐかつ、 Cu中に おける添加元素の拡散係数が Cuの自己拡散係数より大きいことが好ましい。  Furthermore, the additive element preferably has an oxide formation free energy smaller than that of Cu, and the diffusion coefficient of the additive element in Cu is larger than the self-diffusion coefficient of Cu.

更にまた、前記添加元素は、 Cu中における lat. %当たりの電気抵抗上昇率が、 5 μ Ω · cm以下であることが好ましい。  Furthermore, the additive element preferably has an electrical resistance increase rate per lat.% In Cu of 5 μΩ · cm or less.

更にまた、前記添加元素は、 Cu中における活量係数 γ力 活量係数 γ > 1の関係 を満足することが好ましい。  Furthermore, the additive element preferably satisfies the relationship of activity coefficient γ force activity coefficient γ> 1 in Cu.

更にまた、前記銅合金は、添加元素が銅合金表面に拡散して、前記添加元素の酸 化被膜層が形成される銅合金であってもよい。  Furthermore, the copper alloy may be a copper alloy in which an additive element diffuses on the surface of the copper alloy to form an oxide film layer of the additive element.

更にまた、前記添加元素は、 Mn、 Zn、 Ga、 Li、 Ge、 Sr、 Ag、 In、 Sn、 Ba、 Prおよ び Ndからなる群力 選択される少なくとも 1種の金属であるものとすることができる。 更にまた、前記添加元素を、 Mnとすることが好ましい。  Furthermore, the additive element is at least one metal selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr and Nd. be able to. Furthermore, it is preferable that the additive element is Mn.

更にまた、前記 Mnの添加量は、 0. 5〜25at. %とすることができる。  Furthermore, the amount of Mn added can be 0.5 to 25 at.%.

[0014] なお、プラズマディスプレイ装置の製造方法としては、例えば、背面ガラス基板の内 側に形成されたアドレス電極配線と、前面ガラス基板の内側に形成された表示電極 配線と、前記アドレス電極配線と表示電極配線とがマトリックス状に交叉する各交点 にそれぞれ配置された複数の電気放電セルと、外部の駆動回路に接続された端子 電極と、を有するプラズマディスプレイ装置の製造方法において、前記基板上に、 c uを主成分とし、その表面又は前記基板との界面に前記 Cuに添加した添加元素の 酸化物層を形成する銅合金を物理蒸着法又は化学気相成長法によって製膜するェ 程と、得られた銅合金膜をエッチングしてアドレス電極配線、表示電極配線、端子電 極の少なくとも一つを形成する工程と、を有することを特長とする方法が挙げられる。 この場合において、前記形成されたアドレス電極配線、表示電極配線及び Z又は端 子電極上に、誘電体層を形成する工程を有するものとすることができる。 [0014] Note that, as a method of manufacturing a plasma display device, for example, a back glass substrate Address electrode wiring formed on the side, display electrode wiring formed on the inner side of the front glass substrate, and a plurality of electric discharges arranged at each intersection where the address electrode wiring and display electrode wiring intersect in a matrix In a method of manufacturing a plasma display device having a cell and a terminal electrode connected to an external drive circuit, cu is a main component on the substrate, and Cu is added to the surface or the interface with the substrate. The process of forming the copper alloy forming the oxide layer of the additive element by physical vapor deposition or chemical vapor deposition, and etching the obtained copper alloy film to address electrode wiring, display electrode wiring, terminal electrode And a step of forming at least one of the following. In this case, a step of forming a dielectric layer on the formed address electrode wiring, display electrode wiring, and Z or terminal electrode may be included.

更に、前記アドレス電極配線、表示電極配線、端子電極の少なくとも一つを形成した 後、 150〜400°Cで、 5分〜 50時間加熱して前記アドレス電極配線、表示電極配線 、端子電極の少なくとも一つの表面に前記銅合金に含まれる添加元素の酸ィ匕物層を 形成する工程を更に有するものであってもよい。 Furthermore, after forming at least one of the address electrode wiring, the display electrode wiring, and the terminal electrode, it is heated at 150 to 400 ° C. for 5 minutes to 50 hours to at least the address electrode wiring, the display electrode wiring, and the terminal electrode. You may further have the process of forming the oxide layer of the additive element contained in the said copper alloy on one surface.

この場合において、前記酸ィ匕物層形成工程における雰囲気ガス中の酸素濃度は、 1 Ορρπ!〜 1 %であることが好まし!、。 In this case, the oxygen concentration in the atmospheric gas in the oxide layer formation step is 1 Ορρπ! ~ 1% preferred!

本発明に係る有機 EL表示装置は、基板上でマトリックス状に交叉する電極線と、前 記電極線の交点に配置され、ガラス基板と、このガラス基板上に順次積層された陽 極、ホール輸送層、有機発光層、電子輸送層及び陰極とを有し、前記陽極と陰極と が TFT回路を介して前記マトリックス状に交叉する電極線に電気的に配線接続され た複数の有機 EL素子と、外部の駆動回路に接続された端子電極と、を有するァクテ イブマトリックス方式の有機 EL表示装置において、前記電極線、配線、端子電極の 少なくとも一つは、銅を主成分とし、前記基板との界面に、前記銅に添加した添加元 素の酸化物層を形成する銅合金からなることを特徴とする。  The organic EL display device according to the present invention is arranged at the intersection of the electrode lines intersecting in a matrix on the substrate and the electrode lines, and the glass substrate, and the positive electrode and the hole transport sequentially stacked on the glass substrate. A plurality of organic EL elements each having a layer, an organic light emitting layer, an electron transport layer, and a cathode, wherein the anode and the cathode are electrically connected to electrode lines intersecting in a matrix through a TFT circuit; In an active matrix type organic EL display device having terminal electrodes connected to an external driving circuit, at least one of the electrode lines, wirings, and terminal electrodes is mainly composed of copper and has an interface with the substrate. Further, it is characterized by comprising a copper alloy that forms an oxide layer of an additive element added to the copper.

この場合において、前記酸化物層は、前記基板に含まれる酸素と前記添加元素との 反応によって形成されたものであることが好ましい。 In this case, the oxide layer is preferably formed by a reaction between oxygen contained in the substrate and the additive element.

また、前記電極線、配線、端子電極の少なくとも一つは、その表面又は絶縁層との界 面に、雰囲気ガス中の酸素又は前記絶縁層に含まれる酸素と前記添加元素が反応 した酸ィ匕物層を具備するものであってもよい。 In addition, at least one of the electrode wire, the wiring, and the terminal electrode has a reaction between oxygen in the atmospheric gas or oxygen contained in the insulating layer and the additive element on the surface or the interface with the insulating layer. It may be provided with an acid oxide layer.

更に、前記添加元素は、酸ィ匕物形成自由エネルギーが Cuより小さぐかつ、 Cu中に おける添加元素の拡散係数が Cuの自己拡散係数より大きいことが好ましい。  Furthermore, the additive element preferably has an oxide formation free energy smaller than that of Cu, and the diffusion coefficient of the additive element in Cu is larger than the self-diffusion coefficient of Cu.

更にまた、前記添加元素は、 Cu中における lat. %あたりの電気抵抗上昇率が、 5 μ Ω ' cm以下であることが好ましい。  Furthermore, the additive element preferably has an electrical resistance increase rate per lat.% In Cu of 5 μΩ ′ cm or less.

更にまた、前記添加元素は、 Cu中における活量係数 γ力 活量係数 γ > 1の関係 を満足することが好ましい。  Furthermore, the additive element preferably satisfies the relationship of activity coefficient γ force activity coefficient γ> 1 in Cu.

更にまた、前記銅合金は、添加元素が銅合金表面に拡散して、前記添加元素の酸 化被膜層が形成される銅合金であってもよい。  Furthermore, the copper alloy may be a copper alloy in which an additive element diffuses on the surface of the copper alloy to form an oxide film layer of the additive element.

更にまた、前記添加元素は、 Mn、 Zn、 Ga、 Li、 Ge、 Sr、 Ag、 In、 Sn、 Ba、 Prおよ び Ndからなる群力 選択される少なくとも 1種の金属とすることができる。  Furthermore, the additive element may be at least one metal selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr and Nd. .

更にまた、前記添加元素を、 Mnとすることが好ましい。  Furthermore, it is preferable that the additive element is Mn.

更にまた、前記 Mnの添加量は、 0. 5〜25at. %とすることができる。  Furthermore, the amount of Mn added can be 0.5 to 25 at.%.

[0016] なお、有機 EL表示装置の製造方法としては、例えば、基板上でマトリックス状に交叉 する電極線と、 前記電極線の交点に配置され、ガラス基板と、このガラス基板上に 順次積層された陽極、ホール輸送層、有機発光層、電子輸送層及び陰極とを有し、 前記陽極と陰極とが TFT回路を介してマトリックス状に交叉する電極線に電気的に 配線接続された複数の有機 EL素子と、外部の駆動回路に接続された端子電極と、 を有するアクティブマトリックス方式の有機 EL表示装置の製造方法にぉ 、て、前記 基板上に、 Cuを主成分とし、その表面又は前記基板との界面に前記 Cuに添加した 添加元素の酸化物層を形成する銅合金を物理蒸着法又は化学気相成長法によって 製膜する工程と、得られた銅合金膜をエッチングして前記電極線、配線、端子電極 の少なくとも一つを形成する工程と、を有することを特長とする方法が挙げられる。 この場合において、前記電極線、配線、端子電極の少なくとも一つを形成した後、 15 0〜400°Cで、 5分〜 50時間加熱して前記電極線、配線端子電極の少なくとも一つ の表面に前記銅合金に含まれる添加元素の酸化物層を形成する工程を有するもの とすることができる。 [0016] Note that, as a method for manufacturing an organic EL display device, for example, electrode lines that intersect in a matrix on a substrate, and are arranged at intersections of the electrode lines, and are sequentially laminated on the glass substrate. A plurality of organic layers, each having an anode, a hole transport layer, an organic light emitting layer, an electron transport layer, and a cathode, wherein the anode and the cathode are electrically connected to electrode lines that intersect in a matrix through a TFT circuit. According to a method for manufacturing an active matrix organic EL display device having an EL element and a terminal electrode connected to an external drive circuit, Cu is a main component on the substrate, and the surface thereof or the substrate Forming a copper alloy that forms an oxide layer of the additive element added to Cu at the interface with the substrate by physical vapor deposition or chemical vapor deposition, and etching the obtained copper alloy film to form the electrode wire , Wiring, end Forming at least one electrode, and a method that features have a. In this case, after forming at least one of the electrode wire, wiring, and terminal electrode, heating at 150 to 400 ° C. for 5 minutes to 50 hours to at least one surface of the electrode wire and wiring terminal electrode And a step of forming an oxide layer of an additive element contained in the copper alloy.

[0017] 本発明に係るフィールドェミッション表示装置は、力ソード側ガラス基板と、このカソー ド側ガラス基板に対向して設けられたアノード側ガラス基板と、前記アノード側ガラス 基板の内面に設けられたアノード電極及び蛍光体膜と、前記力ソード側ガラス基板の 内面に、マトリックス状に複数配置された力ソード電極と、前記アノード電極と前記力 ソード電極との間の真空空間部に配置されたゲート電極と、前記力ソード電極とァノ ード電極とを接続する電極線及び前記力ソード電極とゲート電極とを接続する電極 線と、外部の駆動回路に接続された端子電極と、を有するフィールドェミッション表示 装置において、前記電極、電極線、端子電極の少なくとも一つは、銅を主成分とし、 前記基板との界面に、前記銅に添加した添加元素の酸ィ匕物層を形成する銅合金か らなることを特徴とする。 [0017] A field emission display device according to the present invention includes a force sword side glass substrate and the cathode. A plurality of anode side glass substrates provided opposite to the glass side glass substrate, an anode electrode and a phosphor film provided on the inner surface of the anode side glass substrate, and a matrix on the inner surface of the force sword side glass substrate. A force sword electrode disposed; a gate electrode disposed in a vacuum space between the anode electrode and the force sword electrode; an electrode wire connecting the force sword electrode and the anode electrode; and the force In a field emission display device having an electrode line connecting a sword electrode and a gate electrode and a terminal electrode connected to an external drive circuit, at least one of the electrode, electrode line, and terminal electrode is made of copper. The main component is made of a copper alloy that forms an oxide layer of an additive element added to the copper at the interface with the substrate.

この場合において、前記酸化物層は、前記基板に含まれる酸素と前記添加元素との 反応によって形成されたものであることが好ましい。 In this case, the oxide layer is preferably formed by a reaction between oxygen contained in the substrate and the additive element.

また、前記電極、電極線、端子電極の少なくとも一つは、その表面又は絶縁層との界 面に、雰囲気ガス中の酸素又は前記絶縁層に含まれる酸素と前記添加元素が反応 した酸ィ匕物層を具備するものであってもよい。 In addition, at least one of the electrode, the electrode wire, and the terminal electrode is formed on the surface or the interface with the insulating layer, in which oxygen in the atmosphere gas or oxygen contained in the insulating layer reacts with the additive element. It may have a physical layer.

更に、前記添加元素は、酸ィ匕物形成自由エネルギーが Cuより小さぐかつ、 Cu中に おける添加元素の拡散係数が Cuの自己拡散係数より大きいことが好ましい。 Furthermore, the additive element preferably has an oxide formation free energy smaller than that of Cu, and the diffusion coefficient of the additive element in Cu is larger than the self-diffusion coefficient of Cu.

更にまた、前記添加元素は、 Cu中における lat. %当たりの電気抵抗上昇率が、 5 μ Ω · cm以下であることが好ましい。 Furthermore, the additive element preferably has an electrical resistance increase rate per lat.% In Cu of 5 μΩ · cm or less.

更にまた、前記添加元素は、 Cu中における活量係数 γ力 活量係数 γ > 1の関係 を満足することが好ましい。 Furthermore, the additive element preferably satisfies the relationship of activity coefficient γ force activity coefficient γ> 1 in Cu.

更にまた、前記銅合金は、添加元素が銅合金表面に拡散して、前記添加元素の酸 化被膜層が形成される銅合金であってもよい。 Furthermore, the copper alloy may be a copper alloy in which an additive element diffuses on the surface of the copper alloy to form an oxide film layer of the additive element.

更にまた、前記添加元素は、 Mn、 Zn、 Ga、 Li、 Ge、 Sr、 Ag、 In、 Sn、 Ba、 Prおよ び Ndからなる群力 選択される少なくとも 1種の金属とすることができる。 Furthermore, the additive element may be at least one metal selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr and Nd. .

更にまた、前記添加元素を、 Mnとすることが好ましい。 Furthermore, it is preferable that the additive element is Mn.

更にまた、前記 Mnの添加量は、 0. 5〜25at. %とすることができる。 Furthermore, the amount of Mn added can be 0.5 to 25 at.%.

なお、フィールドェミッション表示装置の製造方法としては、例えば、力ソード側ガラス 基板と、この力ソード側ガラス基板に対向して設けられたアノード側ガラス基板と、前 記アノード側ガラス基板の内面に設けられたアノード電極及び蛍光体膜と、前記カソ ード側ガラス基板の内面に、マトリックス状に複数配置された力ソード電極と、該ァノ ード電極と前記力ソード電極との間の真空空間部に配置されたゲート電極と、前記力 ソード電極とアノード電極とを接続する電極線及び前記力ソード電極とゲート電極とを 接続する電極線と、外部の駆動回路に接続された端子電極と、を有するフィールドェ ミッション表示装置の製造方法において、前記基板表面に、 Cuを主成分とし、その 表面又は前記基板との界面に前記 Cuに添加した添加元素の酸化物層を形成する 銅合金を物理蒸着法又は化学気相成長法によって製膜する工程と、得られた銅合 金膜をエッチングして電極、電極線、端子電極の少なくとも一つを形成する工程と、 を有することを特長とする方法が挙げられる。 As a method for manufacturing the field emission display device, for example, a force sword side glass substrate, an anode side glass substrate provided opposite to the force sword side glass substrate, The anode electrode and phosphor film provided on the inner surface of the anode side glass substrate, a plurality of force sword electrodes arranged in a matrix on the inner surface of the cathode side glass substrate, the anode electrode and the A gate electrode disposed in a vacuum space between the force sword electrode, an electrode line connecting the force sword electrode and the anode electrode, an electrode line connecting the force sword electrode and the gate electrode, and an external drive In a method for manufacturing a field emission display device having a terminal electrode connected to a circuit, the substrate surface is mainly composed of Cu, and oxidation of an additive element added to the Cu on the surface or the interface with the substrate is performed. Forming a physical layer A process of forming a copper alloy by physical vapor deposition or chemical vapor deposition, and etching the obtained copper alloy film to form at least one of an electrode, an electrode wire, and a terminal electrode A step of forming, and a method that features have a.

この場合において、前記電極、電極線、端子電極の少なくとも一つを形成した後、 15 0〜400°Cで、 5分〜 50時間加熱して前記電極、電極線、端子電極の少なくとも一つ の表面に前記銅合金に含まれる添加元素の酸化物層を形成する工程を有するもの とすることができる。  In this case, after forming at least one of the electrode, electrode wire, and terminal electrode, heating at 150 to 400 ° C. for 5 minutes to 50 hours to at least one of the electrode, electrode wire, and terminal electrode It may have a step of forming an oxide layer of an additive element contained in the copper alloy on the surface.

発明の効果  The invention's effect

[0019] 本発明によれば、電気導電率を低下させることなぐその配線表面に Cuの酸ィ匕を 防止すると共に基板との密着性が高い酸化被膜層を形成した配線を有する液晶表 示装置、プラズマディスプレイ装置、有機 EL表示装置、フィールドェミッション表示装 置等の平面電子表示装置を提供することができる。 発明を実施するための最良の形態  According to the present invention, a liquid crystal display device having a wiring in which an oxide film layer having high adhesion to the substrate is formed on the surface of the wiring without lowering the electrical conductivity while preventing oxidation of Cu. In addition, it is possible to provide flat electronic display devices such as plasma display devices, organic EL display devices, and field emission display devices. BEST MODE FOR CARRYING OUT THE INVENTION

[0020] 以下に、本発明の実施の形態について添付の図面を参照しつつ詳細に説明する 。なお、いわゆる当業者は特許請求の範囲内における本発明を変更 *修正して他の 実施形態をなすことは容易であり、以下の説明はこの発明における最良の形態の例 であって、この特許請求の範囲を限定するものではな 、。  Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. It should be noted that it is easy for those skilled in the art to change and modify the present invention within the scope of the claims to make other embodiments, and the following description is an example of the best mode of the present invention. It does not limit the scope of claims.

[0021] 図 1は、本発明の第 1実施形態としての液晶表示装置の構成を示す概略図である。  FIG. 1 is a schematic diagram showing a configuration of a liquid crystal display device as a first embodiment of the present invention.

この液晶表示装置(LCD)は、逆スタガー型の TFT型のものである力 本発明で適 用する銅合金配線は、これに限るものでなぐエッチングストッパー Z逆スタガー型、 バックチャネル Z逆スタガー型、スタガー型 TFT、プレナ一型 TFTにおいても同様 に適用することができる。また、上記銅合金配線は、ゲート線に限らず、信号線、ソー ス 'ドレインの電極、電極端子等に用いろこともできる。更に、 TFTの半導体膜は a— Si膜に限ったものではなぐポリシリコン膜であっても良い。 This liquid crystal display (LCD) is a reverse stagger type TFT type. The copper alloy wiring applied in the present invention is not limited to this etching stopper Z reverse stagger type, back channel Z reverse stagger type The same applies to stagger type TFT and planar type TFT Can be applied to. The copper alloy wiring can be used not only for gate lines but also for signal lines, source / drain electrodes, electrode terminals, and the like. Further, the TFT semiconductor film is not limited to the a-Si film but may be a polysilicon film.

図 1において、この液晶表示装置は、一対の基板 11、 12と、これら基板間に挟持さ れた液晶層 15と、基板 12の液晶層側の表面に形成された電極と、電極に電気的に 接続され前記基板の表面に配設された配線層とを有する。すなわち、図 1の液晶表 示装置は、一方の面に ITO (インジウム錫酸ィ匕物)膜の透明共通電極 13を形成した ガラス製の透明基板 11と、一方の面に ITO膜の画素電極 14を形成した透明基板 12 とを、各電極面が対向するように配置したものである。透明基板 12上に形成された画 素電極 14には、スィッチである TFT16と蓄積容量 19が含まれる。このような画素電 極 14が透明基板 12上に数十万力も数百万個配置されている。また、両基板 11、 12 は基板間隙剤 (スぺーサ)によって数 mの間隙をおいて配置されており、その周縁 は封着され、内部の間隙に液晶層 15が充填されている。即ち、 1対の基板により液 晶層 15が挟持されている。  In FIG. 1, the liquid crystal display device includes a pair of substrates 11 and 12, a liquid crystal layer 15 sandwiched between the substrates, an electrode formed on the surface of the substrate 12 on the liquid crystal layer side, and an electrode electrically And a wiring layer disposed on the surface of the substrate. That is, the liquid crystal display device of FIG. 1 includes a glass transparent substrate 11 having an ITO (indium stannate) film transparent common electrode 13 formed on one surface, and an ITO film pixel electrode on one surface. The transparent substrate 12 on which 14 is formed is arranged so that the electrode surfaces face each other. The pixel electrode 14 formed on the transparent substrate 12 includes a TFT 16 as a switch and a storage capacitor 19. Hundreds of thousands of such pixel electrodes 14 are arranged on the transparent substrate 12. The substrates 11 and 12 are arranged with a gap of several meters by a substrate gap agent (spacer), the periphery thereof is sealed, and the liquid crystal layer 15 is filled in the inner gap. That is, the liquid crystal layer 15 is sandwiched between a pair of substrates.

[0022] 図 2は、図 1の液晶表示装置の画素の構成を示す概略図である。  FIG. 2 is a schematic diagram showing a configuration of a pixel of the liquid crystal display device of FIG.

図 2において、透明基板に、回路と平面的に等価な 2次面配列で画素電極 14、 TFT スイッチング素子 16、ゲート配線 17、ソース配線 18及び蓄積容量線 19が配置される 。ゲート配線 17とソース配線 18の交点は絶縁膜 24によって絶縁されている。すなわ ち、画面表示の行方向に延長されたゲート配線 17と列方向に延長されたソース配線 18とがマトリックス状に配置され、さらに各ゲート配線 17に平行に蓄積容量線 19が 配置されている。ゲート配線 17とソース配線 18が囲む領域単位に TFTスィッチング 素子 16と画素電極 14が形成され、 TFTスィッチング素子 16はゲート配線 17とソース 配線 18に領域単位の交差部で電気的に接続されている。すなわち、 TFTのソース 電極 22がソース配線 18に、ドレイン電極 23が画素電極 14に、ゲート電極 21がゲー ト線 17に接続されている。  In FIG. 2, a pixel electrode 14, a TFT switching element 16, a gate wiring 17, a source wiring 18, and a storage capacitor line 19 are arranged on a transparent substrate in a secondary plane arrangement that is planarly equivalent to the circuit. The intersection of the gate wiring 17 and the source wiring 18 is insulated by an insulating film 24. In other words, the gate wiring 17 extended in the row direction on the screen display and the source wiring 18 extended in the column direction are arranged in a matrix, and the storage capacitor line 19 is arranged in parallel with each gate wiring 17. Yes. The TFT switching element 16 and the pixel electrode 14 are formed in the region unit surrounded by the gate wiring 17 and the source wiring 18, and the TFT switching element 16 is electrically connected to the gate wiring 17 and the source wiring 18 at the intersection of the region unit. . That is, the TFT source electrode 22 is connected to the source wiring 18, the drain electrode 23 is connected to the pixel electrode 14, and the gate electrode 21 is connected to the gate line 17.

[0023] 図 3は、図 2における画素構成の要部を示す拡大断面図であり、 TFTトランジスタ 素子部分の断面(1)及び蓄積容量線部分の断面 (2)を示すものである。  FIG. 3 is an enlarged cross-sectional view showing a main part of the pixel configuration in FIG. 2, and shows a cross section (1) of the TFT transistor element portion and a cross section (2) of the storage capacitor line portion.

図 3において、ガラス製の透明基板 12上に、 TFTスィッチング素子 16、ゲート線 17 に接続されたゲート電極 21及び蓄積容量線 19が配置されている。ゲート電極 21は 、 Cu合金からなる金属部分の導電層 211と、これを被覆する酸化被膜層 212及び 2 13とから構成される。酸ィ匕被膜層 213は、導電層 211と基板 12間に介在する。同様 に蓄積容量線 19は、 Cu合金力もなる導電層 191と、これを被覆する酸化被膜層 19 2及び 193とから構成される。 In FIG. 3, a TFT switching element 16 and a gate line 17 are formed on a transparent substrate 12 made of glass. A gate electrode 21 and a storage capacitor line 19 connected to are connected. The gate electrode 21 is composed of a conductive layer 211 of a metal portion made of a Cu alloy and oxide film layers 212 and 213 covering the conductive layer 211. The acid coating layer 213 is interposed between the conductive layer 211 and the substrate 12. Similarly, the storage capacitor line 19 includes a conductive layer 191 having a Cu alloy force and oxide film layers 192 and 193 covering the conductive layer 191.

ゲート電極 21、蓄積容量線 19等が形成された透明基板 12上に、複数の層 241及び 242からなる絶縁膜 24が堆積され、その上面の TFT領域に a— Si層 25が形成され、 更にその上に、ソース電極 22及びドレイン電極 23が形成される。ソース電極層 22は 、ソース配線 18に電気的に接続される(図 3 (1) )。蓄積容量線 19及びその上に設け られた複数の層 241及び 242からなる絶縁膜 24上の画素領域には ITO力もなる画 素電極 14が形成され、ドレイン電極 23と電気的に接続されている(図 3 (2) )。  An insulating film 24 composed of a plurality of layers 241 and 242 is deposited on the transparent substrate 12 on which the gate electrode 21, the storage capacitor line 19 and the like are formed, and an a-Si layer 25 is formed in the TFT region on the upper surface. A source electrode 22 and a drain electrode 23 are formed thereon. The source electrode layer 22 is electrically connected to the source wiring 18 (FIG. 3 (1)). A pixel electrode 14 having ITO force is formed in the pixel region on the insulating film 24 composed of the storage capacitor line 19 and a plurality of layers 241 and 242 provided thereon, and is electrically connected to the drain electrode 23. (Figure 3 (2)).

[0024] 図 4は、このようにして構成された液晶画素(以下、 TFT素子ともいう) 20を多数配列 させた TFT液晶パネルの等価回路を示す図である。通常、 TFT液晶パネルは、例え ば 640 X 3 X 480個の TFT素子からなる力 図 4においては、便宜上 3 X 3画素とし て示した。図 4において、ゲート配線 17及びソース配線 18は、それぞれの行及び列 で共有されており、あるゲート配線 17及びソース配線 18を選択すると、その組み合 わせが決定される。 TFT画素 20のうち任意の画素を表示させ、文字又は画像を形 成する場合、ゲート配線 17を走査線として、複数の走査線を線順次に走査する。こ の原理に従って、逐次、ゲート配線 17を走査し、このときにタイミングを合わせて全て のソース配線 18にそれぞれの画素の駆動状態に合わせた電圧を印加することによつ て必要な液晶画素 20を全て表示し、これによつて 1フレームを表示し、以下これを繰 り返して動画が表示される。  FIG. 4 is a diagram showing an equivalent circuit of a TFT liquid crystal panel in which a large number of liquid crystal pixels (hereinafter also referred to as TFT elements) 20 configured as described above are arranged. Normally, a TFT liquid crystal panel is shown as a 3 × 3 pixel for the sake of convenience in FIG. 4, for example, as a force consisting of 640 × 3 × 480 TFT elements. In FIG. 4, the gate wiring 17 and the source wiring 18 are shared by the respective rows and columns. When a certain gate wiring 17 and source wiring 18 are selected, the combination is determined. When an arbitrary pixel among the TFT pixels 20 is displayed to form a character or an image, a plurality of scanning lines are scanned line-sequentially using the gate wiring 17 as a scanning line. In accordance with this principle, the gate lines 17 are sequentially scanned, and the necessary liquid crystal pixels 20 are applied by applying voltages according to the driving states of the respective pixels to all the source lines 18 at the same timing. Is displayed, and one frame is displayed. This is repeated to display a movie.

[0025] 次に、本実施形態における配線形成方法について説明する。  Next, the wiring forming method in the present embodiment will be described.

例えば、ガラス製の透明基板 12上に Cu合金をスパッタリングし、エッチングを行って 、ゲート配線 17、ゲート電極 21及び蓄積容量線 19の Cu合金層パターンを形成する 次いで、これを微量の酸素を含む酸化性雰囲気中で熱処理し、 Cu合金からなるゲ ート電極線 211 (図 3 (1)参照)の表面を酸化させて酸化被膜層 212及び 213を形成 させる。酸ィ匕被膜層 213は、導電層 211と基板 12間に形成される。 For example, a Cu alloy is sputtered on the glass transparent substrate 12 and etched to form a Cu alloy layer pattern of the gate wiring 17, the gate electrode 21, and the storage capacitor line 19. Next, this contains a trace amount of oxygen. Heat treatment is performed in an oxidizing atmosphere to oxidize the surface of the gate electrode wire 211 made of Cu alloy (see Fig. 3 (1)) to form oxide film layers 212 and 213. Let The acid coating layer 213 is formed between the conductive layer 211 and the substrate 12.

その後、スパッタリング又は CVD法により絶縁膜 24としての SiOxの絶縁層 241及 び SiNx膜 242を積層し、更にその上にアンドープ a— Si層 25を形成する。  Thereafter, a SiOx insulating layer 241 and a SiNx film 242 are laminated as the insulating film 24 by sputtering or CVD, and an undoped a-Si layer 25 is further formed thereon.

次いで、その表面に、ソース電極 22及びドレイン電極 23となる金属層を形成し、その 後、エッチング液により、ソース電極 22及びドレイン電極 23を形成する。次いで、 a- Si層 25を CDEによりエッチングし、 SiNxの保護膜を形成し、コンタクト部に開口を設 けて TFTスィッチング素子 16を形成した。 Next, a metal layer to be the source electrode 22 and the drain electrode 23 is formed on the surface, and then the source electrode 22 and the drain electrode 23 are formed with an etching solution. Next, the a-Si layer 25 was etched by CDE to form a SiNx protective film, and an opening was formed in the contact portion to form a TFT switching element 16.

この実施形態においては、 TFTスイッチング素子 16のゲート電極 21、ソース電極 2 2、ドレイン電極 23及びこれらにつながるゲート配線 17、ソース配線 18及び蓄熱容 量線 19が、同様の銅合金を用いて同様の手順によって形成される。銅合金における 添加元素としては、酸ィ匕物形成自由エネルギーは Cuより小さぐかつ、 Cu中におけ る添加元素の拡散係数 (以下、特に断らない限り単に、拡散係数という。)が Cuの自 己拡散係数より大きい金属が適用される。  In this embodiment, the gate electrode 21, the source electrode 22, the drain electrode 23 of the TFT switching element 16, and the gate wiring 17, the source wiring 18, and the heat storage capacity line 19 connected to these are the same using the same copper alloy. It is formed by the procedure. As an additive element in a copper alloy, the free energy of formation of oxides is smaller than that of Cu, and the diffusion coefficient of the additive element in Cu (hereinafter simply referred to as the diffusion coefficient unless otherwise specified) A metal greater than the self diffusion coefficient is applied.

酸ィ匕物形成自由エネルギー(A G : kjZmol)は、マイナスの値が大きいほど酸素(O )と反応性が高くなる。そこで、 Cu合金の表面に酸ィ匕被膜層を形成するために、 Cu より酸ィ匕物形成自由エネルギーの絶対値が大きい添加元素、換言すれば、酸ィ匕物 形成自由エネルギーが低い添加元素を適用する。 The free energy (A G: kjZmol) for forming an oxide is higher in reactivity with oxygen (O 2) as the negative value increases. Therefore, in order to form an oxide film layer on the surface of the Cu alloy, an additive element having a larger absolute value of the oxide formation free energy than Cu, in other words, an additive element having a lower oxide formation free energy. Apply.

また、添加元素の拡散係数を Cuの自己拡散係数より大きくすることによって、 Cu表 面に速く到達させて、 Cu合金表面に添加元素による酸ィ匕被膜層を優先的に形成さ せることができる。添加元素の拡散係数が Cuの自己拡散係数より小さいと、添加元 素が Cu合金表面に到達するまでに相当の時間が必要なために、 Cu合金表面では CuO、 Cu20等の Cu酸ィ匕被膜層を形成する。この Cu酸ィ匕被膜層は強固ではない ために、酸素が Cu酸化被膜層表面から内部に侵入し、 Cu合金内部で添加元素との 酸化物を形成する。更に、 Cuの酸ィ匕が進行すると金属状態の Cuが次第に少なくな り、液晶表示装置の配線等に使用されている場合には、電気抵抗が次第に大きくな るという問題がある。  In addition, by making the diffusion coefficient of the additive element larger than the self-diffusion coefficient of Cu, it is possible to quickly reach the Cu surface and to preferentially form an acid-oxide film layer with the additive element on the Cu alloy surface. . If the diffusion coefficient of the additive element is smaller than the self-diffusion coefficient of Cu, a considerable amount of time is required for the additive element to reach the surface of the Cu alloy. Therefore, a Cu oxide film such as CuO or Cu20 is formed on the surface of the Cu alloy. Form a layer. Since this Cu oxide film layer is not strong, oxygen penetrates from the surface of the Cu oxide film layer and forms an oxide with an additive element inside the Cu alloy. Furthermore, as Cu oxidation progresses, there is a problem that Cu in the metal state gradually decreases, and when it is used for wiring of a liquid crystal display device, the electrical resistance gradually increases.

そこで、本実施形態では Cuの自己拡散係数よりも大きい拡散係数を有する金属元 素を添加元素として使用し、これによつて、短時間で Cu合金表面に到達させて、力 つ、酸ィ匕物形成自由エネルギーが Cuのそれよりも絶対値が大きくて酸ィ匕しやすい金 属元素を添加元素とすることによって、 Cu合金表面に、 Cuより短時間で、添加元素 の酸化被膜層を形成する。 Therefore, in the present embodiment, a metal element having a diffusion coefficient larger than the self-diffusion coefficient of Cu is used as an additive element. In addition, by using an additive element that is a metal element that has a larger absolute value than that of Cu and has a higher absolute value than that of Cu. An oxide film layer is formed.

[0027] また、本実施形態にぉ 、て、液晶表示装置の配線材料として用いる Cu合金は、酸 化物層又は他の金属層と接触させて適用される際に、前記酸化物層と Cu合金との 界面に添加元素を含む酸化被膜層を形成する。このときに、添加元素を、酸化物層 の元素よりも酸ィ匕物形成自由エネルギーの大きいものにすることによって、前記酸ィ匕 物層を形成する酸化物を還元して酸化被膜層を形成することができ、また酸化雰囲 気であれば酸化物を還元することなく酸化被覆層を形成することができる。なお、他 の金属層と接触させた場合でも酸化雰囲気中であれば、その界面に酸化被膜層を 形成することができる。  [0027] Further, according to the present embodiment, when the Cu alloy used as the wiring material of the liquid crystal display device is applied in contact with an oxide layer or another metal layer, the oxide layer and the Cu alloy are used. An oxide film layer containing an additive element is formed at the interface with the substrate. At this time, the oxide forming the oxide layer is reduced by reducing the oxide forming the oxide layer by setting the additive element to have an oxide formation free energy larger than that of the oxide layer element. In an oxidizing atmosphere, an oxide coating layer can be formed without reducing the oxide. Note that an oxide film layer can be formed at the interface even in contact with another metal layer in an oxidizing atmosphere.

また、本実施形態において、配線材料等として適用する Cu合金を、酸素を含有す る絶縁層と接触させておくと、その界面で Cu合金が拡散してきて添加元素が酸ィ匕し て酸化被膜層を形成する。さらに、絶縁層に含まれる金属元素、 Cu合金中の Cu、添 加元素がそれぞれ酸化物を形成して 1つになって複合酸化被膜層を形成することが ある。例えば、液晶表示装置の基板が Si02等の酸ィ匕物を含む場合、基板上に Cu 合金のゲート配線を設け、これを熱処理すると、ゲート配線を形成する Cu合金中の 添加元素が、基板と Cu合金のゲート配線との界面に拡散して、酸化物を含む基板の 酸素と反応して酸化物となり、これによつて酸ィ匕被膜層を形成することができる。また 、例えば、ゲート電極 21の上には、 SiNO等によって構成されたゲート絶縁膜 24が 設けられるが、製造過程で加熱処理を施すことで、 Cu合金によるゲート電極 21とゲ ート絶縁膜 24との界面に (Cu、 Si、添加元素) Oxで表される酸ィ匕物層を形成する。 このようにして、液晶表示装置の配線材料等として Cu合金を用いてその表面に酸ィ匕 物層を設けることができる。  Further, in this embodiment, when a Cu alloy applied as a wiring material or the like is brought into contact with an insulating layer containing oxygen, the Cu alloy diffuses at the interface, and the additive element is oxidized and an oxide film is formed. Form a layer. In addition, the metal element contained in the insulating layer, Cu in the Cu alloy, and the additive element may each form an oxide to form a composite oxide film layer. For example, when the substrate of the liquid crystal display device includes an oxide such as Si02, a Cu alloy gate wiring is provided on the substrate, and when this is heat-treated, the additive element in the Cu alloy that forms the gate wiring is not in contact with the substrate. It diffuses to the interface with the Cu alloy gate wiring and reacts with oxygen on the substrate containing the oxide to form an oxide, whereby an oxide film layer can be formed. Further, for example, a gate insulating film 24 made of SiNO or the like is provided on the gate electrode 21. By performing heat treatment in the manufacturing process, the gate electrode 21 and the gate insulating film 24 made of Cu alloy are provided. (Cu, Si, additive elements) Oxide oxide layer expressed by Ox is formed at the interface. In this manner, an oxide layer can be provided on the surface of a Cu alloy as a wiring material or the like for a liquid crystal display device.

[0028] 銅合金における添加元素としては、 Cu合金中の添カ卩量が 0. l〜25at. %の範囲 で固溶する添加元素が好適に用いられる。 Cu合金中で固溶状態にないと、添加元 素が拡散しにくいからであり、特に、 Cuと金属間化合物を形成すると、添加元素はほ とんど拡散しなくなるからである。更に、 Cu合金中の添加元素の添加量が 0. lat. % 未満では、形成される酸化被膜層が薄くなつて Cuの酸化進行を阻止することができ なくなる。一方、添加元素の添加量が、 25at. %を越えると、常温近傍で添加元素の αネ目が析出することがある。 [0028] As the additive element in the copper alloy, an additive element that is solid-solved in an amount of additive in the Cu alloy in the range of 0.1 to 25 at.% Is preferably used. This is because the additive element is difficult to diffuse unless it is in a solid solution state in the Cu alloy. In particular, when an intermetallic compound is formed with Cu, the additive element is hardly diffused. Furthermore, the additive amount of the additive element in the Cu alloy is 0. lat.% If it is less than this, the formed oxide film layer becomes too thin to prevent the progress of Cu oxidation. On the other hand, if the amount of the additive element exceeds 25 at.%, The α element of the additive element may precipitate near room temperature.

さらに、本実施形態においては、 Cu中における lat. %当たりの電気抵抗上昇率が、 5 μ Ω ' cm以下である添加元素を適用する。添加元素の電気抵抗上昇率は、例えば 、添加元素として適用される元素の原子半径、電子状態と Cu原子との関係で決定さ れる。 Cu中における lat. %当たりの電気抵抗上昇率が、 5 Ω ' cmを越えると、現 状使用されているアルミニウム合金と同等の電気抵抗となり、銅合金を用いる利点が なくなる。 Further, in the present embodiment, an additive element whose electrical resistance increase rate per lat.% In Cu is 5 μΩ ′ cm or less is applied. The rate of increase in electrical resistance of the additive element is determined, for example, by the relationship between the atomic radius of the element applied as the additive element, the electronic state, and the Cu atom. If the rate of increase in electrical resistance per lat.% In Cu exceeds 5 Ω 'cm, the electrical resistance is equivalent to that of the aluminum alloy currently used, and the advantage of using a copper alloy is lost.

また、本実施形態に適用される配線、電極材料としての Cu合金は、 Cu中における 活量係数が 1. 0を越える添加元素を含有する。この活量係数は、活性度とも呼ばれ 、下記式(1)で定義される。  Further, the Cu alloy as the wiring and electrode material applied to the present embodiment contains an additive element having an activity coefficient exceeding 1.0 in Cu. This activity coefficient is also called activity and is defined by the following formula (1).

i= io +RTln y iNi……式(1)  i = io + RTln y iNi …… Formula (1)

(ここで、 iは i成分の化学ポテンシャル、 ioは i成分の標準状態の化学ポテ ンシャル、 y iは活量係数、 Niはモル分率)  (Where i is the chemical potential of the i component, io is the chemical potential of the standard state of the i component, y i is the activity coefficient, and Ni is the mole fraction)

活量係数 は、 Cu中における相互作用を表すもので、 i成分の活量係数 γ ί > 1で は、 Cu中で反発し、 Cuから分離する。 i成分の活量係数 γ ί< 1では Cu中で引きつ けあい、 Cu中にとどまる。ここで、 Cu合金に添加される添加元素は、 Cuに対して活 量係数 が、 1を越える値を有するものとしたことにより、 Cu原子力 解放され、拡散 しゃすくなる。さらに、 Cu合金の表面に到達し、 Cuより酸ィ匕しやすいことで、 Cu合金 表面に酸化被膜層を形成する。活量係数 が 1未満では、 Cu中に留まる傾向が強 いために Cu合金表面に到達しにくぐ酸化被膜層の形成が遅くなり、 Cuの酸化が進 行すること〖こなる。  The activity coefficient represents the interaction in Cu. When the activity coefficient γ ί> 1 of the i component, it repels in Cu and separates from Cu. When the activity coefficient of the i component is γ ί <1, it attracts in Cu and stays in Cu. Here, the additive element added to the Cu alloy has an activity coefficient of more than 1 with respect to Cu, so that Cu nuclear energy is released and diffusion is made. In addition, it reaches the surface of the Cu alloy and is more easily oxidized than Cu, thereby forming an oxide film layer on the surface of the Cu alloy. If the activity coefficient is less than 1, the formation of an oxide film layer that hardly reaches the surface of the Cu alloy is delayed due to a strong tendency to remain in Cu, and the oxidation of Cu proceeds.

なお、活量係数は、例えば以下のように測定した。即ち、銅合金をクヌーセンセル で溶解し、質量分析器によってイオン電流値の組成依存性を測定し、得られた結果 を Belton、 Fruehanの積分式を用いて解析し、活量係数を得た。  The activity coefficient was measured as follows, for example. That is, the copper alloy was dissolved in a Knudsen cell, the composition dependence of the ionic current value was measured with a mass spectrometer, and the obtained results were analyzed using Belton and Fruehan integral formulas to obtain activity coefficients.

本実施形態において、 Cu合金における添加元素は、具体的には、 Mn、 Zn、 Ga、 Li、 Ge、 Sr、 Ag、 In、 Sn、 Ba、 Pr及び Ndからなる群から選択される少なくとも 1種で ある。これらは単独でも良いし、複数の添加元素を同時に適用することもできる。 これらの添加元素は、いずれも酸ィ匕物形成自由エネルギーの絶対値が Cuのそれ よりも大きぐかつ、 Cu中における添加元素の拡散係数が Cuの自己拡散係数より大 きぐさらに、 Cu中における lat. %あたりの電気抵抗上昇率力 5 Ω 'cm以下であ る。さらに、これらの添加元素は、 Cu中における活量係数 γ力 活量係数 γ > 1の関 係を満足する。これによつて、 Cu合金中に添加されたこれらの金属は、 Cu中で拡散 して Cu合金表面に到達して、 Cuより先に強固で、密着性の高い酸化被膜層を形成 する。 Cu合金には、不可避的に、例えば S、 Se、 Te、 Pb、 Sb、 Bi等の不純物が混入 する場合がある力 これらについては、例えば銅合金の電気伝導度、引張強度等の 低下を招かないかぎり、許容される。 In the present embodiment, the additive element in the Cu alloy is specifically at least one selected from the group consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr, and Nd. so is there. These may be used alone or a plurality of additive elements may be applied simultaneously. Each of these additive elements has an absolute value of the free energy of formation of oxides larger than that of Cu, and the diffusion coefficient of the additive element in Cu is larger than the self-diffusion coefficient of Cu. The rate of increase in electrical resistance per lat.% is 5 Ω'cm or less. Further, these additive elements satisfy the relationship of activity coefficient γ force activity coefficient γ> 1 in Cu. As a result, these metals added to the Cu alloy diffuse in the Cu and reach the surface of the Cu alloy to form a strong and highly adherent oxide film layer ahead of the Cu. The Cu alloy is inevitably mixed with impurities such as S, Se, Te, Pb, Sb, Bi, etc. These may cause a decrease in the electrical conductivity, tensile strength, etc. of the copper alloy. As long as it is not.

[0030] 本実施形態にお!ヽて、 Cu合金を適用する方法は、特に限定されな!ヽ。電界メツキ 法、溶融メツキ法等のメツキ法、真空蒸着法、スパッタリング法等の物理蒸着法を用い ることができる。このようにして設けられた Cu合金を熱処理することで、添加元素が拡 散して Cu合金表面に到達して、 Cuより優先的に酸化されることで酸ィ匕被膜層が形 成される。 ここで、銅合金に用いる添カ卩元素としては、 Mn、 Zn、 Ga、 Li、 Ge、 Sr、 Ag、 In、 Sn、 Ba、 Pr及び Ndからなる群力も選択される少なくとも 1種であることが好 ましぐ特に、マンガン (Mn)であることが好ましい。 [0030] In the present embodiment, the method of applying the Cu alloy is not particularly limited. A plating method such as an electric field plating method or a melting plating method, or a physical vapor deposition method such as a vacuum deposition method or a sputtering method can be used. By heat-treating the Cu alloy provided in this way, the additive elements diffuse and reach the surface of the Cu alloy, and are oxidized preferentially over Cu to form an oxide film layer. . Here, the additive element used in the copper alloy is at least one selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr and Nd. In particular, manganese (Mn) is preferable.

熱処理温度は、例えば 150〜400°Cであり、熱処理期間は、例えば 5分〜 5時間の 範囲である。熱処理温度が 150°C未満では酸化被膜の形成に時間がかかり、生産 性が低下する。一方、 400°Cを越えると Cu合金の添加元素が表面に拡散、到達する 前に Cuが酸ィ匕して酸ィ匕被膜層を形成するという問題がある。また、熱処理時間が 5 分未満では酸ィ匕被膜の形成に時間がカゝかり過ぎ、一方、 5時間を越えると酸ィ匕被膜 層が十分形成されるので、熱処理の必要がなくなる。  The heat treatment temperature is, for example, 150 to 400 ° C., and the heat treatment period is, for example, in the range of 5 minutes to 5 hours. When the heat treatment temperature is less than 150 ° C, it takes time to form an oxide film, and productivity is lowered. On the other hand, when the temperature exceeds 400 ° C, Cu additive elements diffuse and reach the surface, causing Cu to oxidize and form an acid film layer. In addition, if the heat treatment time is less than 5 minutes, it takes too much time to form the acid film, whereas if it exceeds 5 hours, the acid film layer is sufficiently formed, so that there is no need for heat treatment.

[0031] 以下に、本発明の具体的実施例を説明する。 [0031] Specific examples of the present invention will be described below.

実施例 1  Example 1

洗浄したガラス基板上に、純度 99. 9999%の Cuと純度 99. 98%の Mnからなる C u- 2at. %Mn合金をターゲット材料として用いて、 Cu—2at. %Mn合金の薄膜を 成膜し、 150oC以上、 400oC以下の温度で熱処理を施した。その後ォージェ電子 分光法によって薄膜表面カゝら深さ方向の組成分布を分析した。さらに断面試料を作 製して透過電子顕微鏡と X線エネルギー分散分光器 (XEDS)を用いて組織観察と 組成分析を行った。 A Cu-2at.% Mn alloy thin film is formed on a cleaned glass substrate using a Cu-2at.% Mn alloy consisting of 99.9999% pure Cu and 99.98% pure Mn as a target material. The film was then heat-treated at a temperature of 150 ° C or higher and 400 ° C or lower. After that The composition distribution in the depth direction of the thin film surface was analyzed by spectroscopy. Furthermore, cross-sectional samples were prepared, and microstructure observation and composition analysis were performed using a transmission electron microscope and an X-ray energy dispersive spectrometer (XEDS).

図 5は、 400oC、 30分で熱処理を施した後の断面組織を模式的に示した図である。 Cu— Mn合金とガラス基板との界面付近及び Cu— Mn合金表面付近において Mn を主要元素とする安定な酸ィ匕物層が形成されている。  FIG. 5 is a diagram schematically showing a cross-sectional structure after heat treatment at 400 ° C. for 30 minutes. A stable oxide layer containing Mn as a main element is formed near the interface between the Cu-Mn alloy and the glass substrate and near the Cu-Mn alloy surface.

[0032] 実施例 2 [0032] Example 2

洗浄したガラス基板上に、プラズマ化学気相蒸着法 (PECVD)によって p— Si膜を 堆積した後、全面をレーザーァニールした。 p— Si膜をパターユングした後、 CVD法 で Si02ゲート絶縁膜を形成した。その後、 Cu— 2at. %Mn合金をスパッタ法によつ て成膜し、エッチングによってゲート電極を形成した。次に真空中において 400°C、 3 0分間の加熱処理をした。更に、イオンドーピング法で不純物を注入し、ソース電極 及びドレイン電極を自己整合的に形成し、層間絶縁膜を形成した。その後、 400°C、 30分間の加熱処理をした。図 6は、以上の工程を用いて形成されたプレナ一型ポリ シリコン (p— Si)形 TFT液晶表示装置スイッチング素子部分の模式断面図である。 図 6において、ゲート絶縁膜及び層間絶縁膜と Cu—Mn合金配線部分であるゲート 電極 21との界面近傍に、 Mn酸ィ匕物からなるノリア層が形成されていた。  A p-Si film was deposited on the cleaned glass substrate by plasma enhanced chemical vapor deposition (PECVD), and then the entire surface was laser-annealed. After p-Si film was patterned, Si02 gate insulating film was formed by CVD method. Thereafter, a Cu-2at.% Mn alloy was formed by sputtering, and a gate electrode was formed by etching. Next, heat treatment was performed at 400 ° C. for 30 minutes in a vacuum. Further, impurities were implanted by an ion doping method, the source electrode and the drain electrode were formed in a self-aligned manner, and an interlayer insulating film was formed. Thereafter, heat treatment was performed at 400 ° C. for 30 minutes. FIG. 6 is a schematic cross-sectional view of a planar type polysilicon (p-Si) type TFT liquid crystal display device switching element portion formed by the above process. In FIG. 6, a noria layer made of Mn oxide was formed in the vicinity of the interface between the gate insulating film and the interlayer insulating film and the gate electrode 21 which is the Cu—Mn alloy wiring portion.

[0033] 以下に、本発明の第 2実施形態について説明する。 [0033] A second embodiment of the present invention will be described below.

図 7は、プラズマディスプレイ装置の気体放電セル (以下、単に放電セルということが ある。)の構造を示す模式図である。  FIG. 7 is a schematic diagram showing the structure of a gas discharge cell (hereinafter, simply referred to as a discharge cell) of the plasma display device.

図 7において、この放電セル 105は、背面ガラス基板 101の内側に形成されたァドレ ス(データ)電極 103と、前面ガラス基板 102の内側に形成された透明電極 104とが 基板上でマトリックス状に交叉する各交点に配置された放電セルであって、背面ガラ ス基板 101と、前面ガラス基板 102の表面に形成された透明電極 104を保護する保 護層 106と、これらの間に所定間隔をもって配置された隔壁 107とで囲まれた放電空 間部を有している。  In FIG. 7, the discharge cell 105 includes an address (data) electrode 103 formed inside the rear glass substrate 101 and a transparent electrode 104 formed inside the front glass substrate 102 in a matrix form on the substrate. Discharge cells arranged at each crossing point, which are a back glass substrate 101, a protective layer 106 that protects the transparent electrode 104 formed on the surface of the front glass substrate 102, and a predetermined gap therebetween. It has a discharge space surrounded by the arranged barrier ribs 107.

放電空間部には、例えばネオン (Ne)とキセノン (Xn)との混合ガス又はヘリウム (He )とキセノン (Xn)との混合ガスが充填される。放電セル 105の内壁面には、光の 3原 色 (R、 G、 B)に対応した蛍光体が塗布されており、アドレス電極 103と透明電極 104 との間に電圧をかけると放電が生じ、発生する紫外線が蛍光体に当たって可視光を 発光する。 3色の光は、微妙に混ざり合ってさまざまな色をつくる。 The discharge space is filled with, for example, a mixed gas of neon (Ne) and xenon (Xn) or a mixed gas of helium (He) and xenon (Xn). The inner wall of the discharge cell 105 has three light sources. A phosphor corresponding to the color (R, G, B) is applied. When a voltage is applied between the address electrode 103 and the transparent electrode 104, a discharge is generated, and the generated ultraviolet light hits the phosphor and emits visible light. . The three colors of light mix delicately to create various colors.

[0034] 図 8は、放電セルを多数並べたプラズマディスプレイパネルを示す説明図である。図 8において、説明の便宜上、横方向及び縦方向にそれぞれ 3画素、合計 9個の放電 セル 111がマトリックス状に並べられて!/、る。このようなプラズマディスプレイパネルに おいて、アドレス電極配線 113、表示電極配線 114及びスィッチ部分の端子電極 11 5の配線材料として、第 1実施形態で使用したのと同様の Cu合金、例えば Cu— Mn が適用される。 FIG. 8 is an explanatory view showing a plasma display panel in which a large number of discharge cells are arranged. In FIG. 8, for convenience of explanation, a total of nine discharge cells 111 are arranged in a matrix form with three pixels in each of the horizontal and vertical directions. In such a plasma display panel, the same Cu alloy as that used in the first embodiment, for example, Cu-Mn, is used as the wiring material for the address electrode wiring 113, the display electrode wiring 114, and the terminal electrode 115 of the switch portion. Applies.

即ち、例えばガラス基板表面に、 Cu— Mn合金を、例えばスパッタ法、電子ビーム法 等の物理蒸着法又は化学気相成長法によって製膜した後、例えばフォトリソグラフィ 一法によってエッチングしてアドレス電極配線 113、表示電極配線 114、端子電極 1 15の少なくとも一つを形成する。その後、必要に応じて、その上面に誘電体層を形 成し、例えば 150°C〜400°Cで、 5分〜 50時間加熱することにより、例えば前記ガラ ス基板の構成元素と銅合金中の添加元素である Mnとを反応させ、これによつて前記 ガラス基板と Cu合金材との界面に Mnを主元素とする酸ィ匕物層を形成し、ガラス基板 と電極、配線材料との界面密着性を高めるとともに、電極、配線部分の耐酸化性を高 める。  That is, for example, a Cu-Mn alloy is formed on the surface of a glass substrate by a physical vapor deposition method such as a sputtering method or an electron beam method or a chemical vapor deposition method, and is then etched by, for example, a photolithography method to form an address electrode wiring. At least one of 113, display electrode wiring 114, and terminal electrode 115 is formed. Thereafter, if necessary, a dielectric layer is formed on the upper surface, and heated at 150 ° C. to 400 ° C. for 5 minutes to 50 hours, for example, in the constituent elements of the glass substrate and the copper alloy. Mn, which is an additive element of the above, is reacted to form an oxide layer containing Mn as a main element at the interface between the glass substrate and the Cu alloy material. Improve interfacial adhesion and increase oxidation resistance of electrodes and wiring parts.

このとき、誘電体層形成工程における雰囲気ガス中の酸素濃度を、 10ppm〜l%と すること〖こよって、上述した加熱処理工程を省略することもできる。  At this time, by setting the oxygen concentration in the atmospheric gas in the dielectric layer forming step to 10 ppm to 1%, the above-described heat treatment step can be omitted.

[0035] 本実施形態によれば、電気導電率を低下させることなぐその配線表面に Cuの酸ィ匕 を防止すると共に、基板との密着性が高 ヽ酸化被膜層を形成した配線を有するブラ ズマディスプレイ装置を提供することができる。  [0035] According to this embodiment, the copper oxide is prevented from being oxidized on the surface of the wiring without lowering the electrical conductivity, and the brazing having the wiring in which the oxide film layer is formed with high adhesion to the substrate. A zuma display device can be provided.

[0036] 以下に、本発明の第 3実施形態について説明する。  Hereinafter, a third embodiment of the present invention will be described.

図 9は、有機 EL素子の構造を示す模式図である。図 9において、この有機 EL素子は 、ガラス基板 201と、このガラス基板 201上に順次積層された陽極 (ITO) 202、ホー ル輸送層 (HTL) 203,発光層(EML) 204,電子輸送層(ETL) 205及びこの電子 輸送層 205の上部に配置された陰極 206とから主として構成されて 、る。発光層とし ては、例えばジァミン類などの有機物が用いられる。陽極 22と陰極 206とは電源を介 して電極線によって電気的に接続されている。各層の厚さは、例えば数十 nm程度で ある。 FIG. 9 is a schematic diagram showing the structure of an organic EL element. In FIG. 9, the organic EL device includes a glass substrate 201, an anode (ITO) 202, a hole transport layer (HTL) 203, a light emitting layer (EML) 204, and an electron transport layer sequentially stacked on the glass substrate 201. (ETL) 205 and a cathode 206 disposed on the electron transport layer 205. As a light emitting layer For example, organic substances such as diamines are used. The anode 22 and the cathode 206 are electrically connected by an electrode line through a power source. The thickness of each layer is, for example, about several tens of nm.

[0037] 図 10は、有機 EL素子を多数マトリックス状に並べた有機 ELディスプレイパネルを示 す説明図である。各有機 EL素子には、それぞれアクティブ素子としてトランジスタが 付設されており、このアクティブ素子によって目的の有機 EL素子を ON、 OFFする。 トランジスタとしては、例えばアモルファスシリコン又はポリシリコンの薄膜トランジスタ( TFT)が用いられる。各有機 EL素子及びアクティブ素子は、垂直方向の X電極線 21 2及び水平方向の Y電極線 213で接続されて!ヽる。  FIG. 10 is an explanatory view showing an organic EL display panel in which a large number of organic EL elements are arranged in a matrix. Each organic EL element is provided with a transistor as an active element, and the active organic EL element is turned on and off by this active element. As the transistor, for example, an amorphous silicon or polysilicon thin film transistor (TFT) is used. Each organic EL element and active element are connected by a vertical X electrode line 212 and a horizontal Y electrode line 213.

このような有機 ELディスプレイパネルにおいて、 X電極線 212、 Y電極線 213等の配 線材料として上述した第 1実施形態及び第 2実施形態で使用したと同様の銅合金、 例えば Cu— Mn合金が適用される。  In such an organic EL display panel, a copper alloy similar to that used in the first embodiment and the second embodiment described above as a wiring material such as the X electrode line 212 and the Y electrode line 213, such as a Cu-Mn alloy, is used. Applied.

即ち、例えばガラス基板表面に、 Cu— Mn合金を、例えばスパッタ法、電子ビーム法 等の物理蒸着法又は化学気相成長法によって製膜した後、例えばフォトリソグラフィ 一法によってエッチングして X電極線 212、 Y電極線 213等を形成し、その後、必要 に応じて、例えば 150°C〜400°Cで、 5分〜 50時間加熱することにより、有機 EL素 子がマトリックス状に並べた有機 ELディスプレイパネルが形成される。このとき、例え ばガラス基板の構成元素と銅合金中の添加元素である Mnとが反応して前記ガラス 基板と Cu合金材との界面に Mnを主元素とする酸化物層を形成し、ガラス基板と電 極、配線材料との界面密着性を高めるとともに、電極、配線部分の耐酸ィ匕性を高め、 し力も配線材料の電気抵抗の上昇を回避する。  That is, for example, a Cu-Mn alloy is formed on the surface of a glass substrate by a physical vapor deposition method such as a sputtering method or an electron beam method or a chemical vapor deposition method, and then etched by, for example, a photolithography method to form an X electrode wire. 212, Y electrode wire 213, etc. are formed, and then, if necessary, for example, by heating at 150 ° C to 400 ° C for 5 minutes to 50 hours, the organic EL elements are arranged in a matrix. A display panel is formed. At this time, for example, a constituent element of the glass substrate reacts with Mn which is an additive element in the copper alloy to form an oxide layer containing Mn as a main element at the interface between the glass substrate and the Cu alloy material. In addition to improving the interfacial adhesion between the substrate and the electrode and wiring material, it also increases the acid resistance of the electrode and wiring parts, and also prevents the wiring material from increasing in electrical resistance.

[0038] このような構成の有機 ELディスプレイパネルにおいて、有機 EL素子の陽極 202と陰 極 206との間に電圧を印加すると、陽極から注入されたホールと陰極カゝら注入された 電子が発光体 204内で再結合し、そのエネルギーによって励起された有機材料が発 光する。このような発光を各有機 EL素子において所定の条件で繰り返すことによつ て有機 ELディスプレイパネル上に画像が形成される。 [0038] In the organic EL display panel having such a configuration, when a voltage is applied between the anode 202 and the negative electrode 206 of the organic EL element, holes injected from the anode and electrons injected from the cathode cover emit light. The organic material recombined in the body 204 and excited by the energy emits light. By repeating such light emission under predetermined conditions in each organic EL element, an image is formed on the organic EL display panel.

本実施形態によれば、電気導電率を低下させることなぐその配線表面に Cuの酸ィ匕 を防止すると共に、基板との密着性が高!ヽ酸化被膜層を形成した配線を有する有機 EL表示装置を提供することができる。 According to the present embodiment, Cu oxidation is prevented from occurring on the surface of the wiring without lowering the electrical conductivity, and adhesion to the substrate is high!有機 Organic with wiring with oxide coating layer An EL display device can be provided.

[0039] 以下に、本発明の第 4実施形態について説明する。  [0039] A fourth embodiment of the present invention will be described below.

図 11は、フィールドェミッションディスプレイ(以下、 FEDという)の構造を示す模式 図である。図 11において、この FEDは、力ソード電極にカーボンナノチューブを用い たものであり、力ソード側ガラス基板 301と、この力ソード側ガラス基板 301に対向して 設けられたアノード側ガラス基板 302と、このアノード側ガラス基板 302の内側面に設 けられたアノード電極膜 304と、このアノード電極膜 304の表面に塗布された蛍光体 膜 306と、前記力ソード側ガラス基板 301の内側面に、マトリックス状に複数配置され た力ソード電極 303と、前記蛍光体膜 306と前記力ソード電極との間の真空空間部に 配置されたゲート電極 307とから主として構成されている。  Fig. 11 is a schematic diagram showing the structure of a field emission display (hereinafter referred to as FED). In FIG. 11, this FED uses carbon nanotubes as a force sword electrode, and includes a force sword side glass substrate 301 and an anode side glass substrate 302 provided to face the force sword side glass substrate 301. An anode electrode film 304 provided on the inner surface of the anode side glass substrate 302, a phosphor film 306 applied to the surface of the anode electrode film 304, and a matrix on the inner side surface of the force sword side glass substrate 301. A plurality of force sword electrodes 303 arranged in a shape, and a gate electrode 307 disposed in a vacuum space between the phosphor film 306 and the force sword electrode.

力ソード側ガラス基板 301表面に、例えばマトリックス状に配置された複数のカソー ド電極は電極線によって電気的に接続されており、ゲート電極 307と力ソード電極 30 1がゲート電圧を印加する電極線によって接続されている。また、アノード電極膜 304 は電源を介して電極線によって接続されている。また、外部電源回路、信号回路との 接続部には、図示省略した端子電極が設けられている。  A plurality of cathode electrodes arranged in a matrix, for example, on the surface of the force sword side glass substrate 301 are electrically connected by electrode wires, and the gate electrode 307 and the force sword electrode 301 are electrode wires to which a gate voltage is applied. Connected by. The anode electrode film 304 is connected by an electrode line through a power source. Further, terminal electrodes (not shown) are provided at the connection portions with the external power supply circuit and the signal circuit.

[0040] このような FED表示装置において、電極線、電極端子等の少なくとも一つの配線部 材として、上述した第 1実施形態、第 2実施形態及び第 3実施形態で使用した合金と 同様の銅合金、例えば Cu—Mn合金が適用される。  In such an FED display device, as at least one wiring member such as an electrode wire or an electrode terminal, copper similar to the alloy used in the first embodiment, the second embodiment, and the third embodiment described above is used. Alloys such as Cu-Mn alloys are applied.

即ち、例えばガラス基板表面に、 Cu—Mn合金を、例えばスパッタ法、電子ビーム法 等の物理蒸着法又は化学気相成長法によって製膜した後、例えばフォトリソグラフィ 一法によってエッチングして電極線、端子電極の少なくとも一つを形成し、その後、 必要に応じて、例えば 150°C〜400°Cで、 5分〜 50時間加熱することにより、 FED表 示装置の配線部分を形成する。このとき、前記ガラス基板の構成元素と銅合金中の 添加元素である Mnとが反応して前記ガラス基板と Cu合金材との界面に Mnを主元 素とする酸化物層を形成し、ガラス基板と電極、配線材料との界面密着性を高めると ともに、電極、配線部分の耐酸化性を高める。  That is, for example, a Cu-Mn alloy is formed on a glass substrate surface by, for example, a physical vapor deposition method such as a sputtering method or an electron beam method or a chemical vapor deposition method, and then etched by, for example, a photolithography method to form an electrode wire, At least one of the terminal electrodes is formed, and then the wiring portion of the FED display device is formed by heating, for example, at 150 ° C. to 400 ° C. for 5 minutes to 50 hours as necessary. At this time, the constituent element of the glass substrate reacts with the additive element Mn in the copper alloy to form an oxide layer containing Mn as a main element at the interface between the glass substrate and the Cu alloy material. In addition to improving the interfacial adhesion between the substrate and electrodes and wiring materials, it also increases the oxidation resistance of the electrodes and wiring parts.

[0041] このような構成の FED表示装置において、力ソード電極 301とアノード電極 302との 間に所定の電圧を印加すると、電界放出によって力ソード電極 301から電子が放た れる。このとき、放出された電子ビームの電流は力ソード電極 301とゲート電極 307と の電圧差によって制御される。真空中に放出された電子は、アノード電極 302に向か つて進み、 R (赤)、 G (緑)及び B (青)の三つの蛍光体を一組として可視光を発し、発 せられた可視光によってディスプレイ画面に画像が形成される。 In the FED display device having such a configuration, when a predetermined voltage is applied between the force sword electrode 301 and the anode electrode 302, electrons are emitted from the force sword electrode 301 by field emission. It is. At this time, the current of the emitted electron beam is controlled by the voltage difference between the force sword electrode 301 and the gate electrode 307. Electrons emitted into the vacuum traveled toward the anode electrode 302 and emitted visible light as a set of three phosphors of R (red), G (green), and B (blue). An image is formed on the display screen by visible light.

本実施形態によれば、電気導電率を低下させることなぐその配線表面に Cuの酸ィ匕 を防止すると共に、基板との密着性が高!ヽ酸化被膜層を形成した配線を有するフィ ールドエミッション表示装置を提供することができる。 図面の簡単な説明  According to the present embodiment, Cu oxidation is prevented from occurring on the surface of the wiring without lowering the electrical conductivity, and adhesion to the substrate is high! It is possible to provide a field emission display device having a wiring on which an oxide film layer is formed. Brief Description of Drawings

[0042] [図 1]本発明の液晶表示装置の構成を示す概略図である。 FIG. 1 is a schematic view showing a configuration of a liquid crystal display device of the present invention.

[図 2]本発明の液晶表示装置の画素の構成を示す概略図である。  FIG. 2 is a schematic diagram showing a configuration of a pixel of a liquid crystal display device of the present invention.

[図 3]本発明の液晶表示装置の画素の構成を示す概略断面図であり、 (1)は TFTト ランジスタ素子部分であり、 (2)は蓄積容量線部分である。  FIG. 3 is a schematic cross-sectional view showing a configuration of a pixel of the liquid crystal display device of the present invention. (1) is a TFT transistor element portion, and (2) is a storage capacitor line portion.

[図 4]TFT液晶パネルの等価回路を示す図である。  FIG. 4 is a diagram showing an equivalent circuit of a TFT liquid crystal panel.

[図 5]Cu— Mn合金表面とガラス基板の界面付近に酸ィ匕物が形成されている状態の 模式図である。  FIG. 5 is a schematic view showing a state in which an oxide is formed in the vicinity of the interface between the Cu—Mn alloy surface and the glass substrate.

[図 6]プレナ一型 p - Si形 TFTの模式図である。  FIG. 6 is a schematic diagram of a planar type p-Si TFT.

[図 7]気体放電素子の構造を示す模式図である。  FIG. 7 is a schematic diagram showing the structure of a gas discharge element.

[図 8]PDPを示す説明図である。  FIG. 8 is an explanatory diagram showing a PDP.

[図 9]有機 EL素子の構造を示す模式図である。  FIG. 9 is a schematic diagram showing the structure of an organic EL device.

[図 10]有機 ELディスプレイの説明図である。  FIG. 10 is an explanatory diagram of an organic EL display.

[図 11]FEDを示す説明図である。  FIG. 11 is an explanatory diagram showing FED.

符号の説明  Explanation of symbols

[0043] 1 液晶表示装置 [0043] 1 Liquid crystal display device

11、 12 透明基板  11, 12 Transparent substrate

13 透明共通電極  13 Transparent common electrode

14 画素電極  14 Pixel electrode

15 液晶層  15 Liquid crystal layer

16 TFTスィッチング素子 ゲート配線 ソース配線 蓄積容量 (線) 液晶画素 16 TFT switching element Gate wiring Source wiring Storage capacitance (line) Liquid crystal pixel

ゲート電極 ゲート電極線a 酸化被膜層b 導電層  Gate electrode Gate electrode line a Oxide film layer b Conductive layer

ソース電極 ドレイン電極 絶縁膜  Source electrode Drain electrode Insulating film

第 1の絶縁層 第 2の絶縁層 a— Si層  1st insulating layer 2nd insulating layer a—Si layer

背面ガラス基板 前面ガラス基板 アドレス(データ)電極 透明電極  Rear glass substrate Front glass substrate Address (data) electrode Transparent electrode

放電セル  Discharge cell

保護層  Protective layer

隔壁 (リブ) 放電セル  Bulkhead (rib) discharge cell

浮遊容量  Stray capacitance

アドレス電極配線 表示電極配線 端子電極  Address electrode wiring Display electrode wiring Terminal electrode

ガラス電極 陽極 203 ホール輸送層Glass electrode Anode 203 Hole transport layer

204 発光層 204 Light-emitting layer

205 電子輸送層  205 Electron transport layer

206 陰極  206 cathode

212 X電極線  212 X electrode wire

213 Y電極線  213 Y electrode wire

301 力ソード側ガラス基板 301 Power sword side glass substrate

302 アノード側ガラス基板302 Anode glass substrate

303 力ソード電極303 force sword electrode

304 アノード電極304 Anode electrode

306 蛍光体膜 306 Phosphor film

307 ゲート電極  307 Gate electrode

Claims

請求の範囲 The scope of the claims [1] 基板上に、画像を形成する最小単位としての画素をマトリックス状に複数配列した画 素部を有する平面電子表示装置にぉ 、て、  [1] A planar electronic display device having a pixel portion in which a plurality of pixels as a minimum unit for forming an image are arranged in a matrix on a substrate. 前記画素部で交叉する信号電極と、走査電極と、前記信号電極又は前記走査電極 と外部回路とを接続する端子電極とのうちの少なくとも一つの電極の配線材料として As a wiring material for at least one of the signal electrode, the scan electrode, and the terminal electrode that connects the signal electrode or the scan electrode and an external circuit, intersecting in the pixel portion 、 Cuを主成分とし、その表面又は前記基板との界面に前記 Cuに添加した添加元素 の酸化物層を形成する銅合金を適用したことを特徴とする平面電子表示装置。 A flat electronic display device characterized by applying a copper alloy containing Cu as a main component and forming an oxide layer of an additive element added to Cu on the surface or the interface with the substrate. [2] 請求項 1に記載の平面電子表示装置において、  [2] In the flat electronic display device according to claim 1, 前記添加元素は、酸ィ匕物形成自由エネルギーが Cuより小さぐ  The additive element has less free energy of formation of oxides than Cu Cu中における拡散係数力 SCuの自己拡散係数より大きぐ  Diffusion coefficient force in Cu. Greater than the self-diffusion coefficient of SCu. Cu中における lat. %当たりの電気抵抗上昇率が 5 Ω 'cm以下であり、 且つ、 Cu中における活量係数 γ力 活量係数 γ > 1の関係を満足するものであり、 前記銅合金における添カ卩量は、 0. 5〜25at. %である  The rate of increase in electrical resistance per lat.% In Cu is 5 Ω'cm or less, and satisfies the relationship of activity coefficient γ force activity coefficient γ> 1 in Cu. Additive amount is 0.5-25at.% ことを特徴とする平面電子表示装置。  A flat-panel electronic display device. [3] 請求項 1又は 2に記載の平面電子表示装置において、  [3] The flat electronic display device according to claim 1 or 2, 前記銅合金を適用した電極は、液晶画素、気体放電セル、有機 EL素子、フィール ドエミッションディスプレイ用表示画素のうちの少なくとも一つを駆動又は制御する電 極であることを特徴とする平面電子表示装置。  The electrode to which the copper alloy is applied is an electrode that drives or controls at least one of a liquid crystal pixel, a gas discharge cell, an organic EL element, and a display pixel for field emission display. apparatus. [4] 基板上でマトリックス状に交叉する電極線と、 [4] electrode wires crossing in a matrix on the substrate; 前記電極線の交点に配置され、一対の基板と、これら基板間に挟持された液晶層 と、前記基板の前記液晶層側の表面に形成された電極と、前記電極に電気的に接 続され前記基板の前記表面に配設された配線層とを有する複数の液晶画素と、 外部の駆動回路に接続された端子電極と、  A pair of substrates disposed at the intersection of the electrode lines, a liquid crystal layer sandwiched between the substrates, an electrode formed on the surface of the substrate on the liquid crystal layer side, and electrically connected to the electrodes A plurality of liquid crystal pixels having a wiring layer disposed on the surface of the substrate; a terminal electrode connected to an external drive circuit; を有するアクティブマトリックス方式の液晶表示装置において、  In an active matrix liquid crystal display device having 前記電極線、前記電極、前記配線層、前記端子電極のうちの少なくとも一つは、銅を 主成分とし、前記基板との界面に、前記銅に添加した添加元素の酸化物層を形成す る銅合金力 なる  At least one of the electrode wire, the electrode, the wiring layer, and the terminal electrode has copper as a main component, and an oxide layer of an additive element added to the copper is formed at an interface with the substrate. Copper alloy strength ことを特徴とする液晶表示装置。 A liquid crystal display device characterized by the above. [5] 請求項 4に記載の液晶表示装置において、 [5] The liquid crystal display device according to claim 4, 前記酸ィ匕物層は、前記基板に含まれる酸素と前記添加元素との反応によって形成さ れたものであることを特徴とする液晶表示装置。  The liquid crystal display device, wherein the oxide layer is formed by a reaction between oxygen contained in the substrate and the additive element. [6] 請求項 4又は 5に記載の液晶表示装置において、 [6] In the liquid crystal display device according to claim 4 or 5, 前記電極線、前記電極、前記配線層、前記端子電極のうちの少なくとも一つは、絶 縁層との界面に、前記添加元素の酸化物層を具備する  At least one of the electrode wire, the electrode, the wiring layer, and the terminal electrode includes an oxide layer of the additive element at an interface with the insulating layer. ことを特徴とする液晶表示装置。  A liquid crystal display device characterized by the above. [7] 請求項 4〜6のうちのいずれ力 1項に記載の液晶表示装置において、 [7] In the liquid crystal display device according to any one of claims 4 to 6, 前記電極線、前記電極、前記配線層、前記端子電極のうちの少なくとも一つは、酸 素を含有する絶縁層との界面に前記添加元素と前記絶縁層の構成元素とが反応し た酸化物層を具備する  At least one of the electrode wire, the electrode, the wiring layer, and the terminal electrode is an oxide in which the additive element and the constituent element of the insulating layer react with each other at the interface with the insulating layer containing oxygen With layers ことを特徴とする液晶表示装置。  A liquid crystal display device characterized by the above. [8] 請求項 4〜7のうちのいずれ力 1項に記載の液晶表示装置において、 [8] In the liquid crystal display device according to any one of claims 4 to 7, 前記電極線、前記電極、前記配線層、前記端子電極のうちの少なくとも一つは、そ の表面に前記添加元素と雰囲気ガス中の酸素とが反応した酸ィヒ物層を具備する ことを特徴とする液晶表示装置。  At least one of the electrode wire, the electrode, the wiring layer, and the terminal electrode includes an acid layer on the surface of which the additive element and oxygen in the atmosphere gas react. A liquid crystal display device. [9] 請求項 4〜8のうちのいずれ力 1項に記載の液晶表示装置において、 [9] In the liquid crystal display device according to any one of claims 4 to 8, 前記添加元素は、酸ィ匕物形成自由エネルギーが Cuより小さぐかつ、 Cu中におけ る拡散係数が Cuの自己拡散係数より大きい  The additive element has an oxide free formation energy smaller than that of Cu, and a diffusion coefficient in Cu is larger than that of Cu. ことを特徴とする液晶表示装置。  A liquid crystal display device characterized by the above. [10] 請求項 4〜9のうちのいずれ力 1項に記載の液晶表示装置において、 [10] In the liquid crystal display device according to any one of claims 4 to 9, 前記添加元素は、 Cu中における lat. %当たりの電気抵抗上昇率が、 5 μ Ω - cm 以下である  The additive element has an electrical resistance increase rate of 5 μΩ-cm or less per lat.% In Cu. ことを特徴とする液晶表示装置。  A liquid crystal display device characterized by the above. [11] 請求項 4〜: LOのうちのいずれ力 1項に記載の液晶表示装置において、 [11] Claim 4 ~: The liquid crystal display device according to any one of claims 1, wherein: 前記添加元素は、 Cu中における活量係数 γが、活量係数 γ > 1の関係を満足す る  In the additive element, the activity coefficient γ in Cu satisfies the relationship of activity coefficient γ> 1. ことを特徴とする液晶表示装置。 A liquid crystal display device characterized by the above. [12] 請求項 4〜: L Iのうちのいずれ力 1項に記載の液晶表示装置において、 前記銅合金は、添加元素が銅合金表面に拡散して、前記添加元素の酸化被膜層 が形成される銅合金である [12] Claim 4 ~: The liquid crystal display device according to any one of LI, wherein in the copper alloy, the additive element diffuses on the surface of the copper alloy, and an oxide film layer of the additive element is formed. Copper alloy ことを特徴とする液晶表示装置。  A liquid crystal display device characterized by the above. [13] 請求項 4〜12のうちのいずれ力 1項に記載の液晶表示装置において、 [13] In the liquid crystal display device according to any one of claims 4 to 12, 前記添加元素は、 Mn、 Zn、 Ga、 Li、 Ge、 Sr、 Ag、 In、 Sn、 Ba、 Prおよび Ndから なる群力 選択される少なくとも 1種の金属である  The additive element is at least one metal selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr, and Nd. ことを特徴とする液晶表示装置。  A liquid crystal display device characterized by the above. [14] 請求項 13に記載の液晶表示装置において、前記添加元素は Mnであり、 Mnの添加 量は、 0. 5〜25at. %であることを特徴とする液晶表示装置。 14. The liquid crystal display device according to claim 13, wherein the additive element is Mn, and the amount of Mn added is 0.5 to 25 at.%. [15] 基板上でマトリックス状に交叉する電極線と、 [15] electrode wires crossing in a matrix on the substrate; 前記電極線の交点に配置され、一対の基板と、これら基板間に挟持された液晶層 と、前記基板の前記液晶層側の表面に形成された電極と、前記電極に電気的に接 続され前記基板の前記表面に配設された配線層とを有する複数の液晶画素と、 外部の駆動回路に接続された端子電極と、  A pair of substrates disposed at the intersection of the electrode lines, a liquid crystal layer sandwiched between the substrates, an electrode formed on the surface of the substrate on the liquid crystal layer side, and electrically connected to the electrodes A plurality of liquid crystal pixels having a wiring layer disposed on the surface of the substrate; a terminal electrode connected to an external drive circuit; を有するアクティブマトリックス方式の液晶表示装置の製造方法において、  In the manufacturing method of an active matrix type liquid crystal display device having 前記基板上に、 Cuを主成分とし、その表面又は前記基板との界面に前記 Cuに添 加した添加元素の酸化物層を形成する銅合金を物理蒸着法又は化学気相成長法 によって製膜する工程と、  On the substrate, a copper alloy containing Cu as a main component and forming an oxide layer of the additive element added to the surface or the interface with the substrate is formed by physical vapor deposition or chemical vapor deposition. And a process of 得られた銅合金膜をエッチングして電極線、電極、配線層、端子電極のうちの少なく とも一つを形成する工程と、を有する  Etching the obtained copper alloy film to form at least one of an electrode wire, an electrode, a wiring layer, and a terminal electrode. ことを特徴とする液晶表示装置の製造方法。  A method for manufacturing a liquid crystal display device. [16] 請求項 15に記載の液晶表示装置の製造方法において、 [16] In the method of manufacturing a liquid crystal display device according to claim 15, 前記銅合金は、前記添加元素が Mn、 Zn、 Ga、 Li、 Ge、 Sr、 Ag、 In、 Sn、 Ba、 Prお よび Ndからなる群力 選択される少なくとも 1種の金属である  The copper alloy is at least one metal selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr and Nd. ことを特徴とする液晶表示装置の製造方法。  A method for manufacturing a liquid crystal display device. [17] 請求項 15又は 16に記載の液晶表示装置の製造方法において、 [17] In the method of manufacturing a liquid crystal display device according to claim 15 or 16, 前記形成された電極線、前記電極、前記配線層、前記端子電極のうちの少なくとも 一つの表面に、酸化物層を形成する工程を有することを特徴とする液晶表示装置の 製造方法。 At least of the formed electrode wire, the electrode, the wiring layer, and the terminal electrode A method for manufacturing a liquid crystal display device comprising a step of forming an oxide layer on one surface. [18] 請求項 17に記載の液晶表示装置の製造方法において、  [18] In the method of manufacturing a liquid crystal display device according to claim 17, 前記酸ィ匕物層形成工程における雰囲気ガス中の酸素濃度は、 10ppm〜l%である ことを特徴とする液晶表示装置の製造方法。  The method for manufacturing a liquid crystal display device, wherein the oxygen concentration in the atmospheric gas in the oxide layer forming step is 10 ppm to l%. [19] 請求項 17又は 18に記載の液晶表示装置の製造方法において、  [19] In the method of manufacturing a liquid crystal display device according to claim 17 or 18, 前記酸化物層形成工程は、前記電極線、前記電極、前記配線層、前記端子電極の うちの少なくとも一つを形成した後、 150〜400°Cで、 5分〜 50時間加熱して前記電 極線、前記電極、前記配線層、前記端子電極のうちの少なくとも一つの表面に前記 銅合金における添加元素の酸ィ匕物層を形成する工程であることを特徴とする液晶表 示装置の製造方法。  The oxide layer forming step includes forming at least one of the electrode wire, the electrode, the wiring layer, and the terminal electrode, and then heating the electrode at 150 to 400 ° C. for 5 minutes to 50 hours. Manufacturing of a liquid crystal display device, characterized in that it is a step of forming an oxide layer of an additive element in the copper alloy on the surface of at least one of an electrode wire, the electrode, the wiring layer, and the terminal electrode Method. [20] 背面ガラス基板の内側に形成されたアドレス電極配線と、  [20] Address electrode wiring formed inside the rear glass substrate; 前面ガラス基板の内側に形成された表示電極配線と、  Display electrode wiring formed inside the front glass substrate; 前記アドレス電極配線と表示電極配線とがマトリックス状に交叉する各交点にそれぞ れ配置された複数の電気放電セルと、  A plurality of electric discharge cells arranged at each intersection where the address electrode wiring and the display electrode wiring cross in a matrix; 外部の駆動回路に接続された端子電極と、  A terminal electrode connected to an external drive circuit; を有するプラズマディスプレイ装置にぉ 、て、  In a plasma display device having 前記アドレス電極配線、前記表示電極配線、前記端子電極のうちの少なくとも一つ は、銅を主成分とし、前記基板との界面に、前記銅に添加した添加元素の酸化物層 を形成する銅合金からなる  At least one of the address electrode wiring, the display electrode wiring, and the terminal electrode is made of copper as a main component, and a copper alloy that forms an oxide layer of an additive element added to the copper at an interface with the substrate Consist of ことを特徴とするプラズマディスプレイ装置。  A plasma display device. [21] 請求項 20に記載のプラズマディスプレイ装置にぉ ヽて、 [21] In the plasma display device according to claim 20, 前記酸ィ匕物層は、前記基板に含まれる酸素と前記添加元素との反応によって形成さ れたものであることを特徴とするプラズマディスプレイ装置。  The plasma display apparatus, wherein the oxide layer is formed by a reaction between oxygen contained in the substrate and the additive element. [22] 請求項 20又は 21に記載のプラズマディスプレイ装置にぉ 、て、 [22] In the plasma display device according to claim 20 or 21, 前記アドレス電極配線、前記表示電極配線、前記端子電極のうちの少なくとも一つ は、その表面又は絶縁層との界面に、雰囲気ガス中の酸素又は前記絶縁層に含ま れる酸素と前記添加元素が反応して形成された酸化物層を具備する ことを特徴とするプラズマディスプレイ装置。 At least one of the address electrode wiring, the display electrode wiring, and the terminal electrode has a reaction between oxygen in the atmosphere gas or oxygen contained in the insulating layer and the additive element at the surface or the interface with the insulating layer. An oxide layer formed A plasma display device. [23] 請求項 20〜22のうちのいずれ力 1項に記載のプラズマディスプレイ装置において 前記添加元素は、 Mn、 Zn、 Ga、 Li、 Ge、 Sr、 Ag、 In、 Sn、 Ba、 Prおよび Ndから なる群力 選択される少なくとも 1種の金属である  [23] The plasma display device according to any one of [20] to [22], wherein the additive element is Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr, and Nd. Group power consisting of at least one metal selected ことを特徴とするプラズマディスプレイ装置。  A plasma display device. [24] 基板上でマトリックス状に交叉する電極線と、 [24] electrode wires crossing in a matrix on the substrate; 前記電極線の交点に配置され、ガラス基板と、このガラス基板上に順次積層された 陽極、ホール輸送層、有機発光層、電子輸送層及び陰極とを有し、前記陽極と陰極 とが TFT回路を介して前記マトリックス状に交叉する電極線に電気的に配線接続さ れた複数の有機 EL素子と、  The glass substrate and an anode, a hole transport layer, an organic light emitting layer, an electron transport layer, and a cathode, which are disposed at the intersections of the electrode lines, are sequentially laminated on the glass substrate, and the anode and the cathode are TFT circuits. A plurality of organic EL elements electrically connected to the electrode wires crossing in a matrix via the matrix, 外部の駆動回路に接続された端子電極と、  A terminal electrode connected to an external drive circuit; を有するアクティブマトリックス方式の有機 EL表示装置において、  In an active matrix organic EL display device having 前記電極線、前記配線、前記端子電極のうちの少なくとも一つは、銅を主成分とし、 前記基板との界面に、前記銅に添加した添加元素の酸ィ匕物層を形成する銅合金か らなる  At least one of the electrode wire, the wiring, and the terminal electrode is made of copper alloy, and a copper alloy that forms an oxide layer of an additive element added to the copper at an interface with the substrate. Become ことを特徴とする有機 EL表示装置。  An organic EL display device characterized by that. [25] 請求項 24に記載の有機 EL表示装置において、 [25] The organic EL display device according to claim 24, 前記酸ィ匕物層は、前記基板に含まれる酸素と前記添加元素との反応によって形成さ れたものであることを特徴とする有機 EL表示装置。  The organic EL display device, wherein the oxide layer is formed by a reaction between oxygen contained in the substrate and the additive element. [26] 請求項 24又は 25に記載の有機 EL表示装置において、 [26] The organic EL display device according to claim 24 or 25, 前記電極線、前記配線、前記端子電極のうちの少なくとも一つは、その表面又は絶 縁層との界面に、雰囲気ガス中の酸素又は前記絶縁層に含まれる酸素と前記添カロ 元素が反応した酸化物層を具備する  At least one of the electrode wire, the wiring, and the terminal electrode has reacted with oxygen in the atmosphere gas or oxygen contained in the insulating layer and the added calo element at the surface or the interface with the insulating layer. With oxide layer ことを特徴とする有機 EL表示装置。  An organic EL display device characterized by that. [27] 請求項 24〜26のうちのいずれ力 1項に記載の有機 EL表示装置において、 [27] In the organic EL display device according to any one of claims 24 to 26, 前記銅合金は、添加元素が銅合金表面に拡散して、前記添加元素の酸化被膜層 が形成される銅合金である ことを特徴とする有機 EL表示装置。 The copper alloy is a copper alloy in which an additive element diffuses on the surface of the copper alloy and an oxide film layer of the additive element is formed. An organic EL display device characterized by that. [28] 請求項 24〜27のうちのいずれ力 1項に記載の有機 EL表示装置において、 [28] In the organic EL display device according to any one of claims 24 to 27, 前記添加元素は、 Mn、 Zn、 Ga、 Li、 Ge、 Sr、 Ag、 In、 Sn、 Ba、 Prおよび Ndから なる群力 選択される少なくとも 1種の金属である  The additive element is at least one metal selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr, and Nd. ことを特徴とする有機 EL表示装置。  An organic EL display device characterized by that. [29] 力ソード側ガラス基板と、 [29] a force sword side glass substrate; この力ソード側ガラス基板に対向して設けられたアノード側ガラス基板と、 前記アノード側ガラス基板の内面に設けられたアノード電極及び蛍光体膜と、 前記力ソード側ガラス基板の内面に、マトリックス状に複数配置された力ソード電極と 前記アノード電極と前記力ソード電極との間の真空空間部に配置されたゲート電極と 前記力ソード電極とアノード電極とを接続する電極線及び前記力ソード電極とゲート 電極とを接続する電極線と、  An anode side glass substrate provided opposite to the force sword side glass substrate, an anode electrode and a phosphor film provided on the inner surface of the anode side glass substrate, and an inner surface of the force sword side glass substrate on a matrix A plurality of force sword electrodes, a gate electrode disposed in a vacuum space between the anode electrode and the force sword electrode, an electrode wire connecting the force sword electrode and the anode electrode, and the force sword electrode An electrode line connecting the gate electrode; 外部の駆動回路に接続された端子電極と、  A terminal electrode connected to an external drive circuit; を有するフィールドェミッション表示装置にぉ 、て、  In a field emission display device having 前記電極、前記電極線、前記端子電極のうちの少なくとも一つは、銅を主成分とし、 前記基板との界面に、前記銅に添加した添加元素の酸ィ匕物層を形成する銅合金か らなる  At least one of the electrode, the electrode wire, and the terminal electrode is made of copper as a main component, and is a copper alloy that forms an oxide layer of an additive element added to the copper at an interface with the substrate. Become ことを特徴とするフィールドェミッション表示装置。  A field emission display device characterized by that. [30] 請求項 29に記載のフィールドェミッション表示装置において、 [30] The field emission display device according to claim 29, 前記酸ィ匕物層は、前記基板に含まれる酸素と前記添加元素との反応によって形成さ れたものであることを特徴とするフィールドェミッション表示装置。  The field oxide display device, wherein the oxide layer is formed by a reaction between oxygen contained in the substrate and the additive element. [31] 請求項 29又は 30に記載のフィールドェミッション表示装置において、 [31] The field emission display device according to claim 29 or 30, 前記電極、前記電極線、前記端子電極のうちの少なくとも一つは、その表面又は絶 縁層との界面に、雰囲気ガス中の酸素又は前記絶縁層に含まれる酸素と前記添カロ 元素が反応した酸化物層を具備する  At least one of the electrode, the electrode wire, and the terminal electrode has reacted with oxygen in the atmospheric gas or oxygen contained in the insulating layer and the added calo element at the surface or the interface with the insulating layer. With oxide layer ことを特徴とするフィールドェミッション表示装置。 A field emission display device characterized by that. [32] 請求項 29〜31のうちのいずれ力 1項に記載のフィールドェミッション表示装置にお いて、 [32] The field emission display device according to any one of claims 29 to 31, wherein: 前記銅合金は、添加元素が銅合金表面に拡散して、前記添加元素の酸化被膜層 が形成される銅合金である  The copper alloy is a copper alloy in which an additive element diffuses on the surface of the copper alloy and an oxide film layer of the additive element is formed. ことを特徴とするフィールドェミッション表示装置。  A field emission display device characterized by that. [33] 請求項 29〜32のうちのいずれ力 1項に記載のフィールドェミッション表示装置にお いて、 [33] In the field emission display device according to any one of claims 29 to 32, 前記添加元素は、 Mn、 Zn、 Ga、 Li、 Ge、 Sr、 Ag、 In、 Sn、 Ba、 Prおよび Ndから なる群力 選択される少なくとも 1種の金属である  The additive element is at least one metal selected from the group force consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, In, Sn, Ba, Pr, and Nd. ことを特徴とするフィールドェミッション表示装置。  A field emission display device characterized by that.
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