[go: up one dir, main page]

WO2008105592A1 - Commande d'amplification à commutation pour réduire le bruit de démarrage et amplificateur audio comprenant cette commande - Google Patents

Commande d'amplification à commutation pour réduire le bruit de démarrage et amplificateur audio comprenant cette commande Download PDF

Info

Publication number
WO2008105592A1
WO2008105592A1 PCT/KR2008/000955 KR2008000955W WO2008105592A1 WO 2008105592 A1 WO2008105592 A1 WO 2008105592A1 KR 2008000955 W KR2008000955 W KR 2008000955W WO 2008105592 A1 WO2008105592 A1 WO 2008105592A1
Authority
WO
WIPO (PCT)
Prior art keywords
switching
switching amplification
modulated signal
driver
enable signal
Prior art date
Application number
PCT/KR2008/000955
Other languages
English (en)
Inventor
Yong Hun Cho
Sang Jin Park
Original Assignee
Ubi Sound Co., Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ubi Sound Co., Ltd filed Critical Ubi Sound Co., Ltd
Publication of WO2008105592A1 publication Critical patent/WO2008105592A1/fr

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H03F1/305Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in case of switching on or off of a power supply
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217Class D power amplifiers; Switching amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217Class D power amplifiers; Switching amplifiers
    • H03F3/2171Class D power amplifiers; Switching amplifiers with field-effect devices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217Class D power amplifiers; Switching amplifiers
    • H03F3/2178Class D power amplifiers; Switching amplifiers using more than one switch or switching amplifier in parallel or in series
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/72Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/34Muting amplifier when no signal is present
    • H03G3/348Muting in response to a mechanical action or to power supply variations, e.g. during tuning; Click removal circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/03Indexing scheme relating to amplifiers the amplifier being designed for audio applications
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/331Sigma delta modulation being used in an amplifying circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/351Pulse width modulation being used in an amplifying circuit

Definitions

  • the present invention relates to an audio amplifier, and more particularly, to a method and apparatus for reducing starting noise of an audio amplifier.
  • FIG. 1 illustrates a structure of a single-ended audio amplification stage using a power supply.
  • a single-ended audio amplification stage 100 includes a single- ended audio amplifier 110 and a direct current (DC) voltage blocking capacitor Cds.
  • An analog input signal f 1 with a voltage level between a source voltage Vdd and a ground voltage GND is transmitted to a speaker 120 via the single-ended audio amplifier 110 and the DC voltage blocking capacitor Cds.
  • the amplifier 110 outputs an audio signal f2 that fluctuates with respect to a center voltage
  • the center voltage will be referred to as a DC offset voltage and described. [4] As described above, since the DC offset voltage is the center voltage
  • the digital signal is generated by using a modulation method such as a pulse code modulation (PCM) method, a pulse width modulation (PWM) method, and the like.
  • PCM pulse code modulation
  • PWM pulse width modulation
  • a PCM signal maximum and minimum amplitudes of a pulse are respectively represented by logic high and logic low.
  • PWM signal a plurality of digital bits are represented by a pulse width.
  • FIG. 2 illustrates a single-ended PWM switching audio amplification stage using a power supply.
  • a single-ended PWM switching audio amplification stage 200 includes a single-ended PWM switching audio amplifier 210, a low pass filter 220, and a DC voltage blocking capacitor Cds.
  • the single-ended PWM switching audio amplifier 210 receives a PCM signal f 11, converts the PCM signal into a PWM signal, and amplifies the PWM signal.
  • the PWM signal fl2 that is output from the amplifier 210 is transmitted through the low pass filter 220, only a signal f 13 with a frequency band to be reproduced is passed, and a high frequency signal is prevented from being transmitted to the speaker 230.
  • the DC voltage blocking capacitor Cds is connected between the low pass filter 220 and the speaker 230.
  • the signal f 13 that is passed through the low pass filter 220 is transmitted to the speaker 230 via the DC voltage blocking capacitor Cds.
  • FIG. 3 is a block diagram illustrating a single-ended PWM switching audio amplifier
  • a pulse width modulator 320 can process a PCM audio signal with about 7 or 8 bits. Accordingly, after the resolution of the PCM signal is lowered by suppressing noise in an audio signal band to the minimum by using a delta-sigma modulator 310, the PCM signal is transmitted to the pulse width modulator 320.
  • the pulse width modulator 320 generates a one-bit PWM signal fl 1-2 with a pulse width corresponding to delta-sigma modulated PCM signal f 11-1.
  • the PWM signal f 11-2 that is converted into a one-bit signal is amplified by a switching amplification driver 330 and output fl2.
  • FIG. 4 illustrates a switching amplification driver 330 shown in FIG. 3.
  • the switching amplification driver 330 includes a gate driver 410 and first and second MOS transistors Ml and M2.
  • the gate driver 410 generates two gate control signals Gl and G2 in correspondence with a one-bit PWM signal f 11-2.
  • the first and second MOS transistors Ml and M2 generates a signal f 12 that is amplified in response to two gate control signals Gl and G2, respectively.
  • the switching amplification driver 330 shown in FIG. 4 has relatively large power consumption, a delay of a signal due to the gate driver 410 and a switching speed of MOS transistors Ml and M2 are considerably limited.
  • the switching amplification driver 330 cannot respond to the one-bit PWM signal.
  • a signal with an excessively small pulse width among modulated PWM signals f 11-2 that is output from the pulse width modulator 320 is ignored and not output, or distorted and normally output from a value that is equal to or greater than a predetermined value. That is, there is a section in which an output f 12 of the switching driver is not linear with respect to the PCM input fl 1-1 due to physical properties of the switching amplification driver 330.
  • the electrical properties of the switching amplification driver 330 cause errors, when the audio amplifier is turned on or off.
  • FIG. 5 illustrates waveforms of internal signals of the single-ended PWM switching audio amplification stage 200 using the power supply shown in FIG. 2, when the signal is the silent sound.
  • the signal fl2 that is output from the single-ended PWM switching audio amplifier 210 when the signal is the silent sound has a periodic square waveform with a duty ratio of 50 %.
  • the signal fl2 is converted into the DC offset voltage
  • the present invention provides a switching amplification driver capable of reducing noise generated when a single-ended PWM switching audio amplifier is turned on or off to the minimum.
  • the present invention also provides an audio amplifier including a switching amplification driver capable of reducing noise generated when a single-ended PWM switching audio amplifier is turned on or off to the minimum.
  • a switching amplification driver including first and second switching amplification units.
  • the first switching amplification unit amplifies a pulse width modulated signal PWM in response to a first enable signal.
  • the second switching amplification unit amplifies the pulse width modulated signal PWM in response to a second enable signal.
  • An output impedance of the second switching amplification unit is greater than an impedance of a load to be driven by the switching amplification driver.
  • Output terminals of the first and second switching amplification units are connected to each other.
  • an audio amplifier for converting a pulse code modulated signal into a pulse width modulated signal and amplifying the converted signal, which includes a delta-signal modulator, a pulse width modulator, and a switching amplification driver.
  • the delta-sigma modulator generates a pulse code modulated signal modified by lowering a resolution of the pulse code modulated signal by receiving the pulse code modulated signal and suppressing noise to the minimum.
  • the pulse width modulator modulates the modified pulse code modulated signal into the pulse width modulated signal.
  • the switching amplification driver amplifies the pulse width modulated signal in response to first and second enable signals.
  • FIG. 1 illustrates a structure of a single-ended audio amplification stage using a power supply.
  • FIG. 2 illustrates a single-ended pulse width modulation (PWM) switching audio amplification stage using a power supply.
  • PWM pulse width modulation
  • FIG. 3 is a block diagram illustrating a single-ended PWM switching audio amplifier
  • FIG. 4 illustrates an example of a switching amplification driver 330 shown in FIG.
  • FIG. 5 illustrates waveforms of internal signals of the single-ended PWM switching audio amplification stage 200 using the power supply shown in FIG. 2, when a silent mode is selected.
  • FIG. 6 illustrates a method of changing a direct current (DC) offset voltage so as to reduce starting noise of an audio amplifier.
  • FIG. 7 illustrates a waveform of a signal applied to a speaker, when an apparatus for reducing starting noise is applied to a conventional audio amplifier.
  • FIG. 8 illustrates a switching amplification driver according to an embodiment of the present invention.
  • FIG. 9 illustrates a relation between operation mechanism of the switching amplification driver according to the embodiment and a load.
  • FIG. 10 illustrates a switching amplification driver according to another embodiment of the present invention.
  • FIG. 11 illustrates a switching amplification driver according to another embodiment of the present invention.
  • FIG. 12 illustrates a switching amplification driver according to another embodiment of the present invention. Best Mode for Carrying Out the Invention
  • FIG. 6 illustrates a method of changing a direct current (DC) offset voltage so as to reduce starting noise of an audio amplifier.
  • FIG. 7 illustrates a waveform of a signal applied to a speaker, when an apparatus for reducing starting noise is applied to a conventional PWM switching audio amplifier.
  • FIGS. 7 and 2 a waveform of a signal f 12 that is output from the audio amplifier 210 is illustrated, in a case where the method of FIG. 6 is applied to a conventional single-ended PWM switching audio amplification stage 200 shown in FIG. 2.
  • Circled parts A and C indicate distorted parts due to non-linearity of the switching driver 330 constituting the audio amplifier 210.
  • a circled part B indicates a step waveform due to the lack of resolution. Noise caused by the part B is not negligible in addition to noise caused by the parts A and C.
  • the switching amplification driver 330 shown in FIG. 4 has relatively large power consumption. An operation of the switching amplification driver 330 is limited due to a delay of a signal caused by the gate driver 410, a switching speed of the MOS transistors Ml and M2, and the like. For example, in a case where a width of the one- bit PWM signal f 11-2 is excessively small, the switching amplification driver 330 does not operate in response to the one-bit PWM signal f 11-2. Referring to the parts A and C shown in FIG.
  • FIG. 8 illustrates a switching amplification driver according to an embodiment of the present invention.
  • a switching amplification driver 800 includes first and second switching amplification units 810 and 850 and a noise separation resistor Rd.
  • the first switching amplification unit 810 including a first gate driver 811 and first and second driving transistors 812 and 813 serves to amplify a pulse width modulated signal PWM in response to a first enable signal ENl.
  • the first gate driver 811 outputs first and second gate voltages GI l and G 12 in response to the first enable signal ENl and the pulse width modulated signal PWM.
  • the first driving transistor 812 includes a terminal connected to a voltage source VDD, the other terminal connected to an output terminal OUT, and a gate applied with the first gate voltage GI l.
  • the second driving transistor 813 includes a terminal connected to the output terminal OUT, the other terminal connected to a ground voltage GND, and a gate applied with the second gate voltage G 12.
  • the second switching amplification unit 850 including a second gate driver 851 and third and fourth driving transistors 852 and 853 serves to amplify the pulse width modulated signal PWM in response to a second enable signal EN2.
  • the second gate driver 851 outputs third and fourth gate voltages G21 and G22 in response to the second enable signal EN2 and the pulse width modulated signal PWM.
  • the third driving transistor 852 includes a terminal connected to the source voltage VDD, the other terminal connected to an output terminal OUTl, and a gate applied with the third gate voltage G21.
  • the fourth driving transistor 853 includes a terminal connected to the output terminal OUTl, the other terminal connected to the ground voltage GND, and a gate applied with the fourth gate voltage G22.
  • the noise separation resistor Rd is connected between the output terminal OUTl of the second switching amplification unit 850 and the output terminal OUT of the first switching amplification unit 810.
  • An output impedance of the second switching amplification unit 850 is equal to or greater than that of the first switching amplification unit 810.
  • a resistance value of the noise separation resistor Rd may be greater than that of a load resistor (not shown) of the switching amplification driver 800.
  • the load resistor indicates an input resistor of the speaker shown in FIGS. 1 and 2.
  • the first enable signal ENl When a system (not shown) including the switching amplification driver 800 is turned on, the first enable signal ENl is disabled, and the second enable signal EN2 is enabled. After a predetermined time is elapsed, the first enable signal ENl is also enabled. When the first enable signal ENl is enabled, the second enable signal EN2 may be disabled.
  • the predetermined time indicates a time when a target DC offset voltage is constantly maintained in the input stage f 13 of the DC blocking capacitor Cds by a signal OUT that is output from the switching amplification driver 800.
  • the first enable signal ENl is disabled, and the second enable signal EN2 is enabled. After a predetermined time is elapsed, the second enable signal EN2 is also disabled.
  • FIG. 9 illustrates a relation between operation mechanism of the switching amplification driver according to the embodiment and a load.
  • the switching amplification driver when the switching amplification driver is turned on, the first enable signal ENl is disabled, and only the second enable signal EN2 is enabled. Accordingly, the first switching amplification unit 810 has a high impedance state of a tri-state, and only the second switching amplification unit 850 operates. At this time, a DC component that is output from the second switching amplification unit 850 is shut off by the DC blocking capacitor Cds. An AC component is dropped based on a ratio of resistance of the noise separation resistor Rd to resistance of an equivalent resistor of the load at a terminal of the equivalent resistor Req.
  • Equation 1 The dropped amplitude Vac of the AC component at the equivalent resistor Req may be represented by Equation 1 as follows:
  • the switching amplification driver 800 includes the gate driver 850 and the noise separation resistor Rd.
  • the noise separation resistor Rd is connected between the output of the gate driver 850 and the output of the gate driver 810. Accordingly, when the system is turned on or off, it is possible to reduce noise generated by a step signal (refer to FIG. 7) that is output from the switching amplification driver 800 to the minimum by using the gate driver 850 and the noise separation resistor Rd.
  • FIG. 10 illustrates a switching amplification driver according to another embodiment of the present invention.
  • a switching amplification driver 1000 includes first and second switching amplification units 1010 and 1050.
  • the first switching amplification unit 1010 including a first gate driver 1011 and first and second driving transistors 1012 and 1013 amplifies a pulse width modulated signal PWM in response to a first enable signal ENl.
  • the first gate driver 1011 outputs first and second gate voltages GI l and G 12 in response to the first enable signal ENl and the pulse width modulated signal PWM.
  • the first driving transistor 1012 includes a terminal connected to a voltage source VDD, the other terminal connected to an output terminal OUT, and a gate applied with the first gate voltage GI l.
  • the second driving transistor 1013 includes a terminal connected to the output terminal OUT, the other terminal connected to a ground voltage GND, and a gate applied with the second gate voltage G 12.
  • the second switching amplification unit 1050 including a second gate driver 1051 and third and fourth driving transistors 1052 and 1053 serves to amplify the pulse width modulated signal PWM in response to a second enable signal EN2.
  • the second gate driver 1051 outputs third and fourth gate voltages G21 and G22 in response to the second enable signal EN2 and the pulse width modulated signal PWM.
  • the third driving transistor 1052 includes a terminal connected to the voltage source VDD, the other terminal connected to an output terminal OUT, and a gate applied with the third gate voltage G21.
  • the fourth driving transistor 1053 includes a terminal connected to the output terminal OUT, the other terminal connected to the ground voltage GND, and a gate applied with the fourth gate voltage G22.
  • An output impedance of the second switching amplification unit 1050 is greater than that of a load to be driven by the switching amplification driver.
  • the output terminals of the first and second switching amplification units 1010 and 1050 are connected to each other.
  • the switching amplification driver 1000 shown in FIG. 10 is different from the switching amplification driver 800 shown in FIG. 8 in the noise separation resistor Rd and the high output impedance of the second switching amplification unit.
  • noise in the load is suppressed to the minimum by using a difference between the output impedance of the second switching amplification unit 1050 and input impedance of the load.
  • noise in the load is suppressed to the minimum by using the noise separation resistor Rd in addition to the second switching amplification unit 850.
  • Various circuits for embodying a method of reducing noise in the load by using a difference between a load impedance and an output impedance of an amplifier may be applicable.
  • FIG. 11 illustrates a switching amplification driver according to another embodiment of the present invention.
  • the switching amplification driver shown in FIG. 11 is obtained by combining the low pass filter with the switching amplifier 210 among components of the single-ended PWM switching audio using the power supply shown in FIG. 2. That is, inductors Ll and L2 are connected to output terminals of first and second switching amplifiers 1110 and 1150, respectively. A noise separation resistor Rd is connected between the inductors Ll and L2. The inductors Ll and L2 and a capacitor C construct a low pass filter.
  • FIG. 12 illustrates a switching amplification driver according to another embodiment of the present invention.
  • a pulse width modulated signal PWMl that is applied to a first gate driver 1201 is different from a pulse width modulated signal PWM2 that is applied to a second gate driver 1251.
  • the pulse modulated signal PWMl that is applied to the first gate driver 1201 is a normal PWM output.
  • the pulse modulated signal PWM2 that is applied to the second gate driver 1251 is used, only when the switching amplifier or the system including the switching amplifier is turned on or off.
  • the width of the pulse width modulated signal PWM2 that is applied to the second gate driver 1251 is increased until a half duty. After the half duty, the width of the pulse width modulated signal PWM2 is maintained. When the switching amplifier or the system is turned off, the width is decreased. When the width is decreased to an inexpressible degree, the width is maintained at a low state.
  • the noise separation resistor Rd may be built in a semiconductor chip in which the switching amplification driver is embodied. Alternatively, the noise separation resistor Rd may be built out of the semiconductor chip.
  • the second gate driver 850 and 1050 needs not to have a large driving ability, in practice, a simple circuit is sufficient instead of a precise circuit. A small area is needed for embodying the second gate driver in the semiconductor.
  • the audio amplifier including the switching amplification driver and the switching amplification driver can reduce noise caused by the DC offset voltage, when the PWM switching amplifier starts to operate or finishes the operation.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

L'invention concerne une commande d'amplification à commutation capable de réduire à un niveau minimal le bruit produit lors l'enclenchement et du déclenchement d'un amplificateur audio asymétrique à modulation d'impulsion en durée (PWM), et un amplificateur audio comprenant cette commande. La commande d'amplification à commutation comprend une première et une seconde unité d'amplification à commutation. La première unité d'amplification à commutation amplifie un signal modulé en durée en réponse à un premier signal de validation. La seconde unité d'amplification à commutation amplifie un signal modulé en durée en réponse à un second signal de validation. L'impédance de sortie de la seconde unité d'amplification est plus élevée que l'impédance d'une charge devant être commandée par la commande d'amplification à commutation. Les bornes de sortie de la première et de la seconde unité d'amplification à commutation sont connectées mutuellement.
PCT/KR2008/000955 2007-02-26 2008-02-19 Commande d'amplification à commutation pour réduire le bruit de démarrage et amplificateur audio comprenant cette commande WO2008105592A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2007-0018804 2007-02-26
KR1020070018804A KR100858292B1 (ko) 2007-02-26 2007-02-26 기동소음을 감소시키는 스위칭 증폭 드라이버 및 상기스위칭 증폭 드라이버를 구비하는 오디오 증폭기

Publications (1)

Publication Number Publication Date
WO2008105592A1 true WO2008105592A1 (fr) 2008-09-04

Family

ID=39721405

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2008/000955 WO2008105592A1 (fr) 2007-02-26 2008-02-19 Commande d'amplification à commutation pour réduire le bruit de démarrage et amplificateur audio comprenant cette commande

Country Status (2)

Country Link
KR (1) KR100858292B1 (fr)
WO (1) WO2008105592A1 (fr)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2458732A1 (fr) * 2010-11-26 2012-05-30 Nxp B.V. Amplificateur et procédé de contrôle de l'amplificateur
US8981863B2 (en) 2011-08-04 2015-03-17 Cesign Co., Ltd. Modulation apparatus for class D switching amplifier
WO2018183189A1 (fr) * 2017-03-27 2018-10-04 Waveguide Corporation Amplificateurs de puissance à découpage intégré
US10739424B2 (en) 2017-03-27 2020-08-11 Waveguide Corporation Output impedance calibration of integrated switched-mode power amplifiers
US10794971B2 (en) 2017-03-27 2020-10-06 Waveguide Corporation Duty-cycle control for power-level adjustment in switch-mode power amplifiers

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100952176B1 (ko) * 2009-10-19 2010-04-09 주식회사 바이콤 디지털 오디오 증폭장치의 구조
KR102028388B1 (ko) * 2017-10-18 2019-10-07 한국전기연구원 게이트 구동회로 및 이를 포함하는 전력 스위치 제어장치

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6593806B1 (en) * 2001-08-10 2003-07-15 Cirrus Logic, Inc. Circuits and methods for compensating switched mode amplifiers
US7078964B2 (en) * 2003-10-15 2006-07-18 Texas Instruments Incorporated Detection of DC output levels from a class D amplifier
JP2007049614A (ja) * 2005-08-12 2007-02-22 Princeton Technology Corp Dクラスオーディオ増幅器の非同期性btl設計

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6593806B1 (en) * 2001-08-10 2003-07-15 Cirrus Logic, Inc. Circuits and methods for compensating switched mode amplifiers
US7078964B2 (en) * 2003-10-15 2006-07-18 Texas Instruments Incorporated Detection of DC output levels from a class D amplifier
JP2007049614A (ja) * 2005-08-12 2007-02-22 Princeton Technology Corp Dクラスオーディオ増幅器の非同期性btl設計

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2458732A1 (fr) * 2010-11-26 2012-05-30 Nxp B.V. Amplificateur et procédé de contrôle de l'amplificateur
US8861748B2 (en) 2010-11-26 2014-10-14 Nxp B.V. Amplifier and amplifier control method
US8981863B2 (en) 2011-08-04 2015-03-17 Cesign Co., Ltd. Modulation apparatus for class D switching amplifier
WO2018183189A1 (fr) * 2017-03-27 2018-10-04 Waveguide Corporation Amplificateurs de puissance à découpage intégré
US10739424B2 (en) 2017-03-27 2020-08-11 Waveguide Corporation Output impedance calibration of integrated switched-mode power amplifiers
US10794971B2 (en) 2017-03-27 2020-10-06 Waveguide Corporation Duty-cycle control for power-level adjustment in switch-mode power amplifiers

Also Published As

Publication number Publication date
KR100858292B1 (ko) 2008-09-11
KR20080078936A (ko) 2008-08-29

Similar Documents

Publication Publication Date Title
US7714646B2 (en) Audio power amplifier and a pre-amplifier thereof
US9843314B2 (en) Pop and click noise reduction
US7446603B2 (en) Differential input Class D amplifier
JP5430025B2 (ja) D級増幅装置
US9762187B2 (en) Audio output circuit for driving an electroacoustic conversion element
WO2008105592A1 (fr) Commande d'amplification à commutation pour réduire le bruit de démarrage et amplificateur audio comprenant cette commande
US8433078B2 (en) High perceived audio quality class D amplifier
TW201804735A (zh) 低雜訊電路
JP2012156616A (ja) 半導体集積回路およびその動作方法
US7786795B2 (en) Class-D amplifier circuit
US8488808B2 (en) Method of powering down an audio amplifier with timing circuit to power down bias control and amplifying circuits in sequence
US6538590B1 (en) Transient noise reduction circuits, systems and methods in power digital-to-analog converters
KR20070016728A (ko) 디급 증폭기
GB2612453A (en) Switching in an audio system with multiple playback paths
JP7273484B2 (ja) 信号生成回路
JP2010118761A (ja) 音声出力装置
US7492218B2 (en) Digital amplifier apparatus and method of resetting a digital amplifier apparatus
US20090274319A1 (en) Audio amplifier
KR100770747B1 (ko) 디지털 앰프 및 음성 재생 방법
KR100770744B1 (ko) 팝업 노이즈 방지 방법 및 팝업 노이즈 방지 회로를포함하는 디지털 앰프
JP2022062988A (ja) オーディオ回路、それを用いた電子機器および車載オーディオシステム
JP2010226334A (ja) パルス幅変調増幅器
JP2004128750A (ja) Pwm増幅器
JP5022840B2 (ja) 増幅装置及びこれを用いた音響機器
US20240339970A1 (en) Audio processing apparatus and method having noise reducing mechanism

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08723001

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08723001

Country of ref document: EP

Kind code of ref document: A1