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WO2008136423A1 - 半導体ウェーハ処理装置、基準角度位置検出方法及び半導体ウェーハ - Google Patents

半導体ウェーハ処理装置、基準角度位置検出方法及び半導体ウェーハ Download PDF

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Publication number
WO2008136423A1
WO2008136423A1 PCT/JP2008/058097 JP2008058097W WO2008136423A1 WO 2008136423 A1 WO2008136423 A1 WO 2008136423A1 JP 2008058097 W JP2008058097 W JP 2008058097W WO 2008136423 A1 WO2008136423 A1 WO 2008136423A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor wafer
outer circumference
angular position
reference angular
length data
Prior art date
Application number
PCT/JP2008/058097
Other languages
English (en)
French (fr)
Inventor
Yoshinori Hayashi
Hideki Mori
Original Assignee
Shibaura Mechatronics Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shibaura Mechatronics Corporation filed Critical Shibaura Mechatronics Corporation
Priority to KR1020097021941A priority Critical patent/KR101164310B1/ko
Priority to DE112008001104.4T priority patent/DE112008001104B4/de
Priority to US12/597,635 priority patent/US20100075442A1/en
Priority to JP2009512988A priority patent/JP5093858B2/ja
Publication of WO2008136423A1 publication Critical patent/WO2008136423A1/ja

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Length Measuring Devices By Optical Means (AREA)

Abstract

【課題】基準角度位置の設定された半導体ウェーハについての当該基準角度位置を適切に検出することが可能な半導体ウェーハ処理装置及び基準角度位置検出方法と、基準角度位置が適切に設定された半導体ウェーハとを提供する。 【解決手段】半導体ウェーハ(100)は、外周エッジ部分(101)の一部に、径方向に対して垂直な結晶方位検出用平面(102)が結晶方位に対して所定角度をなす位置に形成されている。半導体ウェーハ処理装置は、この半導体ウェーハ(100)の外周エッジ部分(101)を周方向に順次撮影し、外周エッジ形状を表す第1外周ベベル面(101b)の長さデータ、外周端面(101a)の長さデータ及び第2外周ベベル面(101c)の長さデータを生成し、第1外周ベベル面(101b)の長さデータ及び第2外周ベベル面(101c)の長さデータが最小、且つ、外周端面(101a)の長さデータが最大となる角度位置を基準角度位置として検出する。
PCT/JP2008/058097 2007-04-27 2008-04-25 半導体ウェーハ処理装置、基準角度位置検出方法及び半導体ウェーハ WO2008136423A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020097021941A KR101164310B1 (ko) 2007-04-27 2008-04-25 반도체 웨이퍼 처리 장치 및 기준각도 위치 검출 방법
DE112008001104.4T DE112008001104B4 (de) 2007-04-27 2008-04-25 Vorrichtung zur Halbleiterwafer-Bearbeitung und Verfahren sowie Vorrichtung zur Ermittlung einer Bezugswinkelposition
US12/597,635 US20100075442A1 (en) 2007-04-27 2008-04-25 Semiconductor wafer processing apparatus, reference angular position detection method, and semiconductor wafer
JP2009512988A JP5093858B2 (ja) 2007-04-27 2008-04-25 半導体ウェーハ処理装置及び基準角度位置検出方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007120173 2007-04-27
JP2007-120173 2007-04-27

Publications (1)

Publication Number Publication Date
WO2008136423A1 true WO2008136423A1 (ja) 2008-11-13

Family

ID=39943530

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/058097 WO2008136423A1 (ja) 2007-04-27 2008-04-25 半導体ウェーハ処理装置、基準角度位置検出方法及び半導体ウェーハ

Country Status (5)

Country Link
US (1) US20100075442A1 (ja)
JP (1) JP5093858B2 (ja)
KR (1) KR101164310B1 (ja)
DE (1) DE112008001104B4 (ja)
WO (1) WO2008136423A1 (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012129284A (ja) * 2010-12-14 2012-07-05 Disco Abrasive Syst Ltd ウェーハ生産方法
WO2015178109A1 (ja) * 2014-05-23 2015-11-26 東京エレクトロン株式会社 ウエハの位置検出装置、ウエハの位置検出方法、及び記憶媒体
JP2016048744A (ja) * 2014-08-28 2016-04-07 株式会社ディスコ 加工装置
JP2022516137A (ja) * 2019-01-07 2022-02-24 アプライド マテリアルズ インコーポレイテッド 遮光エッジ除外ゾーンを備えた透明な基板

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6215059B2 (ja) 2014-01-10 2017-10-18 株式会社ディスコ マーク検出方法
KR102175021B1 (ko) 2014-02-12 2020-11-06 케이엘에이 코포레이션 웨이퍼 노치 검출
JP7497262B2 (ja) * 2020-09-24 2024-06-10 株式会社Screenホールディングス 基板処理装置および基板位置調整方法

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01303737A (ja) * 1988-05-31 1989-12-07 Canon Inc 位置決め装置
JPH0276226A (ja) * 1988-09-12 1990-03-15 Sumitomo Electric Ind Ltd 半導体ウエーハ
JPH02106821U (ja) * 1989-02-10 1990-08-24
JPH0373553A (ja) * 1989-08-14 1991-03-28 Dainippon Screen Mfg Co Ltd ウエハの位置検出装置
JPH09110589A (ja) * 1995-10-19 1997-04-28 Toshiba Corp シリコンウェハ及びその製造方法
JPH09167723A (ja) * 1995-12-15 1997-06-24 Toshiba Corp 半導体装置用ウェーハ及びその製造方法
JPH09278595A (ja) * 1996-04-10 1997-10-28 Sumitomo Electric Ind Ltd Iii −v族化合物半導体ウエハ及びその製造方法
JP2001267193A (ja) * 2000-03-17 2001-09-28 Toshiba Corp 半導体ウェーハ
JP2007095909A (ja) * 2005-09-28 2007-04-12 Disco Abrasive Syst Ltd 特殊形状の結晶方位識別部が形成されたウェーハ
JP2007189093A (ja) * 2006-01-13 2007-07-26 Disco Abrasive Syst Ltd 半導体ウエーハ

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5452078A (en) * 1993-06-17 1995-09-19 Ann F. Koo Method and apparatus for finding wafer index marks and centers
JP3213563B2 (ja) * 1997-03-11 2001-10-02 株式会社スーパーシリコン研究所 ノッチレスウェーハの製造方法
JP4071476B2 (ja) * 2001-03-21 2008-04-02 株式会社東芝 半導体ウェーハ及び半導体ウェーハの製造方法
JP4468696B2 (ja) * 2001-09-19 2010-05-26 オリンパス株式会社 半導体ウエハ検査装置
JP4093793B2 (ja) * 2002-04-30 2008-06-04 信越半導体株式会社 半導体ウエーハの製造方法及びウエーハ

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01303737A (ja) * 1988-05-31 1989-12-07 Canon Inc 位置決め装置
JPH0276226A (ja) * 1988-09-12 1990-03-15 Sumitomo Electric Ind Ltd 半導体ウエーハ
JPH02106821U (ja) * 1989-02-10 1990-08-24
JPH0373553A (ja) * 1989-08-14 1991-03-28 Dainippon Screen Mfg Co Ltd ウエハの位置検出装置
JPH09110589A (ja) * 1995-10-19 1997-04-28 Toshiba Corp シリコンウェハ及びその製造方法
JPH09167723A (ja) * 1995-12-15 1997-06-24 Toshiba Corp 半導体装置用ウェーハ及びその製造方法
JPH09278595A (ja) * 1996-04-10 1997-10-28 Sumitomo Electric Ind Ltd Iii −v族化合物半導体ウエハ及びその製造方法
JP2001267193A (ja) * 2000-03-17 2001-09-28 Toshiba Corp 半導体ウェーハ
JP2007095909A (ja) * 2005-09-28 2007-04-12 Disco Abrasive Syst Ltd 特殊形状の結晶方位識別部が形成されたウェーハ
JP2007189093A (ja) * 2006-01-13 2007-07-26 Disco Abrasive Syst Ltd 半導体ウエーハ

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012129284A (ja) * 2010-12-14 2012-07-05 Disco Abrasive Syst Ltd ウェーハ生産方法
WO2015178109A1 (ja) * 2014-05-23 2015-11-26 東京エレクトロン株式会社 ウエハの位置検出装置、ウエハの位置検出方法、及び記憶媒体
JP2015222796A (ja) * 2014-05-23 2015-12-10 東京エレクトロン株式会社 ウエハの位置検出装置、ウエハの位置検出方法、及び記憶媒体
JP2016048744A (ja) * 2014-08-28 2016-04-07 株式会社ディスコ 加工装置
JP2022516137A (ja) * 2019-01-07 2022-02-24 アプライド マテリアルズ インコーポレイテッド 遮光エッジ除外ゾーンを備えた透明な基板
JP7520017B2 (ja) 2019-01-07 2024-07-22 アプライド マテリアルズ インコーポレイテッド 遮光エッジ除外ゾーンを備えた透明な基板

Also Published As

Publication number Publication date
DE112008001104T5 (de) 2010-02-18
JP5093858B2 (ja) 2012-12-12
KR20090132610A (ko) 2009-12-30
DE112008001104B4 (de) 2016-02-04
JPWO2008136423A1 (ja) 2010-07-29
KR101164310B1 (ko) 2012-07-09
US20100075442A1 (en) 2010-03-25

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