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WO2008139669A1 - 薄膜トランジスタの製造方法及び薄膜トランジスタ - Google Patents

薄膜トランジスタの製造方法及び薄膜トランジスタ Download PDF

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Publication number
WO2008139669A1
WO2008139669A1 PCT/JP2008/000489 JP2008000489W WO2008139669A1 WO 2008139669 A1 WO2008139669 A1 WO 2008139669A1 JP 2008000489 W JP2008000489 W JP 2008000489W WO 2008139669 A1 WO2008139669 A1 WO 2008139669A1
Authority
WO
WIPO (PCT)
Prior art keywords
insulation film
semiconductor layer
thin film
film transistor
film
Prior art date
Application number
PCT/JP2008/000489
Other languages
English (en)
French (fr)
Inventor
Makoto Nakazawa
Original Assignee
Sharp Kabushiki Kaisha
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Kabushiki Kaisha filed Critical Sharp Kabushiki Kaisha
Publication of WO2008139669A1 publication Critical patent/WO2008139669A1/ja

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes

Landscapes

  • Thin Film Transistor (AREA)

Abstract

　基板（１０）に半導体層（１２）を形成する半導体層形成工程と、半導体層（１２）を覆うように第１絶縁膜、第２絶縁膜及び導電膜を順に成膜する積層膜形成工程と、導電膜をパターニングして半導体層（１２）を横切るようにゲート電極（２１ａ）を形成するゲート電極形成工程と、第２絶縁膜を周端がゲート電極（２１ａ）よりも外側になると共に半導体層（１２）を横切るようにエッチングする第２絶縁膜除去工程と、第２絶縁膜除去工程でエッチングされた第２絶縁膜から露出する第１絶縁膜をエッチングして半導体層（１２）の一部を露出させる第１絶縁膜除去工程とを備える。
PCT/JP2008/000489 2007-05-14 2008-03-07 薄膜トランジスタの製造方法及び薄膜トランジスタ WO2008139669A1 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007127734 2007-05-14
JP2007-127734 2007-05-14

Publications (1)

Publication Number Publication Date
WO2008139669A1 true WO2008139669A1 (ja) 2008-11-20

Family

ID=40001895

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/000489 WO2008139669A1 (ja) 2007-05-14 2008-03-07 薄膜トランジスタの製造方法及び薄膜トランジスタ

Country Status (1)

Country Link
WO (1) WO2008139669A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI836583B (zh) * 2012-05-10 2024-03-21 日商半導體能源研究所股份有限公司 半導體裝置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07161994A (ja) * 1993-12-07 1995-06-23 Sony Corp 薄膜トランジスタの製造方法
JPH10209461A (ja) * 1997-01-27 1998-08-07 Matsushita Electric Ind Co Ltd 薄膜トランジスタ及びその製造方法
JP2000124461A (ja) * 1998-10-20 2000-04-28 Matsushita Electric Ind Co Ltd 薄膜トランジスタおよびその製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07161994A (ja) * 1993-12-07 1995-06-23 Sony Corp 薄膜トランジスタの製造方法
JPH10209461A (ja) * 1997-01-27 1998-08-07 Matsushita Electric Ind Co Ltd 薄膜トランジスタ及びその製造方法
JP2000124461A (ja) * 1998-10-20 2000-04-28 Matsushita Electric Ind Co Ltd 薄膜トランジスタおよびその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI836583B (zh) * 2012-05-10 2024-03-21 日商半導體能源研究所股份有限公司 半導體裝置

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