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WO2009028399A1 - 半導体ウェーハおよびその製造方法 - Google Patents

半導体ウェーハおよびその製造方法 Download PDF

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Publication number
WO2009028399A1
WO2009028399A1 PCT/JP2008/064945 JP2008064945W WO2009028399A1 WO 2009028399 A1 WO2009028399 A1 WO 2009028399A1 JP 2008064945 W JP2008064945 W JP 2008064945W WO 2009028399 A1 WO2009028399 A1 WO 2009028399A1
Authority
WO
WIPO (PCT)
Prior art keywords
silicon wafer
small silicon
wafer pieces
diameter
manufacturing
Prior art date
Application number
PCT/JP2008/064945
Other languages
English (en)
French (fr)
Inventor
Kazushige Takaishi
Seiji Sugimoto
Original Assignee
Sumco Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumco Corporation filed Critical Sumco Corporation
Priority to JP2009530076A priority Critical patent/JP5294087B2/ja
Publication of WO2009028399A1 publication Critical patent/WO2009028399A1/ja

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

　直径４５０ｍｍ以上の大口径ウェーハを高歩留まりでかつ安価に作製する。母材基板となる直径４５０ｍｍ以上の円形の石英ガラス板に、複数枚の矩形の小片シリコンウェーハをアニール等によって貼り付ける。接合後、ポリシリコンをＣＶＤにより被着して小片シリコンウェーハ間の隙間を埋め、さらにこれらの小片シリコンウェーハの表面を研磨してデバイス形成面とする。または、これらの小片シリコンウェーハの表面にエピタキシャル層を形成してデバイス面とする。
PCT/JP2008/064945 2007-08-24 2008-08-21 半導体ウェーハおよびその製造方法 WO2009028399A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009530076A JP5294087B2 (ja) 2007-08-24 2008-08-21 半導体ウェーハおよびその製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-218956 2007-08-24
JP2007218956 2007-08-24

Publications (1)

Publication Number Publication Date
WO2009028399A1 true WO2009028399A1 (ja) 2009-03-05

Family

ID=40387121

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/064945 WO2009028399A1 (ja) 2007-08-24 2008-08-21 半導体ウェーハおよびその製造方法

Country Status (3)

Country Link
JP (1) JP5294087B2 (ja)
TW (1) TW200914653A (ja)
WO (1) WO2009028399A1 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012060430A1 (ja) * 2010-11-05 2012-05-10 シャープ株式会社 半導体基板、半導体基板の製造方法、薄膜トランジスタ、半導体回路、液晶表示装置、エレクトロルミネセンス装置、無線通信装置、及び発光装置
WO2014020906A1 (ja) * 2012-07-30 2014-02-06 住友化学株式会社 複合基板の製造方法および半導体結晶層形成基板の製造方法
WO2019017398A1 (ja) * 2017-07-19 2019-01-24 株式会社テンシックス 化合物半導体基板及びその製造方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2460749B1 (de) 2010-12-01 2016-03-30 Müller Martini Holding AG Verfahren zum Betrieb eines Transportsystems

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0832038A (ja) * 1994-07-15 1996-02-02 Komatsu Electron Metals Co Ltd 貼り合わせｓｏｉ基板の製造方法および貼り合わせｓｏｉ基板
JP2000082643A (ja) * 1999-07-30 2000-03-21 Canon Inc 半導体基板の作製方法及び半導体基板
JP2003068592A (ja) * 2001-08-22 2003-03-07 Toshiba Corp エピタキシャル基板の製造方法、半導体素子の製造方法、及びエピタキシャル基板
JP2003324188A (ja) * 2002-04-30 2003-11-14 Ishikawajima Harima Heavy Ind Co Ltd 大面積単結晶シリコン基板の製造方法
WO2006114999A1 (ja) * 2005-04-18 2006-11-02 Kyoto University 化合物半導体装置及び化合物半導体製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0832038A (ja) * 1994-07-15 1996-02-02 Komatsu Electron Metals Co Ltd 貼り合わせｓｏｉ基板の製造方法および貼り合わせｓｏｉ基板
JP2000082643A (ja) * 1999-07-30 2000-03-21 Canon Inc 半導体基板の作製方法及び半導体基板
JP2003068592A (ja) * 2001-08-22 2003-03-07 Toshiba Corp エピタキシャル基板の製造方法、半導体素子の製造方法、及びエピタキシャル基板
JP2003324188A (ja) * 2002-04-30 2003-11-14 Ishikawajima Harima Heavy Ind Co Ltd 大面積単結晶シリコン基板の製造方法
WO2006114999A1 (ja) * 2005-04-18 2006-11-02 Kyoto University 化合物半導体装置及び化合物半導体製造方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012060430A1 (ja) * 2010-11-05 2012-05-10 シャープ株式会社 半導体基板、半導体基板の製造方法、薄膜トランジスタ、半導体回路、液晶表示装置、エレクトロルミネセンス装置、無線通信装置、及び発光装置
WO2014020906A1 (ja) * 2012-07-30 2014-02-06 住友化学株式会社 複合基板の製造方法および半導体結晶層形成基板の製造方法
WO2019017398A1 (ja) * 2017-07-19 2019-01-24 株式会社テンシックス 化合物半導体基板及びその製造方法
JP2019021818A (ja) * 2017-07-19 2019-02-07 株式会社テンシックス 化合物半導体基板及びその製造方法
CN110663096A (zh) * 2017-07-19 2020-01-07 X-Vi株式会社 化合物半导体基板和其制造方法
CN110663096B (zh) * 2017-07-19 2023-06-06 X-Vi株式会社 化合物半导体基板和其制造方法

Also Published As

Publication number Publication date
TW200914653A (en) 2009-04-01
JPWO2009028399A1 (ja) 2010-12-02
JP5294087B2 (ja) 2013-09-18

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