WO2018169536A1

WO2018169536A1 - Conditioning disks for chemical mechanical polishing

Info

Publication number: WO2018169536A1
Application number: PCT/US2017/022649
Authority: WO
Inventors: Alexander Tregub
Original assignee: Intel Corporation
Priority date: 2017-03-16
Filing date: 2017-03-16
Publication date: 2018-09-20

Abstract

Disclosed herein are chemical mechanical polishing (CMP) conditioning disks, and related systems and techniques. For example, in some embodiments, a CMP conditioning disk may include: a support; a first pedestal extending from the support, the first pedestal having a first height; and a second pedestal extending from the support, the second pedestal having a second height different from the first height. In some embodiments, the first pedestal may have a surface roughness (SR) different from an SR of the second pedestal.

Description

CONDITIONING DISKS FOR CHEMICAL MECHANICAL POLISHING

Background

[0001] Chemical mechanical polishing (CMP) typically includes rotating and translating a polishing pad on a wafer to remove material from the wafer and achieve a flat wafer surface. For example, a wafer may be polished to remove an oxide layer prior to a lithography step. The polishing process may degrade the polishing surface of CMP polishing pads; to "refurbish" a CMP polishing pad and mitigate a degradation in polishing performance, the polishing surface may be abraded using a CMP conditioning disk.

Brief Description of the Drawings

[0002] Embodiments will be readily understood by the following detailed description in conjunction with the accompanying drawings. To facilitate this description, like reference numerals designate like structural elements. Embodiments are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings.

[0003] FIG. 1A is a top view of an example chemical mechanical polishing (CMP) conditioning disk having multiple pedestals with different surface roughnesses (SRs) and different heights, in accordance with various embodiments.

[0004] FIG. IB is a side view of the example CMP conditioning disk of FIG. 1A, in accordance with various embodiments.

[0005] FIG. 1C shows example profiles of pedestal surfaces having different SRs, in accordance with various embodiments.

[0006] FIG. 2 is a side view of a CMP system including a CMP conditioning disk as disclosed herein, in accordance with various embodiments.

[0007] FIGS. 3A-3B are side views of a CMP conditioning disk conditioning a CMP polishing pad under different downforces, in accordance with various embodiments.

[0008] FIG. 3C is a view of an example relationship between pad cut rate and downforce for the

CMP polishing pad of FIGS. 3A-3B, in accordance with various embodiments.

[0009] FIGS. 4A-4B are side views of a CMP conditioning disk, having non-rigid pedestals, conditioning a CMP polishing pad under different downforces, in accordance with various embodiments.

[0010] FIGS. 5A-5B are side section views of a CMP conditioning disk, having pedestals on springs, conditioning a CMP polishing pad under different downforces, in accordance with various embodiments. [0011] FIGS. 6A-6C are side section views of a CMP conditioning disk, having pedestals with mechanically adjustable heights, conditioning a CMP polishing pad under different adjustment conditions, in accordance with various embodiments.

[0012] FIGS. 7A-7C are side section views of a CMP conditioning disk, having pedestals with electrically adjustable heights, conditioning a CMP polishing pad under different adjustment conditions, in accordance with various embodiments.

[0013] FIGS. 8A-8C are side section views of another CMP conditioning disk, having pedestals with electrically adjustable heights, conditioning a CMP polishing pad under different adjustment conditions, in accordance with various embodiments.

[0014] FIGS. 9-10 are top views of example CMP conditioning disks having multiple pedestals with different SRs and different heights, in accordance with various embodiments.

[0015] FIGS. 11-13 illustrate various example stages in the manufacture of a CMP conditioning disk, in accordance with various embodiments.

[0016] FIG. 14 is a flow diagram of a method of manufacturing a CMP conditioning disk, in accordance with various embodiments.

[0017] FIG. 15 is a flow diagram of a method of using a CMP conditioning disk, in accordance with various embodiments.

[0018] FIGS. 16A and 16B are top views of a wafer and dies that may be processed using CMP systems and techniques in accordance with any of the embodiments disclosed herein.

[0019] FIG. 17 is a cross-sectional side view of an integrated circuit (IC) device that may have components that may be processed using CMP systems and techniques in accordance with any of the embodiments disclosed herein.

[0020] FIG. 18 is a cross-sectional side view of an IC device assembly that may have components that may be processed using CMP systems and techniques in accordance with any of the embodiments disclosed herein.

[0021] FIG. 19 is a block diagram of an example computing device that may have components that may be processed using CMP systems and techniques in accordance with any of the embodiments disclosed herein.

Detailed Description

[0022] Disclosed herein are chemical mechanical polishing (CMP) conditioning disks, and related systems and techniques. For example, in some embodiments, a CMP conditioning disk may include: a support; a first pedestal extending from the support, the first pedestal having a first height; and a second pedestal extending from the support, the second pedestal having a second height different from the first height. In some embodiments, the first pedestal may have a surface roughness (SR) different from an SR of the second pedestal.

[0023] The CMP conditioning disk designs disclosed herein may improve performance versatility over conventional CMP conditioning disks that include multiple raised portions that all have the same height. However, improved disk performance may be achieved when the aggressiveness of the CMP conditioning disk (measured, e.g., by pad cut rate and/or pad surface roughness) can be adjusted to achieve a desired removal of waste byproduct in the CMP polishing pad and/or generate grooves in the CMP polishing pad for slurry delivery.

[0024] Additionally, a desired aggressiveness of a CMP conditioning disk may change during polishing as the material properties of the device being polished change. For example, when a CMP polishing pad is polishing a device at the interface between two different layers of material in the device, it may be desirable to change the aggressiveness of the pad conditioning to achieve the polishing properties desired for the different material layers. In another example, the properties of a CMP polishing pad may themselves change during the lifetime of a CMP polishing pad, and thus it may be desirable to change the aggressiveness of the pad conditioning in response to the changing properties of the CMP polishing pad. Using conventional techniques, when a change in conditioning aggressiveness is desired, the CMP system would have to be shut down, the current CMP conditioning disk removed, and a new CMP conditioning disk of the desired aggressiveness mounted. This can result in significant CMP system downtime, reducing the throughput of a high- volume manufacturing (HVM) system and increasing cost. Various ones of the embodiments disclosed herein may achieve such fine tuning and increased tool availability by including multiple pedestals having different heights, achieving performance parameters not achieved by conventional, uniform designs.

[0025] In the following detailed description, reference is made to the accompanying drawings that form a part hereof, and in which are shown, by way of illustration, embodiments that may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description is not to be taken in a limiting sense.

[0026] Various operations may be described as multiple discrete actions or operations in turn, in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations may not be performed in the order of presentation. Operations described may be performed in a different order from the described embodiment. Various additional operations may be performed, and/or described operations may be omitted in additional embodiments.

[0027] For the purposes of the present disclosure, the phrase "A and/or B" means (A), (B), or (A and B). For the purposes of the present disclosure, the phrase "A, B, and/or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C). The term "between," when used with reference to measurement ranges, is inclusive of the ends of the measurement ranges.

[0028] The description uses the phrases "in an embodiment" or "in embodiments," which may each refer to one or more of the same or different embodiments. Furthermore, the terms "comprising," "including," "having," and the like, as used with respect to embodiments of the present disclosure, are synonymous. The disclosure may use perspective-based descriptions such as "above," "below," "top," "bottom," and "side"; such descriptions are used to facilitate the discussion and are not intended to restrict the application of disclosed embodiments. The accompanying drawings are not necessarily drawn to scale. For ease of discussion, the present disclosure may refer to FIGS. 1A-1C as "FIG. 1," FIGS. 3A-3B as "FIG. 3," etc.

[0029] FIGS. 1A and IB are top and side views, respectively, of an example chemical mechanical polishing (CMP) conditioning disk 100 having multiple pedestals 102 extending from a support 104, in accordance with various embodiments. Some of the pedestals 102 may have different heights 103 from others of the pedestals 102. As used herein, the "height" of a pedestal 102 may refer to the distance between a reference plane in the support 104 (e.g., a surface of the support 104) and the abrasive surface 112 of that pedestal 102. An example of heights 103 is illustrated in FIG. IB. The height 103 of a pedestal 102 may be complementary to the distance of the abrasive surface 112 of that pedestal 102 from a CMP polishing pad when the CMP conditioning disk 100 is used in a CMP conditioning system (e.g., as discussed below with reference to FIG. 2); in particular, the "taller" a pedestal 102, the closer the abrasive surface 112 of that pedestal 102 may be to the surface of the CMP polishing pad.

[0030] As discussed in further detail below, a CMP conditioning disk 100 may be used to condition a CMP polishing pad to maintain the polishing performance of the surface of the CMP polishing pad. CMP polishing pads are often formed of elastomeric or other deformable materials, and thus may substantially reversibly deform under pressure from the pedestals 102 of a CMP conditioning disk 100. This deformation may enable the "shorter" pedestals 102 of a CMP conditioning disk 100 to reach the CMP polishing pad under application of sufficient downforce. Thus, in some

embodiments, the downforce applied by a CMP conditioning disk 100 on a CMP polishing pad may be adjusted to selectively bring only the taller pedestals 102-2, or the taller pedestals 102-2 and the shorter pedestals 102-1, into contact with the CMP polishing pad. This method of operation is discussed below with reference to FIG. 3. Such a CMP conditioning disk 100 may thus achieve dynamically adjustable aggressiveness without needing to stop the CMP system and change out the CMP conditioning disk 100.

[0031] In the example CMP conditioning disk 100 of FIG. 1, six pedestals 102 are illustrated, with three of these pedestals 102-1 having a first height 103-1 and three of these pedestals 102-2 having a second height 103-2. In the example of FIG. 1, the second height 103-2 is greater than the first height 103-1. Although six pedestals 102 are illustrated in FIG. 1A, and the pedestals 102-1 and 102- 2 are arranged in an alternating and regular manner, the CMP conditioning disk 100 may include fewer than or more than six pedestals and may include pedestals having different combinations of footprints, as desired. Additionally, the CMP conditioning disk 100 may include pedestals 102 with more than two different heights (e.g., pedestals 102-1 may have a height 103-1, pedestals 102-2 may have a height 103-2, and pedestals 102-3 (not shown) may have a height 103-3 (not shown) different from the heights 103-1 and 103-2).

[0032] In some embodiments, the heights 103 of some or all of the pedestals 102 may not be adjustable before use and/or during use of the CMP conditioning disk 100 (e.g., while the CMP conditioning disk 100 is mounted in a CMP conditioning system, and/or while the CMP conditioning disk 100 is conditioning a CMP polishing pad, as discussed below with reference to FIG. 2). In some embodiments, the heights 103 of some or all of the pedestals 102 may be adjustable before use, and then may maintain their adjusted values during use. In some embodiments, the heights 103 of some or all of the pedestals 102 may be adjustable during use (e.g., without having to remove the CMP conditioning disk from the CMP conditioning system). Examples of different ones of these embodiments are discussed below with reference to FIGS. 3-8.

[0033] The abrasive surface 112 of a pedestal 102 may have a surface roughness (SR). For ease of exposition, reference may be made herein simply to the SR of a pedestal 102. As used herein, the "SR" of a pedestal 102 of a CMP conditioning disk 100 may refer to any suitable surface roughness metric or combination of such metrics (e.g., a profile surface roughness metric, an area surface roughness metric, any combination of such metrics, etc.). For example, the SR of a pedestal 102 may be the average roughness (known as "R_a"), calculated in accordance with:

[0034] where yi is the vertical distance between the mean line and the ith data point in the surface profile, as known in the art. In some embodiments, the SR may be the root mean square roughness (known as "R_q"), calculated in accordance with:

[0035] In other embodiments, the SR may be the maximum valley depth, the maximum peak height, the maximum total height and the surface profile, or any other surface roughness parameter. In some embodiments, multiple surface roughness parameters may be combined (e.g., in a linear or nonlinear combination) to generate an SR. Various examples of particular SRs are used to illustrate the systems and techniques disclosed herein, but these are simply for illustrative purposes, and any suitable SR may be used to quantify the roughness of a pedestal 102.

[0036] FIG. 1C illustrates profiles of surfaces having different SRs, in accordance with various embodiments. In particular, FIG. 1C illustrates a first profile 174-1 and a second profile 174-2 (along with the mean lines of each surface profile). The first profile 174-1 may correspond to one of the first pedestals 102-1 of the CMP conditioning disk 100 of FIG. 1A, for example, and the second profile 174-2 may correspond to one of the second pedestals 102-2 of the CMP conditioning disk 100 of FIG. 1A. In some embodiments, such surface profiles may be generated by a profilometer (e.g., using white light spectroscopy) or another suitable device. The SR of the surface represented by the first profile 174-1 may be greater than the SR of the surface represented by the second profile 174-2 (using any suitable SR metric).

[0037] In the example of FIG. 1C, the pedestals 102-1 may have a greater SR than the pedestals 102-2. FIG. 1C is thus representative of an embodiment in which the "shorter" pedestals 102 of a CMP conditioning disk 100 may have a greater SR than the "taller" pedestals 102 of the CMP conditioning disk 100. In other embodiments, the shorter pedestals 102 of a CMP conditioning disk 100 may have a smaller SR than the taller pedestals 102 of the CMP conditioning disk 100. In still other embodiments, the shorter pedestals 102 of a CMP conditioning disk 100 may have

approximately the same SR as the taller pedestals 102 of the CMP conditioning disk 100.

Applications of each of these different configurations are discussed below.

[0038] In some embodiments, the pedestals 102 may be largely formed integrally with the support 104, and then an abrasive material may be disposed on the pedestals 102 to provide the abrasive surfaces 112. In some embodiments, the pedestals 102 may be glued or otherwise secured to the support 104. Although the support 104 illustrated in FIG. 1 is substantially planar, this need not be the case, and the pedestals 102 may extend from a support 104 of any suitable shape or complexity. A number of different types of supports 104 are illustrated in FIGS. 3-8, for example.

[0039] The support 104 may be formed from any suitable material or materials. For example, the support 104 may include plastic, metal, or ceramic materials. In some embodiments, the support 104 and/or the bulk of the pedestals 102 may be formed of a material that may be used as a substrate for growing an abrasive material for the abrasive surfaces 112 using chemical vapor deposition (CVD). For example, when the abrasive surfaces 112 of the pedestals 102 are provided by CVD-grown diamond, the support 104 or the bulk of the pedestals 102 (e.g., the bulk portions 110 discussed below with reference to FIGS. 11-13) may be formed of a carbon- or silicon-based composite material, such as silicon carbide. In some embodiments, the pedestals 102 may have diamonds embedded at the abrasive surfaces 112. Although diamond is used as an example of an abrasive herein, other materials with hardnesses similar to diamond may be used, instead of or in addition to diamond, in various embodiments.

[0040] As noted above, the SR of the pedestals 102-1 may be different from the SR of the pedestals 102-2. In some embodiments, the SR of at least one of the pedestals 102-1 may be 10% greater than the SR of at least one of the pedestals 102-2. In some embodiments, the SR of at least one of the pedestals 102-1 may be 15% greater than the SR of at least one of the pedestals 102-2. In some embodiments, the SR of at least one of the pedestals 102-1 may be 20% greater than the SR of at least one of the pedestals 102-2. In some embodiments, the SR of at least one of the pedestals 102- 1 may be 30% greater than the SR of at least one of the pedestals 102-2. These relative SRs may apply to any of the embodiments of the CMP conditioning disk 100, not just the embodiment illustrated in FIG. 1.

[0041] Different SRs for different pedestals 102 in a CMP conditioning disk 100 may be achieved in any suitable manner. For example, CVD may be used, and the film grains used during CVD (e.g., diamond CVD) may determine the SR. The size of these grains may be determined by the CVD process conditions, such as temperature, time, deposition material source, etc., as known in the art. In some CVD diamond embodiments, for example, a rectangular deposition morphology may result in a higher SR than a rhomboid deposition morphology. This example is simply illustrative, and other parameters (e.g., CVD parameters) may control the SR of the resulting pedestal 102.

[0042] The amount of conditioning performed by the CMP conditioning disk 100 on a CMP polishing pad (e.g., the CMP polishing pad 158 of FIG. 2, discussed below) may be quantified by the pad cut rate (PCR), the amount of material removed from the CMP polishing pad by the CMP conditioning disk 100 (normalized by time of conditioning). The PCR of a CMP conditioning disk 100 may depend upon the SRs of the pedestals 102 that are in contact with the CMP polishing pad during polishing, which may in turn depend on the differences in the heights 103 of the pedestals 102, the material composition of the pedestals 102, and the material composition of the CMP polishing pad.

Generally, the SRs of the pedestals 102 of the CMP conditioning disk 100 may correlate with the PCR of the CMP conditioning disk 100. In some embodiments, a 3X increase in the average roughness of the CMP conditioning disk 100 may yield an 8X increase in the PCR. When the pedestals 102-1 and the pedestals 102-2 of the CMP conditioning disk 100 have different SRs, the PCR of the conditioning disk 100 may be between the PCR of the conditioning disk 100 if all of the pedestals 102 had an SR equal to the SR of a pedestal 102-1, and the PCR of the conditioning disk 100 if all of the pedestals 102 had an SR equal to the SR of a pedestal 102-2. In some embodiments, the PCR of the CMP conditioning disk 100 may be between 1 and 15 um/minute. In some embodiments, the PCR of the CMP conditioning disk 100 may be between 4 and 12 um/minute. In some embodiments, the PCR of the CMP conditioning disk 100 may be between 5 and 10 um/minute. These PCR ranges may apply to any of the embodiments of the CMP conditioning disk 100, not just the embodiment illustrated in FIG. 1.

[0043] FIG. 2 is a side view of a CMP system 150 including a CMP conditioning disk 100, in accordance with various embodiments. The CMP system 150 may include a CMP conditioning disk 100 disposed on a first arm 152. The CMP conditioning disk 100 of the CMP system 150 may take the form of any of the CMP conditioning disks disclosed herein. The CMP conditioning disk 100 may be secured to the first arm 152 using any suitable mechanism, such as vacuum, a clamp, a frame, or mechanical fasteners, for example. The first arm 152 may include mechanical linkages to allow the CMP conditioning disk 100 to translate "up and down" to bring the CMP conditioning disk 100 into contact with the CMP polishing pad 158 (discussed below). In some embodiments, the first arm 152 may include mechanical linkages to allow the CMP conditioning disk 100 to translate "side to side" while in contact with the CMP polishing pad 158. In some embodiments, the first arm 152 may include a rotor to allow the CMP conditioning disk 100 to rotate while in contact with the CMP polishing pad 158. The first arm 152 may include, for example, a head, as known in the art. In various embodiments, the CMP system 150 may include control circuitry (not shown) to allow a user to control the rotation rate of the CMP conditioning disk 100, the downward force ("downforce") exerted by the CMP conditioning disk 100 on the CMP polishing pad 158, the "side to side" translation of the CMP conditioning disk 100, and/or other operational properties of the CMP system 150. In some embodiments, the first arm 152 may include an electromagnetic coil or other actuation system to control the height 103 of one or more of the pedestals 102 of the CMP conditioning disk 100 (e.g., as discussed below with reference to FIGS. 7 and 8), and this coil or other actuation system may be governed by the control circuitry.

[0044] The CMP system 150 may include a CMP polishing pad 158 disposed on a second arm 154. The CMP polishing pad 158 may be formed from a porous material, such as a hard elastomer or a polyurethane-based material. The CMP polishing pad 158 may include other additives to achieve a desired porosity, as known in the art. Different CMP polishing pads 158 may have different mechanical properties, such as hardness (e.g., with "soft" pads having a hardness between 10 and 20 MPa, and "hard" pads having a hardness between 200 and 1500 MPa). The CMP polishing pad 158 may be secured to the second arm 154 using any suitable mechanism, such as vacuum, a clamp, a frame, or mechanical fasteners, for example. The second arm 154 may include mechanical linkages to allow the CMP polishing pad 158 to translate "up and down" to bring the CMP polishing pad 158 into contact with the CMP conditioning disk 100 and/or the wafer 160 (discussed below). In some embodiments, the second arm 154 may include mechanical linkages to allow the CMP polishing pad 158 to translate "side to side" while in contact with the CMP conditioning disk 100 and/or the wafer 160. In some embodiments, the second arm 154 may include a rotor to allow the CMP polishing pad 158 to rotate while in contact with the CMP conditioning disk 100 and/or the wafer 160. The second arm 154 may be, for example, a platen, as known in the art. In various embodiments, the CMP system 150 may include control circuitry (not shown) to allow a user to control the rotation rate of the CMP polishing pad 158, the "side to side" translation of the CMP polishing pad 158, and/or other operational properties of the CMP system 150, as noted above. The amount of conditioning performed by the CMP conditioning disk 100 on the CMP polishing pad 158 may be quantified by the pad cut rate (PCR), the amount of material removed from the CMP polishing pad 158 by the CMP conditioning disk 100 (normalized by time of conditioning), as discussed above.

[0045] The CMP system 150 may include a wafer 160 disposed on a third arm 156. The wafer 160 may have any suitable dimensions (e.g., 200, 300, or 450 mm in diameter). The wafer 160 may be secured to the third arm 156 using any suitable mechanism, such as vacuum, a clamp, a frame, or mechanical fasteners, for example. In some embodiments, the wafer 160 may be disposed in a retainer ring to control the "side to side" movement of the wafer 160, and vacuum force may be used to hold the wafer 160 against the third arm 156 to control the "up and down" movement of the wafer 160. The third arm 156 may include mechanical linkages to allow the wafer 160 to translate "up and down" to bring the wafer 160 into contact with the CMP polishing pad 158. In some embodiments, the third arm 156 may include mechanical linkages to allow the wafer 160 to translate "side to side" while in contact with the CMP polishing pad 158. In some embodiments, the third arm 156 may include a rotor to allow the wafer 160 to rotate while in contact with the CMP polishing pad 158. In various embodiments, the CMP system 150 may include control circuitry (not shown) to allow a user to control the rotation rate of the wafer 160, the "side to side" translation of the wafer 160, the downward force exerted by the third arm 156 on the CMP polishing pad 158, and/or other operational properties of the CMP system 150, as noted above.

[0046] When the CMP conditioning disk 100 is brought into contact with the CMP polishing pad 158, and the two are rotated (and/or translated) relative to one another, the abrasive surfaces 112 of the pedestals 102 of the CMP conditioning disk 100 may "dig" into the surface of the CMP polishing pad 158 and create grooves in the CMP polishing pad 158. As discussed further herein, in some embodiments, changing the downforce exerted by the CMP conditioning disk on the CMP polishing pad 158 may bring "shorter" pedestals 102 into contact with the CMP polishing pad 158. In some embodiments, the heights of the different pedestals 102 may be adjusted during operation or during pauses in operation, as discussed further herein.

[0047] When the wafer 160 is brought into contact with the CMP polishing pad 158, and the two are rotated (and/or translated) relative to one another, the CMP polishing pad 158 may remove material from the wafer 160 and thereby polish the wafer 160. A slurry 162 may be disposed on the CMP polishing pad 158. When the wafer 160 is brought into contact with the CMP polishing pad 158, and the two are rotated (and/or translated) relative to one another, the slurry 162 may flow between the CMP polishing pad 158 and the wafer 160 to facilitate the polishing of the wafer 160. In some embodiments, a retainer ring holding the wafer 160 on the third arm 156 may include grooves to allow the slurry 162 to flow to the wafer 160 and away from the wafer 160 during polishing. The slurry 162 may also flow through grooves in the CMP polishing pad 158 formed by the CMP conditioning disk 100. The slurry 162 may take any suitable form known in the art (e.g., an oxide slurry). Control circuitry (not shown) included in the CMP system 150 may control the rate of flow of the slurry 162 from a slurry source (not shown) in some embodiments.

[0048] In some embodiments, the CMP conditioning disk 100 may be used to condition the CMP polishing pad 158 simultaneously with the CMP polishing pad 158 polishing the wafer 160. That is, the CMP conditioning disk 100 may be in contact with (and rotated relative to) the CMP polishing pad 158 at the same time that the wafer 160 may be in contact with (and rotated relative to) the CMP polishing pad 158. In other embodiments, the CMP polishing pad 158 may be conditioned by the CMP conditioning disk 100 before and/or after (but not simultaneously with) polishing the wafer 160 using the CMP polishing pad 158.

[0049] As noted above, CMP polishing pads 158 are often formed of elastomeric or other deformable materials, and thus may substantially reversibly deform under pressure from the pedestals 102 of a CMP conditioning disk 100. This deformation may enable the "shorter" pedestals 102 of a CMP conditioning disk 100 to reach the CMP polishing pad 158 under application of sufficient downforce. FIGS. 3A-3B are side views of a CMP conditioning disk 100 conditioning a CMP polishing pad 158 under different downforces, in accordance with various embodiments. The CMP conditioning disk 100 of FIG. 3 may take the form of any of the CMP conditioning disks 100 disclosed herein. FIG. 3A illustrates a conditioning arrangement in which sufficient downforce is applied by the CMP conditioning disk 100 on the CMP polishing pad 158 to bring the taller pedestals 102-2 into contact with the CMP polishing pad 158 (deforming the surface of the CMP polishing pad 158), without bringing the shorter pedestals 102-2 into contact with the CMP polishing pad 158. FIG. 3B illustrates a conditioning arrangement in which the downforce is increased relative to the arrangement of FIG. 3A, causing the taller pedestals 102-2 to further deform the surface of the CMP polishing pad 158 and bringing the shorter pedestals 102-1 into contact with the CMP polishing pad 158 (and causing their own deformation of the CMP polishing pad 158).

[0050] The arrangements of FIG. 3 thus represent two different regimes of operation of the CMP conditioning disk 100: one in which only the taller pedestals 102-2 are in contact with the CMP polishing pad 158 (and the shorter pedestals 102-1 are not), and one in which the shorter pedestals 102-1 and the taller pedestals 102-2 are both in contact with the CMP polishing pad 158. FIG. 3C is a view of an example relationship between pad cut rate (PCR) and downforce (DF) for the CMP polishing pad 158 of FIGS. 3A-3B, reflecting these different regimes of operation. Regime 161 represents the situation in which the taller pedestals 102-2 are in contact with the CMP polishing pad 158 (and the shorter pedestals 102-1 are not in contact with the CMP polishing pad 158), and regime 163 represents the situation in which the shorter pedestals 102-1 and the taller pedestals 102-2 are both in contact with the CMP polishing pad 158. Within regime 161, the PCR of the CMP conditioning disk 100 may increase substantially linearly as the downforce increases, with a slope 165. When the downforce reaches a value 171 at which the shorter pedestals 102-1 contact the CMP polishing pad 158, the PCR of the CMP conditioning disk 100 may jump to a new value (representing the beginning of the regime 163), and from there, the PCR of the CMP conditioning disk 100 may increase substantially linearly as the downforce increases, with a slope 169. The slope 165 may be a function of the SR of the pedestals 102-2, and the slope 169 may be a function of the SRs of the pedestals 102-1 and 102-2. Because of the increased contact area between the CMP conditioning disk 100 and the CMP polishing pad 158 in the regime 163, the slope 169 may be greater than the slope 165. The greater the SR of the shorter pedestals 102-1, the greater the slope 169. The amplitude of the discontinuity in the relationship between PCR and downforce at the transition point between the regime 161 and the regime 163 may also depend on the difference in SRs between the shorter pedestals 102-1 and the taller pedestals 102-2.

[0051] When a CMP conditioning disk 100 is to be used as illustrated in FIG. 3, the allowable range of differences in the heights 103 of the tall pedestals 102-2 and the short pedestals 102-1 may depend on the available range of downforces and the elasticity of the CMP polishing pad 158. In some embodiments, the maximum difference in the heights 103 of different pedestals 102 of a CMP conditioning disk 100 may be less than a thickness of the CMP polishing pad 158. For example, in some embodiments, the maximum difference in the heights 103 of different pedestals 102 of a CMP conditioning disk 100 may be less than 0.5 millimeters. [0052] In some embodiments, one or more of the pedestals 102 themselves may include an elastomeric material, and may reversibly deform during operation. Deformation of the tall pedestals 102-2 may enable the "shorter" pedestals 102 of a CMP conditioning disk 100 to reach the CMP polishing pad 158 under application of sufficient downforce (in addition to or separate from deformation of the CMP polishing pad 158, as discussed above with reference to FIG. 3). FIGS.4A-4B are side views of a CMP conditioning disk 100, with non-rigid pedestals, conditioning a CMP polishing pad 158 under different downforces, in accordance with various embodiments. The CMP conditioning disk 100 of FIG. 4 may take the form of any of the CMP conditioning disks 100 disclosed herein. FIG. 4A illustrates a conditioning arrangement in which sufficient downforce is applied by the CMP conditioning disk 100 on the CMP polishing pad 158 to bring the taller pedestals 102-2 into contact with the CMP polishing pad 158, without bringing the shorter pedestals 102-1 into contact with the CMP polishing pad 158. Although not shown in FIG. 4A (or FIG. 4B, or FIGS. 5-8) for ease of illustration, the arrangement of FIG.4A (or FIG.4B, or FIGS. 5-8) may also include deformation of the surface of the CMP polishing pad 158, as shown in FIG. 3A. FIG. 4B illustrates a conditioning arrangement in which the downforce is increased relative to the arrangement of FIG. 4A, causing the taller pedestals 102-2 themselves to deform so that their height 103-2 decreases and the shorter pedestals 102-1 are brought into contact with the CMP polishing pad 158. In some embodiments, the pedestals 102-1 may be made of the same non-rigid (e.g., elastomeric) material of the pedestals 102-2, while in other embodiments, the pedestals 102-1 may be made of a different non-rigid material or may be made of a rigid material. The arrangements of FIG. 4 thus represent two different regimes of operation of the CMP conditioning disk 100, similar to the regimes discussed above with reference to FIG. 3: one in which only the taller pedestals 102-2 are in contact with the CMP polishing pad 158 (and the shorter pedestals 102-1 are not), and one in which the shorter pedestals 102-1 and the taller pedestals 102-2 are both in contact with the CMP polishing pad 158. The CMP conditioning disk 100 of FIG. 4 thus achieves dynamic adjustment of the heights 103 of some or all of the pedestals 102 during operation.

[0053] In some embodiments, dynamic adjustment of the heights 103 of some or all of the pedestals 102 during operation may be achieved by including springs in the support 104, to which some or all of the pedestals 102 are coupled. In such an embodiment, the pedestals 102 themselves may be rigid, but the coupling of the pedestals 102 to the support may be achieved by a spring mechanism, and thus the height 103 of the pedestals 102 may be governed by the compression of the spring mechanism. As used herein, a "spring" may include any mechanical element that achieves spring-like behavior, including a coil spring, a portion of elastomeric material, or a flat spring. [0054] FIGS. 5A-5B are side section views of a CMP conditioning disk 100, having pedestals 102-2 on springs 117, conditioning a CMP polishing pad 158 under different downforces, in accordance with various embodiments. The support 104 may include the springs 117 mounted in a frame 125 so that the springs 117 may compress during use. The CMP conditioning disk 100 of FIG. 5 may take the form of any of the CMP conditioning disks 100 disclosed herein. FIG. 5A illustrates a conditioning arrangement in which sufficient downforce is applied by the CMP conditioning disk 100 on the CMP polishing pad 158 to bring the taller pedestals 102-2 into contact with the CMP polishing pad 158, without bringing the shorter pedestals 102-2 into contact with the CMP polishing pad 158. Although not shown in FIG. 5A for ease of illustration, the arrangement of FIG. 5A may also include deformation of the surface of the CMP polishing pad 158, as shown in FIG. 3A. FIG. 5B illustrates a conditioning arrangement in which the downforce is increased relative to the arrangement of FIG. 4A, causing the springs 117 to compress so that the height 103-2 of the taller pedestals 102-2 decreases and the shorter pedestals 102-1 are brought into contact with the CMP polishing pad 158. Although not shown in FIG. 5B for ease of illustration, the CMP polishing pad 158 may itself deform as a result of contact between the pedestals 102 and the CMP polishing pad 158, as shown in FIG. 3B. In some embodiments, the pedestals 102-1 may also be coupled to springs 117, while in other embodiments, the pedestals 102-1 may not be coupled to springs 117. The arrangements of FIG. 5 thus represent two different regimes of operation of the CMP conditioning disk 100, similar to the regimes discussed above with reference to FIGS. 3 and 4: one in which only the taller pedestals 102- 2 are in contact with the CMP polishing pad 158 (and the shorter pedestals 102-1 are not), and one in which the shorter pedestals 102-1 and the taller pedestals 102-2 are both in contact with the CMP polishing pad 158. The CMP conditioning disk 100 of FIG. 5 thus also achieves dynamic adjustment of the heights 103 of some or all of the pedestals 102 during operation.

[0055] In some embodiments, the heights 103 of the pedestals 102 may be mechanically adjusted to achieve desired values. This adjustment may be manual or automatic (e.g., under the control of the first arm 152), and may occur before the CMP conditioning disk 100 is mounted to the first arm 152, while the CMP conditioning disk 100 is mounted to the first arm 152 (but not while the CMP conditioning disk 100 is conditioning a CMP polishing pad 158), or while the CMP conditioning disk 100 is polishing a CMP polishing pad 158, in different embodiments.

[0056] For example, FIGS. 6A-6C are side section views of a CMP conditioning disk 100, having pedestals 102 with mechanically adjustable heights, conditioning a CMP polishing pad 158 under different adjustment conditions, in accordance with various embodiments. In the embodiment of FIG. 6, the support 104 includes a frame 125 and threaded elements 127 (e.g., bolts); the pedestals 102-2 are attached to the threaded elements 127, and rotation of the threaded elements 127 in corresponding threaded holes of the frame 125 moves the pedestals 102-1 "up" and "down," thus changing the heights 103-2 of the pedestals 102-2. In the embodiment illustrated in FIG. 6, different ones of the pedestals 102-2 are coupled to different ones of the threaded elements 127, and may be independently adjusted; in other embodiments, all of the pedestals 102-2 may be coupled to a single threaded element 127 and adjusted simultaneously together (e.g., by having all of the pedestals 102-2 coupled to a single plate, and the threaded element 127 coupled to that plate). In some embodiments, the threaded elements 127 may be adjusted manually (e.g., by a technician with a screwdriver) or automatically (e.g., by an appropriate driver included in the first arm 152). In some embodiments, the pedestals 102-1 may also be coupled to threaded elements 127, while in other embodiments, the pedestals 102-1 may not be coupled to threaded elements 127. Although not shown in FIG. 6 for ease of illustration, contact between the pedestals 102 and the CMP polishing pad 158 may result in deformation of the surface of the CMP polishing pad 158 (e.g., as shown in FIG. 3). The CMP conditioning disk 100 of FIG. 6 may take the form of any of the CMP conditioning disks 100 disclosed herein.

[0057] FIG. 6A illustrates an adjustment condition in which the threaded elements 127 are adjusted so that the height 103-1 of the pedestals 102-1 is less than the height 103-2 of the pedestals 102-2. When the CMP conditioning disk 100 is brought into initial contact with a CMP polishing pad 158, the pedestals 102-2 may contact the CMP polishing pad 158, while the pedestals 102-1 may not. If the height discrepancy between the pedestals 102-1 and 102-2 is small enough that increasing the downforce will eventually bring the pedestals 102-1 into contact with the CMP polishing pad 158, the conditioning arrangement of FIG. 6A may thus exhibit two different regimes of operation, as discussed above with reference to FIG. 3. If the height discrepancy between the pedestals 102-1 and 102-2 is so large that no appropriate amount of downforce may bring the pedestals 102-1 into contact with the CMP polishing pad 158, the adjustment condition of FIG. 6A may cause the CMP conditioning disk 100 to perform as if the pedestals 102-1 were not present.

[0058] FIG. 6B illustrates an adjustment condition in which the threaded elements 127 are adjusted so that the height 103-2 of the pedestals 102-2 is approximately the same as the height 103-1 of the pedestals 102-1. When the CMP conditioning disk 100 is brought into initial contact with a CMP polishing pad 158, the pedestals 102-1 and the pedestals 102-2 may contact the CMP polishing pad 158. When the CMP conditioning disk 100 is arranged as illustrated in FIG. 6B, increasing the downforce may result into a substantially linear increase in PCR with only one regime of operation (as discussed above with reference to FIG. 3).

[0059] FIG. 6C illustrates an adjustment condition in which the threaded elements 127 are adjusted so that the height 103-2 of the pedestals 102-2 is less than the height 103-1 of the pedestals 102-1. When the CMP conditioning disk 100 is brought into initial contact with a CMP polishing pad 158, the pedestals 102-1 may contact the CMP polishing pad 158, while the pedestals 102-2 may not. If the height discrepancy between the pedestals 102-1 and 102-2 is small enough that increasing the downforce will eventually bring the pedestals 102-2 into contact with the CMP polishing pad 158, the conditioning arrangement of FIG. 6C may thus exhibit two different regimes of operation, as discussed above with reference to FIG. 3. If the height discrepancy between the pedestals 102-1 and 102-2 is so large that no appropriate amount of downforce may bring the pedestals 102-2 into contact with the CMP polishing pad 158, the adjustment condition of FIG. 6C may cause the CMP conditioning disk 100 to perform as if the pedestals 102-2 were not present.

[0060] In some embodiments, other actuation mechanisms may be used to adjust the heights 103 of one or more of the pedestals 102 of a CMP conditioning disk 100. For example, FIGS. 7A-7C are side section views of a CMP conditioning disk 100, having pedestals 102 with electrically adjustable heights 103, conditioning a CMP polishing pad 158 under different adjustment conditions, in accordance with various embodiments. The CMP conditioning disk 100 of FIG. 7 may include a support 104 having a frame 125 and a plate 129. The pedestals 102-1 may be mounted to the frame 125, and the pedestals 102-2 may be mounted to the plate 129. The plate 129 may move up and down within the frame 125 to adjust the heights 103-1 of the pedestals 102-1.

[0061] FIG. 7 also illustrates a portion of the first arm 152, including a frame contact portion 133 and a plate contact portion 137. The frame contact portion 133 of the first arm 152 may contact the frame 125 of the CMP conditioning disk 100, and may apply a force to the frame 125 (e.g., a vacuum force) to secure the frame 125 to the first arm 152 and/or adjust the downforce exerted by the frame 125 (and thus the pedestals 102-2) on the CMP polishing pad 158. The plate contact portion 137 of the first arm 152 may contact the plate 129 of the CMP conditioning disk 100, and may apply a force to the plate 129 (e.g., a vacuum force) to secure the plate 129 to the first arm 152 and/or adjust the downforce exerted by the plate 129 (and thus the pedestals 102-1) on the CMP polishing pad 158.

[0062] In some embodiments, the frame 125 may be formed of a non-ferromagnetic material (e.g., a plastic, a ceramic, a non-ferromagnetic metal such as nickel or aluminum, or any combination thereof), the plate 129 may be formed of a ferromagnetic material (e.g., stainless steel), and the first arm 152 may include one or more electromagnetic coils 135. Providing a current through the electromagnetic coils 135 may cause the electromagnetic coils 135 to generate a magnetic field, to which the ferromagnetic plate 129 may respond by moving closer to or farther away from the electromagnetic coils 135 (depending upon the magnetic field generated by the electromagnetic coils 135). Thus, the heights 103-1 of the pedestals 102-1 of the CMP conditioning disk 100 of FIG. 7 may be adjusted by adjusting the current through the electromagnetic coils 135 as desired. This current may be adjusted while the CMP conditioning disk 100 is in use, and thus the heights 103-1 of the pedestals 102-1 may be adjusted dynamically during operation.

[0063] In particular, FIG. 7A illustrates an adjustment condition in which the electromagnetic coils 135 exert appropriate magnetic force on the plate 129 so that the height 103-1 of the pedestals 102- 1 is less than the height 103-2 of the pedestals 102-2. When the CMP conditioning disk 100 is brought into initial contact with a CMP polishing pad 158, the pedestals 102-2 may contact the CMP polishing pad 158, while the pedestals 102-1 may not. If the height discrepancy between the pedestals 102-1 and 102-2 is small enough that increasing the downforce will eventually bring the pedestals 102-1 into contact with the CMP polishing pad 158, the conditioning arrangement of FIG. 7A may thus exhibit two different regimes of operation, as discussed above with reference to FIG. 3. If the height discrepancy between the pedestals 102-1 and 102-2 is so large that no appropriate amount of downforce may bring the pedestals 102-1 into contact with the CMP polishing pad 158, the adjustment condition of FIG. 7A may cause the CMP conditioning disk 100 to perform as if the pedestals 102-1 were not present.

[0064] FIG. 7B illustrates an adjustment condition in which the electromagnetic coils 135 exert appropriate magnetic force on the plate 129 so that the height 103-2 of the pedestals 102-2 is approximately the same as the height 103-1 of the pedestals 102-1. When the CMP conditioning disk 100 is brought into initial contact with a CMP polishing pad 158, the pedestals 102-1 and the pedestals 102-2 may contact the CMP polishing pad 158. When the CMP conditioning disk 100 is arranged as illustrated in FIG. 7B, increasing the downforce may result into a substantially linear increase in PCR with only one regime of operation (as discussed above with reference to FIG. 3).

[0065] FIG. 7C illustrates an adjustment condition in which the electromagnetic coils 135 exert appropriate magnetic force on the plate 129 so that the height 103-2 of the pedestals 102-2 is less than the height 103-1 of the pedestals 102-1. When the CMP conditioning disk 100 is brought into initial contact with a CMP polishing pad 158, the pedestals 102-1 may contact the CMP polishing pad 158, while the pedestals 102-2 may not. If the height discrepancy between the pedestals 102-1 and 102-2 is small enough that increasing the downforce will eventually bring the pedestals 102-2 into contact with the CMP polishing pad 158, the conditioning arrangement of FIG. 7C may thus exhibit two different regimes of operation, as discussed above with reference to FIG. 3. If the height discrepancy between the pedestals 102-1 and 102-2 is so large that no appropriate amount of downforce may bring the pedestals 102-2 into contact with the CMP polishing pad 158, the adjustment condition of FIG. 7C may cause the CMP conditioning disk 100 to perform as if the pedestals 102-2 were not present. [0066] FIGS. 8A-8C are side section views of another CMP conditioning disk 100, having pedestals 102 with electrically adjustable heights 103, conditioning a CMP polishing pad 158 under different adjustment conditions, in accordance with various embodiments. Like the CMP conditioning disk 100 of FIG. 7, the CMP conditioning disk 100 of FIG. 8 may include a support 104 having a frame 125 and a plate 129. The pedestals 102-1 may be mounted to the frame 125, and the pedestals 102-2 may be mounted to the plate 129. The plate 129 may move up and down within the frame 125 to adjust the heights 103-1 of the pedestals 102-1. The frame 125 may include an inlet 139, which may provide a passage into an interior of the frame 125. FIG. 7 also illustrates a portion of the first arm 152, including a frame contact portion 133 and a plate pressure portion 141. The frame contact portion 133 of FIG. 8 may contact the frame 125 of the CMP conditioning disk 100, and may apply a force to the frame 125 (e.g., a vacuum force) to secure the frame 125 to the first arm 152 and/or adjust the downforce exerted by the frame 125 (and thus the pedestals 102-2) on the CMP polishing pad 158. The plate pressure portion 141 of the first arm 152 may contact the frame 125 and may exert a vacuum or other pneumatic pressure on the plate 129 through the inlet 139 (e.g., a vacuum force) to adjust the downforce exerted by the plate 129 (and thus the pedestals 102-1) on the CMP polishing pad 158. The interaction between the plate pressure portion 141, the inlet 139, and the plate 129 are discussed in further detail below.

[0067] As discussed above with reference to FIG. 7, in some embodiments, the frame 125 of FIG. 8 may be formed of a non-ferromagnetic material (e.g., a plastic or ceramic), the plate 129 may be formed of a ferromagnetic material, and the first arm 152 may include one or more electromagnetic coils 135. The heights 103-1 of the pedestals 102-1 of the CMP conditioning disk 100 of FIG. 8 may be adjusted by adjusting the magnetic field generated by the electromagnetic coils 135, as discussed above with reference to FIG. 7.

[0068] FIG. 8A illustrates an adjustment condition in which the electromagnetic coils 135 exert appropriate magnetic force on the plate 129 so that the height 103-1 of the pedestals 102-1 is less than the height 103-2 of the pedestals 102-2. In particular, in FIG. 8A, the plate 129 is adjusted so that the pedestals 102-1 are at their smallest height 103-1; in this position, the plate 129 may occlude the inlet 139. When the CMP conditioning disk 100 is brought into initial contact with a CMP polishing pad 158, the pedestals 102-2 may contact the CMP polishing pad 158, while the pedestals 102-1 may not. If the height discrepancy between the pedestals 102-1 and 102-2 is small enough that increasing the downforce will eventually bring the pedestals 102-1 into contact with the CMP polishing pad 158, the conditioning arrangement of FIG. 8A may thus exhibit two different regimes of operation, as discussed above with reference to FIG. 3. If the height discrepancy between the pedestals 102-1 and 102-2 is so large that no appropriate amount of downforce may bring the pedestals 102-1 into contact with the CMP polishing pad 158, the adjustment condition of FIG. 8A may cause the CMP conditioning disk 100 to perform as if the pedestals 102-1 were not present.

[0069] FIG. 8B illustrates an adjustment condition in which the electromagnetic coils 135 exert appropriate magnetic force on the plate 129 so that the height 103-2 of the pedestals 102-2 is approximately the same as the height 103-1 of the pedestals 102-1. In the position illustrated in FIG. 8B, the plate 129 no longer occludes the inlet 139, causing vacuum or other pneumatic pressure applied to the "back" face of the plate 129 by the plate pressure portion 141 to be translated down to the CMP polishing pad 158 by the pedestals 102-1. When the CMP conditioning disk 100 is brought into initial contact with a CMP polishing pad 158, the pedestals 102-1 and the pedestals 102-2 may contact the CMP polishing pad 158. When the CMP conditioning disk 100 is arranged as illustrated in FIG. 8B, increasing the downforce may result into a substantially linear increase in PCR with only one regime of operation (as discussed above with reference to FIG. 3).

[0070] FIG. 8C illustrates an adjustment condition in which the electromagnetic coils 135 exert appropriate magnetic force on the plate 129 so that the height 103-2 of the pedestals 102-2 is less than the height 103-1 of the pedestals 102-1. In the position illustrated in FIG. 8C, the plate 129 also does not occlude the inlet 139, causing vacuum or other pneumatic pressure applied to the "back" face of the plate 129 by the plate pressure portion 141 to be translated down to the CMP polishing pad by the pedestals 102-1. When the CMP conditioning disk 100 is brought into initial contact with a CMP polishing pad 158, the pedestals 102-1 may contact the CMP polishing pad 158, while the pedestals 102-2 may not. If the height discrepancy between the pedestals 102-1 and 102-2 is small enough that increasing the downforce will eventually bring the pedestals 102-2 into contact with the CMP polishing pad 158, the conditioning arrangement of FIG. 8C may thus exhibit two different regimes of operation, as discussed above with reference to FIG. 3. If the height discrepancy between the pedestals 102-1 and 102-2 is so large that no appropriate amount of downforce may bring the pedestals 102-2 into contact with the CMP polishing pad 158, the adjustment condition of FIG. 8C may cause the CMP conditioning disk 100 to perform as if the pedestals 102-2 were not present.

[0071] As noted above, the pedestals 102 of a CMP conditioning disk 100 may have different footprints and may be arranged in any suitable manner. FIGS. 9-10 are top views of example CMP conditioning disks 100 having multiple pedestals with different heights, in accordance with various embodiments. In particular, FIG. 9 depicts a CMP conditioning disk 100 having multiple pedestals 102 of different footprint shapes; some or all of the pedestals 102 of FIG. 9 may have different heights, as desired. The pedestal 102-1 may have a substantially trapezoidal footprint, the pedestals 102-2 may have circular footprints, and the pedestals 102-3 may have substantially trapezoidal footprints (like the pedestal 102-1). In some embodiments, the height of the pedestals 102-1 may differ from the height of the pedestals 102-2, and the height of the pedestals 102-3, and the height of the pedestals 102-2 may differ from the height of the pedestals 102-3. In some embodiments, the SR of the pedestals 102-1 may differ from the SR of the pedestals 102-2 and the SR of the pedestals 102-3, and the SR of the pedestals 102-2 may differ from the SR of the pedestals 102-3. In other embodiments, the height (and/or SR) of the pedestals 102-1 may be the same as the pedestals 102-2 (but may differ in shape), the height (and/or SR) of the pedestals 102-2 may be the same as the pedestals 102-3 (but may differ in shape), and/or the height (and/or the SR) of the pedestals 102-1 may be the same as the pedestals 102-3 (but may differ in shape). In some embodiments, abrasive material may be disposed only in the pedestals 102 of the embodiment of FIG. 9, and not on the rest of the support 104. Although five pedestals 102 are illustrated in FIG. 9, the CMP conditioning disk 100 may include fewer than or more than five pedestals, and may include pedestals having different combinations of shapes, as desired.

[0072] FIG. 10 depicts a CMP conditioning disk 100 having multiple elongated pedestals 102 in a regular arrangement. The pedestals 102-1 may have a different height (and, in some embodiments, SR) than the pedestals 102-2. Each of these pedestals 102 may have the shape of a vane or ridge, as shown. In some embodiments, abrasive material may be disposed only in the pedestals 102 of the embodiment of FIG. 10, and not on the rest of the support 104. Although eight pedestals 102 are illustrated in FIG. 10, the CMP conditioning disk 100 may include fewer than or more than eight pedestals, and may include pedestals having different combinations of shapes or in different arrangements (e.g., non-alternating), as desired.

[0073] The CMP conditioning disks 100 disclosed herein may be manufactured using any suitable techniques. FIGS. 11-13 illustrate various example stages in the manufacture of a CMP conditioning disk 100, in accordance with various embodiments.

[0074] FIG. 11 is a side cross-sectional view of a support 104. The support 104 may take the form of any of the embodiments disclosed herein.

[0075] FIG. 12 is a side cross-sectional view of the support 104 subsequent to providing one or more pedestals 102-1 on the support 104. The pedestal 102-1 may include a bulk portion 110-1 and an abrasive surface 112-1. In some embodiments, the bulk portion 110-1 and the support 104 may be integrally formed (e.g., by three-dimensional printing, molding, laser engraving, or otherwise machining the bulk portion 110-1 and the support 104 from a single block of material). In other embodiments, the bulk portion 110-1 may be secured to the support 104 using an adhesive, a mechanical fastener, a friction fit, or any other suitable technique. The support 104 and the bulk portion 110-1 may be formed of a same material or of different materials. The shape of the footprint of the bulk portion 110-1 may be any desired shape, such as circular (e.g., for a

substantially cylindrical, conical, or semispherical bulk portion 110-1), a polygon (e.g., a triangle, rectangle, or higher-order polygon), or any other desired shape. In some embodiments, different bulk portions 110-1 on a support 104 may have different shapes (e.g., different profiles or footprints). In some embodiments, the bulk portion 110-1 may be formed of a ceramic material, and may be attached to the support 104 with an adhesive.

[0076] The abrasive surface 112-1 may include any abrasive material suitable for conditioning the surface of the CMP polishing pad 158 (e.g., as discussed above with reference to FIG. 2). In some embodiments, the abrasive surface 112-1 may include a diamond film. In such embodiments, the diamond film may be formed by chemical vapor deposition (CVD), for example. In some

embodiments, the abrasive surface 112-1 may include any other suitable abrasive and may be secured to the bulk portion 110-1 by any suitable mechanism (e.g., adhesive).

[0077] FIG. 13 is a side cross-sectional view of a CMP conditioning disk 100 subsequent to providing one or more pedestals 102-2 on the support 104. The pedestal 102-2 may include a bulk portion 110-2 and an abrasive surface 112-2. The pedestal 102-2 may have a different height from the pedestal 102-1. The pedestal 102-2 may be formed in accordance with any of the techniques disclosed herein (e.g., the techniques discussed above with reference to the pedestal 102-1 of FIG. 12). In some embodiments, the SR of the abrasive surface 112-2 may be different from the SR of the abrasive surface 112-1.

[0078] FIG. 14 is a flow diagram of a method 800 of manufacturing a CMP conditioning disk, in accordance with various embodiments. Although various operations are arranged in particular order and illustrated once each, various ones of the operations may be repeated or performed in any suitable order.

[0079] At 802, a support may be provided. For example, the support 104 may be provided in accordance with any of the supports 104 disclosed herein.

[0080] At 804, a first pedestal may be coupled to the support of 802. For example, a pedestal 102-1 may be coupled to the support 104 in accordance with any of the pedestals 102 disclosed herein.

[0081] At 806, a second pedestal may be coupled to the support of 802. The height of the first pedestal may be different from the height of the second pedestal. For example, the height of a pedestal 102-1 may be different from a height of a pedestal 102-2, in accordance with any of the embodiments disclosed herein. In some embodiments, the SRs of the first and second pedestals may be different. [0082] FIG. 15 is a flow diagram of a method 900 of using a CMP conditioning disk, in accordance with various embodiments. Although various operations are arranged in particular order and illustrated once each, various ones of the operations may be repeated or performed in any suitable order.

[0083] At 902, a CMP conditioning disk may be brought into contact with a CMP polishing pad. The CMP conditioning disk may include a first pedestal having a first height and a second pedestal having a second height different from the first SR. For example, the CMP conditioning disk 100 may be brought into contact with the CMP polishing pad 158 of the CMP system 150 (FIG. 2). The CMP conditioning disk 100 may include a first pedestal 102-1 having a first height 103-1 and a second pedestal 102-2 having a second height 103-2 different from the first height 103-1. The CMP conditioning disk of 902 may take any suitable form, such as any of the forms disclosed herein.

[0084] At 904, the CMP conditioning disk may be rotated to polish the CMP polishing pad. For example, the CMP conditioning disk 100 and the CMP polishing pad 158 of the CMP system 150 may be rotated and/or translated relative to one another (e.g., using the first arm 152 and the second arm 154) to polish the CMP polishing pad 158.

[0085] Devices processed using the CMP systems and techniques disclosed herein (e.g., polished by CMP polishing pads conditioned by the CMP conditioning disks disclosed herein) may be included in any suitable electronic device. FIGS. 16-19 illustrate various examples of apparatuses that may include devices processed using the CMP systems and techniques disclosed herein.

[0086] FIGS. 16A-B are top views of a wafer 1000 and dies 1002 that may be processed using CMP systems and techniques in accordance with any of the embodiments disclosed herein. In particular, the wafer 1000 may be the wafer 160 polished in the CMP system 150 of FIG. 2. The wafer 1000 may be composed of semiconductor material and may include one or more dies 1002 having IC structures formed on a surface of the wafer 1000. Each of the dies 1002 may be a repeating unit of a semiconductor product that includes any suitable IC. After the fabrication of the semiconductor product is complete (e.g., after the semiconductor product is polished in accordance with any of the techniques disclosed herein), the wafer 1000 may undergo a singulation process in which each of the dies 1002 is separated from one another to provide discrete "chips" of the semiconductor product. In particular, devices processed using the CMP systems and techniques disclosed herein may take the form of the wafer 1000 (e.g., not singulated) or the form of the die 1002 (e.g., singulated). The die 1002 may include one or more transistors (e.g., some of the transistor(s) 1140 of FIG. 17, discussed below) and/or supporting circuitry to route electrical signals to the transistors, as well as any other IC components. In some embodiments, the wafer 1000 or the die 1002 may include a memory device (e.g., a static random access memory (SRAM) device), a logic device (e.g., an AND, OR, NAND, or NOR gate), or any other suitable circuit element. Multiple ones of these devices may be combined on a single die 1002. For example, a memory array formed by multiple memory devices may be formed on a same die 1002 as a processing device (e.g., the processing device 1302 of FIG. 19) or other logic that is configured to store information in the memory devices or execute instructions stored in the memory array.

[0087] FIG. 17 is a cross-sectional side view of an IC device 1100 that may be processed using CMP systems and techniques in accordance with any of the embodiments disclosed herein. The IC device 1100 may be formed on a substrate 1102 (e.g., the wafer 1000 of FIG. 16A) and may be included in a die (e.g., the die 1002 of FIG. 16B). The substrate 1102 may be a semiconductor substrate composed of semiconductor material systems including, for example, N-type or P-type materials systems. The substrate 1102 may include, for example, a crystalline substrate formed using a bulk silicon or a silicon-on-insulator substructure. In some embodiments, the semiconductor substrate 1102 may be formed using alternative materials, which may or may not be combined with silicon, that include but are not limited to germanium, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide, or gallium antimonide. Further materials classified as group ll-VI, lll-V, or IV may also be used to form the substrate 1102. Although a few examples of materials from which the substrate 1102 may be formed are described here, any material that may serve as a foundation for an IC device 1100 may be used. The substrate 1102 may be part of a singulated die (e.g., the dies 1002 of FIG. 16B) or a wafer (e.g., the wafer 1000 of FIG. 16A).

[0088] The IC device 1100 may include one or more device layers 1104 disposed on the substrate 1102. The device layer 1104 may include features of one or more transistors 1140 (e.g., metal oxide semiconductor field-effect transistors (MOSFETs)) formed on the substrate 1102. The device layer 1104 may include, for example, one or more source and/or drain (S/D) regions 1120, a gate 1122 to control current flow in the transistors 1140 between the S/D regions 1120, and one or more S/D contacts 1124 to route electrical signals to/from the S/D regions 1120. The transistors 1140 may include additional features not depicted for the sake of clarity, such as device isolation regions, gate contacts, and the like. The transistors 1140 are not limited to the type and configuration depicted in FIG. 17 and may include a wide variety of other types and configurations such as, for example, planar transistors, non-planar transistors, or a combination of both. Non-planar transistors may include FinFET transistors, such as double-gate transistors or tri-gate transistors, and wrap-around or all- around gate transistors, such as nanoribbon and nanowire transistors.

[0089] Each transistor 1140 may include a gate 1122 formed of at least two layers, a gate dielectric layer and a gate electrode layer. The gate dielectric layer may include one layer or a stack of layers. The one or more layers may include silicon oxide, silicon dioxide, and/or a high-k dielectric material. The high-k dielectric material may include elements such as hafnium, silicon, oxygen, titanium, tantalum, lanthanum, aluminum, zirconium, barium, strontium, yttrium, lead, scandium, niobium, and zinc. Examples of high-k materials that may be used in the gate dielectric layer include, but are not limited to, hafnium oxide, hafnium silicon oxide, lanthanum oxide, lanthanum aluminum oxide, zirconium oxide, zirconium silicon oxide, tantalum oxide, titanium oxide, barium strontium titanium oxide, barium titanium oxide, strontium titanium oxide, yttrium oxide, aluminum oxide, lead scandium tantalum oxide, and lead zinc niobate. In some embodiments, an annealing process may be carried out on the gate dielectric layer to improve its quality when a high-k material is used.

[0090] The gate electrode layer may be formed on the gate dielectric layer and may include at least one P-type work function metal or N-type work function metal, depending on whether the transistor 1140 is to be a PMOS or an NMOS transistor. In some implementations, the gate electrode layer may consist of a stack of two or more metal layers, where one or more metal layers are work function metal layers and at least one metal layer is a fill metal layer. Further metal layers may be included for other purposes, such as a barrier layer. For a PMOS transistor, metals that may be used for the gate electrode include, but are not limited to, ruthenium, palladium, platinum, cobalt, nickel, and conductive metal oxides (e.g., ruthenium oxide). For an NMOS transistor, metals that may be used for the gate electrode include, but are not limited to, hafnium, zirconium, titanium, tantalum, aluminum, alloys of these metals, and carbides of these metals (e.g., hafnium carbide, zirconium carbide, titanium carbide, tantalum carbide, and aluminum carbide).

[0091] In some embodiments, when viewed as a cross-section of the transistor 1140 along the source-channel-drain direction, the gate electrode may consist of a U-shaped structure that includes a bottom portion substantially parallel to the surface of the substrate and two sidewall portions that are substantially perpendicular to the top surface of the substrate. In other embodiments, at least one of the metal layers that form the gate electrode may simply be a planar layer that is

substantially parallel to the top surface of the substrate and does not include sidewall portions substantially perpendicular to the top surface of the substrate. In other embodiments, the gate electrode may consist of a combination of U-shaped structures and planar, non-U-shaped structures. For example, the gate electrode may consist of one or more U-shaped metal layers formed atop one or more planar, non-U-shaped layers.

[0092] In some embodiments, a pair of sidewall spacers may be formed on opposing sides of the gate stack to bracket the gate stack. The sidewall spacers may be formed from a material such as silicon nitride, silicon oxide, silicon carbide, silicon nitride doped with carbon, and silicon oxynitride. Processes for forming sidewall spacers are well known in the art and generally include deposition and etching process steps. In some embodiments, a plurality of spacer pairs may be used; for instance, two pairs, three pairs, or four pairs of sidewall spacers may be formed on opposing sides of the gate stack.

[0093] The S/D regions 1120 may be formed within the substrate 1102 adjacent to the gate 1122 of each transistor 1140. The S/D regions 1120 may be formed using either an implantation/diffusion process or an etching/deposition process, for example. In the former process, dopants such as boron, aluminum, antimony, phosphorous, or arsenic may be ion-implanted into the substrate 1102 to form the S/D regions 1120. An annealing process that activates the dopants and causes them to diffuse farther into the substrate 1102 may follow the ion implantation process. In the latter process, the substrate 1102 may first be etched to form recesses at the locations of the S/D regions 1120. An epitaxial deposition process may then be carried out to fill the recesses with material that is used to fabricate the S/D regions 1120. In some implementations, the S/D regions 1120 may be fabricated using a silicon alloy such as silicon germanium or silicon carbide. In some embodiments, the epitaxially deposited silicon alloy may be doped in situ with dopants such as boron, arsenic, or phosphorous. In some embodiments, the S/D regions 1120 may be formed using one or more alternate semiconductor materials such as germanium or a group lll-V material or alloy. In further embodiments, one or more layers of metal and/or metal alloys may be used to form the S/D regions 1120.

[0094] Electrical signals, such as power and/or input/output (I/O) signals, may be routed to and/or from the transistors 1140 of the device layer 1104 through one or more interconnect layers disposed on the device layer 1104 (illustrated in FIG. 17 as interconnect layers 1106-1110). For example, electrically conductive features of the device layer 1104 (e.g., the gate 1122 and the S/D contacts 1124) may be electrically coupled with the interconnect structures 1128 of the interconnect layers 1106-1110. The one or more interconnect layers 1106-1110 may form an interlayer dielectric (ILD) stack 1119 of the IC device 1100.

[0095] The interconnect structures 1128 may be arranged within the interconnect layers 1106-1110 to route electrical signals according to a wide variety of designs (in particular, the arrangement is not limited to the particular configuration of interconnect structures 1128 depicted in FIG. 17). Although a particular number of interconnect layers 1106-1110 is depicted in FIG. 17, embodiments of the present disclosure include IC devices having more or fewer interconnect layers than depicted.

[0096] In some embodiments, the interconnect structures 1128 may include trench structures 1128a (sometimes referred to as "lines") and/or via structures 1128b (sometimes referred to as "holes") filled with an electrically conductive material such as a metal. The trench structures 1128a may be arranged to route electrical signals in a direction of a plane that is substantially parallel with a surface of the substrate 1102 upon which the device layer 1104 is formed. For example, the trench structures 1128a may route electrical signals in a direction in and out of the page from the perspective of FIG. 17. The via structures 1128b may be arranged to route electrical signals in a direction of a plane that is substantially perpendicular to the surface of the substrate 1102 upon which the device layer 1104 is formed. In some embodiments, the via structures 1128b may electrically couple trench structures 1128a of different interconnect layers 1106-1110 together.

[0097] The interconnect layers 1106-1110 may include a dielectric material 1126 disposed between the interconnect structures 1128, as shown in FIG. 17. In some embodiments, the dielectric material 1126 disposed between the interconnect structures 1128 in different ones of the interconnect layers 1106-1110 may have different compositions; in other embodiments, the composition of the dielectric material 1126 between different interconnect layers 1106-1110 may be the same.

[0098] A first interconnect layer 1106 (referred to as Metal 1 or "Ml") may be formed directly on the device layer 1104. In some embodiments, the first interconnect layer 1106 may include trench structures 1128a and/or via structures 1128b, as shown. The trench structures 1128a of the first interconnect layer 1106 may be coupled with contacts (e.g., the S/D contacts 1124) of the device layer 1104.

[0099] A second interconnect layer 1108 (referred to as Metal 2 or "M2") may be formed directly on the first interconnect layer 1106. In some embodiments, the second interconnect layer 1108 may include via structures 1128b to couple the trench structures 1128a of the second interconnect layer 1108 with the trench structures 1128a of the first interconnect layer 1106. Although the trench structures 1128a and the via structures 1128b are structurally delineated with a line within each interconnect layer (e.g., within the second interconnect layer 1108) for the sake of clarity, the trench structures 1128a and the via structures 1128b may be structurally and/or materially contiguous (e.g., simultaneously filled during a dual-damascene process) in some embodiments.

[0100] A third interconnect layer 1110 (referred to as Metal 3 or "M3") (and additional interconnect layers, as desired) may be formed in succession on the second interconnect layer 1108 according to similar techniques and configurations described in connection with the second interconnect layer 1108 or the first interconnect layer 1106.

[0101] The IC device 1100 may include a solder resist material 1134 (e.g., polyimide or similar material) and one or more bond pads 1136 formed on the interconnect layers 1106-1110. The bond pads 1136 may be electrically coupled with the interconnect structures 1128 and configured to route the electrical signals of the transistor(s) 1140 to other external devices. For example, solder bonds may be formed on the one or more bond pads 1136 to mechanically and/or electrically couple a chip including the IC device 1100 with another component (e.g., a circuit board). The IC device 1100 may have other alternative configurations to route the electrical signals from the interconnect layers 1106-1110 than depicted in other embodiments. For example, the bond pads 1136 may be replaced by or may further include other analogous features (e.g., posts) that route the electrical signals to external components.

[0102] FIG. 18 is a cross-sectional side view of an IC device assembly 1200 that may include components processed using any of the CMP systems and techniques disclosed herein. The IC device assembly 1200 includes a number of components disposed on a circuit board 1202 (which may be, e.g., a motherboard). The IC device assembly 1200 includes components disposed on a first face 1240 of the circuit board 1202 and an opposing second face 1242 of the circuit board 1202; generally, components may be disposed on one or both faces 1240 and 1242.

[0103] In some embodiments, the circuit board 1202 may be a printed circuit board (PCB) including multiple metal layers separated from one another by layers of dielectric material and interconnected by electrically conductive vias. Any one or more of the metal layers may be formed in a desired circuit pattern to route electrical signals (optionally in conjunction with other metal layers) between the components coupled to the circuit board 1202. In other embodiments, the circuit board 1202 may be a non-PCB substrate.

[0104] The IC device assembly 1200 illustrated in FIG. 18 includes a package-on-interposer structure 1236 coupled to the first face 1240 of the circuit board 1202 by coupling components 1216. The coupling components 1216 may electrically and mechanically couple the package-on-interposer structure 1236 to the circuit board 1202, and may include solder balls (as shown in FIG. 18), male and female portions of a socket, an adhesive, an underfill material, and/or any other suitable electrical and/or mechanical coupling structure.

[0105] The package-on-interposer structure 1236 may include an IC package 1220 coupled to an interposer 1204 by coupling components 1218. The coupling components 1218 may take any suitable form for the application, such as the forms discussed above with reference to the coupling components 1216. Although a single IC package 1220 is shown in FIG. 18, multiple IC packages may be coupled to the interposer 1204; indeed, additional interposers may be coupled to the interposer 1204. The interposer 1204 may provide an intervening substrate used to bridge the circuit board 1202 and the IC package 1220. The IC package 1220 may be or include, for example, a die (the die 1002 of FIG. 16B), an IC device (e.g., the IC device 1100 of FIG. 17), or any other suitable component. Generally, the interposer 1204 may spread a connection to a wider pitch or reroute a connection to a different connection. For example, the interposer 1204 may couple the IC package 1220 (e.g., a die) to a ball grid array (BGA) of the coupling components 1216 for coupling to the circuit board 1202. In the embodiment illustrated in FIG. 18, the IC package 1220 and the circuit board 1202 are attached to opposing sides of the interposer 1204; in other embodiments, the IC package 1220 and the circuit board 1202 may be attached to a same side of the interposer 1204. In some embodiments, three or more components may be interconnected by way of the interposer 1204.

[0106] The interposer 1204 may be formed of an epoxy resin, a fiberglass-reinforced epoxy resin, a ceramic material, or a polymer material such as polyimide. In some implementations, the interposer 1204 may be formed of alternate rigid or flexible materials that may include the same materials described above for use in a semiconductor substrate, such as silicon, germanium, and other group lll-V and group IV materials. The interposer 1204 may include metal interconnects 1208 and vias 1210, including but not limited to through-silicon vias (TSVs) 1206. The interposer 1204 may further include embedded devices 1214, including both passive and active devices. Such devices may include, but are not limited to, capacitors, decoupling capacitors, resistors, inductors, fuses, diodes, transformers, sensors, electrostatic discharge (ESD) devices, and memory devices. More complex devices such as radio-frequency (RF) devices, power amplifiers, power management devices, antennas, arrays, sensors, and microelectromechanical systems (MEMS) devices may also be formed on the interposer 1204. The package-on-interposer structure 1236 may take the form of any of the package-on-interposer structures known in the art.

[0107] The IC device assembly 1200 may include an IC package 1224 coupled to the first face 1240 of the circuit board 1202 by coupling components 1222. The coupling components 1222 may take the form of any of the embodiments discussed above with reference to the coupling components 1216, and the IC package 1224 may take the form of any of the embodiments discussed above with reference to the IC package 1220.

[0108] The IC device assembly 1200 illustrated in FIG. 18 includes a package-on-package structure 1234 coupled to the second face 1242 of the circuit board 1202 by coupling components 1228. The package-on-package structure 1234 may include an IC package 1226 and an IC package 1232 coupled together by coupling components 1230 such that the IC package 1226 is disposed between the circuit board 1202 and the IC package 1232. The coupling components 1228 and 1230 may take the form of any of the embodiments of the coupling components 1216 discussed above, and the IC packages 1226 and 1232 may take the form of any of the embodiments of the IC package 1220 discussed above. The package-on-package structure 1234 may be configured in accordance with any of the package-on-package structures known in the art.

[0109] FIG. 19 is a block diagram of an example computing device 1300 that may include one or more components processed using the CMP systems and techniques disclosed herein. For example, any suitable ones of the components of the computing device 1300 may include a die (e.g., the die 1002 (FIG. 16B)) processed using the CMP systems and techniques disclosed herein. A number of components are illustrated in FIG. 19 as included in the computing device 1300, but any one or more of these components may be omitted or duplicated, as suitable for the application. In some embodiments, some or all of the components included in the computing device 1300 may be attached to one or more motherboards. In some embodiments, some or all of these components are fabricated onto a single system-on-a-chip (SoC) die.

[0110] Additionally, in various embodiments, the computing device 1300 may not include one or more of the components illustrated in FIG. 19, but the computing device 1300 may include interface circuitry for coupling to the one or more components. For example, the computing device 1300 may not include a display device 1306, but may include display device interface circuitry (e.g., a connector and driver circuitry) to which a display device 1306 may be coupled. In another set of examples, the computing device 1300 may not include an audio input device 1324 or an audio output device 1308, but may include audio input or output device interface circuitry (e.g., connectors and supporting circuitry) to which an audio input device 1324 or audio output device 1308 may be coupled.

[0111] The computing device 1300 may include a processing device 1302 (e.g., one or more processing devices). As used herein, the term "processing device" or "processor" may refer to any device or portion of a device that processes electronic data from registers and/or memory to transform that electronic data into other electronic data that may be stored in registers and/or memory. The processing device 1302 may include one or more digital signal processors (DSPs), application-specific integrated circuits (ASICs), central processing units (CPUs), graphics processing units (GPUs), cryptoprocessors (specialized processors that execute cryptographic algorithms within hardware), server processors, or any other suitable processing devices. The computing device 1300 may include a memory 1304, which may itself include one or more memory devices such as volatile memory (e.g., dynamic random access memory (DRAM)), nonvolatile memory (e.g., read-only memory (ROM)), flash memory, solid state memory, and/or a hard drive. In some embodiments, the memory 1304 may include memory that shares a die with the processing device 1302. This memory may be used as cache memory and may include embedded dynamic random access memory (eDRAM) or spin transfer torque magnetic random-access memory (STT-MRAM).

[0112] In some embodiments, the computing device 1300 may include a communication chip 1312 (e.g., one or more communication chips). For example, the communication chip 1312 may be configured for managing wireless communications for the transfer of data to and from the computing device 1300. The term "wireless" and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data through the use of modulated electromagnetic radiation through a nonsolid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they might not.

[0113] The communication chip 1312 may implement any of a number of wireless standards or protocols, including but not limited to Institute for Electrical and Electronic Engineers (IEEE) standards including Wi-Fi (IEEE 802.11 family), IEEE 802.16 standards (e.g., IEEE 802.16-2005 Amendment), Long-Term Evolution (LTE) project along with any amendments, updates, and/or revisions (e.g., advanced LTE project, ultra mobile broadband (UMB) project (also referred to as "3GPP2"), etc.). IEEE 802.16 compatible Broadband Wireless Access (BWA) networks are generally referred to as WiMAX networks, an acronym that stands for Worldwide Interoperability for

Microwave Access, which is a certification mark for products that pass conformity and

interoperability tests for the IEEE 802.16 standards. The communication chip 1312 may operate in accordance with a Global System for Mobile Communication (GSM), General Packet Radio Service (GPRS), Universal Mobile Telecommunications System (UMTS), High Speed Packet Access (HSPA), Evolved HSPA (E-HSPA), or LTE network. The communication chip 1312 may operate in accordance with Enhanced Data for GSM Evolution (EDGE), GSM EDGE Radio Access Network (GERAN), Universal Terrestrial Radio Access Network (UTRAN), or Evolved UTRAN (E-UTRAN). The communication chip 1312 may operate in accordance with Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Digital Enhanced Cordless Telecommunications (DECT), Evolution-Data Optimized (EV-DO), and derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 5G, and beyond. The communication chip 1312 may operate in accordance with other wireless protocols in other embodiments. The computing device 1300 may include an antenna 1322 to facilitate wireless communications and/or to receive other wireless communications (such as AM or FM radio transmissions).

[0114] In some embodiments, the communication chip 1312 may manage wired communications, such as electrical, optical, or any other suitable communication protocols (e.g., the Ethernet). As noted above, the communication chip 1312 may include multiple communication chips. For instance, a first communication chip 1312 may be dedicated to shorter-range wireless

communications such as Wi-Fi or Bluetooth, and a second communication chip 1312 may be dedicated to longer-range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, EV-DO, or others. In some embodiments, a first communication chip 1312 may be dedicated to wireless communications, and a second communication chip 1312 may be dedicated to wired communications.

[0115] The computing device 1300 may include battery/power circuitry 1314. The battery/power circuitry 1314 may include one or more energy storage devices (e.g., batteries or capacitors) and/or circuitry for coupling components of the computing device 1300 to an energy source separate from the computing device 1300 (e.g., AC line power).

[0116] The computing device 1300 may include a display device 1306 (or corresponding interface circuitry, as discussed above). The display device 1306 may include any visual indicators, such as a heads-up display, a computer monitor, a projector, a touchscreen display, a liquid crystal display (LCD), a light-emitting diode display, or a flat panel display, for example.

[0117] The computing device 1300 may include an audio output device 1308 (or corresponding interface circuitry, as discussed above). The audio output device 1308 may include any device that generates an audible indicator, such as speakers, headsets, or earbuds, for example.

[0118] The computing device 1300 may include an audio input device 1324 (or corresponding interface circuitry, as discussed above). The audio input device 1324 may include any device that generates a signal representative of a sound, such as microphones, microphone arrays, or digital instruments (e.g., instruments having a musical instrument digital interface (MIDI) output).

[0119] The computing device 1300 may include a global positioning system (GPS) device 1318 (or corresponding interface circuitry, as discussed above). The GPS device 1318 may be in

communication with a satellite-based system and may receive a location of the computing device 1300, as known in the art.

[0120] The computing device 1300 may include an other output device 1310 (or corresponding interface circuitry, as discussed above). Examples of the other output device 1310 may include an audio codec, a video codec, a printer, a wired or wireless transmitter for providing information to other devices, or an additional storage device.

[0121] The computing device 1300 may include an other input device 1320 (or corresponding interface circuitry, as discussed above). Examples of the other input device 1320 may include an accelerometer, a gyroscope, a compass, an image capture device, a keyboard, a cursor control device such as a mouse, a stylus, a touchpad, a bar code reader, a Quick Response (QR) code reader, any sensor, or a radio frequency identification (RFID) reader.

[0122] The computing device 1300 may have any desired form factor, such as a hand-held or mobile computing device (e.g., a cell phone, a smart phone, a mobile internet device, a music player, a tablet computer, a laptop computer, a netbook computer, an ultrabook computer, a personal digital assistant (PDA), an ultra-mobile personal computer, etc.), a desktop computing device, a server or other networked computing component, a printer, a scanner, a monitor, a set-top box, an entertainment control unit, a vehicle control unit, a digital camera, a digital video recorder, or a wearable computing device. In some embodiments, the computing device 1300 may be any other electronic device that processes data. [0123] The following paragraphs provide various examples of the embodiments disclosed herein.

[0124] Example 1 is a chemical mechanical polishing (CMP) conditioning disk, including: a support; a first pedestal extending from the support, the first pedestal having a first height; and a second pedestal extending from the support, the second pedestal having a second height different from the first height.

[0125] Example 2 may include the subject matter of Example 1, and may further specify that the first pedestal or the second pedestal includes an elastomeric material.

[0126] Example 3 may include the subject matter of Example 1, and may further specify that the first pedestal and the second pedestal are rigid.

[0127] Example 4 may include the subject matter of any of Examples 1-3, and may further specify that the first height or the second height is adjustable.

[0128] Example 5 may include the subject matter of any of Examples 1-4, and may further specify that the support includes a spring coupled to the first pedestal or the second pedestal.

[0129] Example 6 may include the subject matter of any of Examples 1-5, and may further specify that the support includes a threaded element coupled to the first pedestal or the second pedestal.

[0130] Example 7 may include the subject matter of any of Examples 1-6, and may further specify that the support includes a first plate from which the first pedestal extends and a second plate, different from the first plate, from which the second pedestal extends.

[0131] Example 8 may include the subject matter of Example 7, and may further specify that the first plate includes a ferromagnetic material and the second plate does not include a ferromagnetic material.

[0132] Example 9 may include the subject matter of Example 8, and may further specify that the support includes a vacuum pressure inlet, the first plate is adjustable to a first position in which the vacuum pressure inlet is obstructed, and the second plate is adjustable to a second position in which the vacuum pressure inlet is not obstructed.

[0133] Example 10 may include the subject matter of any of Examples 1-9, and may further specify that the first pedestal has a first surface roughness (SR), and the second pedestal has a second SR different from the first SR.

[0134] Example 11 may include the subject matter of Example 10, and may further specify that the first height is greater than the second height, and the first SR is less than the second SR.

[0135] Example 12 may include the subject matter of any of Examples 10-11, and may further specify that the first pedestal and the second pedestal each include diamond. [0136] Example 13 may include the subject matter of Example 12, and may further specify that the first pedestal and the second pedestal each include a diamond film formed by chemical vapor deposition (CVD).

[0137] Example 14 may include the subject matter of any of Examples 11-13, and may further specify that the first and second SRs are average roughnesses, and the second SR is at least 20% greater than the first SR.

[0138] Example 15 may include the subject matter of any of Examples 11-14, and may further specify that the first and second SRs are average roughnesses, and the second SR is at least 30% greater than the first SR.

[0139] Example 16 may include the subject matter of any of Examples 11-15, and may further specify that the CMP conditioning disk has a pad cut rate (PCR) between 1 and 15 microns/minute.

[0140] Example 17 may include the subject matter of any of Examples 1-16, and may further specify that the first and second pedestals have different footprints.

[0141] Example 18 may include the subject matter of any of Examples 1-16, and may further specify that the first pedestal has a circular footprint.

[0142] Example 19 may include the subject matter of any of Examples 1-16, and may further specify that the first pedestal is one of a plurality of first pedestals extending from the support and having the first height, and the second pedestal is one of a plurality of second pedestals extending from the support and having the second height.

[0143] Example 20 is a chemical mechanical polishing (CMP) system, including: a CMP conditioning disk disposed on a first arm, wherein the CMP conditioning disk includes a first pedestal having a first abrasive material, and a second pedestal having a second abrasive material, and wherein the first pedestal has a height greater than a height of the second pedestal; and a CMP polishing pad disposed on a second arm; wherein the first and second arms allow the CMP conditioning disk to come into contact with, and rotate relative to, the CMP polishing pad.

[0144] Example 21 may include the subject matter of Example 20, and may further specify that the first abrasive material has a surface roughness (SR) that is different than an SR of the second abrasive material.

[0145] Example 22 may include the subject matter of Example 21, and may further specify that the SR of the first abrasive material is less than an SR of the second abrasive material.

[0146] Example 23 may include the subject matter of any of Examples 20-22, and may further include a wafer disposed on a third arm, wherein the second and third arms allow the wafer to come into contact with, and rotate relative to, the CMP polishing pad. [0147] Example 24 may include the subject matter of any of Examples 20-23, and may further specify that the first arm is to independently control a downforce of the first pedestal and a downforce of the second pedestal.

[0148] Example 25 may include the subject matter of any of Examples 20-24, and may further specify that the first arm includes an electromagnetic coil to control the height of the first pedestal or the height of the second pedestal.

[0149] Example 26 is a method of manufacturing a chemical mechanical polishing (CMP) conditioning disk, including: providing a support; coupling a first pedestal to the support; and coupling a second pedestal to the support, wherein a height of an abrasive face of the first pedestal is different from a height of an abrasive face of the second pedestal.

[0150] Example 27 may include the subject matter of Example 26, and may further specify that the abrasive face of the first pedestal has a surface roughness (SR) different from an SR of the abrasive face of the second pedestal.

[0151] Example 28 may include the subject matter of any of Examples 26-27, and may further specify that coupling the first pedestal to the support includes securing the first pedestal to the support with an adhesive.

[0152] Example 29 may include the subject matter of any of Examples 26-28, and may further specify that coupling the first pedestal to the support includes securing the first pedestal to a first plate, coupling the second pedestal to the support includes securing the second pedestal to a second plate, and the method further includes coupling the first plate to the second plate so that the first plate and second plate are movable relative to each other.

[0153] Example 30 may include the subject matter of any of Examples 26-29, and may further specify that coupling the first pedestal to the support includes securing the first pedestal to the support with a threaded element or a spring.

[0154] Example 31 is a method, including: bringing a chemical mechanical polishing (CMP) conditioning disk into contact with a CMP polishing pad in a CMP system, wherein the CMP conditioning disk includes a first pedestal having a first height (SR), and a second pedestal having a second height different from the first height; and rotating the CMP conditioning disk to condition the CMP polishing pad.

[0155] Example 32 may include the subject matter of Example 31, and may further specify that the first height is greater than the second height, and the second pedestal is not in contact with the CMP polishing pad while rotating the CMP conditioning disk to condition the CMP polishing pad.

[0156] Example 33 may include the subject matter of Example 32, and may further include:

increasing the second height relative to the first height; and after increasing the second height, further rotating the CMP conditioning disk to condition the CMP polishing pad with both the first pedestal and the second pedestal in contact with the CMP polishing pad.

[0157] Example 34 may include the subject matter of Example 32, and may further include:

increasing the second height relative to the first height; and after increasing the second height, further rotating the CMP conditioning disk to condition the CMP polishing pad with the second pedestal in contact with the CMP polishing pad and the first pedestal not in contact with the CMP polishing pad.

[0158] Example 35 may include the subject matter of any of Examples 32-33, and may further specify that the second height is increased relative to the first height during rotation of the CMP conditioning disk.

[0159] Example 36 may include the subject matter of any of Examples 32-33, and may further specify that the second pedestal includes or is coupled to a ferromagnetic material, and increasing the second height relative to the first height includes applying electrical signals to an

electromagnetic coil.

[0160] Example 37 may include the subject matter of any of Examples 31-36, and may further include: stopping rotation of the CMP conditioning disk; after stopping rotation of the CMP conditioning disk, adjusting the first height or the second height; and after adjusting the first height or the second height, resuming rotation of the CMP conditioning disk to condition the CMP polishing pad.

[0161] Example 38 may include the subject matter of any of Examples 31-36, and may further specify that the CMP conditioning disk has a pad cut rate (PCR) between 5 and 10 microns/minute.

[0162] Example 39 may include the subject matter of any of Examples 31-36, and may further include translating the CMP conditioning disk, while rotating the CMP conditioning disk, to condition the CMP polishing pad.

[0163] Example 40 may include the subject matter of any of Examples 31-36, and may further include using the CMP polishing pad to polish a wafer.

Claims

Claims:

1. A chemical mechanical polishing (CMP) conditioning disk, comprising:

a support;

a first pedestal extending from the support, the first pedestal having a first height; and

a second pedestal extending from the support, the second pedestal having a second height different from the first height.

2. The CMP conditioning disk of claim 1, wherein the first pedestal or the second pedestal includes an elastomeric material.

3. The CMP conditioning disk of claim 1, wherein the first pedestal and the second pedestal are rigid.

4. The CMP conditioning disk of claim 1, wherein the first height or the second height is adjustable.

5. The CMP conditioning disk of claim 1, wherein the support includes a spring coupled to the first pedestal or the second pedestal.

6. The CMP conditioning disk of claim 1, wherein the support includes a threaded element coupled to the first pedestal or the second pedestal.

7. The CMP conditioning disk of claim 1, wherein the support includes a first plate from which the first pedestal extends and a second plate, different from the first plate, from which the second pedestal extends.

8. The CMP conditioning disk of claim 7, wherein the first plate includes a ferromagnetic material and the second plate does not include a ferromagnetic material.

9. The CMP conditioning disk of claim 8, wherein the support includes a vacuum pressure inlet, the first plate is adjustable to a first position in which the vacuum pressure inlet is obstructed, and the second plate is adjustable to a second position in which the vacuum pressure inlet is not obstructed.

10. The CMP conditioning disk of any of claims 1-9, wherein the first pedestal has a first surface roughness (SR), and the second pedestal has a second SR different from the first SR.

11. The CMP conditioning disk of claim 10, wherein the first height is greater than the second height, and the first SR is less than the second SR.

12. The CMP conditioning disk of claim 10, wherein the first pedestal and the second pedestal each include diamond.

13. The CMP conditioning disk of any of claims 1-10, wherein the first pedestal has a circular footprint.

14. The CMP conditioning disk of any of claims 1-10, wherein the first pedestal is one of a plurality of first pedestals extending from the support and having the first height, and the second pedestal is one of a plurality of second pedestals extending from the support and having the second height.

15. A chemical mechanical polishing (CMP) system, comprising:

a CMP conditioning disk disposed on a first arm, wherein the CMP conditioning disk includes a first pedestal having a first abrasive material, and a second pedestal having a second abrasive material, and wherein the first pedestal has a height greater than a height of the second pedestal; and a CMP polishing pad disposed on a second arm;

wherein the first and second arms allow the CMP conditioning disk to come into contact with, and rotate relative to, the CMP polishing pad.

16. The CMP system of claim 15, wherein the first arm is to independently control a downforce of the first pedestal and a downforce of the second pedestal.

17. The CMP system of claim 15, wherein the first arm includes an electromagnetic coil to control the height of the first pedestal or the height of the second pedestal.

18. A method of manufacturing a chemical mechanical polishing (CMP) conditioning disk, comprising:

providing a support;

coupling a first pedestal to the support; and

coupling a second pedestal to the support, wherein a height of an abrasive face of the first pedestal is different from a height of an abrasive face of the second pedestal.

19. The method of claim 18, wherein coupling the first pedestal to the support includes securing the first pedestal to a first plate, coupling the second pedestal to the support includes securing the second pedestal to a second plate, and the method further includes coupling the first plate to the second plate so that the first plate and second plate are movable relative to each other.

20. The method of claim 18, wherein coupling the first pedestal to the support includes securing the first pedestal to the support with a threaded element or a spring.

21. A method, comprising:

bringing a chemical mechanical polishing (CMP) conditioning disk into contact with a CMP polishing pad in a CMP system, wherein the CMP conditioning disk includes a first pedestal having a first height (SR), and a second pedestal having a second height different from the first height; and rotating the CMP conditioning disk to condition the CMP polishing pad.

22. The method of claim 21, wherein the first height is greater than the second height, and the second pedestal is not in contact with the CMP polishing pad while rotating the CMP conditioning disk to condition the CMP polishing pad.

23. The method of claim 22, further comprising:

24. The method of claim 22, further comprising:

increasing the second height relative to the first height; and

after increasing the second height, further rotating the CMP conditioning disk to condition the CMP polishing pad with the second pedestal in contact with the CMP polishing pad and the first pedestal not in contact with the CMP polishing pad.

25. The method of any of claims 21-23, wherein the second height is increased relative to the first height during rotation of the CMP conditioning disk.