WO2018178792A1 - Display system - Google Patents

Abstract

The purpose of the present invention is to provide a display device with low power consumption. Another purpose of the present invention is to optimize power consumption according to content that has different resolutions or frame frequencies. Provided is a display system comprising a display device and an image receiving device. If a video signal is input, such signal including image information with a frame frequency lower than the maximum frequency displayable by a display unit, the image receiving device controls a drive circuit of the display device so that the length of an idle period is equal to or less than the length of a writing period. Moreover, if a video signal is input, such signal including image information with an image resolution lower than the resolution of the display unit, the image receiving device controls the drive circuit of the display device so that a plurality of pixels are simultaneously written with the same data.

Description

Display system

One embodiment of the present invention relates to a display device. One embodiment of the present invention relates to a display system. One embodiment of the present invention relates to a driving method of a display device or a display system.

Note that one embodiment of the present invention is not limited to the above technical field. Technical fields of one embodiment of the present invention disclosed in this specification and the like include semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices, electronic devices, lighting devices, input devices, input / output devices, and driving methods thereof , Or a method for producing them, can be mentioned as an example.

Note that in this specification and the like, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics. A transistor, a semiconductor circuit, an arithmetic device, a memory device, or the like is one embodiment of a semiconductor device. In addition, an imaging device, an electro-optical device, a power generation device (including a thin film solar cell, an organic thin film solar cell, and the like) and an electronic device may include a semiconductor device.

In recent years, electronic devices having a high-resolution display device have been demanded. For example, in a television device for home use (also referred to as a television or a television receiver), the one with a resolution of full high-definition (pixel number 1920 × 1080) is mainstream, but 4K2K (pixel number 3840 × 2160). Development of high-resolution display devices such as 8K4K (number of pixels: 7680 × 4320) is underway. Non-Patent Document 1 reports an organic EL display having 8K4K resolution.

Display devices such as television devices having 8K4K resolution are being put into practical use. In addition, development of a transmission / reception method for 8K4K broadcasting is also in progress.

Here, it is desired that the display device supports not only 8K4K standard content but also content having a lower resolution and frame frequency than the 8K4K standard, such as 4K2K standard content and full high-definition content.

On the other hand, a display device with a high resolution has a problem that the power consumption of the display device becomes high regardless of the resolution or the frame frequency of the content even when displaying a content with a low resolution or a low frame frequency.

An object of one embodiment of the present invention is to provide a display device or an electronic device with low power consumption, or a driving method thereof. Another object is to realize an electronic device or a display device that supports content with different resolutions. Another object is to realize an electronic device or a display device that supports content with different frame frequencies. Another object is to provide a novel display device, a display system, or a driving method thereof.

Note that the description of these issues does not disturb the existence of other issues. Note that one embodiment of the present invention does not have to solve all of these problems. Issues other than these can be extracted from the description, drawings, claims, and the like.

One embodiment of the present invention is a display system including an image receiving device and a display device. The display device includes a drive circuit and a display unit. The driver circuit has a function of sequentially writing image data (also referred to as first image data) on the display portion. The image receiving device has a function of receiving a video signal and a function of controlling a driving circuit of the display device. The image receiving apparatus detects an image frame frequency of image information (also referred to as second image data) included in the video signal, and does not perform writing of image data and writing of image data according to the image frame frequency. It has a function of changing the suspension period.

In the above, it is preferable that the image receiving device has a function of controlling the drive circuit so as to cut off the supply of power to the drive circuit during the idle period.

In the above, the display section preferably includes a plurality of gate lines and a plurality of source lines intersecting with the gate lines. The image receiving device preferably has a function of detecting the image resolution of the image information. At this time, the image receiving apparatus has 2 ⁿ adjacent pixels when d = D / 2 ²ⁿ (n is an integer equal to or greater than 1) where d is the image resolution of the image information and D is the resolution of the display unit. It is preferable to have a function of controlling the driver circuit so that the same data is written to the source line and adjacent ²ⁿ gate lines are simultaneously selected.

In the above, the image receiving apparatus has f = F / 2 ^m (where m is 1) where f is the image frame frequency of the image information, F is the maximum frequency that can be displayed by the display unit, and 1 is the frame period. When satisfying the above integer), among the 2 ^m frame periods, the p frame (p is an integer of ^{1 to} 2 ^m−1 or less) is set as the writing period, and the remaining 2 ^m -p frames are set as the pause period. It preferably has a function of controlling the drive circuit. At this time, it is particularly preferable to satisfy p = 1.

In the above, the display unit preferably has a backlight device. At this time, the backlight device is preferably controlled by a drive circuit, and the image receiving device preferably has a function of controlling the drive circuit so that the backlight device blinks at a cycle twice the image frame frequency. Further, at this time, the image receiving device may have a function of controlling the driving circuit so that the period during which the backlight device is lit overlaps with the pause period and the period during which the backlight device is turned off overlaps with the writing period. preferable.

According to one embodiment of the present invention, a display device or an electronic device with low power consumption, or a driving method thereof can be provided. Alternatively, it is possible to realize an electronic device or a display device that supports content with different resolutions. Alternatively, it is possible to realize an electronic device or a display device that supports content with different frame frequencies. Alternatively, a novel display device, a display system, or a driving method thereof can be provided.

Note that the description of these effects does not disturb the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. Note that effects other than these can be extracted from the description, drawings, claims, and the like.

A configuration example of a display system. A configuration example of a display system. FIG. 9 illustrates a driving method of a display system. FIG. 9 illustrates a driving method of a display system. 2 shows a configuration example of a display device. 2 shows a configuration example of a display device. Example of processor configuration. The circuit diagram of a memory element. 2 shows a configuration example of a display device. 2 shows a configuration example of a display device. 2 shows a configuration example of a display device. 2 shows a configuration example of a display device. 2 shows a configuration example of a display device. 2 shows a configuration example of a display device. The block diagram and circuit diagram of a display apparatus. The block diagram of a display apparatus. Configuration example of an electronic device.

Embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below.

Note that in the structures of the invention described below, the same portions or portions having similar functions are denoted by the same reference numerals in different drawings, and description thereof is not repeated. In addition, in the case where the same function is indicated, the hatch pattern is the same, and there is a case where no reference numeral is given.

Note that in each drawing described in this specification, the size, the layer thickness, or the region of each component is exaggerated for clarity in some cases. Therefore, it is not necessarily limited to the scale.

In addition, ordinal numbers such as “first” and “second” in this specification and the like are attached to avoid confusion between components and are not limited numerically.

In this specification and the like, a display panel which is one embodiment of a display device has a function of displaying (outputting) an image or the like on a display surface. Therefore, the display panel is one mode of the output device.

In addition, in this specification and the like, a display panel substrate is attached with a connector such as FPC (Flexible Printed Circuit) or TCP (Tape Carrier Package), or the substrate is integrated with a COG (Chip On Glass) method. In some cases, is mounted a display panel module, a display module, or simply a display panel.

In addition, in this specification and the like, the touch sensor has a function of detecting that a detection target such as a finger or a stylus touches, presses, or approaches. Moreover, you may have the function to detect the positional information. Therefore, the touch sensor is an aspect of the input device. For example, the touch sensor can be configured to have one or more sensor elements.

In this specification and the like, a substrate having a touch sensor may be referred to as a touch sensor panel or simply a touch sensor. In addition, in this specification and the like, a touch sensor panel substrate, for example, a connector such as an FPC or TCP attached, or a substrate in which an IC is mounted by a COG method, a touch sensor panel module, a touch sensor It may be called a module, a sensor module, or simply a touch sensor.

Note that in this specification and the like, a touch panel which is one embodiment of a display device has a function of displaying (outputting) an image or the like on a display surface, and a detection target such as a finger or a stylus touches, presses, or approaches the display surface. And a function as a touch sensor for detecting the above. Accordingly, the touch panel is an embodiment of an input / output device.

The touch panel can also be called, for example, a display panel with a touch sensor (or display device) or a display panel with a touch sensor function (or display device).

The touch panel may be configured to include a display panel and a touch sensor panel. Alternatively, the display panel may have a function as a touch sensor inside or on the surface.

In this specification and the like, a touch panel substrate having a connector such as an FPC or TCP attached, or a substrate having an IC mounted on the substrate by a COG method, a touch panel module, a display module, or simply a touch panel And so on.

(Embodiment 1)
In this embodiment, structural examples and operation methods of a display system that can be applied to the electronic device of one embodiment of the present invention will be described. Here, an image display device that receives a video signal and displays a video, such as a television device or a monitor device, will be described as an example of the electronic device.

The display system of one embodiment of the present invention includes an image receiving device and a display device. The image receiving device includes a receiving device, a decoder, an arithmetic device (processor), and the like. The display device includes a display unit and a drive circuit.

The image receiving device has a function of driving a drive circuit. The image receiving device has a function of receiving a video signal and transmitting image data to a driving circuit. The driver circuit has a function of writing image data (also referred to as first image data) in the display portion in accordance with a command from the image receiving device.

The driving circuit can be configured to include, for example, a timing controller, a source driving circuit, and a gate driving circuit. The timing controller can drive a source drive circuit by supplying a signal including image data and a timing signal, and a gate drive circuit by supplying a timing signal. In the case where the display portion includes a backlight, the timing controller may have a function of outputting a signal (timing signal or the like) for driving the backlight.

The display unit has a plurality of pixels. Each pixel is electrically connected to a source line and a gate line. A signal output from the source driver circuit is applied to the source line, and a signal output from the gate driver circuit is applied to the gate line.

The display section preferably has a high resolution. For example, 4K2K resolution or higher, typically 8K4K resolution is preferable. Here, the resolution refers to the number of effective pixels that the display unit has.

Here, the image receiving apparatus has a resolution of image information (also referred to as second image data) included in the input video signal (hereinafter also referred to as image resolution to distinguish it from the resolution of the display unit), and a frame frequency ( Hereinafter, in order to distinguish from the frame frequency displayed by the display unit, it is also possible to detect the image frame frequency. The image receiving apparatus determines the length of the writing operation period (hereinafter also referred to as writing period) and the length of the period during which writing is not performed (also referred to as pause period) according to the image resolution and the image frame frequency. Can be changed.

For example, when a video signal including image information having a frame frequency lower than the maximum frequency that can be displayed by the display unit is input, the image receiving device is driven so that the length of the pause period is equal to or longer than the length of the writing period. The circuit can be controlled.

More specifically, when the image frame frequency is f, the maximum frequency that can be displayed by the display unit is F, and the one frame period is 1 / F, f = F / 2 ^m (m is an integer of 1 or more) is satisfied. In this case, of the 2 ^m frame periods, the image receiving apparatus sets the driving circuit so that the p frame (p is an integer of ^{1 to} 2 ^m−1 ) is the writing period and the remaining 2 ^m -p frames are the rest period. Can be controlled.

More preferably, the image is written in the first one frame period (1 / F second) within the period for displaying one image, and the remaining 2 ^m −1 frame period ((2 ^m −1) / F seconds). ) Is preferably a rest period. As a result, the longest pause period can be obtained, so that power consumption can be extremely reduced.

In addition, when a video signal containing image information with an image resolution lower than the resolution of the display unit is input, the same data is written to a plurality of pixels simultaneously, so that the image is displayed on the display unit without distortion. can do.

For example, assuming that the image resolution is d and the resolution of the display unit is D, when d = D / 2 ²ⁿ (n is an integer equal to or greater than 1), the image receiving device is the same as 2 ⁿ adjacent source lines. The image receiving device can control the driving circuit so that data is written and adjacent 2 ⁿ gate lines are simultaneously selected. Here, the image resolution d and the resolution D represent the total number of effective pixels, that is, the product of the horizontal resolution and the vertical resolution.

Alternatively, when the vertical resolution or horizontal resolution of the image satisfies 1/2 ^{n ′} (n ′ is an integer equal to or greater than 1) with respect to the vertical resolution or horizontal resolution of the display unit, the image receiving device is adjacent to 2 ^{n ′.} The image receiving device can control the driving circuit so that the same data is written to the two source lines and adjacent 2 ^{n ′} gate lines are simultaneously selected.

Further, it is preferable that the image receiving device cuts off the power supply to the drive circuit during the idle period. As a result, power consumption during the suspension period can be significantly reduced.

By applying such a display system, it is possible to realize an image display device capable of viewing content with optimum power consumption according to the image resolution and frame frequency of the content.

Hereinafter, a more specific configuration example will be described with reference to the drawings.

[Display system configuration example]
FIG. 1 shows a block diagram of the display system 10.

In the drawings attached to the present specification, the components are classified by function and the block diagram is shown as an independent block. However, it is difficult to completely separate actual components by function. A component may be involved in multiple functions.

The display system 10 includes a display device 20 and an image receiving device 30.

The display device 20 includes a display unit 21, a source drive circuit 22, a gate drive circuit 23, and a timing controller 24. Here, the source driving circuit 22, the gate driving circuit 23, and the timing controller 24 may be collectively referred to as a driving circuit.

The image receiving device 30 has a function of generating a signal to be output to the display device 20 based on a video signal input from the outside. The image receiving device 30 includes a processing unit 31, a decoder 32, a front end unit 33, a receiving unit 35, an interface 36, a control circuit 37, and the like. The front end unit 33 is connected to the receiving unit 34.

[Display device]
The display unit 21 has a plurality of pixels arranged in a matrix. The pixel has at least one display element. Each pixel is electrically connected to one source line (also referred to as a video signal line or a signal line) and one gate line (also referred to as a scanning line). A signal for selecting a pixel is supplied to the gate line by the gate driving circuit 23. The source line is supplied with a video signal supplied to the pixel by the source driving circuit 22.

The timing controller 24 has a function of generating a timing signal to be supplied to each of the source driving circuit 22 and the gate driving circuit 23 from a signal supplied from the image receiving device 30. The timing controller 24 has a function of generating a video signal to be output to the source driving circuit 22 based on a signal supplied from the image receiving device 30.

The timing controller 24 preferably has a function of cutting off power supply to the source drive circuit 22, the gate drive circuit 23, and itself based on a signal supplied from the image receiving device 30. Alternatively, it may have a function of performing so-called clock gating, which stops output of timing signals to the source driver circuit 22 and the gate driver circuit 23 based on the signal.

The display unit 21 preferably has an extremely high resolution. The display unit 21 preferably has a higher resolution than that of full high-definition, for example, a high resolution of 4K2K, 8K4K, or higher.

Each pixel of the display unit 21 has a display element and has a function of displaying a predetermined gradation. Then, the gradation of the pixel is controlled by signals output from the source driving circuit 22 and the gate driving circuit 23, and a predetermined image is displayed on the display unit 21.

Examples of the display element provided in the pixel include a liquid crystal element and a light emitting element. As the liquid crystal element, a transmissive liquid crystal element, a reflective liquid crystal element, a transflective liquid crystal element, or the like can be used. Examples of light-emitting elements include self-luminous light-emitting elements such as OLEDs (Organic Light Emitting Diodes), LEDs (Light Emitting Diodes), QLEDs (Quantum-Dot Light Emitting Diodes), and semiconductor lasers. In addition, as a display element, a shutter type MEMS (Micro Electro Mechanical Systems) element, an optical interference type MEMS element, a microcapsule type, an electrophoretic method, an electrowetting method, an electropowder fluid (registered trademark) method, etc. are applied. A display element or the like can also be used.

Note that the number of pixels provided in the display unit 21 can be freely set, but it is preferable that the number is large. For example, when 4K2K video is displayed on the display unit 21, it is preferable to provide 3840 × 2160 pixels or more, or 4096 × 2160 pixels or more. In the case of displaying 8K4K video, it is preferable to provide 7680 × 4320 or more pixels. Further, the display unit 21 can be provided with more pixels.

[Image receiving device]
The front end unit 33 has a function of receiving a signal input from the outside and appropriately performing signal processing. For example, a broadcast signal encoded and modulated by a predetermined method is input to the front end unit 33. The front end unit 33 can have a function of performing demodulation, analog-digital conversion, and the like of the received video signal. Further, the front end unit 33 may have a function of performing error correction. Data received by the front end unit 33 and subjected to signal processing is output to the decoder 32.

The decoder 32 has a function of decoding the encoded signal. When the image information included in the video signal input to the front end unit 33 is compressed, the decoder 32 decompresses the image information. For example, the decoder 32 can have functions for performing entropy decoding, inverse quantization, inverse orthogonal transform such as inverse discrete cosine transform (IDCT) and inverse discrete sine transform (IDST), intraframe prediction, and interframe prediction. .

Note that the encoding standard for 8K4K television broadcasting is H.264. H.265 / MPEG-H High Efficiency Video Coding (hereinafter referred to as HEVC) is employed. When the image information included in the broadcast signal input to the front end unit 33 is encoded according to HEVC, the decoder 32 performs decoding (decoding) according to HEVC.

Image data is generated by the decoding process by the decoder 32 and output to the processing unit 31.

The processing unit 31 has a function of detecting the image resolution d and the image frame frequency f from the image data input from the decoder 32. Further, a control signal and image data to be output to the timing controller 24 are generated according to the value of the image resolution d and the value of the image frame frequency f.

Further, the processing unit 31 can output to the timing controller 24 a signal for cutting off the supply of power to the timing controller 24, the source driving circuit 22 and the gate driving circuit 23 during the suspension period.

Note that the processing unit 31 may have a function of interrupting the supply of power to one or more circuit blocks in the processing unit 31 during the suspension period.

The processing unit 31 has a function as a processor capable of performing arithmetic processing. For example, a configuration including an arithmetic circuit, a control circuit, a memory circuit, various interfaces, and the like can be used.

As the processing unit 31, for example, a processor such as a CPU (Central Processing Unit), a DSP (Digital Signal Processor), or a GPU (Graphics Processing Unit) can be used. The processing unit 31 may have a configuration in which the processor is realized by a PLD (Programmable Logic Device) such as an FPGA (Field Programmable Gate Array) or an FPAA (Field Programmable Analog Array).

Particularly, it is preferable to use a GPU for the processing unit 31 because the processing speed can be remarkably increased when executing image processing as compared with the case where a CPU or the like is used.

The processor performs various data processing and program control by interpreting and executing instructions from various programs. The program that can be executed by the processor may be stored in a memory area of the processor, or may be stored in a storage device provided separately.

The processing unit 31 preferably has a function as an image processing engine having a function of executing image processing based on an input video signal.

Examples of image processing that can be executed by the processing unit 31 include noise removal processing, gradation conversion processing, color tone correction processing, and luminance correction processing. Examples of the color tone correction process and the brightness correction process include gamma correction.

The processing unit 31 may have a function of executing processing such as filter processing, edge enhancement processing, inter-pixel interpolation processing accompanying resolution up-conversion, or inter-frame interpolation processing accompanying frame frequency up-conversion. Good.

For example, as noise removal processing, various noises such as mosquito noise that occurs around the outline of characters, block noise that occurs in high-speed moving images, random noise that causes flickering, and dot noise that occurs due to resolution up-conversion are removed.

The gradation conversion process is a process for converting the gradation of the image into a gradation corresponding to the output characteristics of the display unit 21. For example, when the number of gradations is increased, a process for smoothing the histogram can be performed by interpolating and assigning gradation values corresponding to each pixel to an image input with a small number of gradations. Further, a high dynamic range (HDR) process for expanding the dynamic range is also included in the gradation conversion process.

Also, inter-pixel interpolation processing interpolates data that does not exist when the resolution is up-converted. For example, referring to pixels around the target pixel, the data is interpolated so as to display the intermediate colors. For example, when the resolution of the input video signal is 2K (1920 × 1080), the resolution can be up-converted to 4K (4840 (3840 × 2160), 4 times, 8K (7680 × 4320), or 16 times. .

Also, the color tone correction process is a process for correcting the color tone of the image. The brightness correction process is a process for correcting the brightness (brightness contrast) of the image. For example, the type, brightness, or color purity of the illumination arranged in the space where the electronic device having the display system 10 is provided is detected, and the brightness and color tone of the image displayed on the display unit 21 are optimized accordingly. To correct. Or, it has a function to compare the image to be displayed with the images of various scenes in the image list stored in advance, and to correct the image displayed with brightness and color tone suitable for the image of the closest scene. May be.

The processing unit 31 may have a function of performing inter-frame interpolation processing. The inter-frame interpolation process is a process for generating an image of a frame (interpolation frame) that does not originally exist when the frame frequency of a video to be displayed is increased. For example, an interpolation frame image to be inserted between two images is generated from the difference between two images. Alternatively, an image of a plurality of interpolation frames can be generated between two images. For example, when the frame frequency of the input video signal is 60 Hz, by generating a plurality of interpolated frames, the frame frequency of the video signal output to the timing controller is doubled 120 Hz, or quadrupled 240 Hz, Or it can be increased to 8 times 480 Hz or the like.

Further, a neural network may be used for these image processing. For example, by using a neural network, feature extraction is performed from image data included in the video, and the processing unit 31 can select an optimal correction method according to the extracted feature, or can select parameters used for correction. . Alternatively, the neural network itself may have a function of performing image processing. That is, the image data that has been subjected to the image processing may be output by inputting the image data before the image processing to the neural network.

The receiving unit 35 has a function of receiving data or control signals input from the outside. For inputting data or control signals to the receiving unit 35, a remote controller, a portable information terminal (such as a smartphone or a tablet), an operation button provided on the display device 20, or the like can be used.

FIG. 1 shows an example in which data or a control signal is transmitted by the remote controller 41.

The interface 36 has a function of appropriately performing signal processing on the data or the control signal received by the receiving unit 35 and outputting it to the control circuit 37.

The control circuit 37 has a function of supplying a control signal to each circuit included in the image receiving device 30. For example, the control circuit 37 has a function of supplying a control signal to the processing unit 31. The control by the control circuit 37 can be performed based on the control signal received by the receiving unit 35.

2 is different from the display system 10 of FIG. 1 in that the display device 20 has a backlight 25. The display system 10A shown in FIG.

Here, when a transmissive or transflective liquid crystal display device is used for the display unit 21, the backlight 25 is provided on the back surface of the display unit 21 and can emit light to the display surface side. When a display device that displays an image using reflection of external light, such as a reflective liquid crystal display device, is applied to the display unit 21, the front light is used instead of the backlight 25. It can be set as the structure arrange | positioned at the display surface side.

Here, the timing controller 24 preferably has a function of generating and outputting a timing signal for driving the backlight 25. Further, not only the timing signal but also a function of generating and outputting a signal including luminance information of the backlight 25 may be provided. Further, when the backlight 25 is driven by local dimming, it may have a function of generating and outputting a signal to be supplied to a driving circuit included in the backlight 25.

It is preferable that the backlight 25 can be driven at a frequency higher than the maximum frame frequency that the display unit 21 can drive. For example, it is preferable to have a light source that can be driven at a frequency of 120 Hz or higher, 240 Hz or higher, or 480 Hz or higher.

The above is the description of the configuration example of the display system.

[Example of driving method]
Below, the example of the drive method of the display system 10 is demonstrated.

The display system 10 has a function of changing the driving method of the display device 20 according to the frame frequency of the image information included in the input video signal.

FIG. 3 shows a timing chart according to the driving method of the display system 10.

Here, a case where the maximum frame frequency F that can be driven by the display device 20 is 240 Hz will be described. At this time, as shown in FIG. 3, one frame (F) period is 1/240 seconds. FIG. 3 shows a timing chart of 8 frame periods (periods from 1F to 8F).

In FIG. 3, when the image frame frequency f is 240 Hz, which is the same as the frame frequency F, when the image frame frequency f is 120 Hz which is half of the frame frequency F, and when the image frame frequency f is 1/4 of the frame frequency F. The case where it is 60 Hz which is is shown.

FIG. 3 shows a writing period (Write) and a rest period (Break).

First, when the image frame frequency f matches the frame frequency F, that is, when the image frame frequency f is 240 Hz, one frame period corresponds to a period for displaying one image. At this time, each frame period is a writing period.

Next, when the image frame frequency f is 120 Hz, which is half of the frame frequency F, two frame periods correspond to a period for displaying one image. At this time, of the two frame periods, the first half frame can be set as a writing period, and the latter half frame period can be set as a pause period.

Further, when the image frame frequency f is 60 Hz, which is a quarter of the frame frequency F, 4 frame periods correspond to a period for displaying one image. At this time, of the four frame periods, the first one frame period can be set as the writing period, and the remaining three frame periods can be set as the pause period.

Generally speaking, when the image frame frequency f satisfies 1/2 ^{m of the} frame frequency F (m is an integer of 1 or more), the 2 ^m frame period corresponds to a period for displaying one image. In this case, among the 2 ^m-frame period, (the p 1 or 2 ^m-1 an integer) the first p-frame and the write period, it is preferable to set the remaining 2 ^m -p frame pause.

In particular, it is preferable that p is 1. That is, it is preferable to set the first 1 frame out of 2 ^m frame periods as a writing period and the remaining 2 ^m −1 frames as a pause period.

The writing operation itself can be made the same regardless of the size of the image frame frequency f by completing the writing period within one frame regardless of the value of the image frame frequency f. Therefore, the above driving method can be realized without adding a circuit or the like for separately generating a timing signal (clock signal or the like) used for the write operation.

By using such a driving method, the power consumption can be reduced as the image frame frequency f is smaller.

Here, it is preferable to cut off the power supply to at least one of the source driving circuit 22, the gate driving circuit 23, and the timing controller 24 during the suspension period. In particular, it is preferable to cut off the power supply to all of them. Thereby, the power consumption in an idle period can be reduced more.

Furthermore, it is preferable to cut off at least part of the power supply to the processing unit 31 and the decoder 32 in the image receiving device 30 during the suspension period. Thereby, the power consumption of not only the display device 20 but also the image receiving device 30 can be reduced during the suspension period.

FIG. 4 shows an example in which an image is displayed at a frame frequency higher than the maximum frame frequency F of the display device in conjunction with the backlight 25. FIG. 4 shows a timing chart of 6 frame periods (periods from 1F to 6F). FIG. 4 shows a writing period (Write) and a pause period (Break).

The backlight 25 can be blinked at a frequency more than twice the maximum frame frequency F of the display device 20. In FIG. 4, a period during which the backlight 25 is lit (lighting period) is indicated as on, and a period during which the backlight 25 is extinguished (off period) is indicated as off. Further, hereinafter, the backlight driving frequency is assumed to be the frequency fb.

First, when the image frame frequency f matches the frame frequency F, that is, when the image frame frequency f is 240 Hz, the image receiving device 30 is driven so that the backlight 25 is driven at a frequency fb of 480 Hz, which is twice that. The timing controller 24 is controlled.

At this time, the image displayed on the display unit 21 is pseudo-displayed at 480 Hz. Therefore, it is suitable for displaying a fast moving object.

In particular, it is preferable to drive so that the lighting period of the backlight and the extinguishing period are mixed in one frame period. In this manner, by providing a period during which the backlight is turned off between one image and the next image, an afterimage when displaying a moving image becomes difficult to be visually recognized, and the display quality can be improved.

Further, as shown in FIG. 4, it is preferable that the first half of one frame period is a light-off period and the second half is a light-on period. In particular, when a liquid crystal display device is used for the display unit 21, if the backlight is lit during a period until the liquid crystal alignment is stabilized, a correct gradation may not be expressed in the period. Therefore, display quality can be improved by superimposing the first half of the writing period and the backlight extinguishing period.

Next, when the image frame frequency f is 120 Hz, which is half the frame frequency F, the backlight drive frequency fb can be set to 240 Hz.

At this time, it is preferable to overlap the writing period of the display unit 21 and the extinguishing period of the backlight 25 as shown in FIG. Furthermore, it is preferable to overlap the pause period of the display unit 21 and the lighting period of the backlight 25. Thereby, display quality can be improved.

Next, when the image frame frequency f is 60 Hz, which is 1/4 of the frame frequency F, the backlight drive frequency fb can be set to 120 Hz.

At this time, as shown in FIG. 4, the turn-off period of the backlight 25 is set to a period of one frame so as to overlap with the writing period of the display unit 21, and the lighting period is overlapped with the rest period of the remaining three frames. In addition, it is preferable to drive the backlight 25. Accordingly, since the lighting period is longer than the above, brighter display can be performed.

Here, it is preferable that the drive frequency fb of the backlight 25 is an integer multiple of the frame frequency F of the display device 20. Accordingly, it becomes easy for the timing controller 24 to synchronize the timing signal for driving the display unit 21 and the timing signal for driving the backlight 25. In addition, the circuit configuration of the timing controller 24 can be simplified.

This completes the description of the display system driving method.

[Configuration example of display device]
Below, the structural example of the display apparatus 20 which can be used suitably for the display system 10 is demonstrated.

FIG. 5 shows a block diagram of the display unit 21, the source drive circuit 22, and the gate drive circuit 23.

The display unit 21 has a plurality of pixels 51 arranged in a matrix. The pixel 51 has at least one display element. In addition, the source line S electrically connected to the source driving circuit 22 and the gate line G electrically connected to the gate driving circuit 23 are electrically connected to the pixel 51, respectively.

The source drive circuit 22 has a plurality of selector circuits 11. The gate drive circuit 23 includes a plurality of selector circuits 12. The selector circuit 11 and the selector circuit 12 are each controlled by a control signal from the timing controller 24.

The selector circuit 11 has a function of electrically connecting a plurality of adjacent source lines S. The source driving circuit 22 can output the same signal to a plurality of electrically connected source lines S.

The selector circuit 12 has a function of electrically connecting a plurality of adjacent gate lines G. The gate drive circuit 23 can output the same signal to a plurality of electrically connected gate lines G.

[Configuration example of selector circuit]
Next, a more specific configuration example of the selector circuit 11 and the selector circuit 12 will be described with reference to FIG. In FIG. 6, four source lines (source lines S [1] to S [4]) are connected to the selector circuit 11, and four gate lines (gate lines G [1] to G [4] are connected to the selector circuit 12. ]) Shows an example of connection.

The selector circuit 11 and the selector circuit 12 have the same configuration except that the wiring to be connected is different.

The selector circuit 11 includes a switch SW1, a switch SW2, and a switch SW3. The selector circuit 11 is connected to wirings S ₀ [1] to S ₀ [4]. The wirings S ₀ [1] to S ₀ [4] are wirings through which video signals are supplied.

The switch SW1 has a function of switching a wiring connected to the source line S [2] between the wiring S ₀ [1] and the wiring S ₀ [2].

The switch SW2 has a function of switching a wiring connected to the source line S [3] between the wiring S ₀ [1] and the wiring S ₀ [3].

The switch SW3 has a function of switching a wiring connected to the source line S [4] among the wiring S ₀ [1], the wiring S ₀ [3], and the wiring S ₀ [4].

Note that the switches SW1 to SW3 have the same layout in order to make the parasitic capacitances and parasitic resistances of the wirings S ₀ [1] to S ₀ [4] and the source lines S [1] to S [4] uniform. It is good. That is, a dummy switch may be provided in the switches SW1 and SW2, and the same number of switches as the switch SW3 may be provided. Further, a switch similar to the switches SW1 to SW3 may be provided between the wiring S ₀ [1] and the source line S [1].

The selector circuit 12 includes a switch SW4, a switch SW5, and a switch SW6. In addition, wirings G ₀ [1] to G ₀ [4] are connected to the selector circuit 12. The wirings G ₀ [1] to G ₀ [4] are wirings to which a selection signal (also referred to as a gate signal or a scanning signal) is supplied.

In the selector circuit 11, the switch SW1 is switched to the switch SW4, the switch SW2 is switched to the switch SW5, the switch SW3 is switched to the switch SW6, and the wiring S ₀ [1] is connected to the wiring G ₀ [ 1], the wiring S ₀ [2] is the wiring G ₀ [2], the wiring S ₀ [3] is the wiring G ₀ [3], and the wiring S ₀ [4] is the wiring G ₀ [4]. It will be replaced.

[Example of operation]
Next, an example of an operation method of the selector circuit 11 and the selector circuit 12 illustrated in FIG. 6 will be described.

Here, the resolution D of the display unit 21 is 8K4K (number of pixels: 7680 × 4320), and the image resolution of image data input to the display device 20 is 8K4K, 4K2K (number of pixels: 3840 × 2160), and FHD (number of pixels: 1920). A case of three types of × 1080) will be described. That is, the case where the resolution D and the image resolution d satisfy the relationships d = D, d = D / 2 ² , and d = D / 2 ⁴ will be described.

Table 1 shows the correspondence of the lines connected to the source lines S [1] to S [4] and the gate lines G [1] to G [4] with respect to the image resolution d. The selector circuit 11 and the selector circuit 12 are controlled so as to have a connection relationship as shown in Table 1, respectively.

First, when the relationship between the image resolution d and the resolution D satisfies d = D, each source line is connected to a different wiring. As a result, different video signals are input to the respective source lines. Similarly, each gate line is connected to a different wiring. Thereby, each gate line is sequentially selected.

Subsequently, the relationship between image resolution d and resolution D may satisfy d = D / 2 ^2, two adjacent source lines are connected to one wiring. As a result, the same video signal is input to the two adjacent source lines from the same wiring. Two adjacent gate lines are connected to one wiring. As a result, the two adjacent gate lines are sequentially selected.

At this time, the same video signal is input for every 2 × 2 pixels among the plurality of pixels 51 included in the display unit 21, and the four pixels 51 can each display the same gradation. Thus, even without image correction, such as the resolution of the up-conversion, it is possible resolution is displayed without distortion the image is 1/2 ^second resolution of the display unit 21.

Subsequently, when the relationship between the image resolution d and the resolution D satisfies d = D / 2 ⁴ , four adjacent source lines are connected to one wiring, and the same video signal is input to these four source lines. Similarly, four adjacent gate lines are connected to one wiring, and the four gate lines are sequentially selected.

At this time, among the plurality of pixels 51 included in the display unit 21, the same video signal is input for every 4 × 4 pixels, and the 16 pixels 51 can each display the same gradation. Thus, even without image correction, it is possible resolution is displayed without distortion the image is 1/2 ⁴ resolution of the display unit 21.

Here, an example is shown in which the selector circuit 11 and the selector circuit 12 are configured to connect up to four source lines and gate lines. However, the present invention is not limited to this, and the maximum number is 2 ^k (k is 1 or more). A source line or a gate line can be connected.

More specifically, for example, when the image resolution is d and the resolution of the display unit is D, when d = D / 2 ²ⁿ (n is an integer equal to or greater than 1), the selector circuit 11 is adjacent to 2 ^The same data is written to ⁿ source lines, and the selector circuit 12 can be controlled so as to simultaneously select 2 ⁿ gate lines adjacent to each other. Here, the image resolution d and the resolution D represent the total number of effective pixels, that is, the product of the horizontal resolution and the vertical resolution.

Alternatively, when the vertical resolution or horizontal resolution of the image satisfies 1/2 ^{n ′} (n ′ is an integer equal to or greater than 1) with respect to the vertical resolution or horizontal resolution of the display unit, the selector circuit 11 sets the adjacent 2 ^{n The} same data can be written to ^“ one source line”, and the selector circuit 12 can be controlled to select adjacent 2 ^{n ′} gate lines simultaneously.

The display device 20 having such a selector circuit 11 and the selector circuit 12 can perform image correction such as resolution up-conversion even when the image resolution d of the input image data is smaller than the resolution D of the display unit 21. It is possible to display without performing.

The above is the description of the configuration example of the display device.

The display system exemplified in this embodiment can perform optimal display with optimal power consumption according to the image resolution and frame frequency of input content.

Note that at least part of this embodiment can be implemented in combination with any of the other embodiments described in this specification as appropriate.

(Embodiment 2)
In this embodiment, a configuration example of a processor that can be used for the display system described in the above embodiment will be described.

The processor exemplified below is a processor that can temporarily stop the supply of power and can return to the state before the stop of the supply of power when the supply of power is resumed. . By using such a processor for the processing unit 31 illustrated in FIG. 1, for example, it is possible to stop power supply during the suspension period and suppress power consumption.

Further, a memory element that can be used as a register exemplified below can be applied not only to the processing unit 31 but also to the timing controller 24, the source driver circuit 22, the gate driver circuit 23, and the like. Thereby, power gating during a rest period can be easily performed.

FIG. 7 is a block diagram illustrating an exemplary configuration of a processor.

The processor shown in FIG. 7 includes an ALU 1191 (ALU: Arithmetic logic unit, arithmetic circuit), an ALU controller 1192, an instruction decoder 1193, an interrupt controller 1194, a timing controller 1195, a register 1196, a register controller 1197, and a bus interface 1198 on a substrate 1190. (Bus I / F), rewritable ROM 1199, and ROM interface 1189 (ROM I / F). As the substrate 1190, a semiconductor substrate, an SOI substrate, a glass substrate, or the like is used. The ROM 1199 and the ROM interface 1189 may be provided in separate chips. Needless to say, the processor illustrated in FIG. 7 is only an example in which the configuration is simplified, and an actual processor may have various configurations depending on the application. For example, the configuration including the processor or the arithmetic circuit illustrated in FIG. 7 may be a single core, and a plurality of the cores may be included, and each core may operate in parallel. Further, the number of bits that the processor can handle with the internal arithmetic circuit and the data bus can be, for example, 8 bits, 16 bits, 32 bits, 64 bits, and the like.

Instructions input to the processor via the bus interface 1198 are input to the instruction decoder 1193, decoded, and then input to the ALU controller 1192, interrupt controller 1194, register controller 1197, and timing controller 1195.

The ALU controller 1192, interrupt controller 1194, register controller 1197, and timing controller 1195 perform various controls based on the decoded instructions. Specifically, the ALU controller 1192 generates a signal for controlling the operation of the ALU 1191. The interrupt controller 1194 determines and processes an interrupt request from an external input / output device or a peripheral circuit from the priority or mask state during execution of the processor program. The register controller 1197 generates an address of the register 1196, and reads / writes data from / to the register 1196 according to the state of the processor.

Also, the timing controller 1195 generates a signal for controlling the operation timing of the ALU 1191, the ALU controller 1192, the instruction decoder 1193, the interrupt controller 1194, and the register controller 1197. For example, the timing controller 1195 includes an internal clock generation unit that generates an internal clock signal based on the reference clock signal, and supplies the internal clock signal to the various circuits.

In the processor shown in FIG. 7, the register 1196 is provided with a memory cell.

In the processor shown in FIG. 7, the register controller 1197 selects a holding operation in the register 1196 in accordance with an instruction from the ALU 1191. That is, whether to hold data by a flip-flop or to hold data by a capacitor in a memory cell included in the register 1196 is selected. When data retention by the flip-flop is selected, the power supply voltage is supplied to the memory cell in the register 1196. When holding of data in the capacitor is selected, data is rewritten to the capacitor and supply of power supply voltage to the memory cells in the register 1196 can be stopped.

FIG. 8 is an example of a circuit diagram of a memory element that can be used as the register 1196. The memory element 1200 includes a circuit 1201 in which stored data is volatilized by power-off, a circuit 1202 in which stored data is not volatilized by power-off, a switch 1203, a switch 1204, a logic element 1206, a capacitor 1207, and a selection function. Circuit 1220 having. The circuit 1202 includes a capacitor 1208, a transistor 1209, and a transistor 1210. Note that the memory element 1200 may further include other elements such as a diode, a resistance element, and an inductor, as necessary.

Here, when supply of the power supply voltage to the memory element 1200 is stopped, a ground potential (0 V) or a potential at which the transistor 1209 is turned off is continuously input to the gate of the transistor 1209 of the circuit 1202. For example, the gate of the transistor 1209 is grounded through a load such as a resistor.

The switch 1203 is configured using a transistor 1213 of one conductivity type (eg, n-channel type), and the switch 1204 is configured using a transistor 1214 of conductivity type (eg, p-channel type) opposite to the one conductivity type. An example is shown. Here, the first terminal of the switch 1203 corresponds to one of the source and the drain of the transistor 1213, the second terminal of the switch 1203 corresponds to the other of the source and the drain of the transistor 1213, and the switch 1203 corresponds to the gate of the transistor 1213. In accordance with the control signal RD input to the second terminal, conduction or non-conduction between the first terminal and the second terminal (that is, the on state or the off state of the transistor 1213) is selected. The first terminal of the switch 1204 corresponds to one of the source and the drain of the transistor 1214, the second terminal of the switch 1204 corresponds to the other of the source and the drain of the transistor 1214, and the switch 1204 is input to the gate of the transistor 1214. The control signal RD selects the conduction or non-conduction between the first terminal and the second terminal (that is, the on state or the off state of the transistor 1214).

One of the source and the drain of the transistor 1209 is electrically connected to one of the pair of electrodes of the capacitor 1208 and the gate of the transistor 1210. Here, the connection part is referred to as a node M2. One of a source and a drain of the transistor 1210 is electrically connected to a wiring that can supply a low power supply potential (eg, a GND line), and the other is connected to the first terminal of the switch 1203 (the source and the drain of the transistor 1213 On the other hand). A second terminal of the switch 1203 (the other of the source and the drain of the transistor 1213) is electrically connected to a first terminal of the switch 1204 (one of the source and the drain of the transistor 1214). A second terminal of the switch 1204 (the other of the source and the drain of the transistor 1214) is electrically connected to a wiring that can supply the power supply potential VDD. A second terminal of the switch 1203 (the other of the source and the drain of the transistor 1213), a first terminal of the switch 1204 (one of a source and a drain of the transistor 1214), an input terminal of the logic element 1206, and the capacitor 1207 One of the pair of electrodes is electrically connected. Here, the connection part is referred to as a node M1. The other of the pair of electrodes of the capacitor 1207 can be configured to receive a constant potential. For example, a low power supply potential (such as GND) or a high power supply potential (such as VDD) can be input. The other of the pair of electrodes of the capacitor 1207 is electrically connected to a wiring (eg, a GND line) that can supply a low power supply potential. The other of the pair of electrodes of the capacitor 1208 can have a constant potential. For example, a low power supply potential (such as GND) or a high power supply potential (such as VDD) can be input. The other of the pair of electrodes of the capacitor 1208 is electrically connected to a wiring (eg, a GND line) that can supply a low power supply potential.

Note that the capacitor 1207 and the capacitor 1208 can be omitted by actively using parasitic capacitances of transistors and wirings.

The control signal WE is input to the first gate (first gate electrode) of the transistor 1209. The switch 1203 and the switch 1204 are selected to be in a conductive state or a non-conductive state between the first terminal and the second terminal by a control signal RD different from the control signal WE. When the terminals of the other switch are in a conductive state, the first terminal and the second terminal of the other switch are in a non-conductive state.

A signal corresponding to data held in the circuit 1201 is input to the other of the source and the drain of the transistor 1209. FIG. 8 illustrates an example in which the signal output from the circuit 1201 is input to the other of the source and the drain of the transistor 1209. A signal output from the second terminal of the switch 1203 (the other of the source and the drain of the transistor 1213) is an inverted signal obtained by inverting the logic value by the logic element 1206 and is input to the circuit 1201 through the circuit 1220. .

Note that FIG. 8 illustrates an example in which a signal output from the second terminal of the switch 1203 (the other of the source and the drain of the transistor 1213) is input to the circuit 1201 through the logic element 1206 and the circuit 1220. It is not limited to. A signal output from the second terminal of the switch 1203 (the other of the source and the drain of the transistor 1213) may be input to the circuit 1201 without inversion of the logical value. For example, when there is a node in the circuit 1201 that holds a signal in which the logical value of the signal input from the input terminal is inverted, the second terminal of the switch 1203 (the other of the source and the drain of the transistor 1213) An output signal can be input to the node.

In FIG. 8, among the transistors used for the memory element 1200, the transistors other than the transistor 1209 can be transistors in which a channel is formed in a layer formed of a semiconductor other than an oxide semiconductor or the substrate 1190. For example, a transistor in which a channel is formed in a silicon layer or a silicon substrate can be used. Further, all the transistors used for the memory element 1200 can be transistors whose channel is formed using an oxide semiconductor layer. Alternatively, the memory element 1200 may include a transistor whose channel is formed using an oxide semiconductor layer in addition to the transistor 1209, and the remaining transistors may be formed in a layer formed using a semiconductor other than an oxide semiconductor or the substrate 1190. It can also be a formed transistor.

For example, a flip-flop circuit can be used for the circuit 1201 in FIG. Further, signals CLK, RES, and Q are input to the circuit 1201, and a signal D is input through the circuit 1220. As the logic element 1206, for example, an inverter, a clocked inverter, or the like can be used.

In the semiconductor device of one embodiment of the present invention, data stored in the circuit 1201 can be held by the capacitor 1208 provided in the circuit 1202 while the power supply voltage is not supplied to the memory element 1200.

In addition, a transistor in which a channel is formed in an oxide semiconductor layer has extremely low off-state current. For example, the off-state current of a transistor in which a channel is formed in an oxide semiconductor layer is significantly lower than the off-state current of a transistor in which a channel is formed in crystalline silicon. Therefore, by using the transistor as the transistor 1209, the signal held in the capacitor 1208 is maintained for a long time even when the power supply voltage is not supplied to the memory element 1200. In this manner, the memory element 1200 can hold stored data (data) even while the supply of power supply voltage is stopped.

Further, by providing the switch 1203 and the switch 1204, the memory element is characterized by performing a precharge operation; therefore, after the supply of power supply voltage is resumed, the time until the circuit 1201 retains the original data again is shortened. be able to.

In the circuit 1202, the signal held by the capacitor 1208 is input to the gate of the transistor 1210. Therefore, after the supply of the power supply voltage to the memory element 1200 is restarted, the state (on state or off state) of the transistor 1210 is determined in accordance with the signal held by the capacitor 1208, and data can be read from the circuit 1202. it can. Therefore, the original signal can be accurately read even if the potential corresponding to the signal held in the capacitor 1208 slightly fluctuates.

By using such a storage element 1200 for a storage device such as a register or a cache memory included in the processor, it is possible to prevent data in the storage device from being lost due to the supply of power supply voltage being stopped. In addition, after the supply of the power supply voltage is resumed, the state before the power supply stop can be restored in a short time. Accordingly, power can be stopped in a short time in the entire processor or in one or a plurality of logic circuits constituting the processor, so that power consumption can be suppressed.

In this embodiment, the memory element 1200 is described as an example of use for a processor. However, the memory element 1200 is an LSI such as a DSP (Digital Signal Processor), a custom LSI, or a PLD (Programmable Logic Device), and an RF-ID (Radio Frequency). (Identification).

Note that at least part of this embodiment can be implemented in combination with any of the other embodiments described in this specification as appropriate.

(Embodiment 3)
In this embodiment, an example of a display device applicable to the display system illustrated in the above embodiment will be described.

[Configuration example]
FIG. 9A is a top view illustrating an example of a display device. A display device 700 illustrated in FIG. 9A includes a pixel portion 702 provided over a first substrate 701, a source driver circuit portion 704 and a gate driver circuit portion 706 provided over the first substrate 701, and a pixel. A sealant 712 disposed so as to surround the portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706, and a second substrate 705 provided so as to face the first substrate 701. Note that the first substrate 701 and the second substrate 705 are sealed with a sealant 712. That is, the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 are sealed with the first substrate 701, the sealant 712, and the second substrate 705. Note that although not illustrated in FIG. 9A, a display element is provided between the first substrate 701 and the second substrate 705.

In addition, the display device 700 is electrically connected to each of the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 in a region different from the region surrounded by the sealant 712 over the first substrate 701. FPC terminal portion 708 (FPC: Flexible printed circuit) is provided. In addition, an FPC 716 is connected to the FPC terminal portion 708, and various signals are supplied to the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 by the FPC 716. A signal line 710 is connected to each of the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the FPC terminal portion 708. Various signals and the like supplied by the FPC 716 are supplied to the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the FPC terminal portion 708 through the signal line 710.

Further, a plurality of gate driver circuit portions 706 may be provided in the display device 700. In addition, as the display device 700, an example in which the source driver circuit portion 704 and the gate driver circuit portion 706 are formed over the same first substrate 701 as the pixel portion 702 is shown; however, the display device 700 is not limited to this structure. For example, only the gate driver circuit portion 706 may be formed on the first substrate 701, or only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, a substrate on which a source driver circuit, a gate driver circuit, or the like is formed (for example, a driver circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) may be formed over the first substrate 701. . Note that a connection method of a separately formed drive circuit board is not particularly limited, and a COG (Chip On Glass) method, a wire bonding method, or the like can be used.

In addition, the display device 700 can include various elements. Examples of the element include, for example, an electroluminescence (EL) element (an EL element including an organic substance and an inorganic substance, an organic EL element, an inorganic EL element, an LED, and the like), a light-emitting transistor element (a transistor that emits light in response to current), an electron Emission element, liquid crystal element, electronic ink element, electrophoretic element, electrowetting element, plasma display panel (PDP), MEMS (micro electro mechanical system) display (for example, grating light valve (GLV), digital micromirror Devices (DMD), digital micro shutter (DMS) elements, interferometric modulation (IMOD) elements, etc.), piezoelectric ceramic displays, and the like.

An example of a display device using an EL element is an EL display. As an example of a display device using an electron-emitting device, there is a field emission display (FED), a SED type flat display (SED: Surface-conduction Electron-emitter Display), or the like. As an example of a display device using a liquid crystal element, there is a liquid crystal display (a transmissive liquid crystal display, a transflective liquid crystal display, a reflective liquid crystal display, a direct view liquid crystal display, a projection liquid crystal display) and the like. An example of a display device using an electronic ink element or an electrophoretic element is electronic paper. Note that in the case of realizing a transflective liquid crystal display or a reflective liquid crystal display, part or all of the pixel electrode may have a function as a reflective electrode. For example, part or all of the pixel electrode may have aluminum, silver, or the like. Further, in that case, a memory circuit such as an SRAM can be provided under the reflective electrode. Thereby, power consumption can be further reduced.

Note that as a display method in the display device 700, a progressive method, an interlace method, or the like can be used. Further, the color elements controlled by the pixels when performing color display are not limited to three colors of RGB (R represents red, G represents green, and B represents blue). For example, it may be composed of four pixels: an R pixel, a G pixel, a B pixel, and a W (white) pixel. Alternatively, as in a pen tile arrangement, one color element may be configured by two colors of RGB, and two different colors may be selected and configured depending on the color element. Alternatively, one or more colors such as yellow, cyan, and magenta may be added to RGB. The size of the display area may be different for each dot of the color element. Note that the disclosed invention is not limited to a display device for color display, and can be applied to a display device for monochrome display.

In addition, a colored layer (also referred to as a color filter) may be used in order to display white light (W) in a backlight (an organic EL element, an inorganic EL element, an LED, a fluorescent lamp, or the like) and display a full color display device. Good. For example, red (R), green (G), blue (B), yellow (Y), and the like can be used in appropriate combination for the colored layer. By using the colored layer, the color reproducibility can be increased as compared with the case where the colored layer is not used. At this time, white light in a region having no colored layer may be directly used for display by arranging a region having a colored layer and a region having no colored layer. By disposing a region that does not have a colored layer in part, a decrease in luminance due to the colored layer can be reduced during bright display, and power consumption can be reduced by about 20% to 30%. However, when a full color display is performed using a self-luminous element such as an organic EL element or an inorganic EL element, R, G, B, Y, and W may be emitted from elements having respective emission colors. By using a self-luminous element, power consumption may be further reduced as compared with the case where a colored layer is used.

In addition, as a colorization method, in addition to a method (color filter method) in which part of the light emission from the white light emission described above is converted into red, green, and blue through a color filter, red, green, and blue light emission is performed. A method of using each (three-color method) or a method of converting a part of light emission from blue light emission into red or green (color conversion method, quantum dot method) may be applied.

A display device 700A illustrated in FIG. 9B is a display device that can be suitably used for an electronic device having a large screen. For example, it can be suitably used for a television device, a monitor device, a digital signage, and the like.

The display device 700A includes a plurality of source driver ICs 721 and a pair of gate driver circuits 722.

The plurality of source driver ICs 721 are attached to the FPC 723, respectively. The plurality of FPCs 723 have one terminal connected to the substrate 701 and the other terminal connected to the printed circuit board 724. By bending the FPC 723, the printed circuit board 724 can be placed on the back side of the pixel portion 702 and mounted on an electric device.

On the other hand, the gate driver circuit 722 is formed on the substrate 701. Thereby, an electronic device with a narrow frame can be realized.

With such a configuration, a large-sized and high-resolution display device can be realized. For example, the present invention can be applied to a display device having a screen size of 30 inches or more, 40 inches or more, 50 inches or more, or 60 inches or more. In addition, a display device with extremely high resolution such as full high vision, 4K2K, or 8K4K can be realized.

[Section configuration example]
Hereinafter, a structure using a liquid crystal element as a display element and a structure using an EL element will be described with reference to FIGS. 10 and 11 are cross-sectional views taken along one-dot chain line QR shown in FIG. 9, and a structure using a liquid crystal element as a display element. FIG. 12 is a cross-sectional view taken along one-dot chain line QR shown in FIG. 9 and has a configuration using an EL element as a display element.

First, common parts shown in FIGS. 10 to 12 will be described first, and then different parts will be described below.

[Description of common parts of display device]
A display device 700 illustrated in FIGS. 10 to 12 includes a lead wiring portion 711, a pixel portion 702, a source driver circuit portion 704, and an FPC terminal portion 708. Further, the lead wiring portion 711 includes a signal line 710. In addition, the pixel portion 702 includes a transistor 750 and a capacitor 790. In addition, the source driver circuit portion 704 includes a transistor 752.

In a transistor provided in each pixel, it is preferable to apply a metal oxide (oxide semiconductor) to a semiconductor layer in which a channel is formed. Accordingly, the field effect mobility of the transistor can be increased as compared with the case where amorphous silicon is used, so that the size (occupied area) of the transistor can be reduced. Thereby, the parasitic capacitance of the source line and the gate line can be further reduced.

In particular, by applying a transistor using an oxide semiconductor, the following various effects can be obtained. For example, since the size (occupied area) of the transistor can be reduced, the parasitic capacitance of the transistor itself can be reduced. Furthermore, compared with the case where amorphous silicon is used, the aperture ratio can be improved, or the wiring width can be increased without sacrificing the aperture ratio, and the wiring resistance can be decreased. In addition, since the on-state current of the transistor can be increased, the period required for pixel writing can be shortened. By such an effect, the charge / discharge period of the gate line and the source line can be shortened, and the frame frequency can be increased.

Furthermore, since a transistor including an oxide semiconductor can extremely reduce off-state current, a holding period of a potential written in a pixel can be extended and a frame frequency can be decreased. For example, the frame frequency can be varied in the range of 0.1 Hz to 480 Hz. In a television device or the like, the frame frequency is preferably 30 Hz to 480 Hz, more preferably 60 Hz to 240 Hz.

Another example of the effect of using a transistor with extremely small off-state current is that the pixel storage capacity can be reduced. Thereby, the aperture ratio of the pixel can be increased and the period required for writing the pixel can be further shortened.

Also, if the electrical resistance and capacitance of each source line are made as small as possible, it becomes possible to drive at a higher frame frequency or to make a larger display device. For example, using a low-resistance material (for example, copper, aluminum, etc.) for the source line material, increasing the thickness or width of the source line, increasing the interlayer insulating film between the source line and other wiring, For example, the area of the intersection between the source line and another wiring can be reduced.

The transistor used in this embodiment includes an oxide semiconductor film which is highly purified and suppresses formation of oxygen vacancies. The transistor can have low off-state current. Therefore, the holding time of an electric signal such as a video signal can be extended, and the writing interval can be set longer in the power-on state. Therefore, since the frequency of the refresh operation can be reduced, there is an effect of suppressing power consumption.

The transistor used in this embodiment can be driven at high speed because relatively high field-effect mobility can be obtained. For example, by using such a transistor capable of high-speed driving for a display device, the switching transistor in the pixel portion and the driver transistor used in the driver circuit portion can be formed over the same substrate. That is, since it is not necessary to use a semiconductor device formed of a silicon wafer or the like as a separate drive circuit, the number of parts of the semiconductor device can be reduced. In the pixel portion, a high-quality image can be provided by using a transistor that can be driven at high speed.

Alternatively, a transistor including a semiconductor containing silicon can be used for a semiconductor layer in which a channel is formed. For example, a transistor using amorphous silicon, microcrystalline silicon, polycrystalline silicon, or the like can be used. In particular, amorphous silicon is preferably used because it can be formed over a large substrate with a high yield. When amorphous silicon is used, it is preferable to use hydrogenated amorphous silicon (which may be expressed as a-Si: H) in which dangling bonds are terminated with hydrogen.

The capacitor 790 includes a lower electrode formed through a step of processing the same conductive film as the conductive film that functions as the first gate electrode included in the transistor 750, and a conductive function that functions as a source electrode or a drain electrode included in the transistor 750. And an upper electrode formed through a process of processing the same conductive film as the film. Further, an insulating film formed through a step of forming the same insulating film as the first gate insulating film included in the transistor 750 between the lower electrode and the upper electrode, and over the transistor 750 An insulating film formed through a step of forming the same insulating film as the insulating film functioning as a protective insulating film is provided. That is, the capacitor 790 has a stacked structure in which an insulating film functioning as a dielectric film is sandwiched between a pair of electrodes.

10 to 12, a planarization insulating film 770 is provided over the transistor 750, the transistor 752, and the capacitor 790.

10 to 12 illustrate a structure in which the transistor 750 included in the pixel portion 702 and the transistor 752 included in the source driver circuit portion 704 are transistors having the same structure; however, the present invention is not limited to this. For example, the pixel portion 702 and the source driver circuit portion 704 may use different transistors. Specifically, a top-gate transistor is used for the pixel portion 702 and a bottom-gate transistor is used for the source driver circuit portion 704, or a bottom-gate transistor is used for the pixel portion 702, and the source driver circuit portion 704 is used. In addition, a configuration using a top gate type transistor can be given. Note that the source driver circuit portion 704 may be replaced with a gate driver circuit portion.

Further, the signal line 710 is formed through the same process as the conductive film functioning as the source electrode and the drain electrode of the transistors 750 and 752. For example, when a material containing a copper element is used as the signal line 710, signal delay due to wiring resistance is small and display on a large screen is possible.

The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 716. Note that the connection electrode 760 is formed through the same process as the conductive film functioning as the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is electrically connected to a terminal included in the FPC 716 through an anisotropic conductive film 780.

Further, as the first substrate 701 and the second substrate 705, for example, glass substrates can be used. Alternatively, a flexible substrate may be used as the first substrate 701 and the second substrate 705. Examples of the flexible substrate include a plastic substrate.

In addition, a structure body 778 is provided between the first substrate 701 and the second substrate 705. The structure body 778 is a columnar spacer and is provided to control the distance (cell gap) between the first substrate 701 and the second substrate 705. Note that a spherical spacer may be used as the structure body 778.

Further, on the second substrate 705 side, a light shielding film 738 functioning as a black matrix, a colored film 736 functioning as a color filter, and an insulating film 734 in contact with the light shielding film 738 and the colored film 736 are provided.

[Configuration Example of Display Device Using Liquid Crystal Element]
A display device 700 illustrated in FIG. 10 includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive film 772, a conductive film 774, and a liquid crystal layer 776. The conductive film 774 is provided on the second substrate 705 side and functions as a counter electrode. The display device 700 illustrated in FIG. 10 can display an image by controlling transmission and non-transmission of light by changing the alignment state of the liquid crystal layer 776 depending on voltages applied to the conductive films 772 and 774.

Further, the conductive film 772 is electrically connected to a conductive film functioning as a source electrode or a drain electrode included in the transistor 750. The conductive film 772 is formed over the planarization insulating film 770 and functions as a pixel electrode, that is, one electrode of a display element.

As the conductive film 772, a conductive film that is transparent to visible light or a conductive film that is reflective to visible light can be used. As the conductive film that transmits visible light, for example, a material containing one kind selected from indium, zinc, and tin may be used. As the conductive film having reflectivity in visible light, for example, a material containing aluminum or silver is preferably used.

In the case where a conductive film that reflects visible light is used for the conductive film 772, the display device 700 is a reflective liquid crystal display device. In the case where a conductive film that transmits visible light is used for the conductive film 772, the display device 700 is a transmissive liquid crystal display device. In the case of a reflective liquid crystal display device, a polarizing plate is provided on the viewing side. On the other hand, in the case of a transmissive liquid crystal display device, a pair of polarizing plates sandwiching a liquid crystal element is provided.

Further, the driving method of the liquid crystal element can be changed by changing the structure over the conductive film 772. An example of this case is shown in FIG. A display device 700 illustrated in FIG. 11 is an example of a configuration using a horizontal electric field method (eg, an FFS mode) as a driving method of a liquid crystal element. In the case of the structure illustrated in FIG. 11, the insulating film 773 is provided over the conductive film 772, and the conductive film 774 is provided over the insulating film 773. In this case, the conductive film 774 functions as a common electrode (also referred to as a common electrode), and the alignment of the liquid crystal layer 776 is generated by an electric field generated between the conductive film 772 and the conductive film 774 through the insulating film 773. The state can be controlled.

Although not shown in FIGS. 10 and 11, an alignment film may be provided on one or both of the conductive film 772 and the conductive film 774 on the side in contact with the liquid crystal layer 776. Although not shown in FIGS. 10 and 11, an optical member (optical substrate) such as a polarizing member, a retardation member, or an antireflection member may be provided as appropriate. For example, circularly polarized light using a polarizing substrate and a retardation substrate may be used. Further, a backlight, a sidelight, or the like may be used as the light source.

When a liquid crystal element is used as the display element, a thermotropic liquid crystal, a low molecular liquid crystal, a polymer liquid crystal, a polymer dispersed liquid crystal, a ferroelectric liquid crystal, an antiferroelectric liquid crystal, or the like can be used. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, and the like depending on conditions.

In addition, when the horizontal electric field method is adopted, a liquid crystal exhibiting a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of the cholesteric liquid crystal is increased, the blue phase appears immediately before the transition from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition mixed with several percent by weight or more of a chiral agent is used for the liquid crystal layer in order to improve the temperature range. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response speed and is optically isotropic, so that alignment treatment is unnecessary. Further, since it is not necessary to provide an alignment film, a rubbing process is not required, so that electrostatic breakdown caused by the rubbing process can be prevented, and defects or breakage of the liquid crystal display device during the manufacturing process can be reduced. . A liquid crystal material exhibiting a blue phase has a small viewing angle dependency.

In addition, when a liquid crystal element is used as a display element, a TN (Twisted Nematic) mode, an IPS (In-Plane-Switching) mode, an FFS (Fringe Field Switching) mode, an ASM (Axially Symmetrical Aligned MicroOcell) mode. A Compensated Birefringence mode, an FLC (Ferroelectric Liquid Crystal) mode, an AFLC (Antiferroelectric Liquid Crystal) mode, and the like can be used.

Alternatively, a normally black liquid crystal display device such as a transmissive liquid crystal display device employing a vertical alignment (VA) mode may be used. There are several examples of the vertical alignment mode. For example, an MVA (Multi-Domain Vertical Alignment) mode, a PVA (Patterned Vertical Alignment) mode, an ASV (Advanced Super View) mode, and the like can be used.

[Display device using light emitting element]
A display device 700 illustrated in FIG. 12 includes a light-emitting element 782. The light-emitting element 782 includes a conductive film 772, an EL layer 786, and a conductive film 788. The display device 700 illustrated in FIG. 12 can display an image when the EL layer 786 included in the light-emitting element 782 provided for each pixel emits light. Note that the EL layer 786 includes an organic compound or an inorganic compound such as a quantum dot.

Examples of materials that can be used for the organic compound include fluorescent materials and phosphorescent materials. Examples of materials that can be used for the quantum dots include colloidal quantum dot materials, alloy type quantum dot materials, core / shell type quantum dot materials, and core type quantum dot materials. Alternatively, a material including an element group of Group 12 and Group 16, Group 13 and Group 15, or Group 14 and Group 16 may be used. Alternatively, a quantum dot material having an element such as cadmium, selenium, zinc, sulfur, phosphorus, indium, tellurium, lead, gallium, arsenic, or aluminum may be used.

In the display device 700 illustrated in FIG. 12, an insulating film 730 is provided over the planarization insulating film 770 and the conductive film 772. The insulating film 730 covers part of the conductive film 772. Note that the light-emitting element 782 has a top emission structure. Therefore, the conductive film 788 has a light-transmitting property and transmits light emitted from the EL layer 786. In the present embodiment, the top emission structure is illustrated, but is not limited thereto. For example, the present invention can be applied to a bottom emission structure in which light is emitted to the conductive film 772 side and a dual emission structure in which light is emitted to both the conductive film 772 side and the conductive film 788 side.

Further, a coloring film 736 is provided at a position overlapping with the light emitting element 782, and a light shielding film 738 is provided at a position overlapping with the insulating film 730, the lead wiring portion 711, and the source driver circuit portion 704. Further, the coloring film 736 and the light shielding film 738 are covered with an insulating film 734. A space between the light emitting element 782 and the insulating film 734 is filled with a sealing film 732. Note that in the display device 700 illustrated in FIG. 12, the structure in which the colored film 736 is provided is illustrated, but the present invention is not limited to this. For example, in the case where the EL layer 786 is formed in an island shape for each pixel, that is, formed by separate coating, the coloring film 736 may not be provided.

[Configuration example in which an input / output device is provided in a display device]
Further, an input / output device may be provided in the display device 700 illustrated in FIGS. Examples of the input / output device include a touch panel.

11 shows a configuration in which the touch panel 791 is provided in the display device 700 shown in FIG. 11, and FIG. 14 shows a configuration in which the touch panel 791 is provided in the display device 700 shown in FIG.

13 is a cross-sectional view of a configuration in which the touch panel 791 is provided on the display device 700 illustrated in FIG. 11, and FIG. 14 is a cross-sectional view of a configuration in which the touch panel 791 is provided on the display device 700 illustrated in FIG.

First, the touch panel 791 shown in FIGS. 13 and 14 will be described below.

The touch panel 791 shown in FIGS. 13 and 14 is a so-called in-cell type touch panel provided between the second substrate 705 and the coloring film 736. The touch panel 791 may be formed on the second substrate 705 side before the coloring film 736 is formed.

Note that the touch panel 791 includes an insulating film 792, an electrode 793, an electrode 794, an insulating film 795, an electrode 796, and an insulating film 797. For example, it is possible to detect a change in capacitance between the electrode 793 and the electrode 794 that may occur when a detection target such as a finger or a stylus approaches.

Further, above the transistor 750 shown in FIGS. 13 and 14, the intersection of the electrode 793 and the electrode 794 is clearly shown. The electrode 796 is electrically connected to two electrodes 793 sandwiching the electrode 794 through an opening provided in the insulating film 795. 13 and 14 exemplify the configuration in which the region where the electrode 796 is provided is provided in the pixel portion 702, but the present invention is not limited to this. For example, the region may be formed in the source driver circuit portion 704.

The electrode 793 and the electrode 794 are provided in a region overlapping with the light shielding film 738. In addition, as illustrated in FIGS. 13 and 14, the electrode 793 is preferably provided so as not to overlap with the light-emitting element 782 or the liquid crystal element 775. In other words, the electrode 793 has an opening in a region overlapping with the light-emitting element 782 or the liquid crystal element 775. That is, the electrode 793 has a mesh shape. With such a structure, the electrode 793 can be configured not to block light emitted from the light-emitting element 782 or light transmitted through the liquid crystal element 775. Therefore, since the reduction in luminance due to the arrangement of the touch panel 791 is extremely small, a display device with high visibility and low power consumption can be realized. Note that the electrode 794 may have a similar structure.

In addition, since the electrode 793 and the electrode 794 do not overlap with the light-emitting element 782 or the liquid crystal element 775, a metal material with low visible light transmittance can be used for the electrode 793 and the electrode 794.

Therefore, the resistance of the electrode 793 and the electrode 794 can be reduced as compared with an electrode using an oxide material having a high visible light transmittance, and the sensor sensitivity of the touch panel can be improved.

For example, conductive nanowires may be used for the electrodes 793, 794, and 796. The nanowire may have an average diameter of 1 nm to 100 nm, preferably 5 nm to 50 nm, more preferably 5 nm to 25 nm. Moreover, as said nanowire, metal nanowires, such as Ag nanowire, Cu nanowire, or Al nanowire, or a carbon nanotube etc. may be used. For example, when an Ag nanowire is used for any one or all of the electrodes 793, 794, and 796, the light transmittance in visible light can be 89% or more, and the sheet resistance value can be 40Ω / □ or more and 100Ω / □ or less. .

Further, in FIG. 13 and FIG. 14, the configuration of the in-cell type touch panel is illustrated, but the present invention is not limited to this. For example, a so-called on-cell touch panel formed over the display device 700 or a so-called out-cell touch panel used by being attached to the display device 700 may be used.

As described above, the display device of one embodiment of the present invention can be used in combination with various forms of touch panels.

Note that at least part of this embodiment can be implemented in combination with any of the other embodiments described in this specification as appropriate.

(Embodiment 4)
In this embodiment, a display device applicable to the display system of one embodiment of the present invention will be described with reference to FIGS.

[Circuit configuration of display device]
A display device illustrated in FIG. 15A includes a circuit portion (hereinafter referred to as a driver circuit) including a region having pixels (hereinafter referred to as a pixel portion 502) and a circuit which is disposed outside the pixel portion 502 and drives the pixels. Part 504), a circuit having a protection function of an element (hereinafter referred to as a protection circuit 506), and a terminal part 507. Note that the protection circuit 506 may be omitted.

It is desirable that part or all of the drive circuit portion 504 is formed on the same substrate as the pixel portion 502. Thereby, the number of parts and the number of terminals can be reduced. When part or all of the driver circuit portion 504 is not formed over the same substrate as the pixel portion 502, part or all of the driver circuit portion 504 is formed by COG or TAB (Tape Automated Bonding). Can be implemented.

The pixel portion 502 includes a plurality of circuits (hereinafter referred to as pixel circuits 501) for driving display elements arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The driver circuit portion 504 outputs a signal for selecting a pixel (scanning signal) (hereinafter referred to as a gate driver 504a) and a circuit for supplying a signal (data signal) for driving a display element of the pixel. (Hereinafter referred to as source driver 504b) and the like.

The gate driver 504a has a shift register and the like. The gate driver 504a receives a signal for driving the shift register via the terminal portion 507, and outputs a signal. For example, the gate driver 504a receives a start pulse signal, a clock signal, and the like and outputs a pulse signal. The gate driver 504a has a function of controlling the potential of a wiring to which a scan signal is supplied (hereinafter referred to as gate lines GL_1 to GL_X). Note that a plurality of gate drivers 504a may be provided, and the gate lines GL_1 to GL_X may be divided and controlled by the plurality of gate drivers 504a. Alternatively, the gate driver 504a has a function of supplying an initialization signal. However, the present invention is not limited to this, and the gate driver 504a can supply another signal.

The source driver 504b has a shift register and the like. In addition to a signal for driving the shift register, the source driver 504b receives a signal (image signal) as a source of a data signal through the terminal portion 507. The source driver 504b has a function of generating a data signal to be written in the pixel circuit 501 based on the image signal. In addition, the source driver 504b has a function of controlling output of a data signal in accordance with a pulse signal obtained by inputting a start pulse, a clock signal, or the like. The source driver 504b has a function of controlling the potential of a wiring to which a data signal is supplied (hereinafter referred to as source lines DL_1 to DL_Y). Alternatively, the source driver 504b has a function of supplying an initialization signal. However, the present invention is not limited to this, and the source driver 504b can supply another signal.

The source driver 504b is configured using a plurality of analog switches, for example. The source driver 504b can output a signal obtained by time-dividing the image signal as a data signal by sequentially turning on the plurality of analog switches. Further, the source driver 504b may be configured using a shift register or the like.

Each of the plurality of pixel circuits 501 receives a pulse signal through one of a plurality of gate lines GL to which a scanning signal is applied, and receives a data signal through one of a plurality of source lines DL to which a data signal is applied. Entered. In each of the plurality of pixel circuits 501, writing and holding of data signals are controlled by the gate driver 504a. For example, the pixel circuit 501 in the m-th row and the n-th column receives a pulse signal from the gate driver 504a through the gate line GL_m (m is a natural number equal to or less than X), and the source line DL_n (n) according to the potential of the gate line GL_m. Is a natural number less than or equal to Y), a data signal is input from the source driver 504b.

The protection circuit 506 shown in FIG. 15A is connected to a gate line GL that is a wiring between the gate driver 504a and the pixel circuit 501, for example. Alternatively, the protection circuit 506 is connected to a source line DL that is a wiring between the source driver 504 b and the pixel circuit 501. Alternatively, the protection circuit 506 can be connected to a wiring between the gate driver 504 a and the terminal portion 507. Alternatively, the protection circuit 506 can be connected to a wiring between the source driver 504 b and the terminal portion 507. Note that the terminal portion 507 is a portion where a terminal for inputting a power supply, a control signal, and an image signal from an external circuit to the display device is provided.

The protection circuit 506 is a circuit that brings the wiring and another wiring into a conductive state when a potential outside a certain range is applied to the wiring to which the protection circuit 506 is connected.

As shown in FIG. 15A, the protective circuit 506 is connected to the pixel portion 502 and the driver circuit portion 504, thereby increasing the resistance of the display device against overcurrent generated by ESD (Electro Static Discharge) or the like. be able to. However, the configuration of the protection circuit 506 is not limited thereto, and for example, a configuration in which the protection circuit 506 is connected to the gate driver 504a or a configuration in which the protection circuit 506 is connected to the source driver 504b may be employed. Alternatively, the protection circuit 506 may be connected to the terminal portion 507.

FIG. 15A illustrates an example in which the driver circuit portion 504 is formed using the gate driver 504a and the source driver 504b; however, the present invention is not limited to this structure. For example, only the gate driver 504a may be formed and a substrate on which a separately prepared source driver circuit is formed (for example, a driver circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) may be mounted. .

Here, FIG. 16 shows a different structure from FIG. In FIG. 16, a pair of source lines (for example, source line DLa1 and source line DLb1) are arranged so as to sandwich a plurality of pixels arranged in the source line direction. Two adjacent gate lines (for example, the gate line GL_1 and the gate line GL_2) are electrically connected.

The pixel connected to the gate line GL_1 is connected to one source line (source line DLa1, source line DLa2, etc.), and the pixel connected to the gate line GL_2 is connected to the other source line (source line DLb1, source line DLa1). Line DLb2 etc.).

With this configuration, two gate lines can be selected simultaneously. Thereby, the length of one horizontal period can be doubled compared with the structure shown to FIG. 15 (A). Thereby, it becomes easy to increase the resolution and enlarge the screen of the display device.

Further, the plurality of pixel circuits 501 illustrated in FIG. 15A can have a structure illustrated in FIG. 15B, for example.

A pixel circuit 501 illustrated in FIG. 15B includes a liquid crystal element 570, a transistor 550, and a capacitor 560.

One potential of the pair of electrodes of the liquid crystal element 570 is appropriately set according to the specification of the pixel circuit 501. The alignment state of the liquid crystal element 570 is set by written data. Note that a common potential (common potential) may be applied to one of the pair of electrodes of the liquid crystal element 570 included in each of the plurality of pixel circuits 501. Further, a different potential may be applied to one of the pair of electrodes of the liquid crystal element 570 of the pixel circuit 501 in each row.

For example, as a method for driving a display device including the liquid crystal element 570, a TN mode, an STN (Super Twisted Nematic) mode, a VA mode, an ASM mode, an OCB mode, an FLC mode, an AFLC mode, an MVA mode, a PVA mode, an IPS mode, An FFS mode or a TBA (Transverse Bend Alignment) mode may be used. In addition to the above-described driving methods, there are ECB (Electrically Controlled Birefringence) mode, PDLC (Polymer Dispersed Liquid Crystal) mode, PNLC (Polymer Network Liquid Crystal mode), and other driving methods for the display device. However, the present invention is not limited to this, and various liquid crystal elements and driving methods thereof can be used.

In the pixel circuit 501 in the m-th row and the n-th column, one of a source electrode and a drain electrode of the transistor 550 is electrically connected to the source line DL_n, and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The The gate electrode of the transistor 550 is electrically connected to the gate line GL_m. The transistor 550 has a function of controlling data writing of the data signal by being turned on or off.

One of the pair of electrodes of the capacitor 560 is electrically connected to a wiring to which a potential is supplied (hereinafter, potential supply line VL), and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The Note that the value of the potential of the potential supply line VL is appropriately set according to the specifications of the pixel circuit 501. The capacitor 560 functions as a storage capacitor for storing written data.

In the display device including the pixel circuit 501 in FIG. 15B, for example, the pixel circuits 501 in each row are sequentially selected by the gate driver 504a illustrated in FIG. Write.

The pixel circuit 501 in which data is written is in a holding state when the transistor 550 is turned off. By sequentially performing this for each row, an image can be displayed.

Further, the plurality of pixel circuits 501 illustrated in FIG. 15A can have a structure illustrated in FIG. 15C, for example.

In addition, the pixel circuit 501 illustrated in FIG. 15C includes transistors 552 and 554, a capacitor 562, and a light-emitting element 572.

One of the source electrode and the drain electrode of the transistor 552 is electrically connected to the data line DL_n, and the gate electrode is electrically connected to the scanning line GL_m.

The transistor 552 has a function of controlling data writing of the data signal by being turned on or off.

One of the pair of electrodes of the capacitor 562 is electrically connected to the potential supply line VL_a, and the other is electrically connected to the other of the source electrode and the drain electrode of the transistor 552.

The capacitor element 562 functions as a storage capacitor for storing written data.

One of the source electrode and the drain electrode of the transistor 554 is electrically connected to the potential supply line VL_a. Further, the gate electrode of the transistor 554 is electrically connected to the other of the source electrode and the drain electrode of the transistor 552.

One of an anode and a cathode of the light-emitting element 572 is electrically connected to the potential supply line VL_b, and the other is electrically connected to the other of the source electrode and the drain electrode of the transistor 554.

As the light-emitting element 572, for example, an organic electroluminescence element (also referred to as an organic EL element) or the like can be used. However, the light-emitting element 572 is not limited thereto, and an inorganic EL element made of an inorganic material may be used.

Note that one of the potential supply line VL_a and the potential supply line VL_b is supplied with the high power supply potential VDD, and the other is supplied with the low power supply potential VSS.

In the display device including the pixel circuit 501 in FIG. 15C, for example, the pixel circuits 501 in each row are sequentially selected by the gate driver 504a illustrated in FIG. Write.

The pixel circuit 501 in which data is written is in a holding state when the transistor 552 is turned off. Further, the amount of current flowing between the source electrode and the drain electrode of the transistor 554 is controlled in accordance with the potential of the written data signal, and the light-emitting element 572 emits light with luminance corresponding to the amount of flowing current. By sequentially performing this for each row, an image can be displayed.

Note that at least part of this embodiment can be implemented in combination with any of the other embodiments described in this specification as appropriate.

(Embodiment 5)
In this embodiment, electronic devices of one embodiment of the present invention are described with reference to drawings.

The electronic device exemplified below includes the display device of one embodiment of the present invention in the display portion. Therefore, the electronic device has a high resolution. In addition, the electronic device can achieve both high resolution and a large screen.

For example, full high vision, 4K2K, 8K4K, 16K8K, or higher resolution video can be displayed on the display portion of the electronic device of one embodiment of the present invention. Further, the screen size of the display unit may be 20 inches or more diagonal, 30 inches or more, 50 inches or more, 60 inches or more, or 70 inches or more.

Examples of electronic devices include relatively large screens such as television devices, desktop or notebook personal computers, monitors for computers, digital signage (digital signage), and large game machines such as pachinko machines. In addition to the electronic devices provided, a digital camera, a digital video camera, a digital photo frame, a mobile phone, a portable game machine, a portable information terminal, a sound reproduction device, and the like can be given.

The electronic device or the lighting device of one embodiment of the present invention can be incorporated along a curved surface of an inner wall or an outer wall of a house or a building, or an interior or exterior of an automobile.

The electronic device of one embodiment of the present invention may have an antenna. By receiving a signal with an antenna, video, information, and the like can be displayed on the display unit. In the case where the electronic device has an antenna and a secondary battery, the antenna may be used for non-contact power transmission.

The electronic device of one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, It may have a function of measuring voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared).

The electronic device of one embodiment of the present invention can have various functions. For example, a function for displaying various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a function for displaying a calendar, date or time, a function for executing various software (programs), and wireless communication A function, a function of reading a program or data recorded on a recording medium, and the like can be provided.

FIG. 17A shows an example of a television device. In the television device 7100, a display portion 7000 is incorporated in a housing 7101. Here, a structure in which the housing 7101 is supported by a stand 7103 is shown.

The display device of one embodiment of the present invention can be applied to the display portion 7000.

The operation of the television device 7100 illustrated in FIG. 17A can be performed using an operation switch included in the housing 7101 or a separate remote controller 7111. Alternatively, the display portion 7000 may be provided with a touch sensor, and the television device 7100 may be operated by touching the display portion 7000 with a finger or the like. The remote controller 7111 may include a display unit that displays information output from the remote controller 7111. Channels and volume can be operated with an operation key or a touch panel included in the remote controller 7111, and an image displayed on the display portion 7000 can be operated.

Note that the television device 7100 is provided with a receiver, a modem, and the like. A general television broadcast can be received by the receiver. In addition, by connecting to a wired or wireless communication network via a modem, information communication is performed in one direction (from the sender to the receiver) or in two directions (between the sender and the receiver or between the receivers). It is also possible.

FIG. 17B shows a laptop personal computer 7200. A laptop personal computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, and the like. A display portion 7000 is incorporated in the housing 7211.

The display device of one embodiment of the present invention can be applied to the display portion 7000.

FIGS. 17C and 17D show examples of digital signage (digital signage).

A digital signage 7300 illustrated in FIG. 17C includes a housing 7301, a display portion 7000, a speaker 7303, and the like. Furthermore, an LED lamp, operation keys (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, and the like can be provided.

FIG. 17D shows a digital signage 7400 attached to a columnar column 7401. The digital signage 7400 includes a display portion 7000 provided along the curved surface of the column 7401.

17C and 17D, the display device of one embodiment of the present invention can be applied to the display portion 7000.

The wider the display unit 7000, the more information can be provided at one time. In addition, the wider the display unit 7000, the more easily noticeable to the human eye. For example, the advertising effect can be enhanced.

It is preferable to apply a touch panel to the display unit 7000, which not only displays an image or a moving image on the display unit 7000, but also allows the user to operate intuitively. In addition, when it is used for providing information such as route information or traffic information, usability can be improved by an intuitive operation.

In addition, as illustrated in FIGS. 17C and 17D, the digital signage 7300 or the digital signage 7400 can be linked with the information terminal 7311 or the information terminal 7411 such as a smartphone possessed by the user by wireless communication. Is preferred. For example, advertisement information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411. Further, the display on the display unit 7000 can be switched by operating the information terminal 7311 or the information terminal 7411.

Also, it is possible to cause the digital signage 7300 or the digital signage 7400 to execute a game using the screen of the information terminal 7311 or the information terminal 7411 as an operation means (controller). Thereby, an unspecified number of users can participate and enjoy the game at the same time.

Note that at least part of this embodiment can be implemented in combination with any of the other embodiments described in this specification as appropriate.

DESCRIPTION OF SYMBOLS 10 Display system 10A Display system 11 Selector circuit 12 Selector circuit 20 Display apparatus 21 Display part 22 Source drive circuit 23 Gate drive circuit 24 Timing controller 25 Backlight 30 Image receiving apparatus 31 Processing part 32 Decoder 33 Front end part 34 Reception part 35 Reception part 36 Interface 37 Control circuit 41 Remote controller 51 Pixel

Claims (7)

1. A display system having an image receiving device and a display device,
   The display device includes a drive circuit and a display unit,
   The drive circuit has a function of sequentially writing image data to the display unit,
   The image receiving device has a function of receiving a video signal and a function of controlling the drive circuit of the display device,
   The image receiving device detects an image frame frequency of image information included in the video signal, and according to the image frame frequency, a writing period in which the image data is written, a pause period in which the image data is not written, Have the ability to change the
   Display system.
2. A display system having an image receiving device and a display device,
   The display device includes a drive circuit and a display unit,
   The drive circuit has a function of sequentially writing image data to the display unit,
   The image receiving device has a function of receiving a video signal and a function of controlling the drive circuit of the display device,
   The image receiving device detects an image frame frequency of image information included in the video signal, and according to the image frame frequency, a writing period in which the image data is written, a pause period in which the image data is not written, Has the ability to change
   The image receiving device has a function of controlling the drive circuit so as to cut off the supply of power to the drive circuit during the pause period.
   Display system.
3. In claim 1 or claim 2,
   The image receiving device has a function of detecting an image resolution of the image information;
   The display unit includes a plurality of gate lines and a plurality of source lines intersecting with the gate lines,
   When the image resolution of the image information is d and the resolution of the display unit is D, the image receiving device has 2 ⁿ adjacent pixels when d = D / 2 ²ⁿ (n is an integer of 1 or more). Having the function of controlling the drive circuit so that the same data is written to the source line and the adjacent 2 ⁿ gate lines are simultaneously selected.
   Display system.
4. In claim 1 or claim 2,
   When the image frame frequency of the image information is f, the maximum frequency that can be displayed by the display unit is F, and the frame period is 1 / F, f = F / 2 ^m (m is 1 or more). Of the 2 ^m frame period, the p frame (p is an integer of ^{1 to} 2 ^m-1 or less) is used as the writing period, and the remaining 2 ^m -p frames are used as the pause period. , Having a function of controlling the drive circuit,
   Display system.
5. In claim 4,
   p = 1 is satisfied,
   Display system.
6. In claim 4,
   The display unit has a backlight device,
   The backlight device is controlled by the drive circuit,
   The image receiving device has a function of controlling the drive circuit such that the backlight device blinks at a cycle twice the image frame frequency.
   Display system.
7. In claim 6,
   The image receiving device has a function of controlling the drive circuit such that a period during which the backlight device is lit overlaps with the pause period, and a period during which the backlight device is turned off overlaps with the writing period. ,
   Display system.

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