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WO2018182644A1 - Mémoire spintronique à faible précipitation d'oxygène - Google Patents

Mémoire spintronique à faible précipitation d'oxygène Download PDF

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Publication number
WO2018182644A1
WO2018182644A1 PCT/US2017/025156 US2017025156W WO2018182644A1 WO 2018182644 A1 WO2018182644 A1 WO 2018182644A1 US 2017025156 W US2017025156 W US 2017025156W WO 2018182644 A1 WO2018182644 A1 WO 2018182644A1
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WIPO (PCT)
Prior art keywords
layer
oxide
layers
magnetic
free
Prior art date
Application number
PCT/US2017/025156
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English (en)
Inventor
Md Tofizur Rahman
Christopher J. WIEGAND
Daniel G. OUELLETTE
Angeline K. SMITH
Justin S. BROCKMAN
Kevin P. O'brien
Kaan OGUZ
Mark L. Doczy
Brian S. Doyle
Oleg Golonzka
Tahir Ghani
Original Assignee
Intel Corporation
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Application filed by Intel Corporation filed Critical Intel Corporation
Priority to PCT/US2017/025156 priority Critical patent/WO2018182644A1/fr
Publication of WO2018182644A1 publication Critical patent/WO2018182644A1/fr

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/80—Constructional details
    • H10N50/85—Materials of the active region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/10—Magnetoresistive devices

Definitions

  • Embodiments of the invention are in the field of semiconductor devices and, in particular, memory.
  • FIG. 1 includes spin transfer torque random access memory (STTRAM), a form of STTM.
  • Figure 1 includes a MTJ consisting of ferromagnetic (FM) layers 125, 127 and tunneling barrier 126 (e.g., magnesium oxide (MgO)).
  • the MTJ couples bit line (BL) 105 to selection switch 120 (e.g., transistor), word line (WL) 110, and sense line (SL) 115.
  • Memory 100 is "read” by assessing the change of resistance (e.g., tunneling magnetoresi stance (TMR)) for different relative magnetizations of FM layers 125, 127.
  • TMR tunneling magnetoresi stance
  • MTJ resistance is determined by the relative magnetization directions of layers 125, 127.
  • Layer 127 is the "reference layer” or “fixed layer” because its magnetization direction is fixed.
  • Layer 125 is the "free layer” because its magnetization direction is changed by passing a driving current polarized by the reference layer (e.g., positive voltage applied to layer 127 rotates the magnetization direction of layer 125 opposite to that of layer 127 and negative voltage applied to layer 127 rotates the magnetization direction of layer 125 to the same direction of layer 127).
  • Figure 1 depicts a conventional magnetic memory cell.
  • Figures 2-3 depict conventional MTJs.
  • Figure 4 includes a memory stack in an embodiment.
  • Figures 5A, 5B, 5C, 5D include embodiments of free layers.
  • Figure 6 includes a memory cell in an embodiment.
  • Figure 7 depicts a method of forming a memory in an embodiment.
  • Figures 8, 9, 10 depict systems for use with embodiments.
  • Some embodiments may have some, all, or none of the features described for other embodiments.
  • First, “second”, “third” and the like describe a common object and indicate different instances of like objects are being referred to. Such adjectives do not imply objects so described must be in a given sequence, either temporally, spatially, in ranking, or in any other manner.
  • Connected may indicate elements are in direct physical or electrical contact with each other and “coupled” may indicate elements co-operate or interact with each other, but they may or may not be in direct physical or electrical contact.
  • similar or same numbers may be used to designate same or similar parts in different figures, doing so does not mean all figures including similar or same numbers constitute a single or same embodiment.
  • CMOS complementary metal-oxide-semiconductor
  • spin polarization which concerns the degree to which the spin or intrinsic angular momentum of elementary particles is aligned with a given direction
  • spintronics a branch of electronics concerning the intrinsic spin of an electron, its associated magnetic moment, and the electron's fundamental electronic charge
  • TMR Spintronics devices
  • STT spin polarized electrons
  • CMOS devices include, for example, spintronics devices implemented in memory (e.g., 3 terminal STTRAM), spin logic devices (e.g., logic gates), tunnel field-effect transistors (TFETs), impact ionization MOS (JJVIOS) devices, nano-electro-mechanical switches (NEMS), negative common gate FETs, resonant tunneling diodes (RTD), single electron transistors (SET), spin FETs, nanomagnet logic (NML), domain wall logic, domain wall memory, magnetic sensors, and the like.
  • spintronics devices implemented in memory (e.g., 3 terminal STTRAM), spin logic devices (e.g., logic gates), tunnel field-effect transistors (TFETs), impact ionization MOS (JJVIOS) devices, nano-electro-mechanical switches (NEMS), negative common gate FETs, resonant tunneling diodes (RTD), single electron transistors (SET), spin FETs, nanomagnet logic (NML), domain wall logic, domain wall
  • one form of STTM includes perpendicular STTM (pSTTM).
  • pSTTM perpendicular STTM
  • a perpendicular MTJ generates magnetization "out of plane”. This reduces the switching current needed to switch between high and low memory states. This also allows for better scaling (e.g., smaller size memory cells).
  • Traditional MTJs are converted to pMTJs by, for example, thinning the free layer, thereby making the tunnel barrier/free layer interface more dominant in magnetic field influence (and the interface promotes anisotropic out of plane magnetization).
  • Figure 2 includes such a system 200 with cobalt, iron, boron (CoFeB) free layer 225 interfacing magnesium oxide (MgO) tunnel barrier 226, which further couples to CoFeB fixed layer 227 and Tantalum (Ta) contacts 214 (which may couple to a selection switch such as transistor 120 of Figure 1), 216 (which may couple, by way of one or more vias, to a bit line such as bit line 105 of Figure 1).
  • CoFeB cobalt, iron, boron
  • MgO magnesium oxide
  • Ta Tantalum
  • FIG. 3 depicts a system 300 with a MTJ, where a second oxidized MgO interface 320 (sometimes referred to as a "cap layer”) contacts CoFeB free layer 325 (which further couples to a tunnel barrier MgO 326, which is formed on CoFeB fixed layer 327).
  • a second oxidized MgO interface 320 sometimes referred to as a "cap layer”
  • CoFeB free layer 325 which further couples to a tunnel barrier MgO 326, which is formed on CoFeB fixed layer 327.
  • Cap layer 320 may increase thermal stability for the memory.
  • Thermal stability is a metric associated with the retention of stored data in pSTTM devices for a certain period of time at certain environmental conditions. Thermal stability, as used herein, is determined as follows:
  • K e ff is effective PMA of the storage layer
  • V is the volume of the layer
  • T is temperature
  • E denotes the energy barrier between two magnetization configurations of the MTJ
  • k B is Boltzmann constant.
  • the thermal stability ⁇ is directly related to K e ff.
  • system 300 includes MgO at both free layer interfaces (i.e., layers 320, 326).
  • MgO layer 320 on top of CoFeB free layer 325 increases the memory's total resistance significantly (as compared to having just one oxide layer interface the free layer as in Figure 2), which makes the design impractical for scaled devices (e.g., 22 nm) because of degradation in resistance-area (RA) product and TMR.
  • RA resistance-area
  • RA product refers to a measurement unequal to resistivity. Resistivity has units in ohm-cm, whereas RA product has units in ohm-um 2 (and is based on material resistivity (p), dot area (A), and MgO thickness (T Mg o) such that increasing MgO thickness exponentially increases the RA product of the device). While resistivity represents an "inherent resistance” and is independent of the thickness of a material layer, RA product is exponentially proportional to the thickness of the material (e.g., MgO thickness). (Regarding "thickness", layer 320 is disposed “horizontally” for purposes of discussion herein and has a “thickness” in the vertical orientation. The length and width for layer 320 are “in plane” and the height or thickness is “out of plane”.)
  • Applicant has determined that adding a "stability boost magnet” layer above the cap layer may provide stability to memory.
  • This additional magnet layer may include CoFeB.
  • both the boost magnet layer and the free layer (and possibly the fixed layer) may each include CoFeB.
  • MgO is used as the cap oxide 320 to achieve interfacial perpendicular magnetic anisotropy (PMA) through the hybridization of iron (from the free layer 325) and oxygen (from the cap layer 320).
  • PMA interfacial perpendicular magnetic anisotropy
  • the MgO cap 320 is an insulator and adds series resistance to the stack 300, which causes the reduction of TMR and increase of RA product.
  • Applicant determined a second a problem exists because the benefits from MgO cap 320 are somewhat diminished due to gettering of oxygen from layer 320 by a metal electrode located on cap layer 320.
  • an electrode comprising, for example, tantalum will cause the precipitation of oxygen from layer 320 upwards to the tantalum electrode (due to the high affinity tantalum has for oxygen).
  • Applicant determined this in turn leads to diminished thermal stability for the memory because, due to the precipitation, there is not sufficient oxygen in the cap layer to hybridize with iron from the free layer (and this negatively affects PMA and thermal stability).
  • Applicant addresses the oxygen precipitation (and consequent decrease in thermal stability) by doping the MgO cap 320 with a noble and/or semi-noble metal.
  • the doped oxide cap reduces the resistance of the MgO cap and achieves TMR improvement and RA product reduction (which addresses the first problem identified above).
  • the metal of the doped oxide cap also prevents or diminishes oxygen gettering/precipitation from the cap oxide to the upper electrode (which addresses the second problem identified above).
  • Figure 4 includes an embodiment that addresses the problem (identified by Applicant) of low TMR, higher RA product, lower PMA, and lower thermal stability associated with oxygen precipitation from oxide cap layers that are located on MTJs.
  • memory 400 includes a MTJ 41 1 including a free magnetic layer 405, a fixed magnetic layer 403, and a tunnel barrier layer 404 between the free and fixed layers.
  • Layer 426 including a member selected from the group consisting of ruthenium, tungsten, molybdenum, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof.
  • layer 426 may include ruthenium.
  • First oxide layer 406 comprises MgO.
  • Layer 406 is between layer 426 and the MTJ 41 1. Layer 406 directly contacts both the free magnetic layer 405 and layer 426. Second oxide layer 416, comprising MgO, is between the layer 426 and the additional magnetic layer 407 (e.g., stability boost magnet that helps stabilize the memory state of memory 400). Layer 416 directly contacts the layer 426. Memory stack 400 further includes first contact layer 401 and second contact layer. Layer 407 is between the layer 426 and the second contact layer 410. In an embodiment the second oxide layer 416 directly contacts the additional magnetic layer 407.
  • Second oxide layer 416 comprising MgO
  • additional magnetic layer 407 e.g., stability boost magnet that helps stabilize the memory state of memory 400.
  • Layer 416 directly contacts the layer 426.
  • Memory stack 400 further includes first contact layer 401 and second contact layer.
  • Layer 407 is between the layer 426 and the second contact layer 410. In an embodiment the second oxide layer 416 directly contacts the additional magnetic layer 407.
  • the tunnel barrier layer 404 includes MgO; and the free magnetic layer 405 and the additional magnetic layer 407 each include cobalt and iron.
  • Layers 405 and/or 407 may each include varying levels of boron depending on how much, if any, boron has precipitated out of those layers into surrounding layers based on anneal temperatures, anneal times, and the like for stack 400.
  • one or both of layers 405, 407 may be a composite layer including alternating layers that respectively include cobalt and (a) palladium and/or (b) platinum.
  • first and second contact layers 401, 410 include a metal that does not include a member selected from the group consisting of ruthenium, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof.
  • first and second contact layers 401, 410 may each include tantalum.
  • the tantalum has a high affinity for oxygen, such as the oxygen of MgO. While the oxygen of layer 416 may still precipitate towards the tantalum of contact 410, the oxygen of layer 406 will be protected from such precipitation due to a metal with low affinity for oxygen (e.g., ruthenium, tungsten, or molybdenum) in layer 426.
  • oxygen in layer 406 is available for hybridization with iron from free magnetic layer 405, which promotes higher PMA and thermal stability.
  • An embodiment may include a pinning layer 402, otherwise known as a Synthetic Antiferromagnetic layer (SAF).
  • SAF Synthetic Antiferromagnetic layer
  • the first oxide layer 406 may include more oxygen atomic mass than the second oxide layer 416 in some embodiments. This may be absolute regardless of thickness of layers 406, 416. In other embodiments this may be a percentage. In other words, the first oxide layer 406 includes a chemical composition with a higher percentage of oxygen than a chemical composition of the second layer 416. Thus, even though layer 416 may be thicker than layer 406 in some embodiment the percentage of oxygen in the relatively thinner layer 406 will be greater than the percentage of oxygen in the relatively thicker layer 416.
  • a side of the first oxide layer 406, which directly contacts the free magnetic layer 405, is primarily located in a plane 436.
  • the first oxide layer has a first thickness 406' that is orthogonal to the plane 436; the second oxide layer has a second thickness 416'; and the layer has a third thickness 426' that is less than the first thickness 406' .
  • the third thickness 426' is less than the second thickness 416' and the first thickness 406' .
  • the third thickness 426' is less than two monolayers thick (where a "monolayer" is a layer 1 molecule thick). In other embodiments the third thickness 426' is less than or equal to a single monolayer thick.
  • the third thickness 426' is less than or equal to 2 monolayers thick.
  • the thinness of layer 426 may be critical in some embodiments because if layer 426 becomes too thick (i.e., greater than or equal to 3 monolayers) layer 426 may disconnect layer 406 and/or layer 416.
  • thickness 406' is between 5 to 15 angstroms
  • thickness 416' is between 5 to 15 angstroms
  • thickness 426' is between 0.5 to 3 angstroms.
  • the relationship between thicknesses 406', 416', 426' is critical in some embodiments.
  • thicknesses 406', 416' must be thick enough to promote PMA yet not so thick as to overly increase series resistance for the oxide cap layer that is comprised of layers 406, 416, and 426.
  • some of the metal of layer 426 migrates out from layer 426 into layers 406 and/or 416.
  • the metal forms projections within the oxide layers 406 and/or 416.
  • the projections may include voids formed by the passing of the metal atoms through the oxide layers and/or the projections may include the metal atoms themselves that precipitated or more generally projected from the metal layer 426 into oxide layers 406 and/or 416.
  • the projections make a micro shorting path for electric current and lower the resistance of the oxide layers, which eventually reduce the series resistance (e.g., a projection may form a current path of lower resistance relative to the rest of the oxide layer) for the stack 400.
  • This causes a greater percentage of the resistance drop to occur across the spin filter (i.e., tunnel barrier 404), which increases TMR and lowers the RA product contribution from the cap layer (comprised of layers 406, 416, 426) for the memory stack.
  • the projections may extend from the metal layer 426 partially into the portion of the oxide layers 406, 416 which are immediately adjacent to layer 426. However, the projections may also extend across a majority of the oxide layers 406, 416. Should layers 406 and/or 416 be too thick the projection may extend across the layer or layers to a lesser extent and consequently have a lesser effect on lowering series resistance for the cap layer comprised of layers 406, 416, 426.
  • the projection from layer 426 may be contiguous or non-contiguous.
  • the resulting image may show individual metal atoms that are primarily located within layer 426 (or voids created by the passage of such atoms or due to the impact from such atoms).
  • the image may also include clusters of metal atoms and/or individual metal atoms that have moved from layer 426 into the oxide layer(s) 406 and/or 416.
  • a projection as used herein is not to be construed in a literal sense entailing, for example, a mechanical spike used to secure two structures to each other but instead entails atoms projecting through another layer thereby causing damage to the layer and decreasing the resistance of the layer.
  • thickness 426' must be thick enough to adequately prevent oxygen migration from layer 406 to contact 410 yet be thin enough so as to not negate the PMA advantages offered by layers 406, 416.
  • magnet layer 407 may not couple magnetically to the free layer 405 due to the distance between layers 405, 407 (which may decrease stability benefits of layer 407). Also, an embodiment provides that the magnet layer 407 needs to be thick enough so that it is indeed magnetic (e.g., at least 5-6 angstroms thick to be somewhat magnetic and thicker than 10 angstroms where greater magnetic field is beneficial).
  • the combinations of thicknesses cooperate in a critical manner to properly balance PMA, TMR, resistance (RA product), and/or thermal stability.
  • the additional magnetic layer 407 is a composite layer including alternating layers that respectively include cobalt and platinum. In an embodiment the additional magnetic layer 407 is a composite layer including alternating layers that respectively include cobalt and palladium.
  • the free layer is a single layer 501 (approximately 1.0 nm thick) including CoFeB.
  • Figure 5B includes an embodiment where the free layer is a composite layer including a first layer 511 (approximately 1.55 nm thick) comprising boron and a second layer 512 (approximately 0.3 nm thick) comprising tungsten.
  • Figure 5C includes an embodiment where the free layer is a composite layer including a first layer 521 (approximately 1.55 nm thick) comprising boron, a second layer 522 comprising tungsten (approximately 0.3 nm thick), and a third layer 523 (approximately 0.3 nm thick) comprising boron.
  • Figure 5D includes an embodiment wherein (a) the free layer is a composite layer including first 531 (approximately 0.5 nm thick) and second layers 532 (approximately 0.4 nm thick), (b) the first layer is between the second layer and the tunnel barrier layer (not shown), and (c) the first layer includes a chemical composition with a higher percentage of boron (e.g., 30%) than a chemical composition of the second layer (e.g., 20%).
  • a chemical composition with a higher percentage of boron e.g., 30%
  • a chemical composition of the second layer e.g. 20%
  • the free layer is a composite layer including first and second layers, the first layer is between the second layer and the tunnel barrier layer, and the first layer is primarily located in a plane and has a thickness, orthogonal to the plane, that is thicker than the second layer.
  • layer 531 has a thickness 541 (e.g., 0.5 nm) that is thicker than thickness 542 (e.g., 0.4 nm) for layer 532.
  • An embodiment may include a cladding layer between the contact layers 401, 410.
  • a cladding layer may include, for example, tantalum.
  • a cladding layer is a layer that substantially covers a portion of a structure, such as memory 400.
  • a cladding layer may serve as a contact layer (so that layer 410 may be unnecessary) or may serve as an adhesion layer for the top contact 410 and may include, for example, tantalum.
  • An embodiment may include an additional MgO layer on top of magnet layer 407.
  • the additional MgO layer may include sublayers of MgO (similar to layers 406, 416) and metal (similar to layer 426) to prevent added RA product.
  • tunnel barrier layer 404 and the oxide layers 406, 416 both include magnesium oxide.
  • layer 404 and/or layers 406, 416 may include aluminum oxide (A1 2 0 3 ), and/or MgAlOx.
  • Figure 4 is an example of an embodiment whereby a multilayer cap oxide (such as the cap oxide formed by layers 406, 416, 426) is formed adjacent a boost magnet layer 407.
  • a multilayer cap oxide such as the cap oxide formed by layers 406, 416, 426)
  • a boost magnet layer 407 Such a combination of layers induces increased stability without unnecessarily increasing RA product and/or decreasing TMR (as is the case with the dual MgO layers found in Figure 3).
  • this arrangement of layers induces greater stability without overly increasing RA product (which may adversely affect write/read voltages) or diminishing TMR (which may complicate accurate reads of memory states).
  • FIG. 6 depicts an embodiment wherein memory 800 comprises a perpendicular STTM that includes MTJ 811.
  • the MTJ has perpendicular anisotropy.
  • the MTJ comprises contacts 801, 810, pinning layer 802, fixed layer 803, tunnel barrier layer 804, free layer 805, oxide layers 806, 816, layer 826 (including a metal such as ruthenium), stability boost magnet layer 807 (which, in some embodiments, includes alternating cobalt and platinum or palladium layers to enhance stability for the small film MTJ).
  • the MTJ couples bit line 825 to selection switch 821 (e.g., transistor), word line 820, and sense line 815.
  • the MTJ may be located on a substrate.
  • the substrate is a bulk semiconductive material as part of a wafer.
  • the semiconductive substrate is a bulk semiconductive material as part of a chip that has been singulated from a wafer.
  • the semiconductive substrate is a semiconductive material that is formed above an insulator such as a semiconductor on insulator (SOI) substrate. There may be one or more layers between the MTJ and the substrate. There may be one or more layers above the MTJ.
  • SOI semiconductor on insulator
  • Block 701 includes forming a first contact layer.
  • Block 702 includes forming a magnetic tunnel junction (MTJ) on the first contact layer, the MTJ including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier layer between the free and fixed magnetic layers.
  • Block 703 includes forming a first oxide layer directly contacting the free magnetic layer.
  • Block 704 includes forming a layer directly contacting the first oxide layer, the layer including a member selected from the group consisting of ruthenium, tungsten, molybdenum, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof.
  • Block 705 includes forming a second oxide layer on the layer.
  • Block 706 includes forming a second contact layer on the second oxide layer.
  • system 900 may be a smartphone or other wireless communicator or any Internet of Things (IoT) device.
  • a baseband processor 905 is configured to perform various signal processing with regard to communication signals to be transmitted from or received by the system.
  • baseband processor 905 is coupled to an application processor 910, which may be a main CPU of the system to execute an OS and other system software, in addition to user applications such as many well-known social media and multimedia apps.
  • Application processor 910 may further be configured to perform a variety of other computing operations for the device.
  • application processor 910 can couple to a user interface/display 920 (e.g., touch screen display).
  • application processor 910 may couple to a memory system including a non-volatile memory, namely a flash memory 930 (which may include memory cells such as those described in Figures 4 and/or 6) and a system memory, namely a DRAM 935 (which may include memory cells such as those described in Figures 4 and/or 6).
  • flash memory 930 may include a secure portion 932 (which may include memory cells such as those described in Figures 4 and/or 6) in which secrets and other sensitive information may be stored.
  • application processor 910 also couples to a capture device 945 such as one or more image capture devices that can record video and/or still images.
  • a universal integrated circuit card (UICC) 940 comprises a subscriber identity module, which in some embodiments includes a secure storage 942 (which may include memory cells such as those described in Figures 4 and/or 6) to store secure user information.
  • System 900 may further include a security processor 950 (e.g., Trusted Platform Module (TPM)) that may couple to application processor 910.
  • TPM Trusted Platform Module
  • a plurality of sensors 925, including one or more multi-axis accelerometers may couple to application processor 910 to enable input of a variety of sensed information such as motion and other environmental information.
  • one or more authentication devices 995 may be used to receive, for example, user biometric input for use in authentication operations.
  • a near field communication (NFC) contactless interface 960 is provided that communicates in a NFC near field via an NFC antenna 965. While separate antennae are shown, understand that in some implementations one antenna or a different set of antennae may be provided to enable various wireless functionalities.
  • NFC near field communication
  • a power management integrated circuit (PMIC) 915 couples to application processor 910 to perform platform level power management. To this end, PMIC 915 may issue power management requests to application processor 910 to enter certain low power states as desired. Furthermore, based on platform constraints, PMIC 915 may also control the power level of other components of system 900.
  • PMIC power management integrated circuit
  • RF transceiver 970 may be used to receive and transmit wireless data and calls according to a given wireless communication protocol such as 3G or 4G wireless communication protocol such as in accordance with a code division multiple access (CDMA), global system for mobile communication (GSM), long term evolution (LTE) or other protocol.
  • CDMA code division multiple access
  • GSM global system for mobile communication
  • LTE long term evolution
  • a GPS sensor 980 may be present, with location information being provided to security processor 950 for use as described herein when context information is to be used in a pairing process.
  • Other wireless communications such as receipt or transmission of radio signals (e.g., AM/FM) and other signals may also be provided.
  • radio signals e.g., AM/FM
  • WLAN transceiver 975 local wireless communications, such as according to a BluetoothTM or IEEE 802.11 standard can also be realized.
  • Multiprocessor system 1000 is a point-to-point interconnect system such as a server system, and includes a first processor 1070 and a second processor 1080 coupled via a point-to-point interconnect 1050.
  • processors 1070 and 1080 may be multicore processors such as SoCs, including first and second processor cores (i.e., processor cores 1074a and 1074b and processor cores 1084a and 1084b), although potentially many more cores may be present in the processors.
  • processors 1070 and 1080 each may include a secure engine 1075 and 1085 to perform security operations such as attestations, IoT network onboarding or so forth.
  • First processor 1070 further includes a memory controller hub (MCH) 1072 and point-to-point (P-P) interfaces 1076 and 1078.
  • second processor 1080 includes a MCH 1082 and P-P interfaces 1086 and 1088.
  • MCH's 1072 and 1082 couple the processors to respective memories, namely a memory 1032 and a memory 1034, which may be portions of main memory (e.g., a DRAM) locally attached to the respective processors. These memories may include memory cells such as those described in Figures 4 and/or 6.
  • First processor 1070 and second processor 1080 may be coupled to a chipset 1090 via P-P interconnects 1052 and 1054, respectively.
  • Chipset 1090 includes P-P interfaces 1094 and 1098.
  • chipset 1090 includes an interface 1092 to couple chipset 1090 with a high performance graphics engine 1038, by a P-P interconnect 1039.
  • chipset 1090 may be coupled to a first bus 1016 via an interface 1096.
  • Various input/output (I/O) devices 1014 may be coupled to first bus 1016, along with a bus bridge 1018 which couples first bus 1016 to a second bus 1020.
  • Various devices may be coupled to second bus 1020 including, for example, a keyboard/mouse 1022, communication devices 1026 and a data storage unit 1028 such as a non-volatile storage or other mass storage device (which may include memory cells such as those described in Figures 4 and/or 6).
  • data storage unit 1028 may include code 1030, in one embodiment.
  • data storage unit 1028 also includes a trusted storage 1029 (which may include memory cells such as those described in Figures 4 and/or 6) to store sensitive information to be protected.
  • a audio I/O 1024 may be coupled to second bus 1020.
  • module 1300 may be an Intel® CurieTM module that includes multiple components adapted within a single small module that can be implemented as all or part of a wearable device.
  • module 1300 includes a core 1310 (of course in other embodiments more than one core may be present).
  • core 1310 may implement a TEE as described herein.
  • Core 1310 couples to various components including a sensor hub 1320, which may be configured to interact with a plurality of sensors 1380, such as one or more biometric, motion environmental or other sensors.
  • a power delivery circuit 1330 is present, along with a non-volatile storage 1340 (which may include memory cells such as those described in Figures 4 and/or 6).
  • this circuit may include a rechargeable battery and a recharging circuit, which may in one embodiment receive charging power wirelessly.
  • One or more input/output (IO) interfaces 1350 such as one or more interfaces compatible with one or more of USB/SPI/I2C/GPIO protocols, may be present.
  • a wireless transceiver 1390 which may be a BluetoothTM low energy or other short-range wireless transceiver is present to enable wireless communications as described herein. Understand that in different implementations a wearable module can take many other forms. Wearable and/or IoT devices have, in comparison with a typical general purpose CPU or a GPU, a small form factor, low power requirements, limited instruction sets, relatively slow computation throughput, or any of the above.
  • perpendicular STTM While several embodiments herein describe perpendicular STTM, other embodiments are not so limited and may concern in plane (non-perpendicular) STTM, as well as embodiments that are neither fully in plane (non-perpendicular) nor fully out of plane (perpendicular) but are instead something in between in plane and out of plane.
  • a first layer e.g., oxide layer 406
  • a second layer e.g., free layer 405.
  • the first layer is said to "directly contact” a second layer (e.g., free layer 405).
  • the first layer e.g., oxide layer 406 is sublayer of the composite cap layer comprising layers 406, 416, 426).
  • the second layer may include oxidation at its surface/interface to the first layer. Such a situation would still comprise a first layer directly contacting the second layer despite the second layer including surface oxidation.
  • embodiments include fixed and free layers comprising CoFeB
  • other embodiments may include some combination of the fixed and free layers and boost magnet including CoFe/CoFeB (e.g., two of the three layers include CoFe and the other includes CoFeB or one or more of the layers includes both CoFe and CoFeB); CoFeB/Ta/CoFeB; or CoFe/CoFeB/Ta/CoFeB/CoFe.
  • other embodiments may include tunnel barriers having something other than MgO, such as other oxides (e.g., aluminum oxide).
  • Some embodiments may include magnetic layers 405 and/or 407 that do not include cobalt (e.g., may include FeB).
  • Example 1 includes an apparatus comprising: a magnetic tunnel junction (MTJ) including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier layer between the free and fixed magnetic layers; and a layer including a member selected from the group consisting of ruthenium, tungsten, molybdenum, rhodium, palladium, silver, osmium, iridium, platinum, gold, copper, or combinations thereof; a first oxide layer, comprising magnesium oxide (MgO), which (a)(i) is between the layer and the MTJ, and (a)(ii) directly contacts both the free magnetic layer and the layer.
  • Example 2 includes the apparatus of example 2 comprising: first and second contact layers; and an additional magnetic layer between the layer and the second contact layer.
  • Example 3 includes the apparatus of example 2 comprising a second oxide layer, comprising MgO, which (b)(i) is between the layer and the additional magnetic layer, and (a)(ii) directly contacts the layer.
  • example 3 illustrates that not all embodiments include multiple oxide layers within the cap oxide layer.
  • layer 416 is omitted.
  • layer 426 still prevents oxygen precipitation from layer 406 towards contact layer 410 (or any other layer with a strong affinity for oxygen and which is above layer 406).
  • layer 406 may be thickened to account for the lack of layer 416 (i.e., thickness of layer 406 may be increased to offset loss of stability that would otherwise be present if layer 416 were included).
  • layer 406 may be more than 15 angstroms while layer 426 may still be 2 monolayers or less.
  • cap oxide layer that includes oxide layers 406, 416 and the layer including a metal (layer 426) as well as additional oxide layers and or layers including metals with low affinity for oxygen).
  • Example 4 includes the apparatus of example 3 wherein the second oxide layer directly contacts the additional magnetic layer.
  • Example 5 includes the apparatus of example 4 wherein the second contact layer includes a metal that does not include a member selected from the group consisting of ruthenium, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof.
  • Example 6 includes the apparatus of example 4 wherein: a side of the first oxide layer, which directly contacts the free magnetic layer, is primarily located in a plane; and the first oxide layer has a first thickness that is orthogonal to the plane; the second oxide layer has a second thickness; the layer has a third thickness that is less than the first thickness.
  • Example 7 includes the apparatus of example 6 wherein the third thickness is less than the second thickness.
  • Example 8 includes the apparatus of example 7 wherein the third thickness is less than two monolayers thick.
  • Example 9 includes the apparatus of example 4 wherein the member of the layer is included in a projection that projects from the layer into at least one of the first and second oxide layers.
  • Example 10 includes the apparatus of example 4 wherein: the member of the layer is selected from the group consisting of ruthenium, tungsten, or molybdenum; and the second contact layer includes tantalum.
  • Example 11 includes the apparatus of example 4 wherein the additional magnetic layer is a composite layer including alternating layers that respectively include cobalt and platinum.
  • Example 12 includes the apparatus of example 4 wherein the first oxide layer includes more oxygen atomic mass than the second oxide layer.
  • Another version of example 12 includes the apparatus of example 4 wherein the first oxide layer includes a chemical composition with a higher percentage of oxygen than a chemical composition of the second oxide layer.
  • Example 13 includes the apparatus of example 4 wherein (a) the free magnetic layer is a composite layer including first and second layers, (b) the first layer is between the second layer and the tunnel barrier layer, and (c) the first layer includes a chemical composition with a higher percentage of boron than a chemical composition of the second layer.
  • Example 14 includes the apparatus of example 4 wherein: (a) the free magnetic layer is a composite layer including first and second layers, (b) the first layer is between the second layer and the tunnel barrier layer, and (c) the first layer is primarily located in a plane and has a thickness, orthogonal to the plane, that is thicker than the second layer.
  • Example 15 includes the apparatus of example 4 wherein the free magnetic layer is not a composite layer and includes a single layer.
  • Example 16 includes the apparatus of example 4 wherein: the tunnel barrier layer includes MgO; the free magnetic layer and the additional magnetic layer each include cobalt and iron.
  • Example 17 includes the apparatus of example 1, wherein the MTJ has perpendicular anisotropy.
  • Example 18 includes a perpendicular spin torque transfer memory (STTM) that includes the MTJ, the first oxide layer, and the layer according to any one of examples 1 to 17.
  • STTM perpendicular spin torque transfer memory
  • Example 19 includes a method comprising: forming a first contact layer; forming a magnetic tunnel junction (MTJ) on the first contact layer, the MTJ including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier layer between the free and fixed magnetic layers; forming a first oxide layer directly contacting the free magnetic layer; forming a layer directly contacting the first oxide layer, the layer including a member selected from the group consisting of ruthenium, tungsten, molybdenum, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof; forming a second oxide layer on the layer; forming a second contact layer on the second oxide layer.
  • MTJ magnetic tunnel junction
  • Example 19 includes a method comprising: forming a first contact layer; forming a magnetic tunnel junction (MTJ) on the first contact layer, the MTJ including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier layer between the free and fixed magnetic layers; forming a first oxide layer directly contacting the free magnetic layer; forming a layer directly contacting the first oxide layer, the layer including a member selected from the group consisting of ruthenium, tungsten, molybdenum, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof; forming a second oxide layer directly contacting the layer; and forming a second contact layer on the second oxide layer.
  • MTJ magnetic tunnel junction
  • Example 20 includes the method of example 19 comprising forming an additional magnetic layer directly contacting the second oxide layer.
  • Example 21 includes the method of example 19, wherein forming the layer includes forming a single monolayer of the member with no additional layer of the member above the single monolayer.
  • Example 22 includes a system comprising: a processor; and a memory, coupled to the processor, comprising: a first contact; a magnetic tunnel junction (MTJ), on the first contact, including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier layer between the free and fixed magnetic layers; and a layer including a member selected from the group consisting of ruthenium, tungsten, molybdenum, or combinations thereof; a first oxide layer which (a)(i) is between the layer and the MTJ, and (a)(ii) directly contacts both the free magnetic layer and the layer; a second contact; and a second oxide layer which (b)(i) is between the layer and the second contact, and (b)(ii) directly contacts the layer.
  • MTJ magnetic tunnel junction
  • Another version of example 22 includes a system comprising: a processor; and a memory, coupled to the processor, comprising: a first contact; a magnetic tunnel junction (MTJ), on the first contact, including a tunnel barrier layer between free and fixed magnetic layers; and a layer including a member selected from the group consisting of ruthenium, tungsten, molybdenum, or combinations thereof; a first oxide layer directly contacting both the free magnetic layer and the layer; a second contact; and a second oxide layer (a)(i) between the layer and the second contact, and (a)(ii) directly contacting the layer.
  • MTJ magnetic tunnel junction
  • Example 23 includes the system of example 22 wherein the layer is less than two monolayers thick.
  • Example 24 includes the system of example 22 wherein the first oxide layer includes a chemical composition with a higher percentage of oxygen than a chemical composition of the second oxide layer.
  • Example 25 includes a perpendicular spin torque transfer memory (STTM) that includes the MTJ, the first oxide layer, and the layer according to example 1.
  • STTM perpendicular spin torque transfer memory
  • Example 26 includes a perpendicular spin torque transfer memory (STTM) that includes the MTJ, the first oxide layer, and the layer according to any of examples 22 to 25.
  • STTM perpendicular spin torque transfer memory
  • Example 27 includes the apparatus of example 1 comprising a second oxide layer, comprising MgO, which (b)(i) is between the layer and the additional magnetic layer, and (b)(ii) directly contacts the layer.
  • Example 28 includes the apparatus according to any of examples 2 to 4 wherein the second contact layer includes a metal that does not include a member selected from the group consisting of ruthenium, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof.
  • Example 29 includes the apparatus according to any of examples 3 to 5 wherein: a side of the first oxide layer, which directly contacts the free magnetic layer, is primarily located in a plane; the first oxide layer has a first thickness that is orthogonal to the plane; the second oxide layer has a second thickness; and the layer has a third thickness that is less than the first thickness.
  • Example 30 includes the apparatus according to any of examples 3 to 8 and 10 to 17 wherein the member of the layer is included in a projection that projects from the layer into at least one of the first and second oxide layers.
  • Example 31 includes the apparatus according to any of examples 2 to 9 and 11 to 17 wherein: the member of the layer is selected from the group consisting of ruthenium, tungsten, or molybdenum; and the second contact layer includes tantalum.
  • Example 32 includes the apparatus according to any of examples 2 to 10 and 12 to 17 wherein the additional magnetic layer is a composite layer including alternating layers that respectively include cobalt and platinum.
  • Example 33 includes the apparatus according to any of examples 3 to 11 and 13 to 17 wherein the first oxide layer includes a chemical composition with a higher percentage of oxygen than a chemical composition of the second oxide layer.
  • Example 34 includes the apparatus according to any of examples 1 to 12 and 16 to 17 wherein (a) the free magnetic layer is a composite layer including first and second layers, (b) the first layer is between the second layer and the tunnel barrier layer, and (c) the first layer includes a chemical composition with a higher percentage of boron than a chemical composition of the second layer.
  • Example 35 includes the apparatus according to any of examples 1 to 12 and 16 to 17 wherein: (a) the free magnetic layer is a composite layer including first and second layers, (b) the first layer is between the second layer and the tunnel barrier layer, and (c) the first layer is primarily located in a plane and has a thickness, orthogonal to the plane, that is thicker than the second layer. [00101]
  • Example 36 includes the apparatus according to any of examples 1 to 12 and 16 to 17 wherein the free magnetic layer is not a composite layer and includes a single layer.
  • Example 37 includes the apparatus according to any of examples 2 to 15 wherein: the tunnel barrier layer includes MgO; and the free magnetic layer and the additional magnetic layer each include cobalt and iron.
  • Example 38 includes the apparatus according to any of examples 1 to 16, wherein the MTJ has perpendicular anisotropy.
  • Example 39 includes a perpendicular spin torque transfer memory (STTM) that includes the MTJ, the first oxide layer, and the layer according to any one of examples 1 to 17.
  • STTM perpendicular spin torque transfer memory
  • Example 40 includes the system according to any of examples 22 to 23 wherein the first oxide layer includes a chemical composition with a higher percentage of oxygen than a chemical composition of the second oxide layer.
  • terms designating relative vertical position refer to a situation where a device side (or active surface) of a substrate or integrated circuit is the "top” surface of that substrate; the substrate may actually be in any orientation so that a "top” side of a substrate may be lower than the “bottom” side in a standard terrestrial frame of reference and still fall within the meaning of the term “top.”
  • the term “on” as used herein does not indicate that a first layer “on” a second layer is directly on and in immediate contact with the second layer unless such is specifically stated; there may be a third layer or other structure between the first layer and the second layer on the first layer.
  • the embodiments of a device or article described herein can be manufactured, used, or shipped in a number of positions and orientations.

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Abstract

L'invention concerne, selon un mode de réalisation, un appareil comprenant : une jonction tunnel magnétique (MTJ) comprenant une couche magnétique libre, une couche magnétique fixe, et une couche barrière de tunnel disposée entre les couches magnétiques libre et fixe ; et une couche comprenant un élément choisi dans le groupe constitué par le ruthénium, le tungstène, le molybdène, le rhodium, le palladium, l'argent, l'osmium, l'iridium, le platine, l'or, le mercure, le cuivre ou des combinaisons de ces derniers ; une première couche d'oxyde, comprenant de l'oxyde de magnésium (MgO), qui (a)(i) se trouve entre la couche et la MTJ, et (a)(ii) vient directement en contact tant avec la couche magnétique libre qu'avec la couche. D'autres modes de réalisation sont décrits ici.
PCT/US2017/025156 2017-03-30 2017-03-30 Mémoire spintronique à faible précipitation d'oxygène WO2018182644A1 (fr)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20210184102A1 (en) * 2019-12-13 2021-06-17 SK Hynix Inc. Electronic device
US11735241B2 (en) * 2020-07-14 2023-08-22 Samsung Electronics Co., Ltd. Magnetic memory device and method for fabricating the same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140038312A1 (en) * 2009-03-02 2014-02-06 Qualcomm Incorporated Fabrication of a magnetic tunnel junction device
US20140374752A1 (en) * 2011-05-23 2014-12-25 Sony Corporation Perpendicular magnetization storage element and storage device
US20150028440A1 (en) * 2013-07-26 2015-01-29 Agency For Science, Technology And Research Magnetoresistive device and method of forming the same
US20160055893A1 (en) * 2011-02-16 2016-02-25 Avalanche Technology, Inc. PERPENDICULAR MAGNETIC TUNNEL JUNCTION (pMTJ) WITH IN-PLANE MAGNETO-STATIC SWITCHING-ENHANCING LAYER
US20160133829A1 (en) * 2013-03-28 2016-05-12 Intel Corporation High Stability Spintronic Memory

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140038312A1 (en) * 2009-03-02 2014-02-06 Qualcomm Incorporated Fabrication of a magnetic tunnel junction device
US20160055893A1 (en) * 2011-02-16 2016-02-25 Avalanche Technology, Inc. PERPENDICULAR MAGNETIC TUNNEL JUNCTION (pMTJ) WITH IN-PLANE MAGNETO-STATIC SWITCHING-ENHANCING LAYER
US20140374752A1 (en) * 2011-05-23 2014-12-25 Sony Corporation Perpendicular magnetization storage element and storage device
US20160133829A1 (en) * 2013-03-28 2016-05-12 Intel Corporation High Stability Spintronic Memory
US20150028440A1 (en) * 2013-07-26 2015-01-29 Agency For Science, Technology And Research Magnetoresistive device and method of forming the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20210184102A1 (en) * 2019-12-13 2021-06-17 SK Hynix Inc. Electronic device
CN112993147A (zh) * 2019-12-13 2021-06-18 爱思开海力士有限公司 电子设备
US11730062B2 (en) * 2019-12-13 2023-08-15 SK Hynix Inc. Electronic device including thermal stability enhanced layer including homogeneous material having Fe-O bond
CN112993147B (zh) * 2019-12-13 2025-02-25 爱思开海力士有限公司 电子设备
US11735241B2 (en) * 2020-07-14 2023-08-22 Samsung Electronics Co., Ltd. Magnetic memory device and method for fabricating the same

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