WO2018133410A1 - Power management circuit, electronic device, and method for controlling electronic device - Google Patents

Abstract

Disclosed in an embodiment of the present invention are a power management circuit, an electronic device, and a control method. The circuit is applied in an electronic device, and comprises a power management chip, an interface detection chip used to connect to a TYPE_C interface, and a control circuit. The interface detection chip comprises a power detection pin and an enablement pin. The power detection pin is electrically connected to the power management chip. The control circuit is electrically connected to the enablement pin so as to turn off the interface detection chip when an electronic device is turned off, and to enable the interface detection chip when the electronic device is turned on. In the embodiment of the present invention, when the electronic device is turned off, the control circuit controls the interface detection chip to be in an Off state, such that even if a TYPE_C cable, which is not connected to a power supply device, is inserted into the interface detection chip, the power management chip is not triggered to start up, thereby solving a problem in which insertion of a TYPE_C cable, which is not connected to a power supply device, accidentally turns on an electronic device in an Off state.

Description

Power management circuit, electronic device and electronic device control method Technical field

The present invention relates to the field of power management technologies, and in particular, to a power management circuit, an electronic device, and an electronic device control method.

Background technique

With the development of technology, the TYPE_C interface has become the standard for high-end electronic devices. Correspondingly, the power management circuit of the electronic device generally includes a power management chip and an interface detection chip for connecting to the TYPE_C interface. When the electronic device is automatically turned off due to power exhaustion, if the TYPE_C interface is connected to a power device such as a charger or a computer through a TYPE_C cable, the power management chip detects the power input and controls the electronic device to be powered on. However, if the TYPE_C cable is not connected to the power supply device, the power management chip may be triggered, causing the electronic device to be powered on.

Summary of the invention

The embodiments of the present invention provide a power management circuit, an electronic device, and an electronic device control method, which are used to solve the problem that the TYPE_C cable of the unconnected power device is inserted into the interface detection chip, causing the electronic device to be powered on.

The embodiment of the invention provides a power management circuit, which is applied to an electronic device, including a power management chip, an interface detection chip for connecting the TYPE_C interface, and a control circuit. The interface detection chip includes a power detection pin and an enable pin, and the power detection pin is electrically connected to the power management chip, and the control circuit is electrically connected to the enable pin for closing the interface detection chip when the electronic device is powered off. And enabling the interface detection chip after the electronic device is powered on.

Embodiments of the present invention also provide an electronic device including a power management circuit. Wherein, the power management circuit is as described above.

The embodiment of the invention further provides an electronic device control method, including:

When the electronic device is in a shutdown state, receiving a shutdown signal sent by the control circuit to close the interface detection chip, the interface detection chip is electrically connected to the TYPE_C interface, and the TYPE_C interface is electrically connected to the power management chip;

Receive the insertion of the TYPE_C device to keep the interface detection chip off or enable the interface Detect the chip.

In the embodiment of the present invention, when the electronic device is powered off, the control circuit controls the interface to detect that the chip is in the off state. Therefore, if the TYPE_C cable that is not connected to the power device is inserted into the interface detection chip at this time, the power management chip is not triggered to be turned on, thereby solving the problem that the TYPE_C cable inserted into the unconnected power device is turned off and the electronic device is turned on by mistake.

DRAWINGS

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly described below. It is obvious that the drawings in the following description are some embodiments of the present invention. For the ordinary technicians, other drawings can be obtained based on these drawings without any creative work.

1 is a block diagram showing the structure of a power management circuit according to a first embodiment of the present invention;

Figure 2 is a circuit diagram of Figure 1;

Figure 3 is a schematic diagram of a circuit that causes a false boot;

FIG. 4 is a schematic flow chart of a method for controlling an electronic device according to a first embodiment of the present invention.

detailed description

The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are a part of the embodiments of the present invention, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

The use of the terms "comprising", "comprising", "","," The presence or addition of a plurality of other features, integers, steps, operations, elements, components, and/or collections thereof.

It is also to be understood that the terminology of the present invention is to be construed as a The singular forms "", ",",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,

It should also be further understood that the term "and" is used in the description of the invention and the appended claims. / or "" refers to any combination of one or more of the associated items and all possible combinations, and includes such combinations.

As used in this specification and the appended claims, the term "if" can be interpreted as "when" or "on" or "in response to determining" or "in response to detecting" depending on the context. . Similarly, the phrase "if determined" or "if detected [condition or event described]" may be interpreted in context to mean "once determined" or "in response to determining" or "once detected [condition or event described] ] or "in response to detecting [conditions or events described]".

In particular implementations, the terminals described in this embodiment of the invention include, but are not limited to, other portable devices such as mobile phones, laptop computers or tablet computers having touch sensitive surfaces (eg, touch screen displays and/or touch pads). It should also be understood that in some embodiments, the device is not a portable communication device, but a desktop computer having a touch sensitive surface (eg, a touch screen display and/or a touch pad).

In the following discussion, a terminal including a display and a touch sensitive surface is described. However, it should be understood that the terminal can include one or more other physical user interface devices such as a physical keyboard, mouse, and/or joystick.

Please refer to FIG. 1 , which is a structural block diagram of a power management circuit according to a first embodiment of the present invention. The power management circuit is applied to an electronic device such as a mobile terminal. As shown, the power management circuit can include:

a filter circuit 10, configured to connect to a power source; wherein the power source is used to provide power to the power management circuit;

Power management chip 11;

The interface detecting chip 12 is configured to connect to the TYPE_C interface, and includes a power detecting pin and an enable pin, and the power detecting pin is electrically connected to the power management chip 11;

The control circuit 13 is electrically connected to the enable pin for turning off the interface detecting chip 12 when the electronic device is turned off, and enabling the interface detecting chip 12 after the electronic device is turned on.

Further, the control circuit 13 includes a central processing unit 131 and an isolation circuit 132. The isolation circuit 132 is electrically connected to the central processing unit 131 and an enable pin for inverting the level signal output by the central processing unit 131. Specifically, when the electronic device is powered off, the central processing unit 131 sends a first level signal to the isolation circuit 132, and the isolation circuit 132 converts the first level signal into a second level signal and outputs the signal to the interface detection chip 12. The pin is enabled to turn off the interface detection chip 12.

Further, referring to FIG. 2, the interface detecting chip 12 includes a pin 1, a pin 2, and a pin 4. Pin 10, Pin 11 and Pin 12. Pin 1 and pin 2 are a first configuration channel pin CC1 and a second configuration channel pin CC2, respectively, for connecting to the TYPE_C interface 14, and the TYPE_C device accesses the interface detection chip 12 through the TYPE_C interface 14; 4 is a power detection pin VBUSDET for electrically connecting to the power management chip 11, and a resistor R1 is connected in series between the pin 4 and the power management chip 11; pin 10 is a ground pin GND; pin 11 is The pin ENB is used to electrically connect to the isolation circuit 132 of the control circuit 13; the pin 12 is a power input pin VDD for electrically connecting to the filter circuit 10.

Specifically, as shown in FIG. 2, the filter circuit 10 includes a first capacitor C1 and a second capacitor C2. The first capacitor C1 and the second capacitor C2 are connected in parallel, and one end connected in parallel is connected to a power source VPH_PWR that supplies power to the entire power management circuit. And the power supply input pin VDD (ie, pin 12) of the interface detecting chip 12, and the other end connected in parallel is grounded.

The isolation circuit 132 includes a first resistor R2, a second resistor R3, a third resistor R4, and a switch Q1. One end of the first resistor R2 is electrically connected to a power source VPH_PWR, and the other end is grounded through a second resistor R3 and a third resistor R4. The node A between the first resistor R2 and the second resistor R3 is electrically connected to the switch transistor Q1 and the enable pin ENB (ie, pin 11), and the node B between the second resistor R3 and the third resistor R4 is electrically connected. It is connected to the central processing unit 131 and the switching transistor Q1. In this embodiment, the switch transistor Q1 is an N-type field effect transistor, the drain thereof is grounded, and the gate is electrically connected to the node B between the second resistor R3 and the third resistor R4, and the source is electrically connected first. Node A between resistor R2, second resistor R3, and enable pin ENB (ie, pin 11).

In the following, please refer to FIG. 3 and FIG. 2 to better illustrate the working principle of the present invention:

As shown in FIG. 3, the central processing unit 231 transmits a low level signal and transmits it to the interface detecting chip 22 through the enable pin (ie, pin 11) of the interface detecting chip 22 to enable the interface detecting chip 22. When the electronic device is automatically shut down due to power exhaustion, if the TYPE_C interface 24 is connected to the unpowered device through the TYPE_C cable (ie, the pure TYPE_C cable is inserted through the TYPE_C interface), since the pure TYPE_C cable has a default 5.1K inside. Resistor R5 (which is specified by the standard TYPE_C protocol) will divide the power supply VPH_PWR with the internal resistor R6 of the interface detecting chip 22. The internal resistor R6 has one end connected to the power input pin VDD (ie, pin 12), and the other end connected to the power detecting pin VBUSDET (ie, pin 4) and the first configuration channel pin CC1 (ie, pin 1). At this time, it is detected that the voltage between the resistor R5 and the resistor R6 is about 0.9V. The voltage of about 0.9V will be reversed to the power management chip through the power detection pin VBUSDET (ie, pin 4). 21, because the power management chip 21 triggers the voltage of the electronic device to be turned on too low, so the voltage of about 0.9V triggers the boot, which causes a false boot.

Based on this, an embodiment of the present invention provides a control circuit 13 as shown in FIG. 2, which includes a central processing unit 131 and an isolation circuit 132. The central processing unit 131 outputs a first level signal (ie, a low level signal) from the node B to the isolation circuit 132, and the first level signal is converted into a second level signal after passing through the isolation circuit 132 (ie, high power) The flat signal), that is, the low level signal turns off Q1, at which time the potential of the enable pin ENB is at a high level, thereby turning off the interface detecting chip 12. In this case, when the electronic device is turned off, if the pure TYPE_C cable is inserted through the TYPE_C interface 14, since the interface detecting chip 12 has been turned off, the 0.9 of the power management chip 11 as described above is not generated. The voltage around V, thus solving the problem of false booting. When the inserted TYPE_C cable is connected to the charging device, the charging device outputs a normal voltage, for example, 5V, 12V, etc., to the power management chip 11, so that the power management chip 11 controls the terminal to be normally turned on. After the terminal is normally turned on, the central processing unit 131 outputs a second level signal (ie, a high level signal) to the isolation circuit 132, and the isolation circuit 132 converts it into a first level signal (ie, a low level signal), ie, The high level signal output by the central processing unit 131 turns on Q1. At this time, the enable pin ENB is grounded through Q1, thereby enabling the interface detecting chip 12.

Correspondingly, an embodiment of the present invention further provides an electronic device. The electronic device includes a power management circuit. For details, refer to the foregoing description of FIG. 1 and FIG. 2 for the internal structure and corresponding functions of the power management circuit, and details are not described herein again.

In the embodiment of the present invention, when the electronic device is powered off, the control circuit of the power management circuit controls the interface to detect that the chip is in the off state. Therefore, if the TYPE_C cable that is not connected to the power device is inserted into the interface detection chip at this time, the power management chip is not triggered to be turned on, thereby solving the problem that the TYPE_C cable inserted into the unconnected power device is turned off and the electronic device is turned on by mistake.

Referring to FIG. 4, it is a schematic flowchart of a method for controlling an electronic device according to a first embodiment of the present invention. As shown in the figure, the method may include:

S101, when the electronic device is in a shutdown state, the isolation circuit receives the first level signal sent by the central processing unit;

S102. The isolation circuit converts the first level signal into a second level signal, where the second level signal is a shutdown signal;

S103, the isolation circuit outputs a shutdown signal to an enable pin of the interface detection chip, the interface detection chip is electrically connected to the TYPE_C interface, and the TYPE_C interface is electrically connected to the power management chip;

S104, receiving a shutdown signal sent by the isolation circuit to close the interface detection chip; wherein the central processing unit and the isolation circuit form a control circuit;

S105. Receive an insertion of the TYPE_C device to keep the interface detection chip in a closed state or enable the interface detection chip. Specifically, when the TYPE_C cable that receives the unconnected power device is inserted, the interface detecting chip is turned off, the power management chip does not detect the power input, and does not trigger the electronic device to be powered on, thereby solving the TYPE_C of the unconnected power device. The cable insertion interface detects the problem of the wrong boot caused by the chip; when the TYPE_C cable that receives the connected power device (such as a charger or a computer) is inserted, the power management chip detects the power input, triggers the electronic device to be turned on, and the center The processor enables the interface to detect the chip.

It should be noted that, since the circuit part and the specific working process involved in the detection method in this embodiment have been described in detail above, they are not described herein again.

In the embodiment of the present invention, when the electronic device is in the power-off state, the shutdown signal sent by the control circuit is first received to close the interface detection chip, and then the insertion of the TYPE_C device is received to keep the interface detection chip in the off state or the interface detection chip is enabled. In the embodiment of the present invention, the type of the inserted TYPE_C device is considered to maintain the off state of the interface detection chip or enable the interface detection chip, thereby controlling whether to input a voltage to the power management chip, thereby controlling the electronic device to remain powered off or Normally power on, solve the problem that the TYPE_C cable that is not connected to the power device is inserted into the interface detection chip and causes the wrong boot.

Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the various examples described in connection with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both, for clarity of hardware and software. Interchangeability, the composition and steps of the various examples have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the solution. A person skilled in the art can use different methods for implementing the described functions for each particular application, but such implementation should not be considered to be beyond the scope of the present invention.

In addition, in the several embodiments provided in the present application, it should be understood that the disclosed terminal and method may be implemented in other manners. For example, the device embodiments described above are merely illustrative For example, the division of the unit is only a logical function division, and the actual implementation may have another division manner, for example, multiple units or components may be combined or may be integrated into another system, or some features may be ignored. Or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, or an electrical, mechanical or other form of connection.

The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the embodiments of the present invention.

In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

The steps in the method of the embodiment of the present invention may be sequentially adjusted, merged, and deleted according to actual needs.

The units in the terminal in the embodiment of the present invention may be combined, divided, and deleted according to actual needs.

The above is only the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any equivalent person can be easily conceived within the technical scope of the present invention by any person skilled in the art. Modifications or substitutions are intended to be included within the scope of the invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims (9)

A power management circuit is applied to an electronic device, including a power management chip and an interface detection chip for connecting to a TYPE_C interface, wherein the interface detection chip includes a power detection pin and an enable pin, and the power detection pin is electrically Connected to the power management chip, the power management circuit further includes a control circuit, the control circuit is electrically connected to the enable pin, and is configured to turn off when the electronic device is powered off The interface detects the chip and enables the interface detection chip after the electronic device is powered on. The power management circuit of claim 1 , wherein the control circuit comprises a central processing unit and an isolation circuit, the isolation circuit is electrically connected to the central processing unit and the enable pin, An isolation circuit is configured to invert a level signal output by the central processor, and when the electronic device is powered off, the central processor sends a first level signal to the isolation circuit, and the isolation circuit The first level signal is converted to a second level signal and output to the enable pin to turn off the interface detection chip. The power management circuit of claim 2, wherein the isolation circuit comprises a first resistor, a second resistor, a third resistor, and a switch tube, wherein one end of the first resistor is electrically connected to a power source, and the other end is The second resistor and the third resistor are grounded in sequence; the node between the first resistor and the second resistor is electrically connected to the switch tube and the enable pin, and the second resistor is A node between the third resistors is electrically connected to the central processor and the switch tube, and one end of the switch tube is grounded. The power management circuit according to claim 3, wherein said switching transistor is an N-type field effect transistor, said drain of said field effect transistor is grounded, and said gate of said field effect transistor is electrically connected to said first a node between the second resistor and the third resistor, wherein a source of the FET is electrically connected to a node between the first resistor, the second resistor, and the enable pin. A power management circuit according to any one of claims 1 to 4, wherein said interface check The test chip includes a power input pin, the power management circuit further includes a filter circuit electrically connected between a power source and the power input pin, the filter circuit includes a first capacitor and a second capacitor, wherein the A capacitor and a second capacitor are connected in parallel, and one end connected in parallel is connected to the power source and the interface detecting chip, and the other end connected in parallel is grounded. An electronic device comprising a power management circuit, characterized in that the power management circuit is as claimed in any one of claims 1-5. An electronic device control method, comprising: When the electronic device is in a power-off state, the shutdown signal sent by the control circuit is received to close the interface detection chip, and the interface detection chip is electrically connected to the TYPE_C interface, and the TYPE_C interface is electrically connected to the power management chip; An insertion of the TYPE_C device is received to keep the interface detection chip in the off state or to enable the interface detection chip. The electronic device control method according to claim 7, wherein receiving the insertion of the TYPE_C device to keep the interface detecting chip in the off state or enabling the interface detecting chip comprises: When the TYPE_C cable that receives the unconnected power device is inserted, the interface detecting chip is kept in the off state; When the TYPE_C cable that receives the connected power device is inserted, the interface detection chip is enabled. The electronic device control method according to claim 8, wherein the interface detecting chip comprises a power detecting pin and an enable pin, and the power detecting pin is electrically connected to the power management chip, The control circuit includes a central processing unit and an isolation circuit. The two ends of the isolation circuit are respectively connected to the central processing unit and the enable pin, and the control method further includes: The isolation circuit receives a first level signal sent by the central processing unit; The isolation circuit converts the first level signal into a second level signal, and the second level signal is the off signal; The isolation circuit outputs the off signal to the enable pin.

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