WO2019066861A1

WO2019066861A1 - Generating an association dataset for manipulating a photomask pattern

Info

Publication number: WO2019066861A1
Application number: PCT/US2017/054056
Authority: WO
Inventors: Raghunathan DHANANJAY VINJAMUR; Christopher Brockman; Raguraman Venkatesan; Diwakar Agarwal
Original assignee: Intel Corp
Current assignee: Intel Corp
Priority date: 2017-09-28
Filing date: 2017-09-28
Publication date: 2019-04-04
Anticipated expiration: 2020-03-28

Abstract

Apparatuses, methods and storage medium associated with generating an association dataset for manipulating a photomask pattern are disclosed herein. In embodiments, an apparatus to generate an association dataset for correction of a mask pattern (e.g., an arbitrary mask pattern) to compensate for liabilities predicted by one or more OPC (optical proximity correction) models based on the mask pattern may include a processor to: identify a plurality of evaluation points that correspond to a wafer target pattern that is different than the mask pattern; identify segments of a perimeter of the mask portions of the perimeter of the mask pattern to the evaluation points, respectively, in response to the identification of the segments; wherein the association dataset is based on the correlations.

Description

The present disclosure relates to the field of optical proximity correction, and more specifically relates to generating an association dataset for manipulating a photomask pattern to compensate for model predicted pattern liabilities associated with the photomask.

Background

The background description provided herein is for the purpose of generally presenting the context of the disclosure. Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.

in photolithography, the wavelength of the light source may be larger than the feature size of a design pattern to be transferred onto the wafer. This may produce interference patterns, diffraction patterns, or the like, or combinations thereof, which may cause a different shape to be printed on the wafer than the shape of the design pattern. For some mask patterns, optical proximity correction (OPC) seeks to correct these errors by manipulating the mask pattern (e.g., by representing the mask pattern as a collection of polygons and manipulating the edges of these polygons, or by selectively adding or removing certain polygons in the mask pattern). The eirors themselves may be predictions based on a collective of numerical models, which may be created based on wafer data collected in the fab for different test mask patterns, applied optics considerations, and numerical process modeling considerations, or the like, or combinations thereof.

As a result of miniaturization in semiconductor fabrication, the gap between the light source wavelength and the design feature size has widened in modem design. As a result, m some current designs the correlation between the desired wafer outcome and a suitable mask pattern is no longer trivial. However, some known OPC methodologies may require a straightforward correlation (e.g., geometric overlap) between the design pattern and the mask pattern, and as such are unsuitable for the current designs with the non- trivial correlation between the desired wafer outcome and the suitable mask pattern. Brief Description of the Drawings

Embodiments will be readily understood by the following detailed description in conjunction with the accompanying drawings. To facilitate tins description, like reference numerals designate like structural elements. Embodiments are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings.

FIG. 1 illustrates an example system equipped with technology for generating an association dataset for manipulating a photomask pattern, according to various embodiments.

FIG. 2 illustrates a wafer target pattern that includes a first polygon grouping and a second polygon grouping that is non-contiguous with the first polygon grouping.

FIG. 3 illustrates an initial mask pattern that includes a first polygon grouping and a second polygon grouping that is non-contiguous with the first polygon grouping.

FIG. 4 is a flow chart showing a process of generating an association dataset for correction of an initial mask pattern to compensate for model predicted pattering liabilities, according to various embodiments.

FIGS. 5A-C illustrate a correlation of an initial group of segments to evaluation points based on predefined search policies and a correlation of some of the remaining segments to some of the e valuation points based on extension policies.

FIG. 6 illustrates an example compute device that may employ the apparatuses and/or methods described herein, according to various embodiments.

Detailed Description

Apparatuses, methods and storage medium associated with generating an association dataset for manipulating a photomask pattern, are disclosed herein. In embodiments, an apparatus to generate an association dataset for correction of a mask pattern (e.g., an arbitrary mask pattern) to compensate for liabilities predicted by one or more OPC (optical proximity correction) models based on the mask pattern, may include a processor to: identify a plurality of evaluation points that correspond to a wafer target pattern that is different than the mask pattern; identify segments of a perimeter of the mask pattern using searches originating from the evaluation points, respectively; and correlate portions of the perimeter of the mask pattern to the evaluation points, respectively, in response to the identification of the segments; wherein the association dataset is based on the correlations.

In the following detailed description, reference is made to the accompanying drawings which form a part hereof wherein like numerals designate like parts throughout, and in which is shown by way of illustration embodiments that may be practiced. It is to be understood that other embodiments ma}'- be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description is not to be taken in a limiting sense, and the scope of embodiments is defined by the appended claims and their equivalents.

Aspects of the disclosure are disclosed in the accompanying description. Alternate embodiments of the present disclosure and their equivalents may be devised without parting from the spirit or scope of the present disclosure. It should be noted that like elements disclosed below are indicated by like reference numbers in the drawings.

Various operations may be described as multiple discrete actions or operations in turn, in a manner that is most helpful in understanding the claimed subject matter.

However, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations may not be performed in the order of presentation. Operations described may be performed in a different order than the described embodiment. Various additional operations may be performed and/or described operations may be omitted in additional embodiments.

For the purposes of the present disclosure, the phrase "A and/or B^*' means (A), (B), or (A and B). For the purposes of the present disclosure, the phrase "A, B, and/or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C),

The description may use the phrases "in an embodiment," or "in embodiments," which may each refer to one or more of the same or different embodiments. Furthermore, the terms "comprising," "including," "having," and the like, as used with respect to embodiments of the present disclosure, are synonymous.

As used herein, the term "circuitry" may refer to, be part of, or include an

Application Specific Integrated Circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group) and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable components that provide the described functionality.

Some embodiments facilitate the optical proximity correction (OPC) of an arbitrary initial mask pattern (for example a prior OPC corrected mask, inverse lithography output, or a pixelated mask) to generate a revised mask pattern, and may facilitate refinements on the revised mask pattern. Some embodiments facilitate any number of successive OPC correction operations with each operation taking the output of the preceding operation as the input mask pattern. The OPC operations may utilize one or more models at each OPC correction operation. OPC may modify the mask pattern in an attempt to compensate for model predicted patterning liabilities. For example, in

successive OPC operations, an initial OPC operation may be based on a DCCD (develop check critical dimension) model, and a subsequent OPC operation may be based on a different model such as refinement of the DCCD model, an FCCD model (final check critical dimension), or the like, and/or or a refinement of the mask pattern through the etch model in subsequent processing.

Some embodiments may include identifying a set of evaluation points that approximate the desired resist edge. The perimeter of an initial mask pattern polygon may be partitioned into a collections of segments that can be perturbed normal to their directions (referred to herein as "segmentation").

Searches originating from the evaluation points may be performed to correlate some of the segments to some of the evaluation points. Extension policies may be used to extend correspondence found using search policies to larger neighborhoods in the perimeter of the initial pattern to create extended regions of influence to respond to errors estimated at corresponding evaluation points.

An association dataset may be generated to indicate correlations between the wafer pattern target and the segments. The association dataset may indicate a correspondence between first regions of a model based prediction of the aerial image pattern

corresponding to an initial mask pattern, and second regions of this initial mask pattern that are most likely to cause the patterning seen in the local regions from the first regions. The association dataset may facilitate errors estimated in the local regions of the first regions to be corrected for by manipulating the corresponding second regions. Such corrections may provide the iterative improvement of the quality of the predicted lithography outcome associated with the photo-lithography process in the fab.

FIG. 1 illustrates an example system 50 equipped with technology for generating an association dataset for selecting data for manipulating a photomask pattern, according to various embodiments. The system 50 may include circuitry 1 1 (e.g., a processor to execute instructions stored on a non-transitory computer readable media) to identify evaluation point-segment correlations for correction of an arbitrary mask pattern to compensate for model predicted pattern liabilities associated with a photomask. In some embodiments, the circuitry 11 may identify segments of a perimeter of an initi al mask pattern 12 using searches originating from evaluation points corresponding to a wafer target pattern. Based on a result of the identification, the circuitry 11 may correlate portions of the initial mask pattern 12 to the evaluation points, respectively. The circuitry 11 may generate an association dataset 25 to indicate these correlations.

The association dataset 25 may be used to distort 26 (e.g., iteratively perturb via segment movements), in response to wafer liabilities predicted by the one or more OPC models, the initial mask pattern 12 to select a refined mask pattern 29 (e.g., to converge on a revised mask pattern with acceptable wafer target pattern as predicted by the one or more OPC models). The distortions 26 may be selected based on manual input by a person viewing the association dataset 25 and/or fully or partially automatically by software given access to the association dataset 25 (e.g., by an OPC module given access to the association dataset 25).

The refined mask pattern 29 may be evaluated to identify whether it compensates for model predicted patterning liabilities. Evaluation may, in some embodiments, utilize photomask fabrication equipment 21, which includes equipment to simulate a physical fabrication (e.g., based on a model) using photomask attributes 40 corresponding to the refined mask pattern and/or equipment to actually physically fabricate devices (e.g., fabrication of a photomask having the photomask attributes 40 and/or fabrication of design using the photomask).

If the evaluation indicates that additional compensation is needed, the refined mask pattern 29 may be fed back into the circuitry 1 1 to identify an additional association dataset 35. The circuitry 1 1 may perform similar operations using the refined mask pattern 29. For instance, the circuitry 11 may identify segments of a perimeter of the refined mask pattern 29 using searches originating from evaluation points corresponding to the same or a different wafer target pattern. Based on a result of the searches, the circuitry 11 may correlate portions of the refined mask pattern 20 to the same or different evaluation points, respectively. The circuitry 1 1 may generate the additional association dataset 35 to indicate these correlations.

If an additional association dataset 35 is generated, the refined mask pattern 29 may be distorted 26 to select a refined mask pattern 39. The loop described above may be repeated any number of times by the pair of ellipsis in the illustration until an ev aluation indicates that the model predicted pattern liabilities are corrected, e.g., the operations described above may be repeated any number of times.

FIG. 2 illustrates a wafer target pattern 1 10 that includes a first polygon grouping 115 and a second polygon grouping 125 that is non-contiguous with the first polygon grouping 115. The arbitrary initial mask 150 may have a shape 112 that need not be substantially similar to the shape of the wafer target pattern 110. In this example, the shape 1 12 has a different quantity of non-contiguous polygon groupings (e.g. , one such grouping) than the quantity of non-contiguous polygon groupings of the wafer target pattern 110 (e.g., two such groupings).

In this particular example of a wafer target pattern 1 10 having a shape of more than one non-contiguous polygon groupings 115 and 125, a shape of each of the groupings 1 15 and 125 may be the same, and the shape of each of the groupings 115 and 125 may correspond to a single polygon, e.g., a rectangle. In other examples in which a w¾fer target pattern has a shape of more than one non -contiguous polygon groupings, the shapes of the different groupings may be different. Also, some of the groupings may not correspond to a single polygon, e.g., may be a shape of more than one polygon assembled together.

Referring briefly to FIG. 3, a different example having an arbitrary initial mask 250 having a shape that includes a first polygon grouping 215 and a second polygon grouping 225 that is non-contiguous with the first polygon grouping 215 is illustrated. Again, the shape of the arbitrary initial mask 250 need not be substantially similar to the shape of the wafer target pattern 210. In this example, the shape of the arbitrary initial mask 250 has a different quantity of non-contiguous polygon groupings (e.g., two such groupings) than the quantity of non-contiguous polygon groupings of the wafer target pattern 210 (e.g., one such grouping).

In this particular example of an arbitrary initial mask 250 having a shape of more than one non-contiguous polygon groupings 215 and 225, a shape of each of the groupings 215 and 225 may be the different. Also, in examples in which the shape of the arbitrary initial mask includes more than one non-contiguous polygon groupings, a shape of any of the groupings may be defined by multiple polygons assembled together (here the shape of grouping 225 corresponds to multiple rectangular polygons assembled iogether) or defined by a single polygon (here the shape of grouping 215 corresponds to the shape of a single rectangular polygon).

Referring again to FIG. 2, the shape 1 12 includes a perimeter including segments 151 -162. The wafer target pattern 110 includes evaluation points 111-114 and 121-124, which need not have the same correspondence as required between gauges and mask perimeter segments in some known OPC methodologies that may require substantial similarly shapes for the wafer target pattern and mask pattern. For instance, in this particular example, a distortion of segments 154, 155, and 156 (e.g., a segment movement to move one of the segments 154, 155, and 156, which may produce a different shape that may be less correl ated to a shape of the wafer target pattem 1 10 than the shape 1 12) to generate a revised mask partem (not shown) that may address patterning liabilities correlated to evaluation point 123.

FIG. 4 is a flow chart showing a process 300 of generating an association dataset for correction of a mask pattem (e.g., an arbitrary initial mask pattem) to compensate for model predicted patterning liabilities, according to various embodiments. In block 301, the circuitry 11 (FIG. 1 ) may identify evaluation points. Some of the evaluation points may be along a perimeter of the wafer target pattem with others inside the perimeter (where the identified evaluation points define rounding(s) of the polygon grouping(s) of the wafer target pattem).

In block 302, the circuitry 1 1 may identify segments of a perimeter of the mask pattem using searches originating from the evaluation points, respectively. In one embodiment, the circuitry 11 may segment the perimeter of the mask pattern to create a set of segments. The circuitry 1 1 may search for segments of the set along rays originating from the evaluation points using predefined search policies. For instance, the predefined search policies may specify⁷ a search range. In some examples, the predefined search policies may specify search rays that are perpendicular to a perimeter of the wafer target pattem for some of the evaluation points. In one predefined search policy, these perpendicular searches may be used for all evaluation points on a peri meter of the wafer target pattern. In other examples, the search ray may be at a forty five degree angle from the perimeter of the wafer target pattem (some predefined search policies may specify these non-perpendicular searches for only evaluation points inside the perimeter of the wafer target pattem, the eval uation points closest to com ers of the wafer target pattem, or the like, or combinations thereof).

In some embodiments, the circuitry 1 1 may identify a segment intersected by a search ray for an evaluation point as a parent segment for the evaluation point, and also may identify child segments for some of the parent segments. The predefined search policies may specify how to select a parent in the case that the search ray identifies more than one segment (for instance, a closest segment is the parent, and in the case of equidistant segments the longest segment is the parent, etc.)

Some of the remaining segments may he identified as children of the parent segments based on predefined extension policies. For instance, the predefined extension policies may identify neighboring segments to the parent segment as child segments. Some embodiments may utilize weighting for identifying child segments. Weighting may be based on length and/or proximity. Only those segments having a weight greater than a preset threshold for a given parent segment may be identified as child segments of the parent segment.

In block 303, the circuitry 1 1 may correlate portions of the perimeter of the mask pattern to evaluation points, respectively. In some examples, each perimeter portion may include only a parent segment or a parent segment and one or more child segments.

In block 304, the circuitry 11 may generate the association dataset based on the correlations. The association dataset may include one or more values to indicate point to segment correlations.

In block 305, the circuitry 11 may perform OPC (e.g., iterative OPC) using the association dataset. In some examples, this may include generating additional association datasets. In block 306, the circuitry 11 may identify a mask pattern for manufacture based on a result of the OPC.

FIGS. 5A-C illustrate a correlation of an initial group of segments to evaluation points based on predefined search policies and a correlation of some of the remaining segments to some of the evaluation points based on extension policies. Referring to FIG. 5A, the circuitry 1 1 (FIG. 1) may identify the evaluation points 415, 420, 425, 430, and 435 for an arbitrary initial mask 450. In this example, each of the evaluation points 415, 420, 425, 430, and 435 is along a perimeter of a wafer target pattern, although in other examples the circuitry 11 may identify evaluation points inside this perimeter. Referring to FIG. 5B, the circuitry 11 may identify segments 465, 470, 475, 480, and 485 as parent segments of the evaluation points 41 5, 420, 425, 430, and 435, respectively, based on predefined search policies.

Referring to FIG. 5C, some of the remaining segments may be identified as child segments of the parent segments based on predefined extension policies to correlate portions of the perimeter to the evaluations points 415, 420, 425, 430, and 435. For example, a perimeter portion including segment 470 and 471 may be correlated to evaluation point 420. A perimeter portion including segment 471, 477, and 478 may be correlated to evaluation point 425. A perimeter portion including segment 478, 480, and 482 may be correlated to evaluation point 430. A perimeter portion including segment 482 and 485 may be correlated to evaluation point 435.

FIG. 6 illustrates an example compute device 500 that may employ the apparatuses and/or methods described herein, according to various embodiments (for instance, any apparatus and/or method associated with any compute device or electronic device described earlier with respect to FIGS. 1-5C, including for instance an OPC module). As shown, the example compute device 500 may include a number of components, such as one or more processors 504 (one shown) and at least one communication chip 506.

In various embodiments, the one or more processors 504 each may include one or more processor cores. In various embodiments, the at least one communication chip 506 may be physically and electrically coupled to the one or more processors 504. In further implementations, the at least one communication chip 506 may be part of the one or more processors 504. In various embodiments, compute device 500 may include printed circuit board (PCB) 502. For these embodiments, the one or more processors 504 and the at least one communication chip 506 may be disposed thereon.

Depending on its applications, compute device 500 may include other components that may or may not be physically and electrically coupled to the PCB 502. These other components include, but are not limited to, a memory controller (not shown), volatile memory (e.g., dynamic random access memory (DRAM) 520), non-volatile memory such as flash memory 522, hardware accelerator 524, an I/O controller (not shown), a digital signal processor (not shown), a crypto processor (not shown), a graphics processor 530, one or more antenna 528, a display (not shown), a touch screen display 532, a touch screen controller 546, a battery 536, an audio codec (not shown), a video codec (not shown), a global positioning system (GPS) device 540, a compass 542, an accelerometer (not shown), a gyroscope (not shown), a speaker 550, and a mass storage device (such as hard disk drive, a solid state drive, compact disk (CD), digital versatile disk (DVD)) (not shown), and so forth.

In some embodiments, the one or more processor 504, DRAM 520, flash memory 522, and/or a storage device (not shown) may include associated firmware (not shown) storing programming instructions configured to enable compute device 500, in response to execution of the programming instructions by one or more processor 504, to perform methods described herein such as generating an association dataset for manipulating a photomask pattern. In various embodiments, these aspects may additionally or alternatively be implemented using hardware separate from the one or more processor 504, flash memory 512, or storage device 51 1 , such as hardware accelerator 524 (which may be a Field Programmable Gate Array (FPGA)).

The at least one communication chip 506 may enable wired and/or wireless communications for the transfer of data to and from the compute device 500. The term "wireless" and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc, that may communicate data through the use of modulated electromagnetic radiation through a non-solid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they might not. The at least one communication chip 506 may implement any of a number of wireless standards or protocols, including but not limited to IEEE 702.20, Long Term Evolution (LTE), LIE Advanced (LTE- A), General Packet Radio Service (GPRS), Evolution Data Optimized (Ev-DO), Evolved High Speed Packet Access (HSPA+), Evolved High Speed Downlink Packet Access (HSDPA+), Evolved High Speed Uplink Packet Access (HSUPA+), Global System for Mobile Communications (GSM), Enhanced Data rates for GSM Evolution (EDGE), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Digital Enhanced Cordless Telecommunications (DECT), Worldwide interoperability for Microwave Access (WiMAX), Bluetooth, derivatives thereof, as well as any other wireless protocols that are designated as 3G, 5G, 5G, and beyond. The at least one communication chip 506 may include a plurality of communication chips 506. For instance, a first communication chip 506 may be dedicated to shorter range wireless communications such as Wi-Fi and Bluetooth, and a second communication chip 506 may be dedicated to longer range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, and others.

In various implementations, the compute device 500 may be a component of a laptop, a netbook, a notebook, an ultrabook, a sniartphone, a computing tablet, a personal digital assistant (PDA), an ultra-mobile PC, a mobile phone, a desktop computer, a server, a printer, a scanner, a monitor, a set-top box, a digital camera, an appliance, a portable music player, and/or a digital video recorder. In further implementations, the compute device 500 may be any other electronic device that processes data.

Any combination of one or more computer usable or computer readable medium may be utilized. The computer-usable or computer-readable medium may be, for example but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, device, or propagation medium. More specific examples (a non- exhaustive list) of the computer-readable medi m would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a transmission media such as those supporting the Internet or an intranet, or a magnetic storage device. Note that the computer-usable or computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via, for instance, optical scanning of the paper or other medium, then compiled, interpreted, or otherwise processed in a suitable manner, if necessary, and then stored in a computer memory. In the context of this document, a computer-usabl e or computer- readable medium may be any medium that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. The computer- usable medium may include a propagated data signal with the computer-usable program code embodied therewith, either in baseband or as part of a carrier wave. The computer usable program code may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc.

Computer program code for earning out operations of the present disclosure may be written in any combination of one or more programming languages, including an object oriented programming ! anguage such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider).

The association dataset may be used to create a mask pattern to compensate for patterning liabilities using an arbitrary initial mask pattern. The generation of the association dataset may decouple segmenting and identifying of evaluation points (e.g., OPC gauging). The generation of the association dataset may allow an arbitrary initial mask pattern for segmenting. The generation of the association dataset may allow many to many associations between segmentation and gauging targets. The correlations of evaluation points to segments may be based on one or more of searching, heuristics, and weighting.

In any of the examples herein, the terminology used may refer to the following definitions:

® Wafer target pattern - information representing the desired pattern we wish to have printed on the wafer.

® Mask pattern - a pattern that is to be used to create a photomask for optical

lithography.

• OPC model - a numerical model developed to predict the wafer target pattern given a mask pattern, for specific process and optic considerations.

• Model based OPC - modifying a given input mask pattern to mitigate liabilities as predicted by one or more OPC models.

• Simply (or one-to-one) correlated mask pattern - a mask pattern is said to be one- to-one correlated with the wafer target pattern if, for each mask pattern polygon, there is one and only one wafer target pattern polygon that has overlapping area between the mask and wafer target pattern, and vice versa.

• Arbitrary (or weakly-correlated or uncorrected) mask pattern - when the mask pattern is not simply correlated with respect to the wafer target pattern, it is called weakly-correlated or uncorrelated. One may have multiple mask pattern polygons overlapping with one wafer target pattern polygon, or one mask pattern polygon overlapping with multiple wafer target pattern polygons, or combinations thereof.

• Segment a mask pattern - represent the perimeter of each polygon drawn on the mask pattern into edges, and further sub-divide these edges into smaller segments. The perimeter of each mask pattern polygon may be completed described by a collection of associated segments. These segments may be perturbed normal to their directions as part of OPC correction.

One example is an apparatus or system comprising: a processor to generate an association dataset for automated correction of an arbitrary mask pattern to compensate for liabilities predicted by one or more OPC models based on this initial mask pattern; the processor is to further: identify a plurality of evaluation points on the wafer target pattern; identify a plurality of segments to represent the polygons on the mask pattern; identify, for each evaluation point, one segment (called parent segment) on the mask pattern, using a ray search originating from the evaluation point; correlate zero or more segments on the mask pattern polygons to specific evaluation points based on their proximity to the parent segment identified for each of these evaluation points; generate the association dataset based on the identified evaluation points, corresponding parent segments, the additionally correlated segments and weighting (e.g. uniform, normal distribution) based on the proximity of evaluation points and the corresponding segments; store the association dataset in an electronic memory or displaying the additional association dataset on an electronic display; utilize the association dataset to iteratively perturb the mask pattern (via segment movements), in response to wafer liabilities predicted by one or more OPC models, to converge on a final mask pattern, (based on segment movements) with acceptable wafer target patterning as predicted by the one or more OPC models.

In some examples, the mask pattern may be an arbitrary mask pattern with respect to the corresponding wafer target pattern. In some examples, the evaluation points, placed on the wafer target pattern, may be in the inter-locations or the mtra-locations with respect to the corresponding arbitrary mask pattern. In some examples, the processor is further to generate the mask pattern based on one or more configuration values of an input. In some examples, at least one of the searches comprises a ray search within a predefined search range, and zero or more additional parameters. The apparatus or the system may be im lemented using instructions stored on a computer readable media, in some examples.

Example 1 is an apparatus for generating an association dataset for manipulating a photomask pattern. The apparatus may include a processor to generate an association dataset for correction of an arbitrary mask pattern to compensate for liabilities predicted by one or more OPC (optical proximity correction) models based on the arbitrary mask pattern, the processor further to: identify a plurality of evaluation points that correspond to a wafer target pattern that is different than the arbitrary mask pattern; identify segments of a perimeter of the arbitrary mask pattern using searches originating from the evaluation points, respectively; and correlate portions of the perimeter of the arbitrary mask pattern to the evaluation points, respectively, in response to the identification of the segments;

wherein the association dataset is based on the correlations.

Example 2 includes the subject matter of example 1 (or any other example described herein), further comprising the processor further to utilize the association dataset to iteratively perturb the arbitrary mask pattern via segment movements, in response to wafer liabilities predicted by the one or more OPC models, to converge on a revised mask pattern with acceptable wafer target pattern as predicted by the one or more OPC models.

Example 3 includes the subject matter of any of examples 1-2 (or any other example described herein), wherein the association dataset comprises a first association dataset, the plurality of evaluation points comprises a first plurality of evaluation points, the wafer target partem comprises a first wafer target pattern, and the processor is further to: generate a second association dataset for correction of the revised mask pattern to compensate for different liabilities predicted by the one or more OPC models or one or more different OPC models based on the revised mask pattern, the processor further to; identify a second plurality of evaluation points that correspond to a second wafer target pattern that is different than the revised mask pattern; identify segments of a perimeter of the revised mask pattern using searches originating from the second evaluation points, respectively; and correlate portions of the perimeter of the revised mask pattern to the second evaluation points, respectively, in response to the identification of the segments of the perimeter of the revised mask pattern; wherein the association dataset is based on the correlations of the perimeter of the revised mask pattern to the second evaluation points.

Example 4 includes the subject matter of any of examples 1-3 (or any other example described herein), wherein the revised mask pattern comprises a first revised mask pattern, the segment movements comprise first segments movements, the wafer liabilities comprise first wafer liabilities, and the processor is further to utilize the second association dataset to iterativelv perturb the first revised mask pattern via second segment movements, in response to second wafer liabilities predicted by the one or more OPC models or the one or more diff erent OPC models, to converge on a second revised mask pattern with acceptable wafer target pattern as predicted by the one or more OPC models or the one or more different OPC models.

Example 5 includes the subject matter of any of examples 1-4 (or any other example described herein), wherein the arbitrary mask pattern or the wafer target pattern includes a first polygon grouping and a second polygon grouping that is non-contiguous with the first polygon grouping.

Example 6 includes the subject matter of any of examples 1 -5 (or any other example described herein), wherein the arbitrary mask pattern, includes a different quantity of non-contiguous polygon groupings than the wafer target pattern.

Example 7 includes the subject matter of any of examples 1-6 (or any other example described herein), wherein the wafer target pattern includes the first polygon grouping and the second polygon grouping thai is non-contiguous with the first polygon grouping, and wherein the evaluation points are on intra-locations that are on polygons of the first or second polygon groupings and inter-locations between the first polygon grouping and the second polygon grouping.

Example 8 is a computer readable media having instructions for generating an association dataset for correction of an arbitrary mask pattern, to compensate for liabilities predicted by one or more OPC (optical proximity correction) models based on the arbitrary mask pattern, wherein the instructions, when executed, cause a processor to: identify a plurality of evaluation points tha correspond to a wafer target pattern that is different than the arbitrary mask pattern.; identify segments of a perimeter of the arbitrary mask pattern using searches originating from the evaluation points, respectively; and correlate portions of the perimeter of the arbitrary mask pattern to the evaluation points, respectively, in response to the identification of the segments; wherein the association dataset is based on the correlations.

Example 9 includes the subject matter of example 8 (or any other example described herein), wherein the instructions are further to cause the processor to: identify, based on predefined search policies, an initial group of segments of the perimeter of the arbitrary mask partem in response to the searching; and combine, based on predefined extension policies, at least one remaining segment of the perimeter of the arbitrary mask pattern with a segment of the initial group of segments to form an extended segment, wherein the identified segments include the extended segment.

Example 10 includes the subject matter of any of examples 8-9 (or any other example described herein), wherein at least one of the searches comprises a ray search based on predefined parameters, wherein the predefined parameters include range.

Example 11 is a method of generating an association dataset for correction of an arbitrary mask pattern to compensate for liabilities predicted by one or more OPC (optical proximity correction) models based on the arbitrary mask pattern, the method comprising: identifying a plurality of evaluation points; identifying segments of a perimeter of the arbitrary mask pattern using searches originating from the evaluation points, respectively; and correlating portions of the perimeter of the arbitrary mask pattern to the evaluation points, respectively, in response to the identification of the segments; wherein the association dataset is based on the correlations.

Example 12 includes the subject matter of example 11 (or any other example described herein), wherein identifying segments of the perimeter of the arbitrary mask pattern using the searches originating from the evaluation points, respecti vely, further comprises; identifying, based on predefined search policies, an initial group of segments of the perimeter of the arbitrary mask pattern, in response to the searching; and combining, based on predefined extension policies, at least one remaining segment of the perimeter of the arbitrary mask pattern with a segment of the initial group of segments to form an extended segment, wherein the identified segments include the extended segment.

Example 13 includes the subject matter of any of examples 11-12 (or any other example described herein), wherein at least one of the searches comprises a ray search within a predefined search range.

Example 14 includes the subject matter of any of examples 11-13 (or any other example described herein), wherein the searches are based on predefined parameters, wherein the predefined parameters include range.

Example 15 includes the subject matter of any of examples 11-14 (or any other example described herein), further comprising: identifying a perturbation of the arbitrary mask pattern based on the association dataset; and identifying a revised mask pattern based on the perturbation of the arbitrary mask pattern.

Example 16 includes the subject matter of any of examples 11-15 (or any other example described herein), further comprising: ascertaining whether the revised mask pattern is associated with patterning liabilities; and generating additional association dataset based on a result of the ascertainment.

Example 17 includes the subject matter of any of examples 11-16 (or any other example described herein), w herein ascertaining whether the revised mask pattern is associated with the patterning liabilities comprises forming the photomask based on the revised mask pattern.

Example 18 includes the subject matter of any of examples 11-17 (or any other example described herein), wherein ascertaining whether the revised mask pattern is associated with the pattern liabilities comprises running a simulation using the revised mask pattern.

Example 19 includes the subject matter of any of examples 1 1-18 (or any other example described herein), wherein the plurality of evaluation points comprises a first plurality of evaluation points, the wafer target pattern comprises a first wafer target partem, and generating the additional association dataset comprises: identifying a second plurality of evaluation points that correspond to a second afer target pattern that is different than the revised mask pattern; identify segments of a perimeter of the revised mask pattern using searches originating from the second evaluation points, respectively; and correlate portions of the perimeter of the revised mask pattern to the second evaluation points, respectively, in response to the identification of the segments perimeter of the revised mask pattern: wherein the additional association dataset is based on the correlations of the perimeter of the revised mask pattern to the second evaluation points.

Example 20 includes the subject matter of any of examples 11-19 (or any other example described herein), wherein the revised mask pattern comprises a first revised mask pattern, and the method further comprises: identifying a perturbation of the first revised mask pattern based on the additional association dataset; and identifying a second revised mask pattern based on the perturbation of the first revised mask pattern..

Example 21 is a system for generating an association dataset for manipulating a photomask pattern. The system may include photomask fabrication equipment to form a photomask in response to a control signal defining photomask attributes; and a processor to generate an association dataset for correction of an arbitrary mask pattern to compensate for liabilities predicted by one or more OPC (optical proximity correction) models based on the arbitrary mask pattern, the processor further to: identify a plurality of evaluation points that correspond to a wafer target pattern, that is different than, the arbitrary mask pattern; identify segments of a perimeter of the arbitrary mask pattern using searches originating from the evaluation points, respectively; and correlate portions of the perimeter of the arbitrary mask pattern to the evaluation points, respectively, in response to the identification of the segments; wherein the association dataset is based on the correlations.

Example 22 includes the subject matter of example 21 (or any other example described herein), wherein the arbitrary mask pattern or the wafer target pattern includes a first polygon grouping and a second polygon grouping that is non-contiguous with, the first polygon grouping.

Example 23 includes the subject matter of any of examples 21-22 (or any other example described herein), wherein the processor is further to generate the arbitrary mask patter based on one or more configuration values of an. input.

Example 24 includes the subject matter of any of examples 21-23 (or any other example described herein), wherein the processor is further to identify the arbitrary mask pattern from the input.

Example 25 includes the subject matter of any of examples 21-24 (or any other example described herein), the processor further to: utilize the association dataset to iteratively perturb the arbitrary mask pattern via segment movements, in response to wafer liabilities predicted by the one or more OPC models, to converge on a revised mask pattern with acceptable wafer target pattern as predicted by the one or more OPC models; and generate the control signal based on the revised mask pattern.

Example 26 is an apparatus for generating an association dataset for correction of an arbitrary mask pattern to compensate for liabilities predicted by one or more OPC (optical proximity correction) models based on the arbitrary mask pattern, the apparatus comprising: means for identifying a plurality of evaluation points that correspond to a wafer target pattern that is different than the arbitrary mask pattern; means for identifying segments of a perimeter of the arbitrary mask pattern using searches originating from the evaluation points, respectively; means for correlating portions of the perimeter of the arbitrary mask pattern to the evaluation points, respectively, in response to the

identification of the segments; wherein the association dataset is based on the correlations; and means for identifying a perturbation of th e arbitrary mask pattern based on the association dataset; and means for identifying a revised mask pattern based on the perturbation of the arbitrary mask pattern.

Example 27 includes the subject matter of example 26 (or any other example described herein), further comprising means for ascertaining whether the revised mask pattern is associated with patterning liabilities.

Example 28 includes the subject matter of any of examples 26-27 (or any other example described herein), wherein at least one of the searches comprises a ray search within a predefined search range.

Example 29 includes the subject matter of any of examples 26-28 (or any other example described herein), wherein the searches are based on predefined parameters, wherein the predefined parameters include range.

Example 30 includes the subject matter of any of examples 26-29 (or any other example described herein), further comprising: means for identifying, based on predefined search policies, an initial group of segments of the perimeter of the arbitrary mask pattern in response to the searching; and means for combining, based on predefined extension policies, at least one remaining segment of the perimeter of the arbitrary mask pattern with a segment of the initial group of segments to form an extended segment, wherein the identified segments include the extended segment.

Although certain embodiments have been illustrated and described herein for purposes of description, a wide variety of alternate and/or equivalent embodiments or implementations calculated to achieve the same purposes may be substituted for the embodiments shown and described without departing from the scope of the present disclosure. This application is intended to cover any adaptations or variations of the embodiments discussed herein. Therefore, it is manifestly intended that embodiments described herein be limited only by the claims,

Where the disclosure recites '"a" or "a first" element or the equivalent thereof, such disclosure includes one or more such elements, neither requiring nor excluding two or more such elements. Further, ordinal indicators (e.g., first, second or third) for identified elements are used to distinguish between the elements, and do not indicate or imply a required or limited number of such elements, nor do they indicate a particular position or order of such elements unless otherwise specifically stated.

Claims

What is claimed is:

1. An apparatus, comprising:

a processor to generate an association dataset for correction of an arbitrary mask pattern to compensate for liabilities predicted by one or more OPC (optical proximity correction) models based on the arbitrary mask pattern, the processor further to: identify a plurality of evaluation points that correspond to a wafer target pattern that is different than the arbitrary mask pattern; identify segments of a perimeter of the arbitrary mask pattern using searches originating from the evaluation points, respectively; and correlate portions of the perimeter of the arbitrary mask pattern to the evaluation points, respectively, in response to the identification of the segments; wherein the association dataset is based on the correlations.

2. The apparatus of claim i, the processor further to utilize the association dataset to iteratively perturb the arbitrary mask pattern via segment movements, in response to wafer liabilities predicted by the one or more OPC models, to converge on a revised mask pattern with acceptable wafer target pattern, as predicted by the one or more OPC models.

3. The apparatus of claim 2, wherein the association dataset comprises a first association dataset, the plurality of evaluation points comprises a first plurality of evaluation points, the wafer target pattern comprises a first wafer target pattern, and the processor is further to: generate a second association dataset for correction of the revised mask pattern to compensate for different liabilities predicted by the one or more OPC models or one or more different OPC models based on the revised mask pattern, the processor further to:

identify a second plurality of evaluation points that correspond to a second wafer target pattern that is different than the revised mask pattern;

identify segments of a perimeter of the revised mask pattern using searches originating from the second evaluation points, respectively; and

correlate portions of the perimeter of the revised mask pattern to the second evaluation points, respectively, in response to the identification of the segments of the perimeter of the revised mask pattern;

wherein the association dataset is based on the correlations of the perimeter of the revised mask pattern, to the second evaluation points.

4. The apparatus of claim 3, wherein the revised mask pattern, comprises a first revised mask pattern, the segment movements comprise first segments movements, the wafer liabilities comprise first wafer liabilities, and the processor is further to utilize the second association dataset to iterativeiy perturb the first revised mask pattern via second segment movements, in response to second wafer liabilities predicted by the one or more OPC models or the one or more different OPC models, to converge on a second revised mask pattern with acceptable wafer target pattern as predicted by the one or more OPC models or the one or more different OPC models.

5. The apparatus of claim 1 , wherein the arbitrary mask pattern or the wafer target pattern includes a first polygon grouping and a second polygon grouping that is noncontiguous with the first polygon grouping.

6. The apparatus of claim 1 , wherein the arbitrary mask pattern includes a different quantity of non-contiguous polygon groupings than the wafer target pattern.

7. The apparatus of claim 6, wherein the wafer target pattern includes the first polygon grouping and the second polygon grouping that is non-contiguous with the first polygon grouping, and wherein the evaluation points are on intra-locations that are on polygons of the first or second polygon groupings and inter-locations between the first polygon grouping and the second polygon grouping,

8. A computer readable media having instructions for generating an association dataset for correction of an arbitrary mask pattern, to compensate for liabilities predicted by one or more OPC (optical proximity correction) models based on the arbitrary mask pattern, wherein the instructions, when executed, cause a processor to: identify a plurality of evaluation points that correspond to a wafer target pattern that is different than the arbitrary mask pattern;

identify segments of a perimeter of the arbitrary mask pattern using searches originating from the evaluation points, respectively; and

correlate portions of the perimeter of the arbitrary mask pattern to the evaluation points, respectively, in response to the identification of the segments;

wherein the association dataset is based on the correlations.

9. The computer readable media of claim 8, wherein the instructions are further to cause the processor to: identify, based on predefined search policies, an initial group of segments of the perimeter of the arbitrary mask pattern in response to the searching; and

combine, based on predefined extension policies, at least one remaining segment of the perimeter of the arbitraiy mask pattern with a segment of the initial group of segments to form an extended segment, wherein the identified segments include the extended

10. The computer readable media of claim 8, wherein at least one of the searches comprises a ray search based on predefined parameters, wherein the predefined parameters include range.

1 1. A method of generating an association dataset for correction of an arbitrary mask pattern to compensate for liabilities predicted by one or more OPC (optical proximity correction) models based on the arbitrary mask pattern, the method comprising: identifying a plurality of evaluation points;

identifying segments of a perimeter of the arbitrary mask pattern using searches originating from the evaluation points, respectively; and

correlating portions of the perimeter of the arbitraiy mask pattern to the evaluation points, respectively, in response to the identification of the segments;

wherein the association dataset is based on the correlations.

12. The method of claim 11, wherein identifying segments of the perimeter of the arbitrary mask pattern using the searches originating from the evaluation points, respectively, further comprises: identifying, based on predefined search policies, an initial group of segments of the perimeter of the arbitrary mask pattern in response to the searching; and

combining, based on predefined extension policies, at least one remaining segment of the perimeter of the arbitrary mask pattern with a segment of the initial group of segments to form an extended segment, wherein the identified segments include the extended segment,

13. The method of claim 1 1 , wherein at least one of the searches comprises a ray search within a predefined search range.

14. The method of claim 11, wherein the searches are based on predefined parameters, wherein the predefined parameters include range.

15. The nie :tihod of claim 1 1 , further comprising:

identifying a perturbation of the arbitrary mask pattern based on the association dataset; and

identifying a revised mask pattem based on the perturbation of the arbitrary mask pattern.

16. The method of claim 15, further comprising:

ascertaining whether the revised mask pattem is associated with patterning liabilities; and

generating additional association dataset based on a result of the ascertainment.

17. The method of claim 16, wherein ascertaining whether the revised mask pattern is associated with the patterning liabilities comprises forming the photomask based on the revised mask pattern. 8. The method of claim 16, wherein ascertaining whether the revised mask pattern is associated with the pattern liabilities comprises running a simulation using the revised mask pattern.

19. The method of claim 16, wherein the plurality of evaluation points comprises a first plurality of evaluation points, the wafer target pattern comprises a first wafer target pattern, and generating the additional association dataset comprises:

identifying a second plurality of evaluation points that correspond to a second wafer target pattern that is different than the revised mask pattern;

correlate portions of the perimeter of the revised mask pattern to the second evaluation points, respectively, in response to the identification of the segments perimeter of the revised mask pattern;

wherein the additional association dataset is based on the correlations of the perimeter of the revised mask pattern to the second evaluation points.

20. The method of claim 19, wherein the revised mask pattern comprises a first revised mask pattern, and the method further comprises:

identifying a perturbation of the first revised mask pattern based on the additional association dataset; and identifying a second revised mask pattern based on the perturbation of the first revised mask pattern.

21. A system, comprising:

photomask fabrication equipment to form a photomask in response to a control signal defining photomask attributes; and

a processor to generate an association dataset for correction of an arbitrary mask pattern to compensate for liabilities predicted by one or more OPC (optical proximity correction) models based on the arbitrary mask pattern, the processor further to:

identify a plurality of evaluation points that correspond to a wafer target pattern, that is different than the arbitrary mask pattern;

correlate portions of the perimeter of the arbitrary mask pattern to the evaluation points, respectively, in response to the identification of the segments; wherein the association dataset is based on the correlations.

22. The system of claim 21, wherein the arbitrary mask pattern or the wafer target pattern includes a first polygon grouping and a second polygon grouping that is noncontiguous with the first polygon grouping.

23. The system of claim 21, wherein the processor is further to generate the arbitrary mask pattern based on one or more configuration values of an input.

24. The system of claim 23, wherein the processor is further to identify the arbitrary mask pattern from the input.

25. The system of any of claims 21-24, the processor further to:

utilize the association dataset to iterativelv perturb the arbitraiy mask pattern via segment movements, in response to wafer liabilities predicted by the one or more OPC models, to converge on a revised mask pattern with acceptable wafer target pattern as predicted by the one or more OPC models; and

generate the control signal based on the revised mask pattern.