WO2020172893A1 - Frequency mixer and communication device - Google Patents
Frequency mixer and communication device Download PDFInfo
- Publication number
- WO2020172893A1 WO2020172893A1 PCT/CN2019/076596 CN2019076596W WO2020172893A1 WO 2020172893 A1 WO2020172893 A1 WO 2020172893A1 CN 2019076596 W CN2019076596 W CN 2019076596W WO 2020172893 A1 WO2020172893 A1 WO 2020172893A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- circuit
- mixer
- switch
- inductance
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
Definitions
- This application relates to the field of wireless communication technology, and in particular to a mixer and communication equipment.
- the mixer is a key component for frequency conversion in wireless communication equipment, and it is also a basic unit of the transceiver. Among them, the receiver uses a mixer to down-convert the received radio frequency (RF) signal to an intermediate frequency signal or zero-IF signal for processing, and the transmitter uses a mixer to up-convert the intermediate or zero-IF signal to a radio frequency signal to facilitate Antenna emission.
- RF radio frequency
- the mixer is usually realized by a pair of transistor switches.
- the size of the transistor switch pair in the mixer is limited to reduce the size of the parasitic capacitance at the input end thereof, thereby reducing the influence of the parasitic capacitance on the performance of the mixer.
- the method to limit the size of the transistor switch is to optimize the design of a comprehensive compromise between the gain, noise and linearity performance of the mixer. One or more of the gain, noise figure and linearity performance of the mixer will be affected. There is a certain degree of decline.
- the application provides a mixer and a communication device to reduce the influence of parasitic capacitance at the input end of the mixer on the performance of the mixer.
- the present application provides a mixer including a tuning circuit and a mixing circuit, and the tuning circuit is connected to the input end of the mixing circuit.
- the mixing circuit is a single-balanced mixing circuit or a double-balanced mixing circuit
- the tuning circuit and the parasitic capacitance at the input end of the mixing circuit form an LC parallel resonant circuit
- the capacitance of the tuning circuit At least one of the capacitance value and the inductance value of the inductor in the tuning circuit is adjustable.
- the mixer can pass through the tuning circuit in the mixer, so that the LC resonance circuit formed by the tuning circuit and the parasitic capacitance at the input end of the mixer circuit in the mixer is at The resonance state is used to increase the impedance at the input end of the mixer circuit, so that the mixer circuit can suppress the frequency conversion of the signal input from the input end of the mixer circuit using the local oscillator signal.
- noise and nonlinear intermodulation products introduced by the parasitic capacitance at the input end of the mixer circuit can effectively improve the performance of the mixer (such as noise figure, linearity) ).
- the tuning circuit can increase the frequency range by cooperating with the parasitic capacitance at the input end of the mixing circuit in the mixer.
- the impedance at the input end of the mixer circuit in turn enables the mixer to improve the performance of the mixer in a wide frequency range.
- the mixing circuit includes at least a pair of triode switch pairs, and the input end of the mixing circuit is the common emitter node of the triode switch pair; or, the mixing circuit includes at least A pair of metal oxide semiconductor MOS transistor switch pairs, and the input end of the mixer circuit is a common source node of the MOS transistor switch pair.
- the resonance frequency range of the LC parallel resonant circuit is determined according to the frequency range of the local oscillator signal used when the mixing circuit 220 performs frequency conversion.
- the frequency range of the double frequency signal of the local oscillator signal is within the resonance frequency range of the LC parallel resonant circuit.
- the noise signal introduced due to the parasitic capacitance at the input end of the mixer circuit is mainly concentrated at the frequency corresponding to the even harmonic of the local oscillator signal, especially at the double frequency of the local oscillator signal.
- the frequency range of the double frequency signal of the local oscillator signal is within the resonant frequency range of the LC parallel resonant circuit, the LC parallel resonant circuit is in a resonance state, and the impedance at the input end of the mixing circuit To be larger, it can suppress the noise and nonlinear intermodulation products introduced by the parasitic capacitance at the input end of the mixer circuit in the signal output by the mixer circuit, thereby effectively improving the mixer’s performance Performance (such as noise figure, linearity).
- the tuning circuit can be implemented in any one of the following four ways, but not limited to:
- the tuning circuit is a switched inductance matrix, wherein the state of the switches in the switched inductance matrix is based on the resonance frequency range of the LC parallel resonant circuit and the capacitance value of the parasitic capacitance at the input end of the mixing circuit determine.
- the tuning circuit includes a fixed inductance and a switched capacitor matrix, wherein the fixed inductance is connected in parallel with the switched capacitor matrix, and the state of the switch in the switched capacitor matrix is based on the resonance frequency range of the LC parallel resonant circuit, The inductance value of the fixed inductor and the capacitance value of the parasitic capacitance at the input end of the mixer circuit are determined.
- the tuning circuit includes a fixed capacitor and a switch inductance matrix, wherein the fixed capacitor is connected in parallel with the switch inductance matrix, and the state of the switch in the switch inductance matrix is based on the resonance frequency range of the LC parallel resonant circuit, The capacitance value of the fixed capacitor and the capacitance value of the parasitic capacitance at the input end of the mixer circuit are determined.
- the tuning circuit includes a switch inductance matrix and a switch inductance matrix, wherein the switch inductance matrix is connected in parallel with the switch capacitance matrix, and the state of the switch in the switch inductance matrix is based on the resonance frequency of the LC parallel resonant circuit
- the range and the capacitance value of the parasitic capacitance at the input end of the mixer circuit are determined, and the state of the switches in the switch inductance matrix is determined according to the resonance frequency range of the LC parallel resonant circuit and the capacitance value at the input end of the mixer circuit.
- the capacitance value of the parasitic capacitance is determined.
- the switch inductance matrix can be implemented in any one of the following three ways, but not limited to:
- the switch inductor matrix includes a plurality of inductors connected in series, and each inductor is connected in parallel with the switch.
- the switch inductance matrix includes a plurality of branches connected in parallel, and each branch includes an inductor and a switch connected in series with the inductor.
- the switch inductance matrix includes at least one first inductance circuit and at least one second inductance circuit, the first inductance circuit is connected in series with the second inductance circuit, and each first inductance circuit includes a first inductance and The switch connected in series with the first inductor, and the second inductor circuit includes a switch connected in series with the second inductor.
- the switched capacitor matrix includes a plurality of branches connected in parallel with each other, and each branch includes a capacitor and a switch connected in series with the capacitor.
- the present application also provides another mixer.
- the mixer includes an impedance adjustment circuit and a mixing circuit, and the impedance adjustment circuit is connected to the input end of the mixing circuit.
- the mixer circuit is a single-balanced mixer circuit or a double-balanced mixer circuit, and the impedance adjustment circuit and the parasitic capacitance at the input end of the mixer circuit form an impedance multi-pole circuit; the impedance multi-pole circuit There are at least two target poles among the poles of the impedance function, and the frequency range of the N-multiplier signal of the local oscillator signal used when the mixer circuit performs frequency conversion is within the range determined by the frequencies corresponding to the two target poles Inside, N is an even number.
- the mixer can increase the impedance multi-pole circuit formed by the impedance adjustment circuit in the mixer and the parasitic capacitance at the input end of the mixer circuit in the mixer.
- the impedance at the input end of the mixer circuit makes it possible for the mixer circuit to use the local oscillator signal to perform frequency conversion on the signal input from the input end of the mixer circuit to suppress the signal output by the mixer circuit.
- the noise and nonlinear intermodulation products introduced by the parasitic capacitance at the input end of the mixer circuit can effectively improve the performance (such as noise figure, linearity) of the mixer.
- the impedance multi-pole circuit can increase the impedance at the input end of the mixer circuit within a wider frequency range, thereby causing the mixing
- the mixer can improve the performance of the mixer in a wide frequency range.
- the frequency range of the double frequency signal of the local oscillator signal is within a frequency range determined by the frequencies corresponding to the two target poles.
- the influence of the noise signal introduced by the parasitic capacitance at the input end of the mixer on the performance of the mixer is mainly concentrated in the frequency range corresponding to the even harmonics of the local oscillator signal, especially the local
- the frequency range of the double frequency signal of the local oscillator signal is within the frequency range corresponding to the two target poles of the impedance multipole circuit, the impedance multipole
- the impedance of the circuit at the double frequency of the local oscillator signal is large, which can suppress the noise and nonlinear intermodulation introduced by the parasitic capacitance at the input end of the mixer circuit in the signal output by the mixer circuit Product product, which can effectively improve the performance of the mixer (such as noise figure, linearity).
- the mixing circuit includes at least a pair of triode switch pairs, and the input end of the mixing circuit is the common emitter node of the triode switch pair; or, the mixing circuit includes at least A pair of metal oxide semiconductor MOS transistor switch pairs, and the input end of the mixer circuit is a common source node of the MOS transistor switch pair.
- the impedance adjusting circuit includes a first capacitor and a coupled inductor; wherein the coupled inductor includes a first winding and a second winding, and the first winding is connected to the input terminal of the mixing circuit Connected, the second winding is connected in parallel with the first capacitor.
- the impedance adjustment circuit further includes a second capacitor, and the second capacitor is connected in parallel with the first winding.
- the impedance adjustment circuit further includes a resistor, and the resistor is connected in parallel with the first capacitor.
- the present application provides a communication device that includes a processor and the mixer described in any one of the possible implementations of the second aspect; or, the communication device includes a processor and The mixer described in any one of the possible implementation manners of the foregoing third aspect.
- the mixer is used to down-convert the radio frequency signal input to the mixer to obtain an intermediate frequency signal or baseband signal; the processor is used to process the intermediate frequency signal or baseband signal.
- the present application provides a communication device that includes a processor and the mixer described in any one of the possible implementations of the second aspect; or, the communication device includes a processor and The mixer described in any one of the possible implementation manners of the foregoing third aspect.
- the processor is used to generate a baseband signal or an intermediate frequency signal;
- the mixer is used to up-convert the baseband signal to obtain a radio frequency signal when the processor generates the baseband signal;
- the processor When the processor generates an intermediate frequency signal, it up-converts the intermediate frequency signal to obtain a radio frequency signal.
- Figure 1 is a schematic diagram of the structure of a double-balanced mixer in the prior art
- FIG. 2 is a schematic structural diagram of a mixer provided by an embodiment of the application.
- FIG. 3 is one of the structural schematic diagrams of a tuning circuit in a mixer provided by an embodiment of the application;
- FIG. 5 is the third structural diagram of a tuning circuit in a mixer provided by an embodiment of the application.
- FIG. 6 is a fourth structural diagram of a tuning circuit in a mixer provided by an embodiment of the application.
- FIG. 7a is one of the structural schematic diagrams of a switch inductor matrix provided by an embodiment of this application.
- FIG. 7b is a second structural diagram of a switch inductor matrix provided by an embodiment of the application.
- FIG. 7c is the third structural diagram of a switch inductor matrix provided by an embodiment of this application.
- FIG. 7d is the fourth structural diagram of a switch inductor matrix provided by an embodiment of this application.
- FIG. 7e is a schematic structural diagram of a switched capacitor matrix provided by an embodiment of the application.
- FIG. 8a is one of the specific structural schematic diagrams of a mixer provided by an embodiment of this application.
- FIG. 8b is the second schematic diagram of a specific structure of a mixer provided by an embodiment of this application.
- FIG. 8c is the third schematic diagram of a specific structure of a mixer provided by an embodiment of this application.
- FIG. 8d is a fourth schematic diagram of a specific structure of a mixer provided by an embodiment of this application.
- 10 is a simulation diagram of the relationship between the linearity of the mixer and the inductance value of the equivalent inductance of the switching inductance matrix provided by an embodiment of the application;
- FIG. 11 is a fifth schematic diagram of a specific structure of a mixer provided by an embodiment of this application.
- FIG. 12 is a schematic structural diagram of another mixer provided by an embodiment of the application.
- FIG. 13a is one of the schematic structural diagrams of an impedance adjusting circuit in another mixer provided by an embodiment of the application;
- FIG. 13b is the second structural diagram of an impedance adjustment circuit in another mixer provided by an embodiment of the application.
- FIG. 13c is the third structural diagram of an impedance adjustment circuit in another mixer provided by an embodiment of the application.
- FIG. 15 is a schematic structural diagram of a communication device provided by an embodiment of this application.
- the mixer is usually realized by a pair of transistor switches. There is a parasitic capacitance at the port of the mixer used to input the signal to be processed. This parasitic capacitance affects the performance of the mixer (gain, noise figure, linearity, etc.) The influence is greater, the higher the working frequency of the mixer, the more serious the deterioration of the mixer's noise figure and linearity.
- the double-balanced mixer includes transistors M0-M3.
- the transistor M0 and the transistor M1 form a transistor switch pair, and the transistor M2 and the transistor form a transistor M3 switch.
- the sources of transistors M0-M3 are the input terminals of radio frequency signals (signals to be processed) RF_IN and RF_IP
- the gates of transistors M0-M3 are the input terminals of local oscillator (LO) signals LON and LOP
- transistors M0-M3 The drains of are the output terminals of intermediate frequency (IF) signals IF_IN and IF_IP.
- Transistors M0-M3 charge and discharge the parasitic capacitance Cp when working, resulting in the steady-state noise current signal at the input of the local oscillator signal and the noise current signal from the transistor switch pair in the intermediate frequency signal output by the double-balanced mixer.
- the current signal is distributed at the even harmonics (including direct current) of the local oscillator signal.
- the low impedance caused by the parasitic capacitance Cp of the transistor switch to the common source node will also introduce the nonlinear intermodulation product of the transistor switch pair (third-order intermodulation product and second-order intermodulation product) in the intermediate frequency signal output by the double-balanced mixer. Intermodulation product).
- the higher the operating frequency of the double-balanced mixer the higher the nonlinear intermodulation product, that is, the worse the linearity performance is.
- the present application provides a mixer and communication equipment to reduce the mixer's performance while ensuring the mixer's performance such as gain, noise figure, and linearity.
- the effect of parasitic capacitance at the input on the performance of the mixer is mainly made to the part that implements frequency conversion in the mixer.
- the mixer provided in the embodiments of this application is a complete mixer and also has a known mixer.
- the structure of the mixer, such as input stage circuit, output stage circuit, etc., is only related to the improvement of the parasitic capacitance at the input end of the mixer where the frequency conversion part of the mixer is used to input the signal to be processed. The affected parts will be explained, and other parts will not be repeated.
- the present application provides a mixer 200.
- the mixer 200 includes a tuning circuit 210 and a mixing circuit 220, and the tuning circuit 210 is connected to the input end of the mixing circuit 220.
- the mixer circuit is a single balanced mixer circuit or a double balanced mixer circuit
- the tuning circuit 220 and the parasitic capacitance Cp at the input end of the mixer circuit 210 form an LC parallel resonant circuit
- the tuning circuit At least one of the capacitance value of the capacitor in 220 and the inductance value of the inductor in the tuning circuit is adjustable.
- the mixing circuit 220 is configured to use the local oscillator signal to perform frequency conversion on the signal to be processed input from the input of the mixing circuit 220, wherein the signal to be processed with different frequencies corresponds to the local signal with different frequencies. Vibration signal. Specifically, the mixing circuit 220 may use the local oscillator signal to down-convert the radio frequency signal to be processed to obtain an intermediate frequency signal or a baseband signal for subsequent signal processing; or, the mixing circuit 220 may also use the The local oscillator signal is up-converted to an intermediate frequency signal or baseband signal to be processed to obtain a radio frequency signal for antenna transmission.
- the mixing circuit 220 may be implemented by a triode, and the mixing circuit 220 includes at least a pair of triode switch pairs, and the input terminal of the mixer circuit is a common emitter node of the triode switch pair.
- the mixing circuit 220 may also be implemented by a metal oxide semiconductor (MOS) transistor.
- MOS metal oxide semiconductor
- the mixing circuit 220 includes at least a pair of MOS transistor switch pairs. The input terminal is the common source node of the MOS transistor switch pair.
- the tuning circuit 210 can be implemented by, but not limited to, any of the following two ways:
- the tuning circuit 210 is a switch inductance matrix, wherein the state of the switches in the switch inductance matrix is based on the resonance frequency range of the LC parallel resonant circuit and the input of the mixing circuit 220 The capacitance value of the parasitic capacitance Cp at the end is determined.
- the tuning circuit 210 includes a fixed inductor and a switched capacitor matrix, wherein the fixed inductor is connected in parallel with the switched capacitor matrix, and the state of the switches in the switched capacitor matrix is connected in parallel according to the LC
- the resonant frequency range of the resonant circuit, the inductance value of the fixed inductor, and the capacitance value of the parasitic capacitance Cp at the input end of the mixer circuit 220 are determined.
- the tuning circuit 210 includes a fixed capacitor and a switch inductance matrix, wherein the fixed capacitor is connected in parallel with the switch inductance matrix, and the state of the switches in the switch inductance matrix is connected in parallel according to the LC
- the resonant frequency range of the resonant circuit, the capacitance value of the fixed capacitor, and the capacitance value of the parasitic capacitance Cp at the input end of the mixer circuit 220 are determined.
- the tuning circuit 210 includes a switch inductance matrix and a switch inductance matrix, wherein the switch inductance matrix is connected in parallel with the switch capacitance matrix, and the state of the switches in the switch inductance matrix is based on the The resonant frequency range of the LC parallel resonant circuit and the capacitance value of the parasitic capacitance Cp at the input of the mixing circuit 220 are determined.
- the state of the switches in the switch inductance matrix is determined according to the resonant frequency range of the LC parallel resonant circuit and the The capacitance value of the parasitic capacitance Cp at the input end of the mixer circuit 220 is determined.
- the switch inductance matrix can be realized by, but not limited to, any of the following three ways:
- the switch inductor matrix includes a plurality of inductors connected in series, and each inductor is connected in parallel with a switch.
- the switch inductance matrix includes a plurality of branches connected in parallel, and each branch includes an inductor and a switch connected in series with the inductor.
- the inductance value of the inductor included in each branch may be the same or different, and each branch may include one or more inductors.
- the switch inductance matrix includes at least one first inductance circuit and at least one second inductance circuit, and each first inductance circuit includes a first inductance and a switch connected in series with the first inductance,
- the second inductance circuit includes a second inductance and a switch connected in series with the second inductance, and the first inductance circuit is in series with the second inductance circuit.
- the inductance value of the first inductor and the inductance value of the second inductor may be the same or different.
- the function of the switch inductance matrix can also be realized by other adjustable inductance circuits.
- the adjustable inductance circuit is an adjustable inductance
- the adjustable inductance can be a sliding Adjustable inductance or magnetic core adjustable inductance; for another example, the adjustable inductance circuit is a circuit with a structure as shown in FIG. 7d.
- the switched capacitor matrix can be implemented as shown in FIG. 7e.
- the switched capacitor matrix includes a plurality of branches connected in parallel, and each branch includes a capacitor and is connected to the capacitor. Switch in series.
- the structure of the mixer 200 is shown in FIG. 8a; when the tuning circuit 210 is implemented in the second manner above, and the switched capacitor matrix is implemented as shown in FIG. 7d, the structure of the mixer 200 is shown in FIG. 8b; when the When the circuit of the tuning circuit 210 is implemented in the third manner, and the switching inductance matrix is implemented in the foregoing manner 2, the structure of the mixer 200 is shown in FIG. 8c; when the tuning circuit 210 is implemented in the third manner, and When the switched inductance matrix is implemented using the above method 2, and the switched capacitor matrix is realized with the structure shown in FIG. 7d, the structure of the mixer 200 is shown in FIG. 8d.
- tuning circuit 210 is only an example and does not limit the application. Anything that can form an adjustable resonance frequency with the parasitic capacitance Cp at the input end of the mixer circuit 210
- the tuning circuits of the LC parallel resonance circuit are all suitable for this application.
- the resonant frequency range of the LC parallel resonant circuit is determined according to the frequency range of the local oscillator signal used by the mixer circuit 220 for frequency conversion.
- the frequency range of the double frequency signal of the local oscillator signal is within the resonance frequency range of the LC parallel resonant circuit.
- the noise signal introduced due to the parasitic capacitance Cp at the input of the mixer circuit 220 is mainly concentrated at the frequency corresponding to the even harmonic of the local oscillator signal, especially at the double frequency of the local oscillator signal Therefore, when the frequency range of the double frequency signal of the local oscillator signal is within the resonant frequency range of the LC parallel resonant circuit, the LC parallel resonant circuit is in a resonance state, and the input terminal of the mixing circuit 220
- the impedance at is relatively large, which can suppress the noise and nonlinear intermodulation products introduced by the parasitic capacitance at the input of the mixer circuit 220 in the signal output by the mixer circuit 220, thereby effectively improving the The performance (such as noise figure, linearity) of the mixer 200 is described.
- At least one of the capacitance value of the capacitor in the tuning circuit 210 and the inductance value of the inductor in the tuning circuit 210 is adjustable, that is to say, the resonance frequency of the LC parallel circuit is variable and can be adjusted according to
- the actual requirements of the mixer 200 cover the corresponding frequency range, and the impedance at the input end of the mixer circuit can be increased in a wider frequency range, so that the mixer can operate at a wider frequency. Within the range, the performance of the mixer can be improved.
- the working bandwidth of the mixer 200 ranges from 24.25 GHz to 29.5 GHz, that is, the input terminal of the mixer circuit 220 in the mixer 200
- the frequency range of the input radio frequency signal is 24.25GHz to 29.5GHz, and when the frequency range of the local oscillator signal is 17GHz to 22.5GHz, in order to reduce the parasitic capacitance Cp at the input end of the mixer circuit 220, the frequency mixing
- the effect of the performance of the device 200, the resonant frequency range of the LC parallel resonant circuit composed of the switched capacitor matrix and the parasitic capacitance Cp at the input end of the mixing circuit 220 is 34GHz to 45GHz (double frequency of the local oscillator signal),
- the capacitance value of the equivalent capacitance of the switched capacitor matrix (the capacitance obtained after the inductances working in the switched inductance matrix are connected in parallel) can be adjusted, so that the LC parallel resonance can be
- the linearity simulation result of the mixer circuit 200 is shown in FIG. 9. It can be seen from FIG. 9 that if the frequency of the radio frequency signal is 29.5 GHz and the equivalent capacitance of the switched capacitor matrix is 90 fF, the LC parallel resonant circuit is in resonance, and the linearity of the mixer 200 is optimal If the frequency of the radio frequency signal is 28 GHz and the equivalent capacitance of the switched capacitor matrix is 150 fF, the LC parallel resonant circuit is in resonance, and the linearity of the mixer 200 is optimal; if the radio frequency When the frequency of the signal is 26.5 GHz and the equivalent capacitance of the switched capacitor matrix is 240 fF, the LC parallel resonant circuit is in resonance, and the linearity of the mixer 200 is optimal; if the frequency of the radio frequency signal is At 24.5 GHz, when the equivalent capacitance of the switched capacitor matrix is 360 fF, the LC parallel resonant circuit is in a resonance state, and the linearity of the mixer 200 is optimal.
- the working bandwidth of the mixer 200 ranges from 24.25 GHz to 29.5 GHz, that is, the input of the mixer circuit 220 in the mixer 200
- the frequency range of the radio frequency signal input from the terminal is 24.25 GHz to 29.5 GHz
- the frequency range of the local oscillator signal is from 17 GHz to 22.5 GHz
- the resonance frequency of the LC parallel resonant circuit composed of the switch inductance matrix and the parasitic capacitance Cp at the input of the mixer circuit 220 is 34GHz to 45GHz (double frequency of the local oscillator signal) .
- the linearity simulation result of the mixer circuit 200 is shown in FIG. 10. It can be seen from FIG. 10 that if the frequency of the signal to be processed is 29.5 GHz and the equivalent inductance of the switching inductance matrix is 170 pH, the LC parallel resonant circuit is in resonance and the mixer 200 has the best linearity.
- the LC parallel resonant circuit is in resonance, and the linearity of the mixer 200 is optimal; if the When the frequency of the radio frequency signal is 26.5 GHz and the equivalent inductance of the switching inductance matrix is 270 pH, the LC parallel resonant circuit is in resonance, and the linearity of the mixer 200 is optimal; if the frequency of the radio frequency signal When it is 24.5 GHz and the equivalent inductance of the switching inductance matrix is 380 pH, the LC parallel resonant circuit is in a resonance state, and the linearity of the mixer 200 is optimal.
- the mixer 200 is an active mixer as shown in FIG. 11. Compared with a passive mixer, the active mixer has the advantages of high gain and good noise performance.
- the tuning circuit 210 in the mixer 200 includes two inductors Lp1 and Lp2 connected in series, and a switched capacitor matrix composed of two capacitors CF1, CF2 and switches connected in series.
- the frequency mixing in the mixer 200 The circuit 220 is realized by a differential double-balanced switch pair composed of transistors M0 ⁇ M3.
- the double-balanced current commutation active mixer function is realized, and the input differential radio frequency current signal is converted into a differential Intermediate frequency current signal output, wherein the source of the transistor M0 and the source of the transistor M3, and the source of the transistor M1 and the source of the transistor M2 are used to input a differential radio frequency current signal, and the gate of the transistor M0 And the gate of the transistor M3, and the gate of the transistor M1 and the gate of the transistor M2 are used for inputting differential local oscillator signals.
- the mixer 200 also includes a differential input stage circuit, which converts the voltage signal input through the input terminals INP (gate of the transistor MP) and INN (gate of the transistor MN) of the differential input stage circuit into current.
- the inductance LDEG in the differential input stage circuit is a source-level degeneration inductance, which can provide the real impedance required for impedance matching for the differential input stage circuit, and its negative feedback effect is also beneficial to improve the linearity of the transistor MP and the transistor MN performance.
- the mixer 200 further includes an output stage circuit, which realizes broadband matching of the impedance of the front and rear stages through a transformer, and converts the differential intermediate frequency current signal output by the mixer circuit into an intermediate frequency voltage signal through the load impedance Rload.
- the working bandwidth of the mixer 200 ranges from 24.25 GHz to 29.5 GHz, that is, the frequency range of the radio frequency signal input from the input end of the mixer circuit 220 in the mixer 200 is from 24.25 GHz to 29.5 GHz.
- the frequency range of the vibration signal is 17 GHz to 22.5 GHz
- the switch capacitor matrix and the mixer circuit 220 The resonant frequency range of the LC parallel resonant circuit composed of the parasitic capacitance Cp at the input end is 34GHz to 45GHz (double frequency of the local oscillator signal).
- the LC parallel resonant circuit is adjusted The size of the capacitor can further realize that the resonance frequency range of the LC parallel resonant circuit is 34GHz to 45GHz. At this time, too many capacitor matrix switches can easily reduce the quality factor Q of the LC parallel resonant circuit, so only one switch capacitor matrix is used switch.
- the switches in the switch capacitor matrix are disconnected, and the parasitic capacitance at the common source node of the inductor Lp1, the inductor Lp2 and the transistor switch pair
- the formed LC parallel resonant circuit resonates in the middle of the double frequency range of the local oscillator signal corresponding to Band1; when the mixer 200 works in the low frequency band Band2 (n257: 24.25GHz-26.5GHz), the above-mentioned switched capacitor
- the switches in the matrix are closed.
- the above-mentioned switched capacitor matrix, inductance Lp1, inductance Lp2 and the parasitic capacitance at the common source node of the transistor switch pair constitute an LC parallel resonant circuit that resonates in the middle of the double frequency range of the local oscillator signal corresponding to Band2 position.
- the mixer 200 can pass the tuning circuit 210 in the mixer 200, so that the tuning circuit 210 and the parasitic capacitance at the input end of the mixer circuit 220 in the mixer 200
- the formed LC parallel resonant circuit is in resonance, and the impedance at the input end of the mixer circuit 220 is increased, so that the mixer circuit 220 uses the local oscillator signal to input the signal to the input end of the mixer circuit 220
- the performance of the frequency converter 200 (such as noise figure, linearity).
- the tuning circuit can work in a wider frequency range by cooperating with the parasitic capacitance at the input end of the mixing circuit 220 in the mixer 200. , Increase the impedance at the input end of the mixer circuit, so that the mixer 200 can improve the performance of the mixer in a wider frequency range.
- the present application also provides another mixer 1200.
- the mixer 1200 includes an impedance adjustment circuit 1210 and a mixer circuit 1220, wherein the mixer circuit 1220 is a single balanced mixer circuit. Or a double-balanced mixer circuit, the impedance adjustment circuit 1210 and the parasitic capacitance at the input end of the mixer circuit 1220 form an impedance multi-pole circuit; there are at least two targets among the poles of the impedance function of the impedance multi-pole circuit For the pole, the frequency range of the N-multiplier signal of the local oscillator signal used by the mixer circuit 1220 for frequency conversion is within the range determined by the frequencies corresponding to the two target poles, and N is an even number.
- the frequency range determined by the frequencies corresponding to the two target poles is greater than or equal to the frequency range of the double frequency signal of the local oscillator signal.
- the impedance function of the impedance multi-pole circuit includes two poles, one pole corresponds to a frequency and the other pole corresponds to a frequency b (b>a), then the working bandwidth of the mixer 1200 corresponds to
- the frequency range of the double frequency signal of the local oscillator signal is within the frequency range [a, b] determined by the frequencies corresponding to these two poles.
- the impedance function of the multi-pole circuit includes three poles, these three poles correspond to The frequencies of are respectively a, b, c (c>b>a), then the frequency ranges [a, b], [a, c] and [b, c] determined by the frequencies corresponding to these three poles are at least A frequency range makes the frequency range of the double frequency signal of the local oscillator signal corresponding to the working bandwidth of the mixer 1200 within the frequency range.
- the noise signal introduced due to the parasitic capacitance Cp at the input end of the mixer 1200 is mainly concentrated in the frequency range corresponding to the even harmonics of the local oscillator signal, especially at the double frequency of the local oscillator signal Therefore, when the frequency range of the double frequency signal of the local oscillator signal is within the frequency range corresponding to the two target poles of the multi-pole circuit, the impedance multi-pole circuit is in the range of the local oscillator signal
- the impedance at the double frequency is large, which can suppress the noise and nonlinear intermodulation products introduced by the parasitic capacitance at the input end of the mixer circuit 1020 in the signal output by the mixer circuit 1020, thereby effectively Improve the performance (such as noise figure, linearity) of the mixer 1200.
- the poles of the impedance multi-pole circuit can be set reasonably according to the frequency range of the double-frequency signal of the local oscillator signal within the working bandwidth of the mixer 1200, so that the mixer circuit 1200 can be set at a larger
- the impedance at the input end is relatively large within the working bandwidth of.
- the mixing circuit 1220 is configured to use a local oscillator signal to perform frequency conversion on the signal to be processed input from the input terminal of the mixing circuit 1220, wherein the signal to be processed with different frequencies corresponds to the local signal with different frequencies. Vibration signal. Specifically, the mixing circuit 1220 may use the local oscillator signal to down-convert the radio frequency signal to be processed to obtain an intermediate frequency signal or a baseband signal for subsequent signal processing; or, the mixing circuit 1220 may also use the The local oscillator signal is up-converted to an intermediate frequency signal or baseband signal to be processed to obtain a radio frequency signal for antenna transmission.
- the mixing circuit 1220 may be implemented by a triode, and the mixing circuit 1220 includes at least a pair of triode switch pairs, and the input terminal of the mixer circuit is the common emitter node of the triode switch pair.
- the mixing circuit 1220 can also be realized by a MOS tube.
- the mixing circuit 1220 includes at least a pair of MOS tube switches, and the input terminal of the mixing circuit 1220 is a pair of MOS tube switches. Common source node.
- the tuning circuit may include a first capacitor C1 and a coupling inductor, and the coupling inductor includes a first winding L1 and a second winding L2, the first winding L1 is connected to the input end of the mixing circuit 1220, and the second winding L2 is connected in parallel with the first capacitor.
- the coupled inductor may be a transformer, the first winding is a primary winding of the transformer, and the second winding is a secondary winding of the transformer.
- the impedance adjusting circuit further includes a second capacitor C2, and the second capacitor C2 is connected in parallel with the first winding.
- the impedance adjusting circuit may further include a resistor R, and the resistor R is connected in parallel with the first capacitor.
- this application does not limit the specific structure of the impedance adjustment circuit 1210.
- the specific structure of the impedance adjustment circuit 210 that forms an impedance multi-pole circuit with the mixer circuit 1220 described above is only an example. Any circuit that can form an impedance multi-pole circuit with the mixer circuit 1220 can be applied to this application, such as a microstrip line.
- the mixer 1200 has a structure as shown in FIG. 13c, the principle that the mixer 1200 increases the impedance at the input end of the mixer circuit 1220 through an impedance multi-pole circuit will be described in detail.
- the impedance function Z p of the impedance multi-pole circuit that is, the impedance seen from the input end of the mixing circuit 1220 is as follows
- R represents the resistance value of the resistance in the impedance multi-pole circuit
- C 1 represents the capacitance value of the first capacitor in the impedance multi-pole circuit
- C 2 represents the second capacitor in the impedance multi-pole circuit and the mixed
- L 1 represents the inductance value of the primary coil of the transformer in the impedance multi-pole circuit
- L 2 represents the secondary coil of the transformer in the impedance multi-pole circuit
- K is the coupling coefficient between the primary coil and the secondary coil of the transformer in the impedance multi-pole circuit.
- the impedance function Z p can be simplified as:
- the frequencies corresponding to the two poles of the impedance function Z p are:
- the frequency range determined by the frequencies ⁇ p1 and ⁇ p2 corresponding to the two poles of the impedance function Z p namely this frequency range of the second harmonic signal LO signal within a frequency range corresponding to the two poles of the impedance function Z p
- the impedance of the multi-pole impedance circuit is large, i.e., the frequency converting circuit 220
- the impedance at the input end of the mixer 1200 is relatively large, which can effectively reduce the influence of the parasitic capacitance Cp at the input end of the mixer 1200 on the performance (such as noise figure, linearity) of the mixer 200.
- the embodiment of the present application does not limit the specific structure of the mixer circuit, and the mixer circuit may be an active mixer circuit or a passive mixer circuit.
- the mixer 1200 can pass an impedance multi-pole circuit formed by the impedance adjustment circuit 1210 in the mixer 1200 and the parasitic capacitance at the input end of the mixer circuit 1220 in the mixer 1200. , Increase the impedance at the input end of the mixer circuit 1220 so that the mixer circuit 1220 uses the local oscillator signal to perform frequency conversion on the signal input from the input end of the mixer circuit 1220, which can suppress the In the signal output by the mixer circuit 1220, the noise and nonlinear intermodulation products introduced by the parasitic capacitance at the input of the mixer circuit 1220 can effectively improve the performance of the mixer 1200 (such as noise figure , Linearity).
- the impedance multi-pole circuit can increase the impedance at the input end of the mixer circuit 1220 in a wider frequency range, thereby causing the mixing
- the frequency converter 1200 can improve the performance of the mixer in a wide frequency range.
- the mixer 1200 has an active mixer as shown in FIG. 12.
- the impedance adjustment circuit 1210 in the mixer 1200 includes a first capacitor C1, a second capacitor C2, and a transformer.
- the first capacitor C1 In parallel with the secondary coil of the transformer, the second capacitor C2 is connected in parallel with the input terminal of the mixing circuit 1220 and the primary coil of the transformer; the mixing circuit 1220 in the mixer 1200 is connected in parallel with the transistor M0
- the differential double-balanced switch pair composed of M3 realizes the double-balanced current commutation active mixer function under the action of the differential local oscillator signal LOP and LON, and converts the input differential radio frequency current signal into a differential intermediate frequency current signal output, Wherein, the source of the transistor M0 and the source of the transistor M3, and the source of the transistor M1 and the source of the transistor M2 are used to input a differential radio frequency current signal, and the gate of the transistor M0 and the gate of the transistor M3 And the gate of the transistor M1 and the gate of the transistor
- the mixer 1200 further includes a differential input stage circuit, which converts the voltage signal input through the input terminals INP (gate of the transistor MP) and INN (gate of the transistor MN) of the differential input stage circuit into current.
- the inductance LDEG in the differential input stage circuit is a source-level degraded inductance, which can provide the real impedance required for impedance matching for the differential input stage circuit, and its negative feedback effect is also conducive to improving the linearity of the transistor MP and the transistor MN performance.
- the mixer 1200 further includes an output stage circuit that realizes broadband matching of the impedance of the front and rear stages through a transformer, and converts the differential intermediate frequency current signal output by the mixer circuit into an intermediate frequency voltage signal through the load impedance Rload.
- the frequency range of the radio frequency signal input from the input end of the mixer circuit 1220 in the mixer 1200 is from 24.25 GHz to 29.5 GHz.
- the frequency range of the vibration signal is 17 GHz to 22.5 GHz
- the inductance value of the primary coil L1 of the transformer, the secondary coil L2 of the transformer, the coupling coefficient k between the primary coil L1 of the transformer and the secondary coil L2 of the transformer, and the first capacitance The capacitance value of C1 and the capacitance value of the second capacitor make the frequency range of the double frequency signal of the local oscillator signal composed of the parasitic capacitance Cp at the input ends of the impedance adjustment circuit 1210 and the mixer circuit 1220.
- the impedance at the input end of the mixer circuit 1220 is at the double frequency signal of the local oscillator signal
- the frequency range is high impedance.
- the present application also provides a communication device.
- the communication device includes a processor and the mixer described in any one of the foregoing possible implementation manners.
- the mixer is used to down-convert the radio frequency signal input to the mixer to obtain an intermediate frequency signal or a baseband signal; the processor is used to process the intermediate frequency signal or Baseband signal.
- the processor is configured to generate a baseband signal or an intermediate frequency signal;
- the mixer is configured to up-convert the baseband signal when the processor generates the baseband signal, Obtain a radio frequency signal; when the processor generates an intermediate frequency signal, up-convert the intermediate frequency signal to obtain a radio frequency signal.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Superheterodyne Receivers (AREA)
Abstract
Description
本申请涉及无线通信技术领域,尤其涉及一种混频器以及通信设备。This application relates to the field of wireless communication technology, and in particular to a mixer and communication equipment.
混频器是无线通信设备中实现频率变换的关键器件,也是组成收发机的基本单元。其中,接收机利用混频器将接收到的射频(radio frequency,RF)信号下变频至中频信号或零中频信号处理,发射机利用混频器将中频或者零中频信号上变频至射频信号以利于天线发射。The mixer is a key component for frequency conversion in wireless communication equipment, and it is also a basic unit of the transceiver. Among them, the receiver uses a mixer to down-convert the received radio frequency (RF) signal to an intermediate frequency signal or zero-IF signal for processing, and the transmitter uses a mixer to up-convert the intermediate or zero-IF signal to a radio frequency signal to facilitate Antenna emission.
现代通信系统对通信速率的要求越来越高,使得通信信号的带宽以及频率覆盖范围也越来越宽,射频频率也越来越高。混频器通常是通过晶体管开关对实现的,在混频器的用于输入待处理信号的端口处存在寄生电容,该寄生电容对混频器的性能(增益、噪声系数和线性度等)的影响较大,混频器的工作频率越高,混频器噪声系数和线性度的恶化也越严重。Modern communication systems have higher and higher requirements for communication rates, making the bandwidth and frequency coverage of communication signals wider and wider, and the radio frequency is also getting higher and higher. The mixer is usually realized by a pair of transistor switches. There is a parasitic capacitance at the port of the mixer used to input the signal to be processed. This parasitic capacitance affects the performance of the mixer (gain, noise figure, linearity, etc.) The influence is greater, the higher the working frequency of the mixer, the more serious the deterioration of the mixer's noise figure and linearity.
为了解决上述问题,现有技术中通过限制混频器中晶体管开关对的尺寸,减少其输入端处寄生电容的大小,进而减小寄生电容对混频器性能的影响。但是,采取限制晶体管开关对尺寸方法是通过对混频器的增益、噪声和线性度性能综合折中的优化设计,混频器的增益、噪声系数和线性度性能中的一种或多种会有一定程度的下降。In order to solve the above problems, in the prior art, the size of the transistor switch pair in the mixer is limited to reduce the size of the parasitic capacitance at the input end thereof, thereby reducing the influence of the parasitic capacitance on the performance of the mixer. However, the method to limit the size of the transistor switch is to optimize the design of a comprehensive compromise between the gain, noise and linearity performance of the mixer. One or more of the gain, noise figure and linearity performance of the mixer will be affected. There is a certain degree of decline.
发明内容Summary of the invention
本申请提供一种混频器以及通信设备,用以降低混频器的输入端处寄生电容对混频器性能的影响。The application provides a mixer and a communication device to reduce the influence of parasitic capacitance at the input end of the mixer on the performance of the mixer.
第一方面,本申请提供了一种混频器,所述混频器包括调谐电路和混频电路,所述调谐电路与所述混频电路的输入端连接。其中,所述混频电路为单平衡混频电路或双平衡混频电路,所述调谐电路与所述混频电路的输入端处的寄生电容构成LC并联谐振电路,所述调谐电路中电容的电容值以及所述调谐电路中电感的电感值中至少有一个是可调的。In a first aspect, the present application provides a mixer including a tuning circuit and a mixing circuit, and the tuning circuit is connected to the input end of the mixing circuit. Wherein, the mixing circuit is a single-balanced mixing circuit or a double-balanced mixing circuit, the tuning circuit and the parasitic capacitance at the input end of the mixing circuit form an LC parallel resonant circuit, and the capacitance of the tuning circuit At least one of the capacitance value and the inductance value of the inductor in the tuning circuit is adjustable.
通过上述方案,所述混频器能够通过所述混频器中的调谐电路,使得所述调谐电路与所述混频器中的混频电路的输入端处的寄生电容构成的LC谐振电路处于谐振状态,以增大所述混频电路的输入端处的阻抗,使得所述混频电路在利用本振信号对所述混频电路的输入端输入的信号进行频率变换时,能够抑制所述混频电路输出的信号中,通过所述混频电路的输入端处寄生电容而引入的噪声和非线性交调积产物,进而可以有效提高所述混频器的性能(如噪声系数、线性度)。并且,当所述调谐电路的结构设置合适时,所述调谐电路能够在较宽的频率范围内,通过与所述混频器中的混频电路的输入端处的寄生电容的配合,增大所述混频电路的输入端处的阻抗,进而使得所述混频器能够在较宽的频率范围内均可以提高所述混频器的性能。Through the above solution, the mixer can pass through the tuning circuit in the mixer, so that the LC resonance circuit formed by the tuning circuit and the parasitic capacitance at the input end of the mixer circuit in the mixer is at The resonance state is used to increase the impedance at the input end of the mixer circuit, so that the mixer circuit can suppress the frequency conversion of the signal input from the input end of the mixer circuit using the local oscillator signal. In the signal output by the mixer circuit, noise and nonlinear intermodulation products introduced by the parasitic capacitance at the input end of the mixer circuit can effectively improve the performance of the mixer (such as noise figure, linearity) ). Moreover, when the structure of the tuning circuit is set appropriately, the tuning circuit can increase the frequency range by cooperating with the parasitic capacitance at the input end of the mixing circuit in the mixer. The impedance at the input end of the mixer circuit in turn enables the mixer to improve the performance of the mixer in a wide frequency range.
一种可能的实施方式中,所述混频电路包括至少一对三极管开关对,所述混频电路的输入端为所述三极管开关对的共发射极节点;或者,所述混频电路包括至少一对金属氧化物半导体MOS管开关对,所述混频电路的输入端为所述MOS管开关对的共源节点。In a possible implementation manner, the mixing circuit includes at least a pair of triode switch pairs, and the input end of the mixing circuit is the common emitter node of the triode switch pair; or, the mixing circuit includes at least A pair of metal oxide semiconductor MOS transistor switch pairs, and the input end of the mixer circuit is a common source node of the MOS transistor switch pair.
一种可能的实施方式中,所述LC并联谐振电路的谐振频率范围根据所述混频电路220进行频率变换时所使用的本振信号的频率范围确定。In a possible implementation manner, the resonance frequency range of the LC parallel resonant circuit is determined according to the frequency range of the local oscillator signal used when the
一种可能的实施方式中,所述本振信号的二倍频信号的频率范围在所述LC并联谐振电路的谐振频率范围内。In a possible implementation manner, the frequency range of the double frequency signal of the local oscillator signal is within the resonance frequency range of the LC parallel resonant circuit.
由于所述混频电路的输入端处的寄生电容而引入的噪声信号主要集中在所述本振信号的偶次谐波对应的频率处,尤其是所述本振信号的二倍频处,因此,当所述本振信号的二倍频信号的频率范围在所述LC并联谐振电路的谐振频率范围内时,所述LC并联谐振电路处于谐振状态,所述混频电路的输入端处的阻抗为较大,可以抑制所述混频电路输出的信号中,通过所述混频电路的输入端处寄生电容而引入的噪声和非线性交调积产物,进而能够有效提高所述混频器的性能(如噪声系数、线性度)。The noise signal introduced due to the parasitic capacitance at the input end of the mixer circuit is mainly concentrated at the frequency corresponding to the even harmonic of the local oscillator signal, especially at the double frequency of the local oscillator signal. , When the frequency range of the double frequency signal of the local oscillator signal is within the resonant frequency range of the LC parallel resonant circuit, the LC parallel resonant circuit is in a resonance state, and the impedance at the input end of the mixing circuit To be larger, it can suppress the noise and nonlinear intermodulation products introduced by the parasitic capacitance at the input end of the mixer circuit in the signal output by the mixer circuit, thereby effectively improving the mixer’s performance Performance (such as noise figure, linearity).
一种可能的实施方式中,所述调谐电路可以通过但不限于以下四种方式中的任意一种实现:In a possible implementation manner, the tuning circuit can be implemented in any one of the following four ways, but not limited to:
方式一、所述调谐电路为开关电感矩阵,其中,所述开关电感矩阵中开关的状态根据所述LC并联谐振电路的谐振频率范围以及所述混频电路的输入端处的寄生电容的电容值确定。Manner 1: The tuning circuit is a switched inductance matrix, wherein the state of the switches in the switched inductance matrix is based on the resonance frequency range of the LC parallel resonant circuit and the capacitance value of the parasitic capacitance at the input end of the mixing circuit determine.
方式二、所述调谐电路包括固定电感和开关电容矩阵,其中,所述固定电感与所述开关电容矩阵并联,所述开关电容矩阵中开关的状态根据所述LC并联谐振电路的谐振频率范围、所述固定电感的电感值以及所述混频电路的输入端处的寄生电容的电容值确定。Manner 2: The tuning circuit includes a fixed inductance and a switched capacitor matrix, wherein the fixed inductance is connected in parallel with the switched capacitor matrix, and the state of the switch in the switched capacitor matrix is based on the resonance frequency range of the LC parallel resonant circuit, The inductance value of the fixed inductor and the capacitance value of the parasitic capacitance at the input end of the mixer circuit are determined.
方式三、所述调谐电路包括固定电容和开关电感矩阵,其中,所述固定电容与所述开关电感矩阵并联,所述开关电感矩阵中开关的状态根据所述LC并联谐振电路的谐振频率范围、所述固定电容的电容值以及所述混频电路的输入端处的寄生电容的电容值确定。Manner 3: The tuning circuit includes a fixed capacitor and a switch inductance matrix, wherein the fixed capacitor is connected in parallel with the switch inductance matrix, and the state of the switch in the switch inductance matrix is based on the resonance frequency range of the LC parallel resonant circuit, The capacitance value of the fixed capacitor and the capacitance value of the parasitic capacitance at the input end of the mixer circuit are determined.
方式四、所述调谐电路包括开关电感矩阵和开关电感矩阵,其中,所述开关电感矩阵与所述开关电容矩阵并联,所述开关电感矩阵中开关的状态根据所述LC并联谐振电路的谐振频率范围以及所述混频电路的输入端处的寄生电容的电容值确定,所述开关电感矩阵中开关的状态根据所述LC并联谐振电路的谐振频率范围以及所述混频电路的输入端处的寄生电容的电容值确定。Manner 4: The tuning circuit includes a switch inductance matrix and a switch inductance matrix, wherein the switch inductance matrix is connected in parallel with the switch capacitance matrix, and the state of the switch in the switch inductance matrix is based on the resonance frequency of the LC parallel resonant circuit The range and the capacitance value of the parasitic capacitance at the input end of the mixer circuit are determined, and the state of the switches in the switch inductance matrix is determined according to the resonance frequency range of the LC parallel resonant circuit and the capacitance value at the input end of the mixer circuit. The capacitance value of the parasitic capacitance is determined.
一个可能的实施方式中,所述开关电感矩阵可以通过但不限于以下三种方式中的任意一种实现:In a possible implementation manner, the switch inductance matrix can be implemented in any one of the following three ways, but not limited to:
方式1、所述开关电感矩阵包括多个相互串联的电感,每个电感分别与开关并联。
方式2、所述开关电感矩阵为包括多个相互并联的支路,每个支路包括电感以及与所述电感串联的开关。Manner 2. The switch inductance matrix includes a plurality of branches connected in parallel, and each branch includes an inductor and a switch connected in series with the inductor.
方式3、所述开关电感矩阵包括至少一个第一电感电路和至少一个第二电感电路,所述第一电感电路与所述第二电感电路串联,每个第一电感电路包括第一电感以及与所述第一电感串联的开关,所述第二电感电路包括第二电感以及与所述第二电感串联的开关。Manner 3: The switch inductance matrix includes at least one first inductance circuit and at least one second inductance circuit, the first inductance circuit is connected in series with the second inductance circuit, and each first inductance circuit includes a first inductance and The switch connected in series with the first inductor, and the second inductor circuit includes a switch connected in series with the second inductor.
一种可能的实施方式中,所述开关电容矩阵包括多个相互并联的支路,每个支路包括电容以及与所述电容串联的开关。In a possible implementation manner, the switched capacitor matrix includes a plurality of branches connected in parallel with each other, and each branch includes a capacitor and a switch connected in series with the capacitor.
第二方面,本申请还提供了另一种混频器,所述混频器包括包括阻抗调整电路和混频电路,所述阻抗调整电路与所述混频电路的输入端连接。其中,所述混频电路为单平衡混频电路或双平衡混频电路,所述阻抗调整电路与所述混频电路的输入端处的寄生电容构成阻抗多极点电路;所述阻抗多极点电路的阻抗函数的极点中至少存在两个目标极点,所述 混频电路进行频率变换时所使用的本振信号的N倍频信号的频率范围在所述两个目标极点对应的频率所确定的范围内,N为偶数。In a second aspect, the present application also provides another mixer. The mixer includes an impedance adjustment circuit and a mixing circuit, and the impedance adjustment circuit is connected to the input end of the mixing circuit. Wherein, the mixer circuit is a single-balanced mixer circuit or a double-balanced mixer circuit, and the impedance adjustment circuit and the parasitic capacitance at the input end of the mixer circuit form an impedance multi-pole circuit; the impedance multi-pole circuit There are at least two target poles among the poles of the impedance function, and the frequency range of the N-multiplier signal of the local oscillator signal used when the mixer circuit performs frequency conversion is within the range determined by the frequencies corresponding to the two target poles Inside, N is an even number.
通过上述方案,所述混频器能够通过所述混频器中的阻抗调整电路与所述混频器中的混频电路的输入端处的寄生电容构成的阻抗多极点电路,增大所述混频电路的输入端处的阻抗,使得所述混频电路利用本振信号,对所述混频电路的输入端输入的信号进行频率变换时,能够抑制所述混频电路输出的信号中,通过所述混频电路的输入端处寄生电容而引入的噪声和非线性交调积产物,进而能够有效提高所述混频器的性能(如噪声系数、线性度)。并且,当所述阻抗多极点电路的极点设置合适时,所述阻抗多极点电路能够在较宽的频率范围内,增大所述混频电路的输入端处的阻抗,进而使得所述混频器能够在较宽的频率范围内均可以提高所述混频器的性能。Through the above solution, the mixer can increase the impedance multi-pole circuit formed by the impedance adjustment circuit in the mixer and the parasitic capacitance at the input end of the mixer circuit in the mixer. The impedance at the input end of the mixer circuit makes it possible for the mixer circuit to use the local oscillator signal to perform frequency conversion on the signal input from the input end of the mixer circuit to suppress the signal output by the mixer circuit. The noise and nonlinear intermodulation products introduced by the parasitic capacitance at the input end of the mixer circuit can effectively improve the performance (such as noise figure, linearity) of the mixer. Moreover, when the poles of the impedance multi-pole circuit are set appropriately, the impedance multi-pole circuit can increase the impedance at the input end of the mixer circuit within a wider frequency range, thereby causing the mixing The mixer can improve the performance of the mixer in a wide frequency range.
一种可能的实施方式中,所述本振信号的二倍频信号的频率范围在所述两个目标极点对应的频率所确定的频率范围内。In a possible implementation manner, the frequency range of the double frequency signal of the local oscillator signal is within a frequency range determined by the frequencies corresponding to the two target poles.
由于所述混频器的输入端处的寄生电容引入的噪声信号对所述混频器性能的影响,主要集中在所述本振信号的偶次谐波对应的频率范围,尤其是所述本振信号的二倍频处,因此,当所述本振信号的二倍频信号的频率范围在所述阻抗多极点电路的所述两个目标极点对应的频率范围内时,所述阻抗多极点电路在所述本振信号的二倍频处的阻抗较大,能够抑制所述混频电路输出的信号中,通过所述混频电路的输入端处寄生电容而引入的噪声和非线性交调积产物,进而能够有效提高所述混频器的性能(如噪声系数、线性度)。The influence of the noise signal introduced by the parasitic capacitance at the input end of the mixer on the performance of the mixer is mainly concentrated in the frequency range corresponding to the even harmonics of the local oscillator signal, especially the local The frequency range of the double frequency signal of the local oscillator signal is within the frequency range corresponding to the two target poles of the impedance multipole circuit, the impedance multipole The impedance of the circuit at the double frequency of the local oscillator signal is large, which can suppress the noise and nonlinear intermodulation introduced by the parasitic capacitance at the input end of the mixer circuit in the signal output by the mixer circuit Product product, which can effectively improve the performance of the mixer (such as noise figure, linearity).
一种可能的实施方式中,所述混频电路包括至少一对三极管开关对,所述混频电路的输入端为所述三极管开关对的共发射极节点;或者,所述混频电路包括至少一对金属氧化物半导体MOS管开关对,所述混频电路的输入端为所述MOS管开关对的共源节点。In a possible implementation manner, the mixing circuit includes at least a pair of triode switch pairs, and the input end of the mixing circuit is the common emitter node of the triode switch pair; or, the mixing circuit includes at least A pair of metal oxide semiconductor MOS transistor switch pairs, and the input end of the mixer circuit is a common source node of the MOS transistor switch pair.
一种可能的实施方式中,所述阻抗调整电路包括第一电容和耦合电感;其中,所述耦合电感包括第一绕组和第二绕组,所述第一绕组与所述混频电路的输入端连接,所述第二绕组与所述第一电容并联。In a possible implementation manner, the impedance adjusting circuit includes a first capacitor and a coupled inductor; wherein the coupled inductor includes a first winding and a second winding, and the first winding is connected to the input terminal of the mixing circuit Connected, the second winding is connected in parallel with the first capacitor.
一种可能的实施方式中,所述阻抗调整电路还包括第二电容,所述第二电容与所述第一绕组并联。In a possible implementation manner, the impedance adjustment circuit further includes a second capacitor, and the second capacitor is connected in parallel with the first winding.
一种可能的实施方式中,所述阻抗调整电路还包括电阻,所述电阻与所述第一电容并联。In a possible implementation manner, the impedance adjustment circuit further includes a resistor, and the resistor is connected in parallel with the first capacitor.
第三方面,本申请提供了一种通信设备,所述通信设备包括处理器和上述第二方面任意一种可能的实施方式中所述的混频器;或者,所述通信设备包括处理器和上述第三方面任意一种可能的实施方式中所述的混频器。其中,所述混频器,用于对输入所述混频器的射频信号进行下变频,得到中频信号或基带信号;所述处理器,用于处理所述中频信号或基带信号。In a third aspect, the present application provides a communication device that includes a processor and the mixer described in any one of the possible implementations of the second aspect; or, the communication device includes a processor and The mixer described in any one of the possible implementation manners of the foregoing third aspect. The mixer is used to down-convert the radio frequency signal input to the mixer to obtain an intermediate frequency signal or baseband signal; the processor is used to process the intermediate frequency signal or baseband signal.
第四方面,本申请提供了一种通信设备,所述通信设备包括处理器以及上述第二方面任意一种可能的实施方式中所述的混频器;或者,所述通信设备包括处理器和上述第三方面任意一种可能的实施方式中所述的混频器。其中,所述处理器,用于生成基带信号或者中频信号;所述混频器,用于在所述处理器生成基带信号时,对所述基带信号进行上变频,得到射频信号;在所述处理器生成中频信号时,对所述中频信号进行上变频,得到射频信号。In a fourth aspect, the present application provides a communication device that includes a processor and the mixer described in any one of the possible implementations of the second aspect; or, the communication device includes a processor and The mixer described in any one of the possible implementation manners of the foregoing third aspect. Wherein, the processor is used to generate a baseband signal or an intermediate frequency signal; the mixer is used to up-convert the baseband signal to obtain a radio frequency signal when the processor generates the baseband signal; When the processor generates an intermediate frequency signal, it up-converts the intermediate frequency signal to obtain a radio frequency signal.
图1为现有技术中双平衡混频器的结构示意图;Figure 1 is a schematic diagram of the structure of a double-balanced mixer in the prior art;
图2为本申请实施例提供的一种混频器的结构示意图;FIG. 2 is a schematic structural diagram of a mixer provided by an embodiment of the application;
图3为本申请实施例提供的一种混频器中调谐电路的结构示意图之一;3 is one of the structural schematic diagrams of a tuning circuit in a mixer provided by an embodiment of the application;
图4为本申请实施例提供的一种混频器中调谐电路的结构示意图之二;4 is the second structural diagram of a tuning circuit in a mixer provided by an embodiment of the application;
图5为本申请实施例提供的一种混频器中调谐电路的结构示意图之三;5 is the third structural diagram of a tuning circuit in a mixer provided by an embodiment of the application;
图6为本申请实施例提供的一种混频器中调谐电路的结构示意图之四;6 is a fourth structural diagram of a tuning circuit in a mixer provided by an embodiment of the application;
图7a为本申请实施例提供的一种开关电感矩阵的结构示意图之一;FIG. 7a is one of the structural schematic diagrams of a switch inductor matrix provided by an embodiment of this application;
图7b为本申请实施例提供的一种开关电感矩阵的结构示意图之二;FIG. 7b is a second structural diagram of a switch inductor matrix provided by an embodiment of the application;
图7c为本申请实施例提供的一种开关电感矩阵的结构示意图之三;FIG. 7c is the third structural diagram of a switch inductor matrix provided by an embodiment of this application;
图7d为本申请实施例提供的一种开关电感矩阵的结构示意图之四;FIG. 7d is the fourth structural diagram of a switch inductor matrix provided by an embodiment of this application;
图7e为本申请实施例提供的一种开关电容矩阵的结构示意图;FIG. 7e is a schematic structural diagram of a switched capacitor matrix provided by an embodiment of the application;
图8a为本申请实施例提供的一种混频器的具体结构示意图之一;FIG. 8a is one of the specific structural schematic diagrams of a mixer provided by an embodiment of this application;
图8b为本申请实施例提供的一种混频器的具体结构示意图之二;FIG. 8b is the second schematic diagram of a specific structure of a mixer provided by an embodiment of this application;
图8c为本申请实施例提供的一种混频器的具体结构示意图之三;FIG. 8c is the third schematic diagram of a specific structure of a mixer provided by an embodiment of this application;
图8d为本申请实施例提供的一种混频器的具体结构示意图之四;FIG. 8d is a fourth schematic diagram of a specific structure of a mixer provided by an embodiment of this application;
图9为本申请实施例提供的混频器的线性度与开关电感矩阵的等效电感的电感值关系的仿真图;9 is a simulation diagram of the relationship between the linearity of the mixer and the inductance value of the equivalent inductance of the switching inductance matrix provided by an embodiment of the application;
图10为本申请实施例提供的混频器的线性度与开关电感矩阵的等效电感的电感值关系的仿真图;10 is a simulation diagram of the relationship between the linearity of the mixer and the inductance value of the equivalent inductance of the switching inductance matrix provided by an embodiment of the application;
图11为本申请实施例提供的一种混频器的具体结构示意图之五;FIG. 11 is a fifth schematic diagram of a specific structure of a mixer provided by an embodiment of this application;
图12为本申请实施例提供的另一种混频器的结构示意图;FIG. 12 is a schematic structural diagram of another mixer provided by an embodiment of the application;
图13a为本申请实施例提供的另一种混频器中阻抗调整电路的结构示意图之一;FIG. 13a is one of the schematic structural diagrams of an impedance adjusting circuit in another mixer provided by an embodiment of the application;
图13b为本申请实施例提供的另一种混频器中阻抗调整电路的结构示意图之二;FIG. 13b is the second structural diagram of an impedance adjustment circuit in another mixer provided by an embodiment of the application;
图13c为本申请实施例提供的另一种混频器中阻抗调整电路的结构示意图之三;FIG. 13c is the third structural diagram of an impedance adjustment circuit in another mixer provided by an embodiment of the application;
图14为本申请实施例提供的另一种混频器的具体结构示意图;14 is a schematic diagram of a specific structure of another mixer provided by an embodiment of the application;
图15为本申请实施例提供的一种通信设备的结构示意图。FIG. 15 is a schematic structural diagram of a communication device provided by an embodiment of this application.
混频器通常是通过晶体管开关对实现的,在混频器的用于输入待处理信号的端口处存在寄生电容,该寄生电容对混频器的性能(增益、噪声系数和线性度等)的影响较大,混频器的工作频率越高,混频器噪声系数和线性度的恶化也越严重。The mixer is usually realized by a pair of transistor switches. There is a parasitic capacitance at the port of the mixer used to input the signal to be processed. This parasitic capacitance affects the performance of the mixer (gain, noise figure, linearity, etc.) The influence is greater, the higher the working frequency of the mixer, the more serious the deterioration of the mixer's noise figure and linearity.
以图1所示的接收机中的双平衡混频器为例,该双平衡混频器包括晶体管M0-M3,晶体管M0与晶体管M1构成一个晶体管开关对,晶体管M2与晶体管构成一个晶体管M3开关对,晶体管M0-M3的源极为射频信号(待处理信号)RF_IN以及RF_IP的输入端,晶体管M0-M3的栅极为本振(local oscillator,LO)信号LON以及LOP的输入端,晶体管M0-M3的漏极为中频(intermediate frequency,IF)信号IF_IN以及IF_IP的输出端。由于晶体管M0与M1的共源节点以及M2与M3的共源节点均存在寄生电容Cp,晶体管M0与M1的共源节点以及M2与M3的共源节点处变成低阻抗节点,且该双平衡混频器的 工作频率越高,共源节点处的阻抗越低。晶体管M0-M3工作时会对寄生电容Cp进行充放电,导致该双平衡混频器输出的中频信号中引入了本振信号输入端的稳态噪声电流信号和晶体管开关对的噪声电流信号,这些噪声电流信号分布在本振信号的偶次谐波(包括直流)处,该双平衡混频器的工作频率越高,噪声系数的恶化也越严重。同时,晶体管开关对共源节点的寄生电容Cp导致的低阻抗,还会在该双平衡混频器输出的中频信号中引入晶体管开关对的非线性交调积(三阶交调积和二阶交调积),该双平衡混频器的工作频率越高,非线性交调积越高,即线性度性能恶化越严重。Take the double-balanced mixer in the receiver shown in Figure 1 as an example. The double-balanced mixer includes transistors M0-M3. The transistor M0 and the transistor M1 form a transistor switch pair, and the transistor M2 and the transistor form a transistor M3 switch. Yes, the sources of transistors M0-M3 are the input terminals of radio frequency signals (signals to be processed) RF_IN and RF_IP, the gates of transistors M0-M3 are the input terminals of local oscillator (LO) signals LON and LOP, and transistors M0-M3 The drains of are the output terminals of intermediate frequency (IF) signals IF_IN and IF_IP. Since the common source node of transistors M0 and M1 and the common source node of M2 and M3 both have parasitic capacitance Cp, the common source node of transistors M0 and M1 and the common source node of M2 and M3 become low impedance nodes, and the double balance The higher the operating frequency of the mixer, the lower the impedance at the common source node. Transistors M0-M3 charge and discharge the parasitic capacitance Cp when working, resulting in the steady-state noise current signal at the input of the local oscillator signal and the noise current signal from the transistor switch pair in the intermediate frequency signal output by the double-balanced mixer. The current signal is distributed at the even harmonics (including direct current) of the local oscillator signal. The higher the operating frequency of the double-balanced mixer, the worse the noise figure. At the same time, the low impedance caused by the parasitic capacitance Cp of the transistor switch to the common source node will also introduce the nonlinear intermodulation product of the transistor switch pair (third-order intermodulation product and second-order intermodulation product) in the intermediate frequency signal output by the double-balanced mixer. Intermodulation product). The higher the operating frequency of the double-balanced mixer, the higher the nonlinear intermodulation product, that is, the worse the linearity performance is.
现有技术中采用限制混频器中晶体管开关对的尺寸的方法,减少其输入端处寄生电容的大小,进而达到减小寄生电容对混频器性能的影响的目的。但是,这种方法会导致混频器的增益、噪声系数和线性度等性能中的一种或多种下降。In the prior art, a method of limiting the size of the transistor switch pair in the mixer is adopted to reduce the size of the parasitic capacitance at the input end thereof, thereby achieving the purpose of reducing the influence of the parasitic capacitance on the performance of the mixer. However, this method will cause one or more of the gain, noise figure, and linearity of the mixer to decrease.
为了解决现有技术中存在的上述问题,本申请提供了一种混频器以及通信设备,用以在保证混频器的增益、噪声系数和线性度等性能的前提下,降低混频器的输入端处寄生电容对混频器性能的影响。本申请实施例中,主要针对混频器中实现频率变换的部分进行改进,但是应当理解的是,本申请实施例提供的混频器为一个完整的混频器,也具备已知的混频器具有的结构,如输入级电路、输出级电路等,在此仅对混频器中涉及改善混频器中频率变换部分用于输入待处理信号的输入端处寄生电容,对混频器性能影响的部件进行说明,对于其他部件不予赘述。In order to solve the above-mentioned problems in the prior art, the present application provides a mixer and communication equipment to reduce the mixer's performance while ensuring the mixer's performance such as gain, noise figure, and linearity. The effect of parasitic capacitance at the input on the performance of the mixer. In the embodiments of this application, improvements are mainly made to the part that implements frequency conversion in the mixer. However, it should be understood that the mixer provided in the embodiments of this application is a complete mixer and also has a known mixer. The structure of the mixer, such as input stage circuit, output stage circuit, etc., is only related to the improvement of the parasitic capacitance at the input end of the mixer where the frequency conversion part of the mixer is used to input the signal to be processed. The affected parts will be explained, and other parts will not be repeated.
另外,需要理解的是,在本申请的描述中,“第一”、“第二”等词汇,仅用于区分描述的目的,而不能理解为指示或暗示相对重要性,也不能理解为指示或暗示顺序;“和/或”,描述关联对象的关联关系,表示可以存在三种关系。例如,A和/或B,可以表示:单独存在A,同时存在A和B,单独存在B这三种情况。字符“/”一般表示前后关联对象是一种“或”的关系;“多个”指两个或两个以上。In addition, it should be understood that in the description of this application, words such as “first” and “second” are only used for the purpose of distinguishing description, and cannot be understood as indicating or implying relative importance, nor can it be understood as indicating Or imply the order; "and/or" describes the association relationship of the associated objects, indicating that there can be three relationships. For example, A and/or B can mean: A alone exists, A and B exist at the same time, and B exists alone. The character "/" generally indicates that the associated objects are in an "or" relationship; "multiple" refers to two or more than two.
为了使本申请的目的、技术方案和优点更加清楚,下面将结合附图对本申请作进一步地详细描述。In order to make the objectives, technical solutions, and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings.
如图2所示,本申请提供了一种混频器200,所述混频器200包括:调谐电路210和混频电路220,所述调谐电路210与所述混频电路220的输入端连接。其中,所述混频电路为单平衡混频电路或双平衡混频电路,所述调谐电路220与所述混频电路210的输入端处的寄生电容Cp构成LC并联谐振电路,所述调谐电路220中电容的电容值以及所述调谐电路中电感的电感值中至少有一个是可调的。As shown in FIG. 2, the present application provides a
所述混频电路220,用于利用本振信号,对所述混频电路220的输入端输入的待处理信号进行频率变换,其中,不同频率的所述待处理信号对应不同频率的所述本振信号。具体地,所述混频电路220可以利用所述本振信号对待处理的射频信号进行下变频,得到中频信号或者基带信号,以便于后续信号处理;或者,所述混频电路220也可以利用所述本振信号对待处理的中频信号或基带信号进行上变频,得到射频信号,以便于天线发射。The mixing
在具体实施中,所述混频电路220可以通过三极管实现,所述混频电路220包括至少一对三极管开关对,所述混频电路的输入端为所述三极管开关对的共发射极节点。或者,所述混频电路220也可以通过金属氧化物半导体(metal oxide semiconductor,MOS)管实现,此时,所述混频电路220包括至少一对MOS管开关对,所述混频电路22的输入端为所述MOS管开关对的共源节点。In a specific implementation, the mixing
具体实施中,所述调谐电路210可以通过但不限于以下两种方式中的任意一种实现:In specific implementation, the
方式一、如图3所示,所述调谐电路210为开关电感矩阵,其中,所述开关电感矩阵中开关的状态根据所述LC并联谐振电路的谐振频率范围以及所述混频电路220的输入端处的寄生电容Cp的电容值确定。
方式二、如图4所示,所述调谐电路210包括固定电感和开关电容矩阵,其中,所述固定电感与所述开关电容矩阵并联,所述开关电容矩阵中开关的状态根据所述LC并联谐振电路的谐振频率范围、所述固定电感的电感值以及所述混频电路220的输入端处的寄生电容Cp的电容值确定。Manner 2: As shown in FIG. 4, the
方式三、如图5所示,所述调谐电路210包括固定电容和开关电感矩阵,其中,所述固定电容与所述开关电感矩阵并联,所述开关电感矩阵中开关的状态根据所述LC并联谐振电路的谐振频率范围、所述固定电容的电容值以及所述混频电路220的输入端处的寄生电容Cp的电容值确定。Manner 3, as shown in FIG. 5, the
方式四、如图6所示,所述调谐电路210包括开关电感矩阵和开关电感矩阵,其中,所述开关电感矩阵与所述开关电容矩阵并联,所述开关电感矩阵中开关的状态根据所述LC并联谐振电路的谐振频率范围以及所述混频电路220的输入端处的寄生电容Cp的电容值确定,所述开关电感矩阵中开关的状态根据所述LC并联谐振电路的谐振频率范围以及所述混频电路220的输入端处的寄生电容Cp的电容值确定。Manner 4. As shown in FIG. 6, the
其中,在上述方式一、方式三以及方式四中,所述开关电感矩阵中开关的状态(导通状态或关断状态)不同时,所述开关电感矩阵对应的等效电感的电感值也不同,所述开关电感矩阵可以通过但不限于以下三种方式中的任意一种实现:Wherein, in the above-mentioned
方式1、如图7a所示,所述开关电感矩阵包括多个相互串联的电感,每个电感分别与开关并联。
方式2、如图7b所示,所述开关电感矩阵为包括多个相互并联的支路,每个支路包括电感以及与所述电感串联的开关。其中,所述每个支路包括的电感的电感值可以相同,也可以不同,所述每个支路可以包括一个或多个电感。Manner 2. As shown in FIG. 7b, the switch inductance matrix includes a plurality of branches connected in parallel, and each branch includes an inductor and a switch connected in series with the inductor. Wherein, the inductance value of the inductor included in each branch may be the same or different, and each branch may include one or more inductors.
方式3、如图7c所示,所述开关电感矩阵包括至少一个第一电感电路和至少一个第二电感电路,每个第一电感电路包括第一电感以及与所述第一电感串联的开关,所述第二电感电路包括第二电感以及与所述第二电感串联的开关,所述第一电感电路与所述第二电感电路串联。其中,所述第一电感的电感值与所述第二电感的电感值可以相同也可以不同。Manner 3, as shown in FIG. 7c, the switch inductance matrix includes at least one first inductance circuit and at least one second inductance circuit, and each first inductance circuit includes a first inductance and a switch connected in series with the first inductance, The second inductance circuit includes a second inductance and a switch connected in series with the second inductance, and the first inductance circuit is in series with the second inductance circuit. Wherein, the inductance value of the first inductor and the inductance value of the second inductor may be the same or different.
另外,上述方式一、方式三以及方式四中,所述开关电感矩阵的功能也可以通过其它可调电感电路实现,例如所述可调电感电路为可调电感,所述可调电感可以为滑动可调电感或者磁芯可调电感;又如,所述可调电感电路为结构如图7d所示的电路。In addition, in the
在上述方式二以及方式四中,所述开关电容矩阵可以通过如图7e所示的结构实现,所述开关电容矩阵包括多个相互并联的支路,每个支路包括电容以及与所述电容串联的开关。In the second and fourth modes above, the switched capacitor matrix can be implemented as shown in FIG. 7e. The switched capacitor matrix includes a plurality of branches connected in parallel, and each branch includes a capacitor and is connected to the capacitor. Switch in series.
以所述混频电路220以双平衡电路结构为例,当所述调谐电路210采用上述方式一实现,且所述开关电感矩阵采用上述方式2现实时,所述混频器200的结构如图8a所示;当所述调谐电路210采用上述方式二实现,且所述开关电容矩阵采用如图7d所示的结构实现时,所述混频器200的结构如图8b所示;当所述调谐电路210电路采用上述方式三实现,且所述开关电感矩阵采用上述方式2现实时,所述混频器200的结构如图8c所示;当所述调谐电路210采用上述方式三实现,且所述开关电感矩阵采用上述方式2现实,所述 开关电容矩阵采用如图7d所示的结构实现时,所述混频器200的结构如图8d所示。Taking the double-balanced circuit structure of the
需要说明的是,以上所述的调谐电路210的具体结构仅为举例说明,并不对本申请构成限定,凡是能够与所述混频电路210的输入端处的寄生电容Cp构成谐振频率可调的LC并联谐振电路的调谐电路均适用于本申请。It should be noted that the specific structure of the
进一步地,所述LC并联谐振电路的谐振频率范围根据所述混频电路220进行频率变换时所使用的本振信号的频率范围确定。特别地,所述本振信号的二倍频信号的频率范围在所述LC并联谐振电路的谐振频率范围内。由于所述混频电路220的输入端处的寄生电容Cp而引入的噪声信号主要集中在所述本振信号的偶次谐波对应的频率处,尤其是所述本振信号的二倍频处,因此,当所述本振信号的二倍频信号的频率范围在所述LC并联谐振电路的谐振频率范围内时,所述LC并联谐振电路处于谐振状态,所述混频电路220的输入端处的阻抗为较大,可以抑制所述混频电路220输出的信号中,通过所述混频电路220的输入端处寄生电容而引入的噪声和非线性交调积产物,进而能够有效提高所述混频器200的性能(如噪声系数、线性度)。并且,所述调谐电路210中电容的电容值以及所述调谐电路210中电感的电感容值中至少有一个可调,也就是说所述LC并联电路的谐振频率是可变的,能够根据所述混频器200的实际需求覆盖相应的频率范围,进而可以在较宽的频率范围,增大所述混频电路的输入端处的阻抗,进而使得所述混频器能够在较宽的频率范围内均可以提高所述混频器的性能。Further, the resonant frequency range of the LC parallel resonant circuit is determined according to the frequency range of the local oscillator signal used by the
例如,当所述混频器200具有如图8c所示的结构,所述混频器200的工作带宽范围为24.25GHz至29.5GHz,即所述混频器200中混频电路220的输入端输入的射频信号的频率范围为24.25GHz至29.5GHz,所述本振信号的频率范围为17GHz至22.5GHz时,为了降低所述混频电路220的输入端处的寄生电容Cp对所述混频器200性能的影响,所述开关电容矩阵与所述混频电路220的输入端处的寄生电容Cp组成的LC并联谐振电路的谐振频率范围为34GHz至45GHz(本振信号的二倍频),通过控制所述开关电容矩阵中的开关状态,调整所述开关电容矩阵的等效电容(所述开关电感矩阵中工作的电感并联后得到的电容)的电容值,进而能够实现所述LC并联谐振电路的谐振频率范围为34GHz至45GHz,此时所述混频电路200的线性度仿真结果如图9所示。由图9可知,若所述射频信号的频率为29.5GHz,所述开关电容矩阵的等效电容为90fF时,所述LC并联谐振电路处于谐振状态,所述混频器200的线性度最优;若所述射频信号的频率为28GHz,所述开关电容矩阵的等效电容为150fF时,所述LC并联谐振电路处于谐振状态,所述混频器200的线性度最优;若所述射频信号的频率为26.5GHz,所述开关电容矩阵的等效电容为240fF时,所述LC并联谐振电路处于谐振状态,所述混频器200的线性度最优;若所述射频信号的频率为24.5GHz,所述开关电容矩阵的等效电容为360fF时,所述LC并联谐振电路处于谐振状态,所述混频器200的线性度最优。For example, when the
又如,当所述混频器200具有如图8a所示的结构,所述混频器200的工作带宽范围为24.25GHz至29.5GHz,即所述混频器200中混频电路220的输入端输入的射频信号的频率范围为24.25GHz至29.5GHz,所述本振信号的频率范围为17GHz至22.5GHz时,为了降低所述混频电路220的输入端处的寄生电容Cp对所述混频器200性能的影响,所述开关电感矩阵与所述混频电路220的输入端处的寄生电容Cp组成的LC并联谐振电路的谐振频率范围为34GHz至45GHz(本振信号的二倍频),通过控制所述开关电感矩阵中的开关状态,调整所述开关电感矩阵的等效电感(所述开关电感矩阵中工作的电感并联后得到的电 感)的电感值,进而能够实现所述LC并联谐振电路的谐振频率范围为34GHz至45GHz,此时所述混频电路200的线性度仿真结果如图10所示。由图10可知,若所述待处理信号的频率为29.5GHz,所述开关电感矩阵的等效电感为170pH时,所述LC并联谐振电路处于谐振状态,所述混频器200的线性度最优;若所述射频信号的频率为28GHz,所述开关电感矩阵的等效电感为230pH时,所述LC并联谐振电路处于谐振状态,所述混频器200的线性度最优;若所述射频信号的频率为26.5GHz,所述开关电感矩阵的等效电感为270pH时,所述LC并联谐振电路处于谐振状态,所述混频器200的线性度最优;若所述射频信号的频率为24.5GHz,所述开关电感矩阵的等效电感为380pH时,所述LC并联谐振电路处于谐振状态,所述混频器200的线性度最优。For another example, when the
下面通过一个具体实施例对本申请提供的混频器200的工作原理进行详细说明。The working principle of the
所述混频器200为具有如图11所示的有源混频器,相较于无源混频器,有源混频器具有增益高、噪声性能好的优点。其中,所述混频器200中的调谐电路210包两个串联的电感Lp1、Lp2,以及有两个电容CF1、CF2和开关串联组成的开关电容矩阵,所述混频器200中的混频电路220通过晶体管M0~M3构成的差分双平衡开关对实现,在差分本振信号LOP和LON的作用下实现双平衡电流换向有源混频器功能,将输入的差分射频电流信号转化成差分中频电流信号输出,其中,所述晶体管M0的源极和晶体管M3的源极,以及所述晶体管M1的源极和晶体管M2的源极为用于输入差分射频电流信号,所述晶体管M0的栅极和晶体管M3的栅极,以及所述晶体管M1的栅极和晶体管M2的栅极为用于输入差分的本振信号。此外,所述混频器200还包括差分输入级电路,将通过所述差分输入级电路的输入端INP(晶体管MP的栅极)、INN(晶体管MN的栅极)输入的电压信号转换为电流信号,所述差分输入级电路中的电感LDEG是源级退化电感能够为差分输入级电路提供阻抗匹配所需要的实部阻抗,并且其负反馈作用还有利于提高晶体管MP和晶体管MN的线性度性能。所述混频器200还包括输出级电路,所述输出级电路通过变压器实现前后级阻抗宽带匹配,并将混频电路输出的差分中频电流信号通过负载阻抗Rload转换为中频电压信号输出。The
当所述混频器200的工作带宽范围为24.25GHz至29.5GHz,即所述混频器200中混频电路220的输入端输入的射频信号的频率范围为24.25GHz至29.5GHz,所述本振信号的频率范围为17GHz至22.5GHz时,为了降低所述混频电路220的输入端处的寄生电容Cp对所述混频器200性能的影响,上述开关电容矩阵与所述混频电路220的输入端处的寄生电容Cp组成的LC并联谐振电路的谐振频率范围为34GHz至45GHz(本振信号的二倍频),通过控制所述开关电容矩阵中的开关状态,调整LC并联谐振电路中电容的大小,进而能够实现所述LC并联谐振电路的谐振频率范围为34GHz至45GHz,此时电容矩阵开关过多容易降低所述LC并联谐振电路品质因数Q,因此上述开关电容矩阵中只采用一个开关。当所述混频器200工作在高频段Band1(n258:26.5GHz—29.5GHz)时,上述开关电容矩阵中的开关断开,电感Lp1、电感Lp2与晶体管开关对的共源节点处的寄生电容构成的LC并联谐振电路,谐振在Band1对应的本振信号的二倍频率范围的中间位置;当所述混频器200工作在低频段Band2(n257:24.25GHz—26.5GHz)时,上述开关电容矩阵中的开关闭合,上述开关电容矩阵、电感Lp1、电感Lp2与晶体管开关对的共源节点处的寄生电容构成的LC并联谐振电路,谐振在Band2对应的本振信号的二倍频率范围的中间位置。When the working bandwidth of the
通过上述方案,所述混频器200能够通过所述混频器200中的调谐电路210,使得所 述调谐电路210与所述混频器200中的混频电路220的输入端处的寄生电容构成的LC并联谐振电路处于谐振状态,增大所述混频电路220的输入端处的阻抗,使得所述混频电路220利用本振信号,对所述混频电路220的输入端输入的信号进行频率变换时,能够抑制所述混频电路220输出的信号中,通过所述混频电路220的输入端处寄生电容而引入的噪声和非线性交调积产物,进而能够有效提高所述混频器200的性能(如噪声系数、线性度)。并且,当所述调谐电路210的结构设置合适时,所述调谐电路能够在较宽的频率范围内,通过与所述混频器200中的混频电路220的输入端处的寄生电容的配合,增大所述混频电路的输入端处的阻抗,进而使得所述混频器200能够在较宽的频率范围内均可以提高所述混频器的性能。Through the above solution, the
如图12所示,本申请还提供了另一种混频器1200,所述混频器1200包括阻抗调整电路1210和混频电路1220,其中,所述混频电路1220为单平衡混频电路或双平衡混频电路,所述阻抗调整电路1210与所述混频电路1220的输入端处的寄生电容构成阻抗多极点电路;所述阻抗多极点电路的阻抗函数的极点中至少存在两个目标极点,所述混频电路1220进行频率变换时所使用的本振信号的N倍频信号的频率范围在所述两个目标极点对应的频率所确定的范围内,N为偶数。As shown in FIG. 12, the present application also provides another
进一步地,所述两个目标极点对应的频率所确定的频率范围大于或等于所述本振信号的二倍频信号的频率范围。例如,若所述阻抗多极点电路的阻抗函数包括两个极点,一个极点对应的频率为a,另一个极点对应的频率为b(b>a),那么所述混频器1200的工作带宽对应的本振信号的二倍频信号的频率范围在这两个极点对应的频率所确定的频率范围[a,b],若所述多极点电路的阻抗函数包括三个极点,这三个极点对应的频率分别为a,b,c(c>b>a),那么这三个极点对应的频率所确定的频率范围[a,b]、[a,c]以及[b,c]中至少存在一个频率范围,使得所述混频器1200的工作带宽对应的本振信号二倍频信号的频率范围在该频率范围内。Further, the frequency range determined by the frequencies corresponding to the two target poles is greater than or equal to the frequency range of the double frequency signal of the local oscillator signal. For example, if the impedance function of the impedance multi-pole circuit includes two poles, one pole corresponds to a frequency and the other pole corresponds to a frequency b (b>a), then the working bandwidth of the
由于所述混频器1200的输入端处的寄生电容Cp而引入的噪声信号主要集中在所述本振信号的偶次谐波对应的频率范围,尤其是所述本振信号的二倍频处,因此,当所述本振信号的二倍频信号的频率范围在所述多极点电路的所述两个目标极点对应的频率范围内时,所述阻抗多极点电路在所述本振信号的二倍频处的阻抗较大,可以抑制所述混频电路1020输出的信号中,通过所述混频电路1020的输入端处寄生电容而引入的噪声和非线性交调积产物,进而能够有效提高所述混频器1200的性能(如噪声系数、线性度)。并且,所述阻抗多极点电路的极点可以根据所述混频器1200的工作带宽范围内所述本振信号的二倍频信号的频率范围设置合理,使得所述混频电路1200可以在较大的工作带宽范围内输入端处的阻抗较大。The noise signal introduced due to the parasitic capacitance Cp at the input end of the
所述混频电路1220,用于利用本振信号,对所述混频电路1220的输入端输入的待处理信号进行频率变换,其中,不同频率的所述待处理信号对应不同频率的所述本振信号。具体地,所述混频电路1220可以利用所述本振信号对待处理的射频信号进行下变频,得到中频信号或者基带信号,以便于后续信号处理;或者,所述混频电路1220也可以利用所述本振信号对待处理的中频信号或基带信号进行上变频,得到射频信号,以便于天线发射。The
在具体实施中,所述混频电路1220可以通过三极管实现,所述混频电路1220包括至少一对三极管开关对,所述混频电路的输入端为所述三极管开关对的共发射极节点。或者, 所述混频电路1220也可以通过MOS管实现,此时,所述混频电路1220包括至少一对MOS管开关对,所述混频电路1220的输入端为所述MOS管开关对的共源节点。In a specific implementation, the
其中,如图13a所示(图13a中以所述混频电路1220为双平衡式电路结构为例),所述调谐电路可以包括第一电容C1和耦合电感,所述耦合电感包括第一绕组L1和第二绕组L2,所述第一绕组L1与所述混频电路1220的输入端连接,所述第二绕组L2与所述第一电容并联。具体地,所述耦合电感可以为变压器,所述第一绕组为所述变压器的初级线圈,所述第二绕组为所述变压器的次级线圈。Wherein, as shown in FIG. 13a (in FIG. 13a, the
进一步地,如图13b所示,所述阻抗调整电路还包括第二电容C2,所述第二电容C2与所述第一绕组并联。如图13c所示,所述阻抗调整电路还可以包括电阻R,所述电阻R与所述第一电容并联。Further, as shown in FIG. 13b, the impedance adjusting circuit further includes a second capacitor C2, and the second capacitor C2 is connected in parallel with the first winding. As shown in FIG. 13c, the impedance adjusting circuit may further include a resistor R, and the resistor R is connected in parallel with the first capacitor.
需要说明的是,本申请并不对所述阻抗调整电路1210的具体结构进行限定,上述描述的与所述混频电路1220构成阻抗多极点电路的阻抗调整电路210的具体结构为仅为举例说明,凡是能够与所述混频电路1220构成阻抗多极点电路的电路均可以应用于本申请,例如微带线等。It should be noted that this application does not limit the specific structure of the
下面以所述混频器1200具有如图13c所示的结构时,对所述混频器1200通过阻抗多极点电路增大所述混频电路1220的输入端处的阻抗的原理进行详细说明。Hereinafter, when the
所述阻抗多极点电路的阻抗函数Z
p,即从所述混电路1220的输入端看进去的阻抗如下
The impedance function Z p of the impedance multi-pole circuit, that is, the impedance seen from the input end of the
其中,R表示所述阻抗多极点电路中电阻的阻值,C
1表示所述阻抗多极点电路中第一电容的电容值,C
2表示所述阻抗多极点电路中第二电容与所述混频电路1220的输出入端处的寄生电容并联后的电容值,L
1表示所述阻抗多极点电路中变压器的初级线圈的电感值,L
2表示所述阻抗多极点电路中变压器的次级线圈的电感值,k为所述阻抗多极点电路中变压器的初级线圈与次级线圈的耦合系数。
Wherein, R represents the resistance value of the resistance in the impedance multi-pole circuit, C 1 represents the capacitance value of the first capacitor in the impedance multi-pole circuit, and C 2 represents the second capacitor in the impedance multi-pole circuit and the mixed The capacitance value of the parasitic capacitance at the input and output ends of the
当所述阻抗多极点电路中电阻的阻值R较大时,所述阻抗函数Z p可以简化为: When the resistance value R of the resistor in the impedance multi-pole circuit is large, the impedance function Z p can be simplified as:
其中,所述阻抗函数Z p的极点满足s 4C 1C 2L 1L 2(1-k 2)+s 2(L 1C 2+L 2C 1)+1=0,令s=jω令,则所述阻抗函数Z p的两个极点对应的频率分别为: Wherein, the pole of the impedance function Z p satisfies s 4 C 1 C 2 L 1 L 2 (1-k 2 )+s 2 (L 1 C 2 +L 2 C 1 )+1=0, let s=jω Let, the frequencies corresponding to the two poles of the impedance function Z p are:
当所述阻抗多极点电路中的第一电容、第二电容以及变压器的参数取值适当时,所述阻抗函数Z
p的两个极点对应的频率ω
p1、ω
p2所确定的频率范围,即所述本振信号的二倍频信号的频率范围在所述阻抗函数Z
p的两个极点对应的频率范围内,此时,所述阻抗多极点电路的阻抗较大,即所述变频电路220的输入端处的阻抗较大,进而能够有效降低所述混频器1200的输入端处的寄生电容Cp对所述混频器200性能(如噪声系数、线性度)的影响。
When the parameters of the first capacitor, the second capacitor, and the transformer in the impedance multi-pole circuit have appropriate values, the frequency range determined by the frequencies ω p1 and ω p2 corresponding to the two poles of the impedance function Z p , namely this frequency range of the second harmonic signal LO signal within a frequency range corresponding to the two poles of the impedance function Z p, in which case, the impedance of the multi-pole impedance circuit is large, i.e., the
另外,需要说明的是,本申请实施例并不对所述混频电路的具体结构进行限定,所述混频电路可以是有源混频电路,也可以是无源混频电路。In addition, it should be noted that the embodiment of the present application does not limit the specific structure of the mixer circuit, and the mixer circuit may be an active mixer circuit or a passive mixer circuit.
通过上述方案,所述混频器1200能够通过所述混频器1200中的阻抗调整电路1210与所述混频器1200中的混频电路1220的输入端处的寄生电容构成的阻抗多极点电路,增大所述混频电路1220的输入端处的阻抗,使得所述混频电路1220利用本振信号,对所述混频电路1220的输入端输入的信号进行频率变换时,能够抑制所述混频电路1220输出的信号中,通过所述混频电路1220的输入端处寄生电容而引入的噪声和非线性交调积产物,进而能够有效提高所述混频器1200的性能(如噪声系数、线性度)。并且,当所述阻抗多极点电路的极点设置合适时,所述阻抗多极点电路能够在较宽的频率范围内,增大所述混频电路1220的输入端处的阻抗,进而使得所述混频器1200能够在较宽的频率范围内均可以提高所述混频器的性能。Through the above solution, the
下面通过一个具体实施例对本申请提供的混频器1200的工作原理进行详细说明。The working principle of the
所述混频器1200具有如图12所示的有源混频器,所述混频器1200中的阻抗调整电路1210包括第一电容C1、第二电容C2以及变压器,所述第一电容C1与所述变压器的次级线圈并联,所述第二电容C2与所述混频电路1220的输入端以及所述变压器的初级线圈并联;所述混频器1200中的混频电路1220通过晶体管M0~M3构成的差分双平衡开关对实现,在差分本振信号LOP和LON的作用下实现双平衡电流换向有源混频器功能,将输入的差分射频电流信号转化成差分中频电流信号输出,其中,所述晶体管M0的源极和晶体管M3的源极,以及所述晶体管M1的源极和晶体管M2的源极用于输入差分射频电流信号,所述晶体管M0的栅极和晶体管M3的栅极,以及所述晶体管M1的栅极和晶体管M2的栅极用于输入差分的本振信号。此外,所述混频器1200还包括差分输入级电路,将通过所述差分输入级电路的输入端INP(晶体管MP的栅极)、INN(晶体管MN的栅极)输入的电压信号转换为电流信号,所述差分输入级电路中的电感LDEG是源级退化电感能够为差分输入级电路提供阻抗匹配所需要的实部阻抗,并且其负反馈作用还有利于提高晶体管MP和晶体管MN的线性度性能。所述混频器1200还包括输出级电路,所述输出级电路通过变压器实现前后级阻抗宽带匹配,并将混频电路输出的差分中频电流信号通过负载阻抗Rload转换为中频电压信号输出。The
当所述混频器1200的工作带宽范围为24.25GHz至29.5GHz,即所述混频器1200中混频电路1220的输入端输入的射频信号的频率范围为24.25GHz至29.5GHz,所述本振信号的频率范围为17GHz至22.5GHz时,为了降低所述混频电路1220的输入端处的寄生电容Cp对所述混频器1200性能的影响,根据上述公式(2)~公式(4),选择所述变压器的初级线圈L1的电感值、所述变压器的次级线圈L2、所述变压器的初级线圈L1与所述变压器的次级线圈L2之间的耦合系数k、所述第一电容C1的电容值以及所述第二电容的电容值,使得所述本振信号的二倍频信号的频率范围在上述阻抗调整电路1210与所述混频电路1220的输入端处的寄生电容Cp组成的阻抗多极点电路的极值点对应的频率ω
p1、ω
p2所确定的频率范围内,此时,所述混频电路1220的输入端处的阻抗在所述本振信号的二倍频信号的频率范围均为高阻抗。
When the working bandwidth of the
基于同一发明构思,本申请还提供了一种通信设备,如图15所示,所述通信设备包括处理器以及上述任意一种可能的实施方式所述的混频器。Based on the same inventive concept, the present application also provides a communication device. As shown in FIG. 15, the communication device includes a processor and the mixer described in any one of the foregoing possible implementation manners.
在一个可能的实施方式中,所述混频器,用于对输入所述混频器的射频信号进行下变 频,得到中频信号或基带信号;所述处理器,用于处理所述中频信号或基带信号。In a possible implementation manner, the mixer is used to down-convert the radio frequency signal input to the mixer to obtain an intermediate frequency signal or a baseband signal; the processor is used to process the intermediate frequency signal or Baseband signal.
在另一个可能的实施方式中,所述处理器,用于生成基带信号或者中频信号;所述混频器,用于在所述处理器生成基带信号时,对所述基带信号进行上变频,得到射频信号;在所述处理器生成中频信号时,对所述中频信号进行上变频,得到射频信号。In another possible implementation manner, the processor is configured to generate a baseband signal or an intermediate frequency signal; the mixer is configured to up-convert the baseband signal when the processor generates the baseband signal, Obtain a radio frequency signal; when the processor generates an intermediate frequency signal, up-convert the intermediate frequency signal to obtain a radio frequency signal.
显然,本领域的技术人员可以对本申请实施例进行各种改动和变型而不脱离本申请实施例的精神和范围。这样,倘若本申请实施例的这些修改和变型属于本申请权利要求及其等同技术的范围之内,则本申请也意图包含这些改动和变型在内。Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present application without departing from the spirit and scope of the embodiments of the present application. In this way, if these modifications and variations of the embodiments of this application fall within the scope of the claims of this application and their equivalent technologies, this application is also intended to include these modifications and variations.
Claims (18)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2019/076596 WO2020172893A1 (en) | 2019-02-28 | 2019-02-28 | Frequency mixer and communication device |
| CN201980087907.7A CN113273086A (en) | 2019-02-28 | 2019-02-28 | Mixer and communication equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2019/076596 WO2020172893A1 (en) | 2019-02-28 | 2019-02-28 | Frequency mixer and communication device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2020172893A1 true WO2020172893A1 (en) | 2020-09-03 |
Family
ID=72238753
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/CN2019/076596 Ceased WO2020172893A1 (en) | 2019-02-28 | 2019-02-28 | Frequency mixer and communication device |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN113273086A (en) |
| WO (1) | WO2020172893A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114337559A (en) * | 2021-12-24 | 2022-04-12 | 北京北方华创微电子装备有限公司 | Class E RF power output circuit |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114545061A (en) * | 2022-02-25 | 2022-05-27 | 全球能源互联网研究院有限公司 | High-frequency current sensor with tunable resonant frequency |
| CN115452073A (en) * | 2022-09-28 | 2022-12-09 | 深圳芯启航科技有限公司 | Revolution measuring circuit, selection method and flowmeter |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1395372A (en) * | 2002-07-05 | 2003-02-05 | 清华大学 | Gilbert mixer with folding structure |
| CN101447793A (en) * | 2008-10-23 | 2009-06-03 | 北京朗波芯微技术有限公司 | Frequency mixer and direct down-conversion receiver |
| CN201294486Y (en) * | 2008-10-23 | 2009-08-19 | 北京朗波芯微技术有限公司 | Mixer and direct down-conversion receiver |
| WO2015169335A1 (en) * | 2014-05-05 | 2015-11-12 | Telefonaktiebolaget L M Ericsson (Publ) | A resistor network and mixer circuits with programble gain. |
| CN108964613A (en) * | 2018-06-29 | 2018-12-07 | 南通朝旭环保科技有限公司 | A kind of active mixer |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1450480A1 (en) * | 2003-02-18 | 2004-08-25 | STMicroelectronics S.r.l. | Low-noise, high-linearity analog multiplier |
| US7415257B2 (en) * | 2005-10-14 | 2008-08-19 | Kuei-ann Wen | Dual-band mixer and its design flow |
-
2019
- 2019-02-28 CN CN201980087907.7A patent/CN113273086A/en active Pending
- 2019-02-28 WO PCT/CN2019/076596 patent/WO2020172893A1/en not_active Ceased
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1395372A (en) * | 2002-07-05 | 2003-02-05 | 清华大学 | Gilbert mixer with folding structure |
| CN101447793A (en) * | 2008-10-23 | 2009-06-03 | 北京朗波芯微技术有限公司 | Frequency mixer and direct down-conversion receiver |
| CN201294486Y (en) * | 2008-10-23 | 2009-08-19 | 北京朗波芯微技术有限公司 | Mixer and direct down-conversion receiver |
| WO2015169335A1 (en) * | 2014-05-05 | 2015-11-12 | Telefonaktiebolaget L M Ericsson (Publ) | A resistor network and mixer circuits with programble gain. |
| CN108964613A (en) * | 2018-06-29 | 2018-12-07 | 南通朝旭环保科技有限公司 | A kind of active mixer |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114337559A (en) * | 2021-12-24 | 2022-04-12 | 北京北方华创微电子装备有限公司 | Class E RF power output circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113273086A (en) | 2021-08-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN112514248B (en) | Low noise amplifier circuit, RF receiver circuit and RF front-end circuit | |
| US8571511B2 (en) | Apparatus and method for a wideband RF mixer | |
| CN112491364B (en) | Millimeter wave CMOS quadrature mixer circuit | |
| US20030114129A1 (en) | System and method for a radio frequency receiver front end utilizing a balun to couple a low-noise amplifier to a mixer | |
| US11290064B2 (en) | Amplifier | |
| CN113783538A (en) | CMOS low noise amplifier | |
| CN106921346A (en) | High linearity wide band upper frequency mixer | |
| WO2020172893A1 (en) | Frequency mixer and communication device | |
| CN112204894B (en) | Radio frequency front-end circuit and mobile device | |
| JPH11503293A (en) | Compensated ring mixer | |
| CN109995328A (en) | Mixers, transmitters, chips and related equipment | |
| CN116505898B (en) | Ultra-wideband millimeter wave low-noise amplifier with single slip function | |
| CN117155291B (en) | Broadband single-side-band up-converter capable of calibrating local oscillator leakage | |
| CN110336538B (en) | A CMOS Capacitor Neutralizing Active Mixer | |
| US9912293B2 (en) | Sub-harmonic mixer and a method therein for converting radio frequency signals to intermediate frequency signals | |
| CN116488585A (en) | Frequency-quadrupling circuit, signal generating circuit and signal processing method | |
| CN209419579U (en) | High LO Rejection Broadband Mixer | |
| CN111082778B (en) | Novel high image rejection ratio active CMOS (complementary Metal oxide semiconductor) multiphase filter circuit | |
| CN115314056A (en) | a broadband transmitter | |
| US7049878B2 (en) | Down-converter using an on-chip bias circuit for enhancing symmetry and linearity and testing device thereof | |
| CN112436838A (en) | Voltage controlled oscillation device and wireless transceiver | |
| US20240348269A1 (en) | Mobile Wireless Receiver | |
| US20060006921A1 (en) | Mixer | |
| KR100345456B1 (en) | Frequency Mixer for Microwave Monolithic Integrated Circuits | |
| US20250141485A1 (en) | Mixer circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 19916664 Country of ref document: EP Kind code of ref document: A1 |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 19916664 Country of ref document: EP Kind code of ref document: A1 |