WO2025049466A1 - Cell trap membrane with etched pores for individual cell capture - Google Patents

Abstract

The present invention relates to a cell trap membrane comprising an interior layer of silicon, a first exterior layer of silicon nitride on a first surface of the interior layer, and a second exterior layer of silicon nitride on a second surface of the interior layer. The interior layer and the first and second exterior layers define a plurality of pores that are specifically designed to trap individual cells. The plurality of pores are formed by pore inlets etched into the first exterior layer, windows etched into the second exterior layer, and gaps etched within the interior layer that extend between the corresponding pores and windows.

Description

CELL TRAP MEMBRANE WITH ETCHED PORES FOR INDIVIDUAL CELL

CAPTURE

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] The present application claims priority to U.S. Provisional Patent Application No. 63/579,765, filed on August 30, 2023, the disclosure of which is incorporated herein by reference for all purposes.

TECHNICAL FIELD

[0002] The present disclosure relates generally to systems, apparatuses, processes, and methods for delivering macromolecules or other materials into cells. Particular implementations leverage precise motion control and faithful integration and interfacing of system components to create a system for precise intracellular cargo delivery.

BACKGROUND

[0003] Cell engineering is a promising area for scientific research and medical treatment development with numerous potential applications in medicine, biology, pharmacology, plant science, and other fields. In many cell engineering applications, a goal may be changing a cell’s functionality, internal chemistry, or genetic material by introducing new matter into the cell. Mammalian cells are particularly difficult to transfect with high efficiency, viability, and recovery due to their fragility and aseptic handling requirements. Current cell engineering solutions include chemical methods (e.g., lipofection, calcium phosphate precipitation), viral methods (e.g., retroviral, lentiviral, adenoviral vectors), and other physical methods (e.g., electroporation, microinjection, gene gun, impalefection). These methods have several respective limitations and shortcomings. For example, chemical methods can cause cytotoxicity, have limited efficiency in certain cell types, and may induce immune responses. Viral methods may have potential for insertional mutagenesis, immunogenicity, oncogenicity, and ethical concerns. And other physical methods can cause cellular damage, may have varying efficiencies depending on cell type, may require specialized equipment and expertise, and may be population based (e.g., they do not exhibit control at single cell resolution). Furthermore, conventional methods are challenging to scale in a bio safe and automated system for cell transfection at high resolution. [0004] In some cell engineering applications, open arrays (e.g., an array containing nanoneedles and an array containing a porous membrane) can be aligned and/or planarized within a certain level of precision, accuracy, and reproducibility. Such alignment and/or planarization is difficult to achieve at the tolerances necessary at a nanometer scale. An added difficulty is operating the arrays in a system that optimizes footprint while integrating access to liquid handling, sensors, and biosafety controls. As such, there is a need for a cell engineering system with precise, accurate, and repeatable motion control, planarization, and alignment.

BRIEF DESCRIPTION OF THE DRAWINGS

[0005] For a more complete understanding of the present disclosure, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

[0006] FIG. 1A depicts a cell trap membrane according to one aspect of the present disclosure.

[0007] FIG. IB depicts a detailed view of pores that have trapped cells according to one aspect of the present disclosure.

[0008] FIG. 1C depicts a side view of a pore according to one aspect of the present disclosure.

[0009] FIG. ID depicts a bottom-up view of a first pore without a cross-beam and a second pore with two perpendicular cross-beams according to one aspect of the present disclosure.

[0010] FIG. 2 depicts a method for creating a cell trap membrane according to one aspect of the present disclosure.

[0011] FIG. 3 A and 3B depict process flows showing processes that may be performed to create a cell trap membrane according to aspects of the present disclosure.

[0012] FIGs. 4A-4D depict manifolds according to aspects of the present disclosure.

[0013] FIG. 5 depicts a method for processing cells using a cell trap membrane according to one aspect of the present disclosure. [0014] FIG. 6 depicts a perspective view of an example fluidics module according to aspects of the present disclosure.

[0015] FIG. 7 depicts an example of a computing device that is operable to support cell engineering workflows and methods according to one or more aspects of the present disclosure.

[0016] It should be understood that the drawings are not necessarily to scale and that the disclosed aspects are sometimes illustrated diagrammatically and in partial views. In certain instances, details which are not necessary for an understanding of the disclosed methods and apparatuses or which render other details difficult to perceive may have been omitted. It should be understood, of course, that this disclosure is not limited to the particular aspects illustrated herein.

DETAILED DESCRIPTION

[0017] This disclosure describes systems, apparatuses, and methods for performing cell therapies and/or cell engineering with high precision. It is desirable in some cell engineering workflows to be able to insert a cargo (e.g., a chemical or genetic material) precisely into a single cell using microneedles. In these applications, single cells may be trapped at target locations and then microneedles on a microneedle chip may be brought precisely into contact with the cells at the target locations. The dimensions of target locations (e.g., pores on a cell trapping chip) and of the microneedles on a microneedle chip can be made in such small scales that there is little room for error in aligning the target locations with the microneedles. Consequently, there is little room for error in the manufactured positions of target locations on cell trapping mechanisms. Furthermore, cell trapping mechanisms need to be highly effective to ensure that cells are trapped and processed with maximum efficiency.

[0018] One solution for ensuring accurate and consistent is to use etched pores in a cell trap membrane to vacuum trap cells. In particular, a cell trap membrane may include an interior layer of silicon, a first exterior layer of silicon nitride on a first surface of the interior layer, and a second exterior layer of silicon nitride on a second surface of the interior layer. The interior layer and the first and second exterior layers together define a plurality of pores that are specifically designed to trap individual cells. The plurality of pores are formed by pore inlets etched into the first exterior layer, windows etched into the second exterior layer, and gaps etched within the interior layer that extend between the corresponding pores and windows. When fluid flows through the pores (such as into the pore inlets and out of the windows), cells may be trapped by the pores (such as against the pore inlets) for processing. These systems are discussed in greater detail below. Methods for performing cell engineering workflows are also discussed. Methods of manufacturing such systems are also discussed.

Cell Trap Membrane

[0019] Reference is now made to FIG. 1A, which depicts a cell trap membrane 100 according to one aspect of the present disclosure. The cell trap membrane 100 includes a plurality of pores 112, 114, 116, 118 (only a subset of which are numbered), visible in the detailed view 110. The pores 112, 114, 116, 118 may be configured to trap cells, such as individual cells. For example, FIG. IB depicts a detailed view 120 of pores 122, 124, 126, 128 that have trapped cells.

[0020] The cell trap membrane 100 may be formed from multiple layers of material. In particular, the cell trap membrane 100 may include an interior layer of silicon, a first exterior layer of silicon nitride and a second exterior layer of silicon nitride. For example, FIG. 1C depicts a side view 130 of a pore according to one aspect of the present disclosure. The side view 130 includes an interior layer 142, a first exterior layer 138, and a second exterior layer 140. The first exterior layer 138 may be positioned on a first surface of the interior layer 142 of silicon and the second exterior layer 140 may be positioned on a second surface of the interior layer 142 of silicon. In various implementations, the second exterior layer 140 may be opposite the first exterior layer 138 on the interior layer 142 of silicon, as shown in FIG. 1C.

[0021] The interior layer 142, the first exterior layer 138 and the second exterior layer 140 cooperatively define the pores 112, 114, 116, 118 of the cell trap membrane 100. In particular, the pores 112, 114, 116, 118 may be defined by pore inlets etched into the first exterior layer 138, windows etched into the second exterior layer 140, and gaps etched within the interior layer 142 that extend between corresponding pore inlets and windows. For example, the side view 130 includes inlets 132, a window 134, and gap 136 that extends between the inlets 132 and the window 134. In various implementations, fluid may flow into the pore inlets 132, through the gaps 136, and out of the windows 134 in order to trap cells. For example, windows 134 may be positioned opposite corresponding pores 112, 114, 116, 118. In various implementations, fluid may be provided to and removed from the cell trap membrane 100 by a manifold, as discussed further below.

[0022] In various implementations, the pores 112, 114, 116, 118 have a diameter less than or equal to 10 microns. In various implementations, a distance between adjacent pores 112, 114, 116, 118 may be less than or equal to 50 microns. In additional or alternative implementations, the distance between adjacent pores may be larger or smaller than 50 microns (such as within the range of 10-400 microns. In one specific implementation, the distance between adjacent pores may be 15 microns. In various implementations, the windows 134 are square in shape and the gaps 136 are narrower at the first exterior layer 138 than at the second exterior layer 140.

[0023] In various implementations, each of the windows 134 include at least one crossbeam formed from the interior layer 142 of silicon. For example, FIG. ID depicts a bottom-up view of a first window 150 without a cross-beam and a second window 152 with two perpendicular cross-beams 144, 146, viewed from line A- A in FIG. 1C according to one aspect of the present disclosure. One skilled in the art will appreciate that the various implementations of cross-beams may include more or fewer cross-beams than those depicted (such as more than two cross-beams, fewer than two cross-beams). In one example, the windows 150, 152 may be 1 cm x 1 cm squares in shape. In other implementations, larger are smaller windows may be used (such as windows with sides ranging from 0.1 cm to 5 cm). In additional or alternative implementations, windows in shapes other than squares may be used (such as rectangular windows, circular windows, ovalshaped windows, and the like). In various implementations, the cross-beams may be 2 mm in width. In additional or alternative implementations, the cross-beams may be larger or smaller (such as ranging from 0.5 mm to 3 mm).

[0024] As shown in FIG. 1 A, the cell trap membrane 100 may be rectangular in shape. In various implementations, the sides of the cell trap membrane 100 may be less than or equal to 5 cm in length. For example, in one specific implementation, the cell trap membrane may be 1 cm x 1 cm in size. In various implementations, the cell trap membrane 100 further comprises at least one fiducial etched into the first exterior layer 138 of silicon nitride. For example, the fiducial may be subsequently used for alignment with a microneedle array.

[0025] In various implementations, the cell trap membrane 100 comprises one or more surface coatings applied to at least one of the first exterior layer 138 and the second exterior layer 140. For example, surface coatings may include hydrogel, BSA (bovine serum albumin), Plutonic Fl 27 or F68, silicon oxide, gold, indium tin oxide (ITO), or combinations thereof.

Creating Cell Trap Membranes

[0026] FIG. 2 depicts a method 200 for creating a cell trap membrane according to one aspect of the present disclosure. For example, the method 200 may be performed to create the cell trap membrane 100. In various implementations, the method 200 may be performed by silicon foundry equipment, such as one or more of a reactive iron etching system, a potassium hydroxide etching system, a low pressure chemical vapor deposition system, and the like.

[0027] The method 200 includes depositing a first exterior layer 138 of silicon nitride onto a first surface of a silicon wafer (block 202). The method 200 includes depositing a second exterior layer 140 of silicon nitride onto a second surface of the silicon wafer (block 204). In various implementations, the second exterior layer 140 may be opposite the first exterior layer 138 on the silicon wafer. For example, FIG. 3 A depicts a process flow 300 showing processes that may be performed to create a cell trap membrane 100 according to one aspect of the present disclosure. The process flow 300 includes a deposition process 302 in which the first and second layers 138, 140 of silicon nitride are deposited onto a silicon wafer. In various implementations, the first exterior layer 138 and the second exterior layer 140 are deposited using a low pressure chemical vapor deposition (LPCVD) process. For example, the deposition process 302 may be implemented as an LPCVD process.

[0028] The method 200 includes etching pore inlets 132 into the first exterior layer 138 (block 206). In various implementations, the pore inlets 132 may have a diameter less than or equal to 10 microns. In various implementations, a distance between adjacent pore inlets 132 may be less than or equal to 50 microns. For example, each pore may have two or more pore inlets that are separated by 50 microns or less. The method 200 includes etching windows 134 into the second exterior layer 140 (block 208). In various implementations, the pore inlets 132 and the windows 134 are etched using a first etching process, such as the first etching process 304 of FIG. 3. In various implementations, the first etching process 304 may be a reactive ion etching (RIE) process. In various implementations, the gaps 136 are etched to include at least one cross-beam 144, 146 formed from the interior layer 142 of silicon. For example, the cross-beams 144, 146 may be formed by etching the gaps 136 such that silicon forming the cross-beams remains across the gaps 136 after etching is complete.

[0029] The method 200 includes etching gaps 136 into the silicon wafer that extend between corresponding pores 112, 114, 116, 118 and windows 134. (block 210). In various implementations, the gaps may be etched via the windows 134 that were previously etched. In various implementations, the gaps 136 are etched using a second etching process that differs from the first etching process. For example, the gaps 136 may be etched using the second etching process 306 of the process flow 300. In various implementations, the second etching process 306 may be a potassium hydroxide (KOH) etching process.

[0030] In various implementations, the method 200 may further include smoothing edges of the pore inlets 132. For example, a dilute chemical etch (such as using hydrofluoric acid) may be used to smooth edges of the pore inlets 132.

[0031] In still further implementations, the method 200 may further include applying a surface coating to at least one of the first exterior layer 138 and the second exterior layer 140, as described above.

[0032] In various implementations, the method 200 may further include etching through the silicon wafer, the first exterior layer 138, and the second exterior layer 140 after etching the gaps 136 to release the cell trap membrane 100. For example, a third etching process may be performed to release the cell trap membrane.

[0033] In various implementations, the method 200 may further include mounting the cell trap membrane 100 onto a manifold configured to control the flow of fluid through the cell trap membrane 100.

[0034] Although the examples above are described with reference to the flowchart illustrated in FIG. 2, many other methods of performing the acts associated with FIG. 2 may be used. For example, the order of some of the blocks may be changed, certain blocks may be combined with other blocks, one or more of the blocks may be repeated, and some of the blocks may be optional. As one specific example, blocks 202 and 204 may be performed in parallel (such as during a deposition process). As another specific example, blocks 206 and 208 may be performed in parallel (such as during a first etching process). [0035] FIG. 3B depicts a process flow 310 according to one aspect of the present disclosure. In various implementations, the process flow 310 may be performed as an alternative to the method 200 and the process flow 300. Cell trap membranes created according to the process flow 310 may provide advantages over cell trap membranes created according to the process flow 300. For example, cell trap membranes formed according to the process flow 310 may be able to incorporate fluidic routing, which may allow better fluidic control through the membrane and may improve the capture and release of cells.

[0036] The process flow 310 begins with a process 312, in which a first layer 322 of polymer material and a second layer 324 of sacrificial material are deposited onto a first substrate (such as a silicon wafer). The first layer 322 may be polymer material and may be formed from organic polymer or a hybrid organic-inorganic polymer (such as Ormocers®). The polymer may be selected to provide desired optical properties and/or mechanical properties. The first layer 324 may be a sacrificial layer of unpolymerized material.

[0037] In process 314, the first layer 322 may be polymerized to form the desired organic polymer or hybrid organic-inorganic polymer in desired forms 326. For example, polymerization may be performed using various techniques, such as two-photon polymerization (2PP), nanoimprint lithography (NIL), conventional photolithography, and the like. In one specific implementation, using 2PP may include applying the photoactive polymer material onto a substrate (such as at process 312), followed by polymerization in a predetermined path (such as at process 314) using 2PP stereolithography tools (such as those offered by Heidelberg or Nanoscribe). The polymerization may form complex three-dimensional structures after the dissolution of unpolymerized material. In various implementations, a premade mold may be used to mechanically deform the material to the desired forms 326. A third layer 327 of polymer material may also be deposited during the process 314.

[0038] In process 316, the third layer 327 of polymer material may be polymerized into desired forms 328. The polymerization may be performed similar to the process 314, such as using 2PP, NIL, conventional photolithography, and the like. In various implementations, a premade mold may be used to deform the material to the desired forms 328. In various implementations, the forms 328 may be formed by successively applying and polymerizing successive layers of the polymer material until the desired forms 328 are achieved. Following the curing of the polymer material and other processes (such as mold removal) some post processing of the forms 328 may be conducted (such as plasma etching) to remove residual unwanted material.

[0039] In process 318, a second substrate is aligned and applied to the forms 328 using a thin layer of a photoactive polymer material applied to the second substrate and photocuring the photoactive polymer material.

[0040] In process 320, the first substrate may then be removed by removing the second layer 324 of sacrificial material (such as by dissolving the unpolymerized sacrificial material).

[0041] In various implementations, the resulting cell trap membrane may be further processed. For example, surface coatings may be applied to the cell trap membrane, edges of the pores may be smoothed, and the like, as discussed herein.

Cell Processing with Cell Trap Membranes

[0042] In various implementations, the cell trap membrane 100 may be used to perform one or more cell processing tasks. To do so, the cell trap membrane 100 may mounted onto a manifold that is used to direct the flow of fluid through the membrane as part of one or more cell processing operations. FIG. 4A depicts a perspective view manifold 400 according to one aspect of the present disclosure. FIG. 4B similarly shows a schematic view of the manifold 400 according to one aspect of the present disclosure. The manifold 400 includes a backside inlet 402, a backside outlet 418, a backside access channel 404, a backside reservoir 414, a top inlet 410, a top outlet 412, a top well 406, a top well sidewall 408, a ring magnet 422, a glass slide 416, a disk magnet 420. In particular, the backside access channel 404 is disposed between the backside inlet 402 and the backside outlet 418. The backside reservoir 414 is disposed above the backside access channel 404 and may fill with fluid after the backside access channel is full. The top well 406 is disposed between the top inlet 410 and the top outlet 412 and is defined at least in part by the top well sidewall 408. The top well 406 may receive fluid from the top inlet. The cell trap membrane 100 is disposed between the top well 406 and the backside reservoir 414. The ring magnet 422 and the disk magnet 420 may be used in aligning and/or positioning the manifold 400.

[0043] As another example, FIG. 4C depicts a perspective view of a manifold 450 according to one aspect of the present disclosure. The manifold 450 includes a backside inlet 452, which may function similar to the backside inlet 402, a top outlet 454, which may function similar to the top outlet 412, the cell trap membrane 100, a top inlet 458, which may function similar to the top inlet 410, a backside outlet 460, which may function similar to the backside outlet 418, a top well 462, which may function similar to the top well 406, and a backside manifold 464.

[0044] In various implementations, a single access point may be used as both an inlet and an outlet. For example, FIG. 4D depicts a schematic view of a manifold 470 according to one aspect of the present disclosure. The manifold 470 includes a top tube 476, which may serve as both the top inlet and the top outlet. The manifold 470 also includes a backside tube 472, which may serve as both the backside inlet and the backside outlet. The manifold 470 also includes a top well sidewall 484, which may function similar to the top well sidewall 408 to define a top well, a backside access channel 478, which may function similar to the backside access channel 404, a disk magnet 482, which may function similar to the disk magnet 420, and a ring magnet 474, which may function similar to the ring magnet 422.

[0045] FIG. 5 depicts a method 500 for processing cells using a cell trap membrane according to one aspect of the present disclosure. For example, the method 500 may be performed to perform cell processing using a cell trap membrane, such as the cell trap membrane 100. In various implementations, the method 200 may be performed by a cell processing system, such as a cell processing system that includes a fluidics module (discussed further below).

[0046] The method 500 includes adding, via a top inlet 410 of a manifold that contains the cell trap membrane 100, a first fluid to a first level within a top well 406 of the manifold (block 502). In various implementations, the first level may be a minimum fluid level of the top well 406. In various implementations, the first level may be at or above the top inlet 410 within the top well 406. In various implementations, the first level may be defined based on a capacity of the top well 406 (such as 30%, 40%, 50%, 70%, 80% full, and the like). In various implementations, adding the first fluid to the top well 406 may include closing the top outlet 412, the bottom inlet, and the backside outlet 418 while adding the first fluid to the top well 406. In various implementations, prior to adding the first fluid to the top well 406, the backside reservoir 414 may be primed by adding, via the backside inlet 402, the first fluid to the backside reservoir 414 and removing, via the backside outlet 418, the first fluid from the backside reservoir 414. This operation may also prime the backside access channel 404. In various implementations, the cell trap membrane 100 may be primed by closing the backside outlet 418 and adding the first fluid to the backside reservoir 414. Such priming may ensure adequate fluid is present for proper operation of the cell trap membrane 100. In various implementations, prior to adding the first fluid, the cell trap membrane 100 may be cleaned and treated, such as with oxygen or water vapor plasma and is loaded into the manifold 400.

[0047] The method 500 includes adding, via the top inlet 410, a second fluid to the top well 406, the second fluid contains cells to be trapped by the cell trap membrane 100 (block 504). In various implementations, the second fluid may be added to the top well 406 at a first flow rate. In various implementations, the first flow rate may be greater than or equal to 20 microliters/minute. For example, the first flow rate may be 50 microliters/minute +/- 1 microliter/minute. In various implementations, to add the second fluid to the top well, the top outlet 412 may be opened and the backside outlet 418 may be closed while the second fluid is added to the top well 406. In various implementations, the second fluid comprises cell culture media, phosphate buffered saline (PBS), or a combination thereof.

[0048] The method 500 includes trapping cells on pores 112, 114, 116, 118 of the cell trap membrane 100 by removing fluid via a backside outlet 418 of the manifold such that the fluid flows through the pores 112, 114, 116, 118 in a first direction until cells are trapped (block 506). In various implementations, the first direction may be through the inlets 132 of the pores 112, 114, 116, 118 and out of the windows 134 of the pores 112, 114, 116, 118. For example, as explained further above, the cells may be trapped as a result of fluid flowing through the inlets 132 of the pores 112, 114, 116, 118 and out of the windows 134 on the backside of the pores 112, 114, 116, 118. In various implementations, the fluid may be removed from a backside reservoir 414 of the manifold (such as via a backside outlet 418 of the manifold). In various implementations, individual cells may be trapped by each of at least a subset of the pores 112, 114, 116, 118 of the membrane. In various implementations, fluid may be removed via the backside outlet 418 at the first flow rate. In various implementations, the second fluid continues to be added to the top well 406 while removing fluid from the backside reservoir 414, such as via the top inlet at the first flow rate.

[0049] The method 500 includes releasing the cells by adding fluid via a backside inlet 402 of the manifold and removing fluid via a top outlet 412 of the manifold such that fluid flows through the pores 112, 114, 116, 118 in a second direction opposite the first direction (block 508). For example, the second direction may cause fluid to flow into the windows 134 and out of the inlets 132 to release the cells.

[0050] Although the examples above are described with reference to the flowchart illustrated in FIG. 5, many other methods of performing the acts associated with FIG. 5 may be used. For example, the order of some of the blocks may be changed, certain blocks may be combined with other blocks, one or more of the blocks may be repeated, and some of the blocks may be optional.

Fluidics Module

[0051] In various implementations, the method 500 further includes processing the cells with nanoinjection needles before releasing the cells. For example, nanoinjection needles may be aligned with the trapped cells (such as by delivering material to the cell). In various implementations, as noted above, the cell trap membrane 100 and the manifold 400 may be used in connection with a fluidics module to perform cell processing (such as to perform the method 500). As one specific example, FIG. 6 depicts a perspective view of an example fluidics module according to aspects of the present disclosure is shown as fluidics module 700.

[0052] The fluidics module 700 is shown as integrated with other modules and elements, such as elements of a module assembly as part of a cell processing system. The modules may a needle chip handling module and a tip-tilt platform module. Fluidics module 700 may include a cassette 710, an opening 716, a cell trapping chip 718, a first syringe 720, a second syringe 722, a first syringe actuator 724, a second syringe actuator 726, a fluid handling manifold 730, fluid connections 732, and a flow rate sensor 734.

[0053] Cassette 710 may be disposed in a cassette socket 740 formed in the surface of the custom platform 510. The cassette 710 may be secured in place in the cassette socket 740 via securing member 518. In some implementations, securing member 518 may be able to be fastened in place with fastener 742. The cassette 710 may contain an opening 716. Opening 716 may expose cell trapping chip 718. In various implementations, the cell trapping chip 718 may be an exemplary implementation of the manifold 400. For example, the cell trapping chip 718 may include a cell trap membrane 100. Pores of the cell trap membrane 100 may define target positions for trapped cells. When a needle chip is properly aligned with the cell trapping chip 718, microneedles on the needle chip align with the target positions to impact or poke the cells for processing (such as to deliver biomaterials into the cells).

[0054] The fluidics module 700 may include syringes, such as first syringe 720 and second syringe 722, configured to deliver and/or retrieve fluids into the cassette 710 for cell engineering workflows. For example, the syringes 720 and/or 722 may deliver solutions containing cells (e.g., a blood sample, a plasma sample, or a cell culture media) onto the cell trapping chip 718, according to the method 500. Additionally or alternatively, pumps having a fluid connection or connections with the cassette 710 may be used in place of syringes to transport material onto or off of the cell trapping chip 718. For example, displacement pumps and/or pressure control systems (such as a regulator corrected to a reservoir) may be used to transport fluids into the cassette 710. Other nonlimiting examples of fluidic pumps that could be employed in fluid transport in place of and/or in addition to syringes 720/722 may include a syringe pump, a peristaltic pump, a diaphragm pump, a vacuum pump, a pressure-based pump, and electroosmotic pump, a displacement pump and/or a piston pump.

[0055] First syringe 720 and/or second syringe 722 may retrieve cells during a cell engineering workflow or after a cell engineering workflow has completed. Additionally or alternatively, the first syringe 720 and/or second syringe 722 may deliver and/or retrieve other fluids (e.g., buffers, reagents, cell culture media, and so on) to/from the cassette 710 for use in cell engineering workflows, such as according ot the method 500. First syringe 720 may be actuated by a first syringe actuator 724, and second syringe 722 may be actuated by a second syringe actuator 726. Fluids may also be delivered to and/or retrieved from the cassette 710 via a fluid handling manifold 730. Fluid handling manifold may include fluid connections 732. Fluid flow rate in the fluidics module 700 may be monitored by a flow rate sensor 734. In some implementations, information from the flow rate sensor 734 may be provided as feedback to a fluid flow rate controller (not shown).

Computing Device

[0056] Referring to FIG. 7, an example of a computing device that is operable to support cell engineering workflows and methods according to one or more aspects of the present disclosure is shown as a computing environment 1100 that includes a computing device 1110. The computing device 1110 may be operable to initiate or control cell processing workflows including the stages of any of the processes described with reference to, for example, FIG. 5.

[0057] The computing device 1110 includes at least one processor 1120 and system memory 1130. Depending on the configuration and type of computing device, the system memory 1130 may be volatile (such as random access memory or “RAM”), non-volatile (such as read-only memory or “ROM,” flash memory, and similar memory devices that maintain stored data even when power is not provided) or some combination of the two. The system memory 1130 typically includes instructions 1132 and one or more applications. The at least one processor 1120 may be operable to execute the instructions 1132 to perform one or more operations described herein, including, for example, operations of the method 500. Alternatively, the instructions 1132, the applications, or both, may be located at multiple computing devices, where the multiple computing devices are part of a distributed computing system. In this case, one or more of the multiple computing devices of the distributed system may comprise the representative computing device 1110.

[0058] The computing device 1110 may also have additional features or functionality. For example, the computing device 1110 may also include removable and/or non-removable data storage devices such as magnetic disks, optical disks, tape, and standard-sized or miniature flash memory cards. Such additional storage is illustrated in FIG. 7 by storage 1140. Computer storage media may include volatile and/or non-volatile storage and removable and/or non-removable media implemented in any method or technology for storage of information such as computer- readable instructions, data structures, program components or other data. The system memory 1130 and the storage 1140 are examples of computer storage media. The computer storage media includes, but is not limited to, RAM, ROM, electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disks (CD), digital versatile disks (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store information and that can be accessed by computing device 1110. Any such computer storage media may be part of the computing device 1110. The computing device 1110 may also have input/output (VO) device(s) 1150, which may include input devices, such as a keyboard, mouse, pen, voice input device, touch input device, etc., output device(s), such as a display, speakers, a printer, etc., or a combination thereof. [0059] The computing device 1110 also contains one or more communication interface(s) 1160 that allow the computing device 1110 to communicate with a cell engineering system 1180 via a wired or a wireless network 1170. The cell engineering system 1180 may include one or more cell engineering process modules, one or more computing devices, cell engineering tools or devices, or a combination thereof. In an illustrative embodiment, the cell engineering system 1180 may initiate or facilitate, for example, any of the stages or operations of the processes described with reference to FIG. 5.

[0060] The communication interface(s) 1160 are an example of communication media. By way of example, and not limitation, communication media may include wired media such as a wired network or direct-wired connection, and wireless media, such as acoustic, radio frequency (RF), infrared and other wireless media. It will be appreciated, however, that not all of the components or devices illustrated in FIG. 7 or otherwise described in the previous paragraphs are necessary to support embodiments as herein described. For example, the VO device(s) 1150 may be optional.

[0061] Those of skill in the art would understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0062] Components, the functional blocks, and the modules described herein include processors, electronics devices, hardware devices, electronics components, logical circuits, memories, software codes, firmware codes, among other examples, or any combination thereof. In addition, features discussed herein may be implemented via specialized processor circuitry, via executable instructions, or combinations thereof.

[0063] Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure. Skilled artisans will also readily recognize that the order or combination of components, methods, or interactions that are described herein are merely examples and that the components, methods, or interactions of the various aspects of the present disclosure may be combined or performed in ways other than those illustrated and described herein.

[0064] The various illustrative logics, logical blocks, modules, circuits, and algorithm processes described in connection with the implementations disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. The interchangeability of hardware and software has been described generally, in terms of functionality, and illustrated in the various illustrative components, blocks, modules, circuits and processes described above. Whether such functionality is implemented in hardware or software depends upon the particular application and design constraints imposed on the overall system.

[0065] The hardware and data processing apparatus used to implement the various illustrative logics, logical blocks, modules, and circuits described in connection with the aspects disclosed herein may be implemented or performed with a general purpose single- or multi-chip processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, or any conventional processor, controller, microcontroller, or state machine. In some implementations, a processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. In some implementations, particular processes and methods may be performed by circuitry that is specific to a given function.

[0066] In one or more aspects, the functions described may be implemented in hardware, digital electronic circuitry, computer software, firmware, including the structures disclosed in this specification and their structural equivalents thereof, or any combination thereof. Implementations of the subject matter described in this specification also may be implemented as one or more computer programs, that is one or more modules of computer program instructions, encoded on a computer storage media for execution by, or to control the operation of, data processing apparatus.

[0067] If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. The processes of a method or algorithm disclosed herein may be implemented in a processor-executable software module which may reside on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that may be enabled to transfer a computer program from one place to another. A storage media may be any available media that may be accessed by a computer. By way of example, and not limitation, such computer- readable media can include random-access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that may be used to store desired program code in the form of instructions or data structures and that may be accessed by a computer. Also, any connection may be properly termed a computer-readable medium. Disk and disc, as used herein, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, hard disk, solid state disk, and Blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media. Additionally, the operations of a method or algorithm may reside as one or any combination or set of codes and instructions on a machine readable medium and computer-readable medium, which may be incorporated into a computer program product.

[0068] Various modifications to the implementations described in this disclosure may be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to some other implementations without departing from the spirit or scope of this disclosure. Thus, the claims are not intended to be limited to the implementations shown herein, but are to be accorded the widest scope consistent with this disclosure, the principles and the novel features disclosed herein.

[0069] Additionally, a person having ordinary skill in the art will readily appreciate, terms such as “left,” “right,” “above,” “below,” “upper,” and “lower” are sometimes used for ease of describing the figures, and indicate relative positions corresponding to the orientation of the figure on a properly oriented page, and may not reflect the proper orientation of any device as implemented.

[0070] Certain features that are described in this specification in the context of separate implementations also may be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation also may be implemented in multiple implementations separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination may in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.

[0071] Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Further, the drawings may schematically depict one more example processes in the form of a flow diagram. However, other operations that are not depicted may be incorporated in the example processes that are schematically illustrated. For example, one or more additional operations may be performed before, after, simultaneously, or between any of the illustrated operations. In certain circumstances, multitasking and parallel processing may be advantageous. Moreover, the separation of various system components in the implementations described above should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems may generally be integrated together in a single software product or packaged into multiple software products. Additionally, some other implementations are within the scope of the following claims. In some cases, the actions recited in the claims may be performed in a different order and still achieve desirable results.

[0072] As used herein, including in the claims, various terminology is for the purpose of describing particular implementations only and is not intended to be limiting of implementations. For example, as used herein, an ordinal term (e.g., “first,” “second,” “third,” etc.) used to modify an element, such as a structure, a component, an operation, etc., does not by itself indicate any priority or order of the element with respect to another element, but rather merely distinguishes the element from another element having a same name (but for use of the ordinal term).

[0073] The term “coupled” is defined as connected, although not necessarily directly, and not necessarily mechanically; two items that are “coupled” may be unitary with each other.

[0074] The term “or,” when used in a list of two or more items, means that any one of the listed items may be employed by itself, or any combination of two or more of the listed items may be employed. For example, if a composition is described as containing components A, B, or C, the composition may contain A alone; B alone; C alone; A and B in combination; A and C in combination; B and C in combination; or A, B, and C in combination. Also, as used herein, including in the claims, “or” as used in a list of items prefaced by “at least one of’ indicates a disjunctive list such that, for example, a list of “at least one of A, B, or C” means A or B or C or AB or AC or BC or ABC (that is A and B and C) or any of these in any combination thereof.

[0075] The phrase “and/or” means “and” or “or”. To illustrate, A, B, and/or C includes: A alone, B alone, C alone, a combination of A and B, a combination of A and C, a combination of B and C, or a combination of A, B, and C. In other words, “and/or” operates as an inclusive “or.”

[0076] The term “substantially” is defined as largely but not necessarily wholly what is specified - and includes what is specified; e.g., substantially 90 degrees includes 90 degrees and substantially parallel includes parallel - as understood by a person of ordinary skill in the art. In any disclosed aspect, the term “substantially” may be substituted with “within [a percentage] of’ what is specified, where the percentage includes 0.1, 1, 5, and 10 percent; and the term “approximately” may be substituted with “within 10 percent of’ what is specified.

[0077] The terms “a” and “an” are defined as one or more unless this disclosure explicitly requires otherwise. The term “substantially” is defined as largely but not necessarily wholly what is specified (and includes what is specified; e.g., substantially parallel includes parallel), as understood by a person of ordinary skill in the art.

[0078] The terms “comprise” (and any form of comprise, such as “comprises” and “comprising”), “have” (and any form of have, such as “has” and “having”), and “include” (and any form of include, such as “includes” and “including”) are open-ended linking verbs. As a result, an apparatus or system that “comprises,” “has,” or “includes” one or more elements possesses those one or more elements, but is not limited to possessing only those elements. Likewise, a method that “comprises,” “has,” or “includes,” one or more steps possesses those one or more steps, but is not limited to possessing only those one or more steps.

[0079] References made in this disclosure to microneedles, microneedle structures, or microneedle chips are intended to also refer respectively to nanoneedles, nanoneedle structures, and nanoneedle chips. References made in this disclosure to nanoneedles, nanoneedle structures, and nanoneedle chips are intended to also refer respectively to microneedles, microneedle structures, or microneedle chips. For the sake of clarity and conciseness, only one of the terms may be listed in aspects of this disclosure, but unless explicitly specified differently, a reference to one of these terms is intended to include the others. References simply to “needle chips” are intended to refer to microneedle chips and/or nanoneedle chips.

[0080] Although the aspects of the present disclosure and their advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit of the disclosure as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular implementations of the process, machine, manufacture, composition of matter, means, methods and processes described in the specification. As one of ordinary skill in the art will readily appreciate from the present disclosure, processes, machines, manufacture, compositions of matter, means, methods, or operations, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding aspects described herein may be utilized according to the present disclosure. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or operations.

Claims

1. A cell trap membrane comprising: an interior layer of silicon; a first exterior layer of silicon nitride on a first surface of the interior layer of silicon; and a second exterior layer of silicon nitride on a second surface of the interior layer of silicon, wherein the interior layer and the first exterior layer and the second exterior layer cooperatively define a plurality of pores, the plurality of pores being configured to trap individual cells, and wherein the plurality of pores are defined by pore inlets etched into the first exterior layer, windows etched into the second exterior layer, and gaps etched within the interior layer that extend between corresponding pores and windows.

2. The cell trap membrane of claim 1, wherein each pore of the plurality of pores is configured to trap an individual cell when fluid flows into the pore inlets and out of the windows.

3. The cell trap membrane of claim 2, wherein fluid is provided to and removed from the cell trap membrane by a manifold that contains the cell trap membrane.

4. The cell trap membrane of claim 1, wherein the plurality of pores have a diameter less than or equal to 10 microns.

5. The cell trap membrane of claim 1, wherein a distance between adjacent pores is less than or equal to 50 microns.

6. The cell trap membrane of claim 1, wherein each of the windows include at least one cross-beam formed from the interior layer of silicon.

7. The cell trap membrane of claim 1, wherein the windows are square in shape and the gaps are narrower at the first exterior layer than at the second exterior layer.

8. The cell trap membrane of claim 1, wherein the cell trap membrane is rectangular in shape with sides less than or equal to 5 cm in length.

9. The cell trap membrane of claim 1, further comprising at least one fiducial etched into the first exterior layer of silicon nitride.

10. The cell trap membrane of claim 1, further comprising one or more surface coatings applied to the first exterior layer, the second exterior layer, or a combination thereof.

11. A method for creating a cell trap membrane comprising: depositing a first exterior layer of silicon nitride onto a first surface of a silicon wafer; depositing a second exterior layer of silicon nitride onto a second surface of the silicon wafer; etching pore inlets into the first exterior layer; etching windows into the second exterior layer; and etching gaps into the silicon wafer that extend between corresponding pores and windows.

12. The method of claim 11 , wherein the pore inlets and the windows are etched using a first etching process.

13. The method of claim 12, wherein the first etching process is a reactive ion etching (RIE) process.

14. The method of claim 12, wherein the gaps are etched using a second etching process that differs from the first etching process.

15. The method of claim 14, wherein the second etching process is a potassium hydroxide (KOH) etching process.

16. The method of claim 11, wherein the first exterior layer and the second exterior layer are deposited using a low pressure chemical vapor deposition (LPCVD) process.

17. The method of claim 11, further comprising etching through the silicon wafer, the first exterior layer, and the second exterior layer after etching the gaps to release the cell trap membrane.

18. The method of claim 11, further comprising mounting the cell trap membrane onto a manifold configured to control fluid flow through the cell trap membrane.

19. The method of claim 11, further comprising applying surface coating to at least one of the first exterior layer and the second exterior layer.

20. A method for trapping cells using a cell trap membrane comprising: adding, via a top inlet of a manifold that contains the cell trap membrane, a first fluid to a first level within a top well of the manifold; adding, via the top inlet, a second fluid to the top well, wherein the second fluid contains cells to be trapped by the cell trap membrane; trapping cells on pores of the cell trap membrane by removing fluid via a backside outlet of the manifold such that the fluid flows through the pores in a first direction until cells are trapped; and releasing the cells by adding fluid via a backside inlet of the manifold and removing fluid via a top outlet of the manifold such that fluid flows through the pores in a second direction opposite the first direction.