[go: up one dir, main page]

Koike et al., 2013 - Google Patents

A power-gated MPU with 3-microsecond entry/exit delay using MTJ-based nonvolatile flip-flop

Koike et al., 2013

Document ID
7865683402005261050
Author
Koike H
Ohsawa T
Ikeda S
Hanyu T
Ohno H
Endoh T
Sakimura N
Nebashi R
Tsuji Y
Morioka A
Miura S
Honjo H
Sugibayashi T
Publication year
Publication venue
2013 IEEE Asian Solid-State Circuits Conference (A-SSCC)

External Links

Snippet

We propose a novel power-gated microprocessor unit (MPU) using a nonvolatile flip-flop (NV-F/F) with magnetic tunnel junction (MTJ). By using the NV-F/F to store the MPU's internal state, this MPU realizes power-gating operation with a small 3-microsecond entry/exit delay …
Continue reading at ieeexplore.ieee.org (other versions)

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5009Computer-aided design using simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power Management, i.e. event-based initiation of power-saving mode
    • G06F1/3234Action, measure or step performed to reduce power consumption
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00Indexing scheme relating to computer aided design [CAD]
    • G06F2217/78Power analysis and optimization
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F2217/00Indexing scheme relating to computer aided design [CAD]
    • G06F2217/70Fault tolerant, i.e. transient fault suppression
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037Bistable circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Similar Documents

Publication Publication Date Title
Lutkemeier et al. A 65 nm 32 b subthreshold processor with 9T multi-Vt SRAM and adaptive supply voltage control
Pu et al. A 9-mm 2 ultra-low-power highly integrated 28-nm CMOS SoC for Internet of Things
Kwon et al. Razor-lite: A light-weight register for error detection by observing virtual supply rails
Beigne et al. A 460 mhz at 397 mv, 2.6 ghz at 1.3 v, 32 bits vliw dsp embedding f max tracking
Koike et al. A power-gated MPU with 3-microsecond entry/exit delay using MTJ-based nonvolatile flip-flop
US8533648B2 (en) Automatic clock-gating propagation technique
Chadha et al. An ASIC low power primer: analysis, techniques and specification
Huang et al. A low-power low-VDD nonvolatile latch using spin transfer torque MRAM
Alghareb et al. Designing and evaluating redundancy-based soft-error masking on a continuum of energy versus robustness
Kapoor et al. Digital systems power management for high performance mixed signal platforms
Usami et al. Energy efficient write verify and retry scheme for MTJ based flip-flop and application
Flynn An ARM perspective on addressing low-power energy-efficient SoC designs
Di Pendina et al. A hybrid magnetic/complementary metal oxide semiconductor process design kit for the design of low-power non-volatile logic circuits
US11159163B2 (en) Single phase clock-gating circuit
Shin et al. One-cycle correction of timing errors in pipelines with standard clocked elements
Yamamoto et al. Nonvolatile flip-flop based on pseudo-spin-transistor architecture and its nonvolatile power-gating applications for low-power CMOS logic
Münch et al. Multi-bit non-volatile spintronic flip-flop
Di Pendina et al. Ultra compact non-volatile flip-flop for low power digital circuits based on hybrid cmos/magnetic technology
Borkar Extreme energy efficiency by near threshold voltage operation
Li et al. Power efficient data retention logic design in the integration of power gating and clock gating
Hanyu Standby-power-free integrated circuits using MTJ-based VLSI computing for IoT applications
Soni Clock Gated Low Power 64-Bit Register Design
US12073876B2 (en) Memory clock level-shifting buffer with extended range
Flynn Power gating applied to MP-SoCs for standby-mode power management
Sharma et al. Multi-Voltage Design of RISC Processor for Low Power Application: A Survey